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1.1 root 1: /*
2: * Machine specific header file.
3: * Intel iAPX-86.
4: * Small addressing model.
5: */
6: #define HEX 1
7: #define LOHI 1
8: #define CLIST BLIST
9: #define CPU "Intel iAPX-86"
10: #define MINIT 1
11: #define NB 128
12:
13: /*
14: * Formats and things for
15: * the part of the assembler that
16: * makes the listings.
17: */
18: #define NBOL 8
19: #define ADRFMT " %04x"
20: #define BFMT " %02x"
21: #define WFMT " %04x"
22: #define SKIP " "
23:
24: typedef unsigned address;
25:
26: #define fbyte(x) (((int) x)&0xFF)
27: #define sbyte(x) ((((int) x)>>8)&0xFF)
28: #define locrup(x) (((unsigned)(x)+01)&~01)
29:
30: /*
31: * Symbol flags.
32: */
33: #define S_OBL 0200 /* w:s literal usable */
34: #define S_NW 0201 /* Floating point no wait ops. */
35: #define S_FIX 0202 /* Kludge for fdiv, fdivr, fsub, fsubr. */
36:
37: /*
38: * Symbol kinds.
39: * Basicly one per type of
40: * operation.
41: */
42: #define S_INH 50 /* One byte */
43: #define S_INT 51 /* Interrupt */
44: #define S_JMP 52 /* Jumps */
45: #define S_CALL 53 /* Call */
46: #define S_XOP 54 /* Xcall and xjmp */
47: #define S_RET 55 /* Return */
48: #define S_MUL 56 /* Mul, div */
49: #define S_MULB 57 /* Ditto, but byte op. */
50: #define S_REL 58 /* Relative, no adjust (jcxz) */
51: #define S_DOP 59 /* Doubles */
52: #define S_IN 60 /* in */
53: #define S_PUSH 61 /* Push/pop */
54: #define S_SHL 62 /* Shift */
55: #define S_MOV 63 /* Moves */
56: #define S_XCHG 64 /* Exchanges */
57: #define S_IJMP 65 /* Icall and ijmp */
58: #define S_LEA 67 /* Load address */
59: #define S_SHLB 68 /* Shifts, byte */
60: #define S_OVER 69 /* Overide prefix */
61: #define S_SOP 70 /* Single op. */
62: #define S_SOPB 71 /* Ditto, but bytes */
63: #define S_ESC 73 /* Escape */
64: #define S_EVEN 74 /* .even */
65: #define S_ODD 75 /* .odd */
66: #define S_SYS 76 /* sys */
67: #define S_OUT 77 /* out */
68: #define S_FP_F 78 /* Floating fixed format */
69: #define S_FP_S 79 /* Floating stack format */
70: #define S_FP_SP 80 /* Floating stack pop */
71: #define S_FP_S1 81 /* Floating stack single operand format */
72: #define S_FP_M 82 /* Floating memory format */
73: #define S_PROT0 83 /* Protection Control 0 */
74: #define S_PROT1 84 /* Protection Control 1 */
75: #define S_PROTR 85 /* Protection Control to register */
76: #define S_ENTER 86 /* Enter procedure */
77:
78: /*
79: * Register names.
80: * The low 3 bit hold the register
81: * number, as coded in the type.
82: * The upper bits hold the register's
83: * type (0 => word, 1 => byte, 2 => seg
84: * and 3 => flags).
85: * This tracks the BR, WR and SR mode
86: * definitions.
87: */
88: #define AX 0
89: #define CX 1
90: #define DX 2
91: #define BX 3
92: #define SP 4
93: #define BP 5
94: #define SI 6
95: #define DI 7
96:
97: #define AL 010
98: #define CL 011
99: #define DL 012
100: #define BL 013
101: #define AH 014
102: #define CH 015
103: #define DH 016
104: #define BH 017
105:
106: #define ES 020
107: #define CS 021
108: #define SS 022
109: #define DS 023
110:
111: #define ST 040
112: #define ST1 041
113: #define ST2 042
114: #define ST3 043
115: #define ST4 044
116: #define ST5 045
117: #define ST6 046
118: #define ST7 047
119:
120: /*
121: * Address modes.
122: * These go in the e_mode field of
123: * and expression. Basicly the bottom 3
124: * bits go in the instruction, and the
125: * rest express the mode.
126: */
127: #define WR (0<<3) /* Word register */
128: #define BR (1<<3) /* Byte register */
129: #define SEGR (2<<3) /* Segment register */
130: #define IM (4<<3) /* Immediate */
131: #define DIR (5<<3) /* Direct */
132: #define IDX (6<<3) /* (dx) */
133: #define ICL (7<<3) /* (cl) */
134: #define X (8<<3) /* Index */
135:
136: #define NONE (-1) /* No legal mode */
137: #define MMASK 0170 /* Mode mask */
138: #define RMASK 07 /* Register mask */
139:
140: #define reg(x) (x&RMASK)
141: #define mof(x) ((x).e_mode&MMASK)
142: #define rof(x) ((x).e_mode&RMASK)
143:
144: /*
145: * Other magic.
146: */
147: #define MULDIV 0366
148: #define INCDEC 0376
149: #define NOTNEG 0366
150: #define IDREG 0100
151: #define AAM 0324
152: #define AAD 0325
153: #define APB 0012
154: #define FWAIT 0233
155: #define FNOP 0220
156: #define S 02
157: #define SEGPFX 0046
158: #define SHL 0320
159: #define SHLI 0300
160: #define TESTB 0204
161: #define TESTAB 0250
162: #define TESTMB 0366
163: #define TESTW 0205
164: #define TESTAW 0251
165: #define TESTMW 0367
166: #define XCHGR 0220
167: #define W 01
168: #define D 02
169: #define V 02
170: #define CMPB 0246
171: #define CMPW 0247
172: #define DXOP 0202
173: #define XOP 0377
174: #define DCALL 0350
175: #define IJORC 0377
176: #define LJMP 0351
177: #define JMP 0353
178: #define DJMP 0351
179: #define INT3 0314
180: #define INT 0315
181: #define PUSHSR 0006
182: #define PUSHR 0120
183: #define PUSHIW 0150
184: #define PUSHIB 0152
185: #define PUSHF 0234
186: #define PUSH 0377
187: #define POPSR 0007
188: #define POPR 0130
189: #define POPF 0235
190: #define POP 0217
191: #define ESC 0330
192: #define MOVB 0244
193: #define MOVSEG 0214
194: #define MVIB 0260
195: #define MVIW 0270
196: #define MVI 0306
197: #define MOVAM 0242
198: #define MOVMA 0240
199: #define ARPL 0143
200: #define CLTS 0006
201: #define ENTER 0310
202:
203: /* Floating point two-byte opcodes. */
204: #define FOP(x,y) (((x)<<8)|(y))
205: #define BYTE1(x) ((x)>>8)
206: #define BYTE2(x) ((x)&0xFF)
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