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1.1 root 1: /* $Header: /newbits/kernel/USRSRC/coh/RCS/null.c,v 1.4 91/07/24 07:51:24 bin Exp Locker: bin $ */
2: /* (lgl-
3: * The information contained herein is a trade secret of Mark Williams
4: * Company, and is confidential information. It is provided under a
5: * license agreement, and may be copied or disclosed only under the
6: * terms of that agreement. Any reproduction or disclosure of this
7: * material without the express written authorization of Mark Williams
8: * Company or persuant to the license agreement is unlawful.
9: *
10: * COHERENT Version 2.3.37
11: * Copyright (c) 1982, 1983, 1984.
12: * An unpublished work by Mark Williams Company, Chicago.
13: * All rights reserved.
14: -lgl) */
15: /*
16: * Null and memory driver.
17: * Minor device 0 is /dev/null
18: * Minor device 1 is physical memory
19: * Minor device 2 is kernel data
20: *
21: * $Log: null.c,v $
22: * Revision 1.4 91/07/24 07:51:24 bin
23: * update prov by hal
24: *
25: *
26: * Revision 1.1 88/03/24 16:14:04 src
27: * Initial revision
28: *
29: */
30: #include <sys/coherent.h>
31: #include <sys/con.h>
32: #include <errno.h>
33: #include <sys/stat.h>
34: #include <sys/uproc.h>
35:
36: /*
37: * Functions for configuration.
38: */
39: int nlread();
40: int nlwrite();
41: int nulldev();
42: int nonedev();
43:
44: /*
45: * Configuration table.
46: */
47: CON nlcon ={
48: DFCHR, /* Flags */
49: 0, /* Major index */
50: nulldev, /* Open */
51: nulldev, /* Close */
52: nulldev, /* Block */
53: nlread, /* Read */
54: nlwrite, /* Write */
55: nonedev, /* Ioctl */
56: nulldev, /* Powerfail */
57: nulldev, /* Timeout */
58: nulldev, /* Load */
59: nulldev /* Unload */
60: };
61:
62: /*
63: * Null/memory read routine.
64: */
65: nlread(dev, iop)
66: dev_t dev;
67: register IO *iop;
68: {
69: register unsigned n;
70:
71: switch (minor(dev)) {
72: case 0:
73: n = 0;
74: break;
75:
76: case 1:
77: n = pucopy((long)iop->io_seek, iop->io_base, iop->io_ioc);
78: break;
79:
80: case 2:
81: n = kucopy((vaddr_t)iop->io_seek, iop->io_base, iop->io_ioc);
82: break;
83:
84: default:
85: u.u_error = ENXIO;
86: return;
87: }
88: iop->io_ioc -= n;
89: if (u.u_error == EFAULT)
90: u.u_error = 0;
91: }
92:
93: /*
94: * Null/memory write routine.
95: */
96: nlwrite(dev, iop)
97: dev_t dev;
98: register IO *iop;
99: {
100: register unsigned n;
101:
102: switch (minor(dev)) {
103: case 0:
104: n = iop->io_ioc;
105: break;
106:
107: case 1:
108: n = upcopy(iop->io_base, (long)iop->io_seek, iop->io_ioc);
109: break;
110:
111: case 2:
112: n = ukcopy(iop->io_base, (vaddr_t)iop->io_seek, iop->io_ioc);
113: break;
114:
115: default:
116: u.u_error = ENXIO;
117: return;
118: }
119: iop->io_ioc -= n;
120: if (u.u_error == EFAULT)
121: u.u_error = 0;
122: }
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