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1.1 root 1: /* (-lgl
2: * COHERENT Driver Kit Version 2.0
3: * Copyright (c) 1982, 1992 by Mark Williams Company.
4: * All rights reserved. May not be copied without permission.
5: -lgl) */
6: /*
7: * /usr/include/sys/mmu.h
8: *
9: * Paging and other mmu support.
10: *
11: * Revised: Wed Apr 7 15:12:21 1993 CDT
12: */
13: #ifndef __SYS_MMU_H__
14: #define __SYS_MMU_H__
15:
16: #ifdef _I386
17: #include <sys/__paddr.h>
18: #include <sys/types.h>
19: #include <sys/uproc.h>
20:
21: /*
22: * NIGEL: for some reason the type "cseg_t" was in <sys/types.h>. It belongs
23: * here and in <sys/seg.h> as much as it belongs anywhere.
24: */
25:
26: #ifndef __CSEG_T
27: #define __CSEG_T
28: typedef long cseg_t;
29: #endif
30:
31: /* A click is a 4K byte paragraph.
32: * a segment is a 4 megabyte paragraph (level 1 page table entry)
33: */
34:
35: #define UII_BASE 0x00400000L /* base for sep I/D l.out text */
36:
37: #define SEG_ILL 0x00 /* The empty page table entry. */
38: #define SEG_PRE 0x01 /* Present bit. */
39: #define SEG_SRO 0x01 /* Read by system only. */
40: #define SEG_SRW 0x03 /* Read/Write by system only. */
41: #define SEG_RO 0x05 /* Read only by anybody. */
42: #define SEG_BITS 0x07 /* Permissions bits for a pte. */
43: #define SEG_RW 0x07 /* Read/Write by anybody. */
44: #define SEG_ACD 0x20 /* Page has been accessed. */
45: #define SEG_UPD 0x40 /* Page has been updated. */
46: /*
47: * SEG_NPL is for pages which are not from the sysmem pool.
48: * This includes pages representing video memory attached to
49: * user data.
50: * The SEG_NPL bit is not a real page table entry flag, and so is
51: * masked out when CPU page tables are loaded from process data.
52: */
53: #define SEG_NPL 0x80 /* Page is not in sysmem pool. */
54:
55: #define DIR_RW 0x07 /* us=us0|us1; rw=rw0&rw1; Intel's sOOO logical*/
56:
57: #define SEG_386_UI 0x08 /* [ 0000 0000 .. FFFF FFFF ] */
58: #define SEG_386_UD 0x10
59: #define SEG_386_KI 0x18
60: #define SEG_386_KD 0x21 /* kernel data in ring 1 */
61: #define SEG_286_UI 0x28
62: #define SEG_286_UD 0x30
63: #define SEG_TSS 0x38
64: #define SEG_ROM 0x40
65: #define SEG_VIDEOa 0x48
66: #define SEG_VIDEOb 0x50
67: #define SEG_386_II 0x58
68: #define SEG_386_ID 0x60
69: #define SEG_286_UII 0x68 /* UI -i */
70: #define SEG_LDT 0x70
71: #define SEG_RNG0_STK 0x78 /* lower limit of 0xFFFFF000 */
72: #define SEG_RNG0_TXT 0x80
73: #define SEG_RNG1_STK 0x88
74:
75: #define SEG_VIRT 0x100 /* pseudo bit for kxcopy */
76:
77: #define R_USR 0x03 /* user privilege level */
78: #define SEG_PL 0x03 /* privilege level mask */
79:
80: #define DPL_0 0x00 /* privilege level 0 */
81: #define DPL_1 0x01 /* privilege level 1 */
82: #define DPL_2 0x02 /* privilege level 2 */
83: #define DPL_3 0x03 /* privilege level 3 */
84:
85: /*
86: * These addresses are all in clicks.
87: */
88: #define ROM 0xFFFC0 /* BIOS virtual address. */
89: #define VIDEOa 0xFFFB0 /* CGA video virtual address. */
90: #define VIDEOb 0xFFFA0 /* Mono video virtual address. */
91:
92: #define PTABLE0_P 0x00001 /* Page directory physical address. */
93: #define PBASE 0x00002 /* Start of kernel, physical address. */
94:
95: #define PTABLE0_V 0xFFFFE /* Page directory virtual address. */
96: #define PPTABLE1_V 0xFFFFC /* Virtual address of the page table
97: * for the virtual page table.
98: */
99:
100: #define MAX_VADDR ctob(VIDEOb) /* Highest allocatable virtual address. */
101: /*
102: * Temporary virtual clicks WORK0 and WORK1 are no longer used.
103: * Instead there is a range of click pairs starting at START_WORK
104: * (which is currently 0xFFFFA000) and working down, managed in work.c.
105: *
106: * Addresses in kernel data for the RAM disk are now in rm.c.
107: * As of 92/12/23, they are
108: * RAM0 0x88000 Ram disk 0 virtual click address.
109: * RAM1 0x88800 Ram disk 1 virtual click address.
110: * RAMSIZE 0x00800 Number of clicks in each ram disk.
111: */
112:
113: #define SBASE 0xFFC00 /* Start of kernel, virtual address. */
114: #define PTABLE1_V 0xFF800 /* Start of virtual page table. */
115:
116: /*
117: * ptable0_v[] is the page directory (master page table).
118: * ptable1_v[] is the virtual page table.
119: */
120: #define ptable0_v ((long *)ctob(PTABLE0_V))
121: #define ptable1_v ((long *)ctob(PTABLE1_V))
122:
123:
124: #define SZDT 8 /* size of a segment descriptor */
125:
126: #define clickseg(n) (((long)n) << BPCSHIFT)
127: #define segclick(n) ((long)(n) >> BPCSHIFT)
128:
129: #define regread(n) ptable0_v[(n)>>BPC1SHIFT]
130: #define regload(n, v) { ptable0_v[(n)>>BPC1SHIFT] = v; mmuupd(); }
131:
132: #define xmode(ty) ((u.u_regl[DS]&0xffff) \
133: == ((ty)==286 ? (SEG_286_UD|R_USR) : (SEG_386_UD|R_USR)))
134: #define XMODE_286 ((u.u_regl[DS]&0xffff) == (SEG_286_UD|R_USR))
135: #define XMODE_386 ((u.u_regl[DS]&0xffff) == (SEG_386_UD|R_USR))
136: #define wdsize() ((XMODE_286) ? sizeof(short) : sizeof(int))
137:
138: /*
139: * These macros assume segment size <= 4 megabytes.
140: *
141: * MAPIO:absolute page table address, offset ->
142: * relative page table click# (20 bits) ... offset (12 bits)
143: * MAPIO converts (SEG.s_vmem, byte offset) to system global addr.
144: */
145: #define MAPIO(seg, off) (((seg)+((int)(off)>>BPCSHIFT) - sysmem.u.pbase) << \
146: BPCSHIFT | ((off) & (NBPC-1)))
147: #define P2P(addr) ((sysmem.u.pbase[btocrd(addr)]&~(NBPC-1)) |(addr&(NBPC-1)))
148:
149: #define BUDDY(addr,size) ((addr) ^ (1 << (size)))
150: #define NBUDDY 12 /* segments of 2^NBUDDY 4 click chunks (16 megabytes) */
151: #define SPLASH 3
152: #define NDATA 4 /* process data segments */
153: #define BLKSZ 2 /* log2 sizeof(BLOCKLIST)/sizeof(cseg_t) */
154:
155: SR *loaded();
156: cseg_t *c_begin();
157:
158: #define INSERT2(t, p, pp) { \
159: (p)->forw = (pp); \
160: (p)->back = (pp)->back; \
161: (pp)->back->forw = (p); \
162: (pp)->back= (p); \
163: }
164:
165: #define DELETE2(p) ((p)->forw->back = (p)->back, (p)->back->forw = \
166: (p)->forw, (p)->forw = (p)->back = (p))
167:
168: #define INIT2(lp) ((lp)->forw = (lp)->back = (lp))
169:
170: typedef struct blocklist
171: {
172: struct blocklist *back;
173: struct blocklist *forw;
174: int kval;
175: int fill; /* sizeof(BLOCKLIST) :: power of 2 */
176: } BLOCKLIST;
177:
178: #define WCOUNT 32 /* number of bits in an int */
179: #define WSHIFT 5
180:
181: typedef struct {
182: union {
183: BLOCKLIST *budtab;
184: cseg_t *pbase;
185: } u; /* beginning of pointer area */
186: int budfree[1 << (NBUDDY-WSHIFT)];
187: BLOCKLIST bfree[NBUDDY];
188: unsigned short *tfree, *efree, *pfree;
189: /* vector of page descriptors (base, end, current pointer) */
190: unsigned short lo, hi; /* valid physical memory (min,max) */
191: caddr_t vaddre; /* end of system */
192: } SYSMEM;
193:
194: extern SYSMEM sysmem;
195: cseg_t *c_alloc();
196: cseg_t *c_extend();
197: BLOCKLIST *arealloc();
198:
199: /*
200: * Declare and initialize an in-memory segment structure.
201: */
202: #define MAKESR(sr, seg) SEG seg; SR sr = { 0, 0, 0, &seg }
203:
204: /*
205: * Is 'p' a valid physical click address?
206: */
207: #define pvalid(p) ((p) >= sysmem.lo && (p) < sysmem.hi)
208:
209: /*
210: * How many clicks are free for allocation?
211: */
212: #define allocno() (sysmem.pfree - sysmem.tfree)
213:
214: /*
215: * IS_POW2() works for negative n only if the CPU uses 2's complement.
216: */
217: #define IS_POW2(n) (!((n) & ((n) - 1))) /* Is n a power of 2? */
218:
219: typedef struct {
220: int pid;
221: int r[SS+1];
222: int (*func)();
223: int a[5];
224: int res;
225: int err;
226: } EVENT;
227:
228: #define NEV 32
229: extern EVENT evtab[NEV];
230: EVENT *evtrap();
231:
232: #else /* From here to EOF is for 286 kernels. */
233:
234: /*
235: * The following macros facilitate independent access
236: * to the selector and offset of a faddr_t (far *) pointer.
237: */
238: #define FP_OFF(f) ( ((unsigned short *) &(f))[0] )
239: #define FP_SEL(f) ( ((unsigned short *) &(f))[1] )
240:
241: #ifdef KERNEL
242: /*
243: * The following selector accesses the global descriptor table.
244: */
245: extern saddr_t gdtsel;
246:
247: /*
248: * The following functions manipulate virtual address translation tables.
249: */
250: extern faddr_t ptov(); /* faddr_t ptov( paddr_t, fsize_t ); */
251: extern faddr_t ptovx(); /* faddr_t ptovx( paddr_t ); */
252: extern __paddr_t vtop(); /* __paddr_t vtop( faddr_t ); */
253: extern void vrelse(); /* void vrelse( faddr_t ); */
254: extern void vremap(); /* void vremap( SEG * ); */
255: #endif /* KERNEL */
256:
257: #endif /* _I386 */
258:
259: #endif /* MMU_H */
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