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Annotation of coherent/f/usr/include.78/sys/reg.h, revision 1.1

1.1     ! root        1: /* (-lgl
        !             2:  *     COHERENT Version 3.0
        !             3:  *     Copyright (c) 1982, 1990 by Mark Williams Company.
        !             4:  *     All rights reserved. May not be copied without permission.
        !             5:  -lgl) */
        !             6: /*
        !             7:  * Machine dependent definitions.
        !             8:  * 80386 Coherent, IBM PC.
        !             9:  */
        !            10: #ifndef        __SYS_REG_H__
        !            11: #define        __SYS_REG_H__
        !            12: 
        !            13: #include <sys/types.h>
        !            14: #include <sys/param.h>
        !            15: 
        !            16: /*
        !            17:  * Alloc definitions.
        !            18:  */
        !            19: #define        align(p)        ((ALL *) ((int) (p) & ~1))
        !            20: #define        link(p)         align((p)->a_link)
        !            21: #define        tstfree(p)      (((int) (p)->a_link&1) == 0)
        !            22: #define        setfree(p)      ((p)->a_link = (int) (p)->a_link & ~1)
        !            23: #define        setused(p)      ((p)->a_link = (int) (p)->a_link | 1)
        !            24: 
        !            25: 
        !            26: /*
        !            27:  * Functions.
        !            28:  * blockn - block number from byte number
        !            29:  * blocko - block offset from byte number
        !            30:  * nbnrem - offset into indirect block from block number
        !            31:  * nbndiv - residual indirect mapping from block number
        !            32:  * btocru - byte to click (saddr_t) rounding up
        !            33:  * btocrd - byte to click rounding down
        !            34:  * ctob - click to byte
        !            35:  * stod - saddr_t to daddr_t conversion for swapper.
        !            36:  */
        !            37: 
        !            38: #define        NIVEC   192
        !            39: 
        !            40: #define        blockn(n)               ((n)>>9)
        !            41: #define        blocko(n)               ((n)&(512-1))
        !            42: #define nbnrem(b)              ((int)(b)&(128-1))
        !            43: #define nbndiv(b)              ((b)>>7)
        !            44: 
        !            45: 
        !            46: #define        btos(n)         ((((unsigned long)(n))+(1<<BPSSHIFT)-1) >> BPSSHIFT)
        !            47: #define        btosrd(n)       (((unsigned long)(n)) >> BPSSHIFT)
        !            48: #define        stob(n)         (((long)(n)) << BPSSHIFT)
        !            49: 
        !            50: #define        btoc(n)         ((((unsigned long)(n))+NBPC-1) >> BPCSHIFT)
        !            51: #define        btocrd(n)       (((unsigned long)(n)) >> BPCSHIFT)
        !            52: #define        ctob(n)         (((long)(n)) << BPCSHIFT)
        !            53: 
        !            54: #define ctos(x)                (((x) + (1<<SG1SHIFT)-1) >> SG1SHIFT)
        !            55: #define        ctosrd(x)       ((x) >> SG1SHIFT)
        !            56: #define        stoc(x)         ((x) << SG1SHIFT)
        !            57: 
        !            58: /*
        !            59:  * The saved registers are accessed
        !            60:  * via constant offsets from the top of the
        !            61:  * user area stack. The symbols defined below,
        !            62:  * are the offsets, in words, from the initial system
        !            63:  * stack. The offsets depend on the actual save order
        !            64:  * defined by "tsave" in the assist.
        !            65:  */
        !            66: #define        SS      18
        !            67: #define        UESP    17
        !            68: #define        EFL     16
        !            69: #define        CS      15
        !            70: #define        EIP     14
        !            71: #define        ERR     13
        !            72: #define TRAPNO 12
        !            73: #define        EAX     11
        !            74: #define        ECX     10
        !            75: #define        EDX     9
        !            76: #define        EBX     8
        !            77: #define        ESP     7
        !            78: #define        EBP     6
        !            79: #define        ESI     5
        !            80: #define        EDI     4
        !            81: #define        DS      3
        !            82: #define        ES      2
        !            83: #define        FS      1
        !            84: #define        GS      0
        !            85: 
        !            86: /*
        !            87:  * These are not put on the stack, but they have slots in the table
        !            88:  * global_reg[].  These numbers are the offsets into that table.
        !            89:  */
        !            90: #define RCR0   19
        !            91: #define RCR1   20
        !            92: #define RCR2   21
        !            93: #define RCR3   22
        !            94: 
        !            95: /*
        !            96:  * How many register slots do we recognise?
        !            97:  */
        !            98: #define NUM_REG 23
        !            99: 
        !           100: /*
        !           101:  * Buffers are not mapped.
        !           102:  */
        !           103: #define        bsave(o)
        !           104: #define        brest(o)
        !           105: #define        bmapv(p)
        !           106: #define        bconv(p)        (p)
        !           107: 
        !           108: /*
        !           109:  * Drivers are not mapped.
        !           110:  */
        !           111: #define        dsave(o)
        !           112: #define        drest(o)
        !           113: #define        dmapv(s)
        !           114: #define        dvirt()         0
        !           115: #define dcopy(dst,src)
        !           116: 
        !           117: #define        mfixcon(pp)                     /* do nothing */
        !           118: 
        !           119: /*
        !           120:  * Register structure.
        !           121:  */
        !           122: typedef union mreg_u {
        !           123:        unsigned m_reg[1];
        !           124:        unsigned m_int;
        !           125: } MREG;
        !           126: 
        !           127: /*
        !           128:  * Segmenation prototype.
        !           129:  */
        !           130: typedef struct mproto {
        !           131:        unsigned mp_csl;
        !           132:        unsigned mp_dsl;
        !           133:        caddr_t mp_svb;
        !           134:        caddr_t mp_svl;
        !           135: } MPROTO;
        !           136: 
        !           137: /*
        !           138:  * Set jump and return structure.
        !           139:  */
        !           140: typedef        struct menv_s {
        !           141:        int     me_di;
        !           142:        int     me_si;
        !           143:        int     mc_bx;
        !           144:        int     me_bp;
        !           145:        int     me_sp;
        !           146:        int     me_pc;
        !           147:        int     me_fw;
        !           148: }      MENV;
        !           149: 
        !           150: /*
        !           151:  * Context structure.
        !           152:  */
        !           153: typedef        struct mcon_s {
        !           154:        int     mc_di;
        !           155:        int     mc_si;
        !           156:        int     mc_bx;
        !           157:        int     mc_bp;
        !           158:        int     mc_sp;
        !           159:        int     mc_pc;
        !           160:        int     mc_fw;
        !           161: }      MCON;
        !           162: 
        !           163: /*
        !           164:  * General register structure.
        !           165:  */
        !           166: typedef int MGEN[1];
        !           167: 
        !           168: /*
        !           169:  * Useful definitions.
        !           170:  */
        !           171: #define        PIC     0x20                    /* 8259 command port */
        !           172: #define        PICM    0x21                    /* 8259 mask port */
        !           173: #define        SPIC    0xA0                    /* Slave 8259 command port */
        !           174: #define        SPICM   0xA1                    /* Slave 8259 mask port */
        !           175: #define        MFTTB   0x0100                  /* Trace trap bit */
        !           176: #define        MFINT   0x0200                  /* Interupt enable */
        !           177: #define        MUERR   0x0002                  /* Location of errno */
        !           178: #define        MFCBIT  0x0001                  /* Carry bit */
        !           179: 
        !           180: #define NUM_IRQ_LEVELS         16      /* counting master & slave PIC's */
        !           181: #define LOWEST_SLAVE_IRQ       8       /* master is 0-7; slave is 8-15 */
        !           182: 
        !           183: #ifdef ENABLE_STREAMS
        !           184: 
        !           185: /*
        !           186:  * NIGEL: I have made some small modifications here to allow me to slot in the
        !           187:  * extensions necessary to support the DDI/DDK rational interrupt architecture.
        !           188:  *
        !           189:  * The two macros below are used by setivec () and clrivec () in "i386/md.c" to
        !           190:  * set the PIC mask values for the base level. Under the rational scheme, this
        !           191:  * also affects some global data which is used by the DDI/DDK spl... ()
        !           192:  * functions so they can safely manipulate the PIC mask registers rather than
        !           193:  * the CPU global mask bit.
        !           194:  */
        !           195: 
        !           196: void           DDI_BASE_SLAVE_MASK ();
        !           197: void           DDI_BASE_MASTER_MASK ();
        !           198: 
        !           199: #else  /* if ! defined (ENABLE_STREAMS) */
        !           200: 
        !           201: #define        DDI_BASE_SLAVE_MASK(m)          outb (SPICM, m)
        !           202: #define        DDI_BASE_MASTER_MASK(m)         outb (PICM, m)
        !           203: 
        !           204: #endif /* ! defined (ENABLE_STREAMS) */
        !           205: 
        !           206: 
        !           207: /*
        !           208:  * Trap codes.
        !           209:  * Passed in the upper 8 bits of
        !           210:  * the "id" passed to "trap".
        !           211:  */
        !           212: #define        SIDIV   0                       /* Divide overflow */
        !           213: #define SISST  1                       /* Single step */
        !           214: #define        SINMI   2                       /* NMI (parity) */
        !           215: #define        SIBPT   3                       /* Breakpoint */
        !           216: #define        SIOVF   4                       /* Overflow */
        !           217: #define        SIBND   5                       /* Bound */
        !           218: #define        SIOP    6                       /* Invalid opcode */
        !           219: #define        SIXNP   7                       /* Processor extension not available */
        !           220: #define        SIDBL   8                       /* Double exception */
        !           221: #define        SIXS    9                       /* Processor extension segment overrun */
        !           222: #define        SITS    10                      /* Invalid task state segment */
        !           223: #define        SINP    11                      /* Segment not present */
        !           224: #define        SISS    12                      /* Stack segment overrun/not present */
        !           225: #define        SIGP    13                      /* General protection */
        !           226: #define SIPF   14                      /* Page Fault */
        !           227: #define SIFP   16                      /* Floating Point */
        !           228: #define        SISYS   32                      /* System call */
        !           229: #define        SIRAN   33                      /* Random interrupt */
        !           230: #define        SIOSYS  34                      /* System call */
        !           231: #define        SIDEV   64                      /* Device interrupt */
        !           232: 
        !           233: /*
        !           234:  * For accessing high and low words of a long.
        !           235:  */
        !           236: struct l {
        !           237:        int     l_lo;
        !           238:        int     l_hi;
        !           239: };
        !           240: #define        msetppc(v)      u.u_regl[EIP] = (int)v
        !           241: 
        !           242: #endif

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