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1.1 root 1: /* (-lgl
2: * COHERENT Driver Kit Version 2.0
3: * Copyright (c) 1982, 1992 by Mark Williams Company.
4: * All rights reserved. May not be copied without permission.
5: -lgl) */
6: /*
7: * /usr/include/sys/mmu.h
8: *
9: * Paging and other mmu support.
10: *
11: * Revised: Wed Apr 7 15:12:21 1993 CDT
12: */
13: #ifndef __SYS_MMU_H__
14: #define __SYS_MMU_H__
15:
16: #include <common/_gregset.h>
17: #include <common/feature.h>
18:
19: #if ! __KERNEL__
20: # error You must be compiling the kernel to use this header
21: #endif
22:
23: #if _I386
24:
25: #include <common/__paddr.h>
26: #include <sys/types.h>
27: #include <sys/uproc.h>
28:
29: /*
30: * NIGEL: for some reason the type "cseg_t" was in <sys/types.h>. It belongs
31: * here and in <sys/seg.h> as much as it belongs anywhere.
32: */
33:
34: #ifndef __CSEG_T
35: #define __CSEG_T
36: typedef long cseg_t;
37: #endif
38:
39: /* A click is a 4K byte paragraph.
40: * a segment is a 4 megabyte paragraph (level 1 page table entry)
41: */
42:
43: #define UII_BASE 0x00400000L /* base for sep I/D l.out text */
44:
45: #define SEG_ILL 0x00 /* The empty page table entry. */
46: #define SEG_PRE 0x01 /* Present bit. */
47: #define SEG_SRO 0x01 /* Read by system only. */
48: #define SEG_SRW 0x03 /* Read/Write by system only. */
49: #define SEG_RO 0x05 /* Read only by anybody. */
50: #define SEG_BITS 0x07 /* Permissions bits for a pte. */
51: #define SEG_RW 0x07 /* Read/Write by anybody. */
52: #define SEG_ACD 0x20 /* Page has been accessed. */
53: #define SEG_UPD 0x40 /* Page has been updated. */
54: /*
55: * SEG_NPL is for pages which are not from the sysmem pool.
56: * This includes pages representing video memory attached to
57: * user data.
58: * The SEG_NPL bit is not a real page table entry flag, and so is
59: * masked out when CPU page tables are loaded from process data.
60: */
61: #define SEG_NPL 0x80 /* Page is not in sysmem pool. */
62:
63: #define DIR_RW 0x07 /* us=us0|us1; rw=rw0&rw1; Intel's sOOO logical*/
64:
65: #define SEG_386_UI 0x08 /* [ 0000 0000 .. FFFF FFFF ] */
66: #define SEG_386_UD 0x10
67: #define SEG_386_KI 0x18
68: #define SEG_386_KD 0x21 /* kernel data in ring 1 */
69: #define SEG_286_UI 0x28
70: #define SEG_286_UD 0x30
71: #define SEG_TSS 0x38
72: #define SEG_ROM 0x40
73: #define SEG_VIDEOa 0x48
74: #define SEG_VIDEOb 0x50
75: #define SEG_386_II 0x58
76: #define SEG_386_ID 0x60
77: #define SEG_286_UII 0x68 /* UI -i */
78: #define SEG_LDT 0x70
79: #define SEG_RNG0_STK 0x78 /* lower limit of 0xFFFFF000 */
80: #define SEG_RNG0_TXT 0x80
81: #define SEG_RNG1_STK 0x88
82:
83: #define SEG_VIRT 0x100 /* pseudo bit for kxcopy */
84:
85: #define R_USR 0x03 /* user privilege level */
86: #define SEG_PL 0x03 /* privilege level mask */
87:
88: #define DPL_0 0x00 /* privilege level 0 */
89: #define DPL_1 0x01 /* privilege level 1 */
90: #define DPL_2 0x02 /* privilege level 2 */
91: #define DPL_3 0x03 /* privilege level 3 */
92:
93: /*
94: * These addresses are all in clicks.
95: */
96: #define ROM 0xFFFC0 /* BIOS virtual address. */
97: #define VIDEOa 0xFFFB0 /* CGA video virtual address. */
98: #define VIDEOb 0xFFFA0 /* Mono video virtual address. */
99:
100: #define PTABLE0_P 0x00001 /* Page directory physical address. */
101: #define PBASE 0x00002 /* Start of kernel, physical address. */
102:
103: #define PTABLE0_V 0xFFFFE /* Page directory virtual address. */
104: #define PPTABLE1_V 0xFFFFC /* Virtual address of the page table
105: * for the virtual page table.
106: */
107:
108: #define MAX_VADDR ctob(VIDEOb) /* Highest allocatable virtual address. */
109: /*
110: * Temporary virtual clicks WORK0 and WORK1 are no longer used.
111: * Instead there is a range of click pairs starting at START_WORK
112: * (which is currently 0xFFFFA000) and working down, managed in work.c.
113: *
114: * Addresses in kernel data for the RAM disk are now in rm.c.
115: * As of 92/12/23, they are
116: * RAM0 0x88000 Ram disk 0 virtual click address.
117: * RAM1 0x88800 Ram disk 1 virtual click address.
118: * RAMSIZE 0x00800 Number of clicks in each ram disk.
119: */
120:
121: #define SBASE 0xFFC00 /* Start of kernel, virtual address. */
122: #define PTABLE1_V 0xFF800 /* Start of virtual page table. */
123:
124: /*
125: * ptable0_v[] is the page directory (master page table).
126: * ptable1_v[] is the virtual page table.
127: */
128: #define ptable0_v ((long *)ctob(PTABLE0_V))
129: #define ptable1_v ((long *)ctob(PTABLE1_V))
130:
131:
132: #define SZDT 8 /* size of a segment descriptor */
133:
134: #define clickseg(n) (((long)n) << BPCSHIFT)
135: #define segclick(n) ((long)(n) >> BPCSHIFT)
136:
137: #define regread(n) ptable0_v[(n)>>BPC1SHIFT]
138: #define regload(n, v) { ptable0_v[(n)>>BPC1SHIFT] = v; mmuupd(); }
139:
140: #define __xmode_286(regp) ((regp)->_i386._ds == (SEG_286_UD | R_USR))
141:
142:
143: /*
144: * These macros assume segment size <= 4 megabytes.
145: *
146: * MAPIO:absolute page table address, offset ->
147: * relative page table click# (20 bits) ... offset (12 bits)
148: * MAPIO converts (SEG.s_vmem, byte offset) to system global addr.
149: */
150: #define MAPIO(seg, off) (((seg)+((int)(off)>>BPCSHIFT) - sysmem.u.pbase) << \
151: BPCSHIFT | ((off) & (NBPC-1)))
152: #define P2P(addr) ((sysmem.u.pbase[btocrd(addr)]&~(NBPC-1)) |(addr&(NBPC-1)))
153:
154: #define BUDDY(addr,size) ((addr) ^ (1 << (size)))
155: #define NBUDDY 12 /* segments of 2^NBUDDY 4 click chunks (16 megabytes) */
156: #define SPLASH 3
157: #define NDATA 4 /* process data segments */
158: #define BLKSZ 2 /* log2 sizeof(BLOCKLIST)/sizeof(cseg_t) */
159:
160: SR *loaded();
161: cseg_t *c_begin();
162:
163: #define INSERT2(t, p, pp) { \
164: (p)->forw = (pp); \
165: (p)->back = (pp)->back; \
166: (pp)->back->forw = (p); \
167: (pp)->back= (p); \
168: }
169:
170: #define DELETE2(p) ((p)->forw->back = (p)->back, (p)->back->forw = \
171: (p)->forw, (p)->forw = (p)->back = (p))
172:
173: #define INIT2(lp) ((lp)->forw = (lp)->back = (lp))
174:
175: typedef struct blocklist
176: {
177: struct blocklist *back;
178: struct blocklist *forw;
179: int kval;
180: int fill; /* sizeof(BLOCKLIST) :: power of 2 */
181: } BLOCKLIST;
182:
183: #define WCOUNT 32 /* number of bits in an int */
184: #define WSHIFT 5
185:
186: typedef struct {
187: union {
188: BLOCKLIST *budtab;
189: cseg_t *pbase;
190: } u; /* beginning of pointer area */
191: int budfree[1 << (NBUDDY-WSHIFT)];
192: BLOCKLIST bfree[NBUDDY];
193: unsigned short *tfree, *efree, *pfree;
194: /* vector of page descriptors (base, end, current pointer) */
195: unsigned short lo, hi; /* valid physical memory (min,max) */
196: caddr_t vaddre; /* end of system */
197: } SYSMEM;
198:
199: extern SYSMEM sysmem;
200: cseg_t *c_alloc();
201: cseg_t *c_extend();
202: BLOCKLIST *arealloc();
203:
204: /*
205: * Declare and initialize an in-memory segment structure.
206: */
207: #define MAKESR(sr, seg) SEG seg; SR sr = { 0, 0, 0, &seg }
208:
209: /*
210: * Is 'p' a valid physical click address?
211: */
212: #define pvalid(p) ((p) >= sysmem.lo && (p) < sysmem.hi)
213:
214: /*
215: * How many clicks are free for allocation?
216: */
217: #define allocno() (sysmem.pfree - sysmem.tfree)
218:
219: /*
220: * IS_POW2() works for negative n only if the CPU uses 2's complement.
221: */
222: #define IS_POW2(n) (!((n) & ((n) - 1))) /* Is n a power of 2? */
223:
224: typedef struct {
225: int pid;
226: int r[SS+1];
227: int (*func)();
228: int a[5];
229: int res;
230: int err;
231: } EVENT;
232:
233: #define NEV 32
234: extern EVENT evtab[NEV];
235: EVENT *evtrap();
236:
237: #else /* if ! _I386 */
238:
239: /*
240: * The following macros facilitate independent access
241: * to the selector and offset of a faddr_t (far *) pointer.
242: */
243: #define FP_OFF(f) ( ((unsigned short *) &(f))[0] )
244: #define FP_SEL(f) ( ((unsigned short *) &(f))[1] )
245:
246: #if __KERNEL__
247:
248: /*
249: * The following selector accesses the global descriptor table.
250: */
251: extern saddr_t gdtsel;
252:
253: /*
254: * The following functions manipulate virtual address translation tables.
255: */
256: extern faddr_t ptov(); /* faddr_t ptov( paddr_t, fsize_t ); */
257: extern faddr_t ptovx(); /* faddr_t ptovx( paddr_t ); */
258: extern __paddr_t vtop(); /* __paddr_t vtop( faddr_t ); */
259: extern void vrelse(); /* void vrelse( faddr_t ); */
260: extern void vremap(); /* void vremap( SEG * ); */
261:
262: #endif /* __KERNEL__ */
263:
264: #endif /* ! _I386 */
265:
266: #endif /* ! defined (__SYS_MMU_H__) */
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