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1.1 ! root 1: /* ! 2: * /usr/include/sys/reg.h ! 3: * ! 4: * Machine dependent definitions, 80386 Coherent, IBM PC. ! 5: * ! 6: * Revised: Mon Jul 19 12:25:37 1993 CDT ! 7: */ ! 8: #ifndef __SYS_REG_H__ ! 9: #define __SYS_REG_H__ ! 10: ! 11: #include <sys/types.h> ! 12: #include <sys/param.h> ! 13: ! 14: /* ! 15: * Functions. ! 16: * blockn - block number from byte number ! 17: * blocko - block offset from byte number ! 18: * nbnrem - offset into indirect block from block number ! 19: * nbndiv - residual indirect mapping from block number ! 20: * btocru - byte to click (saddr_t) rounding up ! 21: * btocrd - byte to click rounding down ! 22: * ctob - click to byte ! 23: * stod - saddr_t to daddr_t conversion for swapper. ! 24: */ ! 25: ! 26: #define NIVEC 192 ! 27: ! 28: #define blockn(n) ((n)>>9) ! 29: #define blocko(n) ((n)&(512-1)) ! 30: #define nbnrem(b) ((int)(b)&(128-1)) ! 31: #define nbndiv(b) ((b)>>7) ! 32: ! 33: ! 34: #define btos(n) ((((unsigned long)(n))+(1<<BPSSHIFT)-1) >> BPSSHIFT) ! 35: #define btosrd(n) (((unsigned long)(n)) >> BPSSHIFT) ! 36: #define stob(n) (((long)(n)) << BPSSHIFT) ! 37: ! 38: #define btoc(n) ((((unsigned long)(n))+NBPC-1) >> BPCSHIFT) ! 39: #define btocrd(n) (((unsigned long)(n)) >> BPCSHIFT) ! 40: #define ctob(n) (((long)(n)) << BPCSHIFT) ! 41: ! 42: #define ctos(x) (((x) + (1<<SG1SHIFT)-1) >> SG1SHIFT) ! 43: #define ctosrd(x) ((x) >> SG1SHIFT) ! 44: #define stoc(x) ((x) << SG1SHIFT) ! 45: ! 46: /* ! 47: * The saved registers are accessed ! 48: * via constant offsets from the top of the ! 49: * user area stack. The symbols defined below, ! 50: * are the offsets, in words, from the initial system ! 51: * stack. The offsets depend on the actual save order ! 52: * defined by "tsave" in the assist. ! 53: */ ! 54: #define SS 18 ! 55: #define UESP 17 ! 56: #define EFL 16 ! 57: #define CS 15 ! 58: #define EIP 14 ! 59: #define ERR 13 ! 60: #define TRAPNO 12 ! 61: #define EAX 11 ! 62: #define ECX 10 ! 63: #define EDX 9 ! 64: #define EBX 8 ! 65: #define ESP 7 ! 66: #define EBP 6 ! 67: #define ESI 5 ! 68: #define EDI 4 ! 69: #define DS 3 ! 70: #define ES 2 ! 71: #define FS 1 ! 72: #define GS 0 ! 73: ! 74: /* ! 75: * These are not put on the stack, but they have slots in the table ! 76: * global_reg[]. These numbers are the offsets into that table. ! 77: */ ! 78: #define RCR0 19 ! 79: #define RCR1 20 ! 80: #define RCR2 21 ! 81: #define RCR3 22 ! 82: ! 83: /* ! 84: * How many register slots do we recognise? ! 85: */ ! 86: #define NUM_REG 23 ! 87: ! 88: /* ! 89: * Buffers are not mapped. ! 90: */ ! 91: #define bsave(o) ! 92: #define brest(o) ! 93: #define bmapv(p) ! 94: #define bconv(p) (p) ! 95: ! 96: /* ! 97: * Drivers are not mapped. ! 98: */ ! 99: #define dsave(o) ! 100: #define drest(o) ! 101: #define dmapv(s) ! 102: #define dvirt() 0 ! 103: #define dcopy(dst,src) ! 104: ! 105: #define mfixcon(pp) /* do nothing */ ! 106: ! 107: /* ! 108: * Register structure. ! 109: */ ! 110: typedef union mreg_u { ! 111: unsigned m_reg[1]; ! 112: unsigned m_int; ! 113: } MREG; ! 114: ! 115: /* ! 116: * Segmenation prototype. ! 117: */ ! 118: typedef struct mproto { ! 119: unsigned mp_csl; ! 120: unsigned mp_dsl; ! 121: caddr_t mp_svb; ! 122: caddr_t mp_svl; ! 123: } MPROTO; ! 124: ! 125: /* ! 126: * Set jump and return structure. ! 127: */ ! 128: typedef struct menv_s { ! 129: int me_di; ! 130: int me_si; ! 131: int mc_bx; ! 132: int me_bp; ! 133: int me_sp; ! 134: int me_cs; ! 135: int me_pc; ! 136: int me_space; ! 137: } MENV; ! 138: ! 139: /* ! 140: * Context structure. ! 141: */ ! 142: typedef struct mcon_s { ! 143: int mc_di; ! 144: int mc_si; ! 145: int mc_bx; ! 146: int mc_bp; ! 147: int mc_sp; ! 148: int mc_cs; ! 149: int mc_pc; ! 150: int mc_space; ! 151: } MCON; ! 152: ! 153: /* ! 154: * General register structure. ! 155: */ ! 156: typedef int MGEN[1]; ! 157: ! 158: /* ! 159: * Useful definitions. ! 160: */ ! 161: #define PIC 0x20 /* 8259 command port */ ! 162: #define PICM 0x21 /* 8259 mask port */ ! 163: #define SPIC 0xA0 /* Slave 8259 command port */ ! 164: #define SPICM 0xA1 /* Slave 8259 mask port */ ! 165: #define MFTTB 0x0100 /* Trace trap bit */ ! 166: #define MFINT 0x0200 /* Interupt enable */ ! 167: #define MUERR 0x0002 /* Location of errno */ ! 168: #define MFCBIT 0x0001 /* Carry bit */ ! 169: ! 170: #define NUM_IRQ_LEVELS 16 /* counting master & slave PIC's */ ! 171: #define LOWEST_SLAVE_IRQ 8 /* master is 0-7; slave is 8-15 */ ! 172: ! 173: #if _ENABLE_STREAMS ! 174: ! 175: /* ! 176: * NIGEL: I have made some small modifications here to allow me to slot in the ! 177: * extensions necessary to support the DDI/DDK rational interrupt architecture. ! 178: * ! 179: * The two macros below are used by setivec () and clrivec () in "i386/md.c" to ! 180: * set the PIC mask values for the base level. Under the rational scheme, this ! 181: * also affects some global data which is used by the DDI/DDK spl... () ! 182: * functions so they can safely manipulate the PIC mask registers rather than ! 183: * the CPU global mask bit. ! 184: */ ! 185: ! 186: __EXTERN_C_BEGIN__ ! 187: ! 188: void DDI_BASE_SLAVE_MASK __PROTO ((uchar_t _mask)); ! 189: void DDI_BASE_MASTER_MASK __PROTO ((uchar_t _mask)); ! 190: ! 191: __EXTERN_C_END__ ! 192: ! 193: #else /* if ! _ENABLE_STREAMS */ ! 194: ! 195: #define DDI_BASE_SLAVE_MASK(m) outb (SPICM, m) ! 196: #define DDI_BASE_MASTER_MASK(m) outb (PICM, m) ! 197: ! 198: #endif /* ! _ENABLE_STREAMS */ ! 199: ! 200: /* ! 201: * Trap codes. ! 202: * Passed in the upper 8 bits of ! 203: * the "id" passed to "trap". ! 204: */ ! 205: #define SIDIV 0 /* Divide overflow */ ! 206: #define SISST 1 /* Single step */ ! 207: #define SINMI 2 /* NMI (parity) */ ! 208: #define SIBPT 3 /* Breakpoint */ ! 209: #define SIOVF 4 /* Overflow */ ! 210: #define SIBND 5 /* Bound */ ! 211: #define SIOP 6 /* Invalid opcode */ ! 212: #define SIXNP 7 /* Processor extension not available */ ! 213: #define SIDBL 8 /* Double exception */ ! 214: #define SIXS 9 /* Processor extension segment overrun */ ! 215: #define SITS 10 /* Invalid task state segment */ ! 216: #define SINP 11 /* Segment not present */ ! 217: #define SISS 12 /* Stack segment overrun/not present */ ! 218: #define SIGP 13 /* General protection */ ! 219: #define SIPF 14 /* Page Fault */ ! 220: #define SIFP 16 /* Floating Point */ ! 221: #define SISYS 32 /* System call */ ! 222: #define SIRAN 33 /* Random interrupt */ ! 223: #define SIOSYS 34 /* System call */ ! 224: #define SIDEV 64 /* Device interrupt */ ! 225: ! 226: /* ! 227: * For accessing high and low words of a long. ! 228: */ ! 229: struct l { ! 230: int l_lo; ! 231: int l_hi; ! 232: }; ! 233: #define msetppc(v) u.u_regl[EIP] = (int)v ! 234: ! 235: #endif
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