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1.1       root        1: <MakerFile 2.0J>
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                     14: � H��X&�
                     15: u
&������h
_xNRW Device Driver Guide    &>13&? of &@16&E                          &F8/1/91&G       COMPANY CONFIDENTIAL
                     16: 
& ������`
_&&$6� ��$6�w &YURUR��`
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U&H��X&�
                     17: "�!H��X&�
                     18: x 
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&������h
_wNRW Device Driver Guide    &5#&6 of &74&8                          &97/31/91&:       COMPANY CONFIDENTIAL
                     19: <
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                     20: '+������`
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%%�$6�%�$$6�5)|URUR�� 8
ULAn  NRW DMA device driver can map in the first 0xf00000 (15 M) bytes of its �XUMUR��8
UTassociated slot space, or a portion thereof. A non-NRW DMA device driver can map in  !UHUR��@8
U  7all 16 MB of its slot space, or a portion thereof
S.
                     21: 
                     22: 
&;UCUR��` 
]m68k devices:
                     23: UU>UR�� <
UUOnly drivers associated with non-native devices can map in slot space; native device bU9UR��@<
U1drivers have no slot space associated with them.
                     24: '|U4UR��`>
V��BBoard space 
Uconsists of up to 256 MB, starting at 0xs000000. 
                     25: �U/UR��`#
]m88k devices:
                     26: �U*UR�� B
UNRXDrivers associated with devices in slots 13 and 14 are allowed to map in all or part of   �U%UR��@B
UENAtheir board space. Other drivers can not map in any board space.
                     27: �U UR��`$
]m68k devices:
                     28: �UUR��`G
UHOnly drivers associated with non-native devices can map in board space.
                     29: &&�l��UT`*
[Initialization RPCs
                     30: )&AUUR�� -
UUOperations are performed upon device ports by a combination of kernel rpc's, and for t&NU
UR��-
UUR_performance reasons, a set of kernel traps.  Kernel rpc's control access to the device and its   &[UUR��@-
U  registers.
                     31: f i&��Y��UT`0
[a dev_intr_attach()
                     32: &�T�UR��`2
U  Request interrupt notification.
                     33: <&�T�UR��`s
U a&
                     34: c&�T�UR��`.
Viv #import <Devices/user_driver.h>
                     35: at&�T�UR��`t
UUR"dev_return_t 
Vdev_intr_attach(
                     36: &�T�UR��`5
Uthport_t 
adev_port
U,
                     37: Bo
                     38: T�UR��`6
Uisport_t 
aintr_port
U);
                     39: T�UR��`,
UUR&
                     40: �7T�UR��`7
Uic
DESCRIPTION
                     41: �HT�UR�� :
VasSdev_intr_attach
U() requests that interrupt notification messages for the device URUT�UR��@:
Ur 7represented by dev_port be sent to the port intr_port.
                     42: .
                     43: oT�UR�� A
UYOnly a single port may be attached for device interrupts at any point in time. (A policy a|T�UR��@A
U-decision, more than functional requirement.)
                     44: $6�&�'#er$6�y of&l URUR��`
UU
&RH��X&�
                     45: '�&# aH��X&�
                     46: z l  t������`
_ts`NRW Device Driver Guide    # of 18                          7/30/91       COMPANY CONFIDENTIAL
                     47:   ������`
_t &
                     48: i+������`
_UR&�d(�#i))�iv$6�)�(re$6�%+|5URUR��`C
UrtRIn NRW, this request also binds a device interrupt with an interrupt request bit.
                     49: !UMUR��`E
aicDdev_port
U is the port representing the device access capability.
                     50: ha;UHUR��`H
acaQintr_port
U is the port to which interrupt notification messages will be sent.
                     51: np����UT`3
[_pdev_intr_detach()
                     52: �U?UR��`=
Uin Disable interrupt notification.
                     53: e �U:UR��`?
Upo&
                     54:  �U5UR��`@
V a #import <Devices/user_driver.h>
                     55: re�U0UR��`L
Ueq&dev_return_t 
Vdev_intr_detach
U(
                     56: �U+UR��`M
Uport_t 
adev_port
U,
                     57:  of�U&UR��`N
U��port_t  
aintr_port
U);
                     58: &
                     59: U!UR��`P
U
DESCRIPTION
                     60: &$UUR�� Q
V]dev_intr_detach
U disassociates interrupt notification messages for the device represented 7&1UUR��@Q
UNY:by 
adev_port
U from being sent to 
aintr_port
U.
                     61: &f�h��UT`R
[dev_chan_attach()
                     62: &�UUR��`9
U,Attach a DMA channel to a specified device.
                     63: &�U  UR��`D
U&
                     64: +&�UUR��`F
V #import <Devices/user_driver.h>
                     65:  r&�T�UR��`T
Ua &dev_return_t 
Vdev_chan_attach
U(
                     66: &�T�UR��`U
U��port_t 
adev_port
U,
                     67:  po&�T�UR��`V
Ue int 
achan_num
U,
                     68: ha&�T�UR��`W
Uca!boolean_t 
astream_mode
U,
                     69: h&�T�UR��`X
Uatint 
abuffer_size
U);
                     70: ��T�UR��`Z
Ude
DESCRIPTION
                     71: 
                     72: +T�UR�� ;
VinJdev_chan_attach
U associates a system-wide global DMA channel with the  8T�UR��@;
Uic^device-specific local channel 
achan_num
U of the device represented by 
adev_port
U.
                     73: RT�UR�� ]
UdZA 
Vdev_chan_attach
U must be performed for each physical dma channel to be used with _T�UR��@]
UUR
the device. 
                     74: eyT�UR��`_
adiDdev_port
U is the port representing the device access capability.
                     75:  7d*�or++�to$6�+�*R$6�)-|chURUR�� b
aa Wchan_num
U is the device physical channel number that should be bound with a logical rivUMUR��@b
U��
dma channel.
                     76: e.UHUR�� g
an_Tstream_mode
U specifies whether or not the device-specific hardware is capable of ;UCUR��g
UUEgenerating an End Of Record signal on input. See the description for �HU>UR��@g
UaBchan_dma_enqueue for more information on streaming mode channels.
                     77: bU9UR�� l
a_aZbuffer_size
U is the device-specific DMA buffer size. The kernel needs this information oU4UR��l
UanQwhen performing DMA dequeue operations; it is also used in verifying correct DMA ]|U/UR��@l
Uanalignment.
                     78: ust�����UT`n
[eadev_chan_detach()
                     79: �U&UR��`J
Uh (Dissociate a DMA channel from a device.
                     80: UR�U!UR��`O
Upo&
                     81: 
�UUR��`Y
Vre #import <Devices/user_driver.h>
                     82: ty&UUR��`o
U&dev_return_t 
Vdev_chan_detach
U(
                     83: &UUR��`p
Uport_t 
adev_port
U,
                     84: &+U
UR��`q
U-int 
achan_num
U);
                     85: R&KUUR��`r
U_n
DESCRIPTION
                     86: e&\UUR�� u
VneYdev_chan_detach
U disassociates the local DMA channel 
achan_num
U from the device R&iT�UR��@u
Uam!represented by 
adev_port
U.
                     87: t&��O��UT`v
[ hdev_reg_map()
                     88: &�T�UR��`I
U��1Map a device page into a driver�s address space.
                     89: u&�T�UR��`S
Uti&
                     90: f&�T�UR��`[
Vg #import <Devices/user_driver.h>
                     91: fo&�T�UR��`x
Ung"dev_return_t 
Vdev_reg_map
U(
                     92: T�UR��`y
Uisport_t 
adev_port
U,
                     93: er T�UR��`z
Uee!vm_task_t 
atarget_task
U,
                     94: l%T�UR��`{
Uin1vm_offset_t *
aaddr
U,/* in/out */
                     95: i2T�UR��`|
UU/boolean_t 
aanywhere
U);
                     96: ���RT�UR��`}
UdeDESCRIPTION
                     97: )
                     98: cT�UR�� ~
Uh Vdev_reg_map maps the device register page of the device associated with dev_port into pT�UR��~
U/uUthe target task at addr.  This RPC is invalid for m88k devices which are not NRW DMA �}T�UR��@~
U )devices and for non-native m68k devices.
                     99: d,���--�
                    100: e$6�-�,ac$6�+/|
_nURUR��`�
avi;dev_port
U is the kernel provided handle for the device.
                    101: ��O!UMUR��`�
adeZtarget_task
U represents the address space into which the device page should be mapped.
                    102: ;UHUR��`�
aT�Waddr
U is the address in 
atarget_task
U where the device page should be mapped.
                    103: VdUUCUR�� �
aT�\anywhere
U is a boolean; if true, indicates the kernel may pick any unused address to map asbU>UR��@�
U��the device page.
                    104: e�����UT`\
[dev_reg_unmap()
                    105: 
                    106: i�U5UR��`^
UU/4Remove a device page from a driver�s address space.
                    107: de�U0UR��`a
UT�&
                    108: R�U+UR��`c
Vre #import <Devices/user_driver.h>
                    109: e �U&UR��`�
Uci$dev_return_t 
Vdev_reg_unmap
U(
                    110: ~&U!UR��`�
Uasport_t 
adev_port
U,
                    111: id &UUR��`�
Uhi!vm_task_t 
atarget_task
U,
                    112: ~&UUR��`�
Ufovm_offset_t 
aaddr
U);
                    113: &>UUR��`�
UDESCRIPTION
                    114: &OU
UR�� �
V
                    115: ePdev_reg_unmap
U unmaps the device register page of the device associated with &\UUR���
a�kdev_port
U. 
atarget_task
U and 
aaddr
U must match similar parameters passed to a previous call res&iUUR��@�
Upato dev_reg_map().
                    116: &��T��UT`�
[e dev_slot_map()
                    117: ��&�T�UR��``
U i.Map slot space into a driver�s address space.
                    118: &�T�UR��`e
Ube&
                    119: p&�T�UR��`f
V�� #import <Devices/user_driver.h>
                    120: n;&�T�UR��`�
Us #dev_return_t 
Vdev_slot_map
U(
                    121: s tT�UR��`�
U��port_t 
adev_port
U,
                    122: ���T�UR��`�
Ude!vm_task_t 
atarget_task
U,
                    123: /%T�UR��`�
Upavm_offset_t 
aoffset
U,
                    124: 2T�UR��`�
Uavm_size_t 
alen
U,
                    125: e?T�UR��`�
U/u1vm_offset_t *
aaddr
U,/* in/out */
                    126: LT�UR��`�
UUboolean_t 
aanywhere
U);
                    127: t fT�UR��`�
Ud &
                    128: d.�ta//�UR$6�/�.dr$6�-1|URURUR�� �
Vre\dev_slot_map
U maps the slot space of the NeXTbus device associated with 
adev_port
U �UMUR��@�
UaSinto the target task at 
aaddr
U. This RPC is illegal for native m68k devices.
                    129: all.UHUR��`�
a�;dev_port
U is the kernel provided handle for the device.
                    130: ��HUCUR��`�
a iZtarget_task
U represents the address space into which the device page should be mapped.
                    131: bU>UR��`�
a/uVoffset
U is an offset within the device's slot space at which mapping should begin.
                    132: |U9UR��`�
a Naddr
U is the address in target_task where the slot space should be mapped.
                    133: �U4UR�� �
adlen
U is the length in bytes of the region to be mapped.  The maximum value for (
aoffset
U + _o�U/UR���
a
UNlen
U) is 0xf00000 (15M) for NRW DMA devices and 0x1000000 (16 M) for other �U*UR��@�
Ud   devices.
                    134: �U%UR�� �
a\anywhere
U is a boolean, if true, indicates the kernel may pick any unused address to map �U UR��@�
Uthe slot space.
                    135: �&�q��UT`�
[
dev_slot_unmap()
                    136: a&*UUR��`h
Ude0Remove slot space from a driver�s address space
                    137: ��&AUUR��`j
U t&
                    138: e&RU
UR��`m
V
 #import <Devices/user_driver.h>
                    139:  m&lUUR��`�
UUH%dev_return_t 
Vdev_slot_unmap
U(
                    140: e&yUUR��`�
Uleport_t 
adev_port
U,
                    141: ��&�T�UR��`�
Uas!vm_task_t 
atarget_task
U,
                    142: i&�T�UR��`�
Ucevm_offset_t 
aaddr
U,
                    143: UR&�T�UR��`�
Uetvm_size_t 
alen
U);
                    144: &�T�UR��`�
UceDESCRIPTION
                    145: in&�T�UR�� �
VU9Odev_slot_unmap
U unmaps the slot space of the NeXTbus device associated with uld&�T�UR��@�
aURsdev_port
U. 
aaddr 
Uand 
alen
U must match similar fields from a previous call to 
Vdev_slot_map
U.
                    146: �U/d0�0011�ev$6�1�0r $6�/3| ������UT`�
[a dev_board_map()
                    147: in&UNUR��`s
U m/Map board space into a driver�s address space.
                    148: @�=UIUR��`w
Uce&
                    149: �NUDUR��`
V
 #import <Devices/user_driver.h>
                    150: hhU?UR��`�
Usp$dev_return_t 
Vdev_board_map
U(
                    151: UuU:UR��`�
U
                    152: eport_t 
adev_port
U,
                    153:  <D�U5UR��`�
U.h!vm_task_t 
atarget_task
U,
                    154: n�U0UR��`�
Umavm_offset_t 
aoffset
U,
                    155: �U+UR��`�
Utvm_size_t 
alen
U,
                    156: s�U&UR��`�
Uta0vm_offset_t *
aaddr
U,/* in/out */
                    157: t �U!UR��`�
UT�boolean_t 
aanywhere
U);
                    158: le�UUR��`�
U��&
                    159: ��UUR�� �
VMdev_board_map
U maps the board space of the NeXTbus device associated with e�UUR��@�
ath3dev_port
U into the target task at 
aaddr
U.
                    160: and&U
UR��`�
ama;dev_port
U is the kernel provided handle for the device.
                    161: U.&+UUR��`�
aZtarget_task
U represents the address space into which the board space should be mapped.
                    162: &EUUR��`�
a3Woffset
U is an offset within the device's board space at which mapping should begin.
                    163: rd &_T�UR��`�
ar�Waddr
U is the address in 
atarget_task
U where the board space should be mapped.
                    164: riv&yT�UR�� �
a��dlen
U is the length in bytes of the region to be mapped.  The maximum value for (
aoffset
U + U5&�T�UR��@�
alen
U) is 0x10000000 (256M).
                    165: �U0&�T�UR�� �
a\anywhere
U is a boolean, if true, indicates the kernel may pick any unused address to map ta&�T�UR��@�
U
athe board space.
                    166:  &�;��UT`�
[URdev_board_unmap()
                    167: T�UR��`K
U
2Remoce board space from a driver�s address space.
                    168: T�UR��`i
U &
                    169: s(T�UR��`t
Vf  #import <Devices/user_driver.h>
                    170:  eBT�UR��`�
Uth&dev_return_t 
Vdev_board_unmap
U(
                    171: OT�UR��`�
UU
port_t 
adev_port
U,
                    172:  i\T�UR��`�
Ude!vm_task_t 
atarget_task
U,
                    173: RiT�UR��`�
Uetvm_offset_t 
aaddr
U,
                    174: ssvT�UR��`�
Uthvm_size_t 
alen
U);
                    175: d2�U33�he$6�3�2pi$6�1:| ad iURUR��`�
U
aDESCRIPTION
                    176: UUMUR�� �
VpaNdev_slot_map
U unmaps the board space of the NeXTbus device associated with %UHUR���
aap]dev_port
U. 
aaddr 
Uand 
alen
U must match similar fields from a previous call to 52UCUR��@�
U��dev_board_map.
                    177: e
g����UT`�
[f Operational RPC's
                    178: �����UT`�
[y chan_command()
                    179:  ma�U6UR��`�
U� Issue channel-specific command.
                    180: UT�U1UR��`�
Ud_&
                    181: a�U,UR��`�
UK&
                    182: 
�U'UR��`�
Vce #import <Devices/user_driver.h>
                    183: T�&U"UR��`�
U
                    184: s$chan_return_t 
Vchan_command
U(
                    185: /u&!UUR��`�
UT�port_t 
adev_port
U,
                    186: t &.UUR��`�
U
int 
achan_num
U,
                    187: &;UUR��`�
Ut#chan_command_t 
acommand
U);
                    188: sk_&[UUR��`�
U
UDESCRIPTION
                    189: ��&lU  UR�� d
Vse]chan_command
U is used to issue commands on the dma channel identified by 
adev_port
U &yUUR��d
U3Zand 
achan_num
U.  CHAN_NONE can be specified for 
achan_num
U if no channels are &�T�UR��d
U��Qattached; in this case the only legal chan_command_t bits are CC_INTR_ENABLE and c&�T�UR��@d
UevQINTR_DISABLE. Otherwise it is an error if the device or channel is not attached.
                    190: &�T�UR��`�
ar ;dev_port
U is the kernel provided handle for the device.
                    191: rd_&�T�UR��`�
aUT(chan_num
U is a local channel number.
                    192: �&�T�UR��`�
a()7command
U is the command for the channel to execute:
                    193: 
                    194: UT&�T�UR��`�
Ud_-CC_START_READ -- enable read dma (68K only)
                    195: eT�UR��`�
U/u/CC_START_WRITE -- enable write dma (68K only)
                    196: _t /T�UR��`�
UU=CC_ABORT -- abort current dma (disables channel) (68K only)
                    197: RIT�UR��`�
Ut 4CC_INTR_ENABLE -- enable interrupts on the channel
                    198: ndcT�UR��`�
U);6CC_INTR_DISABLE -- disable interrupts on the channel
                    199: d4�is55�a $6�5�4
$6�%| 
HA
                    200: ��
                    201: ��UUh�
Zif &1Kernel-Level Driver Support
                    202: nnB����UT`
[��
Device Ports
                    203: h]UMUR�� !
UheYRights to access a device's registers, to program its dma channel, and receive interrupt  jUHUR��!
U e^notification are conveyed by a task holding send rights to a per-device port referred to here wUCUR��!
Uorcas the 
adev_port
U.  The kernel responds to requests sent on the dev_port in order to provide 7co�U>UR��!
Uomfthese services to the requesting task.  
adev_port
U's are created early in system initialization �U9UR��@!
U/uZand passed out to the appropriate device drivers by a process that is not described here.
                    204: ƪ���UT`"
[blRegister Mapping
                    205: l�U0UR�� %
U�[This interface provides various mechanisms for device drivers to map the physical register SAB�U+UR��%
Urr[space associated with their devices into their local address space. Which mechanism(s) can ��U&UR��%
U
Zbe used by a particular device driver are determined by the machine architecture, whether &U!UR��@%
U��_the device is a native device or a NextBus device, and the Slot ID in which the device lives. 
                    206: rog&"UUR�� &
Ul,_For the purposes of the following discussion, an 
VNRW DMA Device
U is defined as a device ght&/UUR��&
Upo[in an m88k machine which resides in a slot with whose NextBus slot Id bits 9 through 7 are que&<UUR��@&
Uv_\'111'.  A 
Vnative device
U is a device which is an integral part of an m68k-based CPU.
                    207: de&VU
UR�� '
Ure[There are three kinds of device register space which can be mapped in to a device driver's evi&cUUR��@'
Uoclocal address space:
                    208: e&}UUR�� )
VUT\Register Space
U consists of one page (the size of which is machine dependent but can for or&�T�UR��)
U mZnow be assumed to be 8k bytes) consisting of device-specific registers. For m88k devices, &�T�UR��)
U sYthe format of a device page is defined in the NRW system spec, section 5.2.8.2. For m68k  &�T�UR��)
Uth\devices, a device page is the physical memory region comprising all of the registers in one us&�T�UR��@)
UloUnative device; the start of the register space may not be page-aligned in this case.
                    209: w&�T�UR��`+
] m88k devices:
                    210: &�T�UR�� /
Us TA driver can map in a register page if and only if it is associated with an NRW DMA e &�T�UR��@/
Uts      Device. 
                    211: 7T�UR��`(
]��m68k devices:
                    212: &T�UR��`1
Uic_A driver can map in a register page if and only if it is associated with a native device.
S 
                    213: re @T�UR��`4
SicP
VSlot Space 
Uconsists of up to 16 MB of memory, starting at 0xfs000000. 
                    214: ocZT�UR��`
]acm88k devices:
                    215: d6�st78�e $6�7�86ca$6�} ed& 8URUR��`
Ug &dH��X&�
                    216: 8�76 dH��X&�
                    217: ~ f &ce������h
_n O1-&-#&.&/Running H/F 1&0:  &2Running H/F 2&;&3PRELIMINARY&4devd9�gi::�he$6�:�9)$6�3<| st(ceURUR�� �
UliDAll commands may be or'ed with CC_INTR_ENABLE or CC_INTR_DISABLE to /UMUR���
U m;form compound commands (e.g. CC_ABORT | CC_INTR_DISABLE or  NR!UHUR���
U��CCC_START_READ | CC_INTR_ENABLE).  Note than on NRW, CC_START_READ, `1.UCUR���
U mNCC_START_WRITE, and CC_ABORT are done by the driver by directly accessing the ;U>UR��@�
U4channel command register.
                    218: p����UT`
[chan_dma_enqueue()
                    219:  at�U5UR��`�
UT�*Add a DMA Frame to the current DMA queue.
                    220: �U0UR��`�
U&
                    221: t�U+UR��`�
U&
                    222:  �U&UR��`�
V� #import <Devices/user_driver.h>
                    223: �U!UR��`
U(chan_return_t 
Vchan_dma_enqueue
U(
                    224: �X�UUR��`
Uport_t 
adev_port
U,
                    225: &&UUR��`
Uf int  
achan_num
U,
                    226:  &UUR��`
URutask_t 
atask_port
U,
                    227: H/&U
UR��`      
UMIvm_offset_t 
aaddr
U,
                    228: �&(UUR��`
                    229: 
Uvm_size_t 
alen
U,
                    230: &5UUR��`
Udirection_t 
arw
U,
                    231: &BT�UR��`
Uchan_desc_cmd_t 
acmd
U,
                    232: DAl&OT�UR��`

Uorunsigned char 
aindex
U,
                    233: R_D&\T�UR��`
UUR$chan_enqueue_opts_t 
aopts
U,
                    234: e.&iT�UR��`
UNTunsigned 
adma_id
U,
                    235: �&vT�UR��`
UD boolean_t *
arunning
U);
                    236: NRW&�T�UR��`
U1&
                    237: C&�T�UR�� 
VCCWchan_dma_enqueue
U  builds and enqueues a list of dma descriptors describing a block @�&�T�UR��
Uan]of memory.  This block of memory is referred to as a 
Vframe
U. The frame may cross page o&�T�UR��
UueVboundaries in most cases. The exception is for channels which have been configured as &�T�UR��
UX"streaming mode" channels per 
Vdev_chan_attach
U(). Frames for DMA read operations rt&�T�UR��
U,S(device to memory) for streaming mode channels must not cross page boundaries. The at&�T�UR��
UU
\reason for this restriction is that when the device-specific logic signals "End of record", 
                    238: &�T�UR��
UWthe DMA hardware will advance to the next buffer descriptor, not the next frame. There UR&�T�UR��
UsiOis no way for the hardware to advance to the next frame; frames are a software 
U&�T�UR��
UTconstruct. Therefor for such channels, we force one frame to consist of exactly one ); T�UR��@
UDMA descriptor.
                    239: ��#T�UR�� 
U_eRThere are system dependent limits to the amount of memory that may be queued with 0T�UR��
VofYchan_dma_enqueue
U; exceeding this limit will return an error and the data will not be o=T�UR��@
Uue
                    240: enqueued.
                    241: WT�UR�� 
ae baddr
U must be aligned to the size of the device buffer.  On m68K machines, 
alen
U must be dT�UR��
UanWa multiple of the device buffer length for all descriptors with CEO_EOR not set in the forqT�UR��
aan`opts
U argument. On m88k machines, 
alen
U must be a multiple of the device buffer length ha~T�UR��@
Uspfor DMA read operations.
                    242: fd;�th<<�va$6�<�; n$6�:>| isURUR��`
UrdCChains of DMA frames will be limited to some length by the kernel.
                    243: ��!UMUR��`�
at.;dev_port
U is the kernel provided handle for the device.
                    244:  ex;UHUR��`
aUR(chan_num
U is a local channel number.
                    245: ��UUCUR��`
ae :task_port
U is the task where dma will be done to/from.
                    246: oU>UR��`!
aURHaddr
U is the address in the current task where the dma should begin.
                    247: ro�U9UR��`#
al Dlen
U is the length of the dma in the target tasks address space.
                    248:  m�U4UR�� &
athTrw
U is the direction of the dma, either DMA_DIR_READ (from the device to memory) an�U/UR��@&
Ue .or DMA_DIR_WRITE (from memory to the device).
                    249: �U*UR��`(
ahe8cmd
U is a NRW channel descriptor command (m88k only)
                    250: ne�U%UR��`*
at \index
U  contains the region and register index to which cmd will be written (m88k only).
                    251: �U UR��`,
a[opts
U are channel options that should apply to the frame being enqueued. These include:
                    252: &UUR�� -
UGCEO_EOR -- the last descriptor in the frame should be indicated as the e l&%UUR��@-
Ul.end-of-record.
                    253: `�&?UUR��`.
U i9CEO_DESC_INTR -- interrupt when this frame is completed.
                    254: �&YUUR��`/
U
3CEO_ENABLE_INTR -- enable interrupt notification.
                    255: :ta&sUUR��`0
U tACEO_ENABLE_CHAN -- enable DMA channel after enqueue (m68k only).
                    256: i&�UUR��`1
UUT?CEO_DESC_CMD -- enable channel descriptor command (m88k only)
                    257: Dle&�T�UR�� 5
ah ^dma_id
U is an integer, uninterpreted by the kernel, whose sole purpose is to identify this &�T�UR��@5
UMAZframe when 
Vchan_dma_dequeue
U()'d. 
adma_id
U must not be equal to DMA_ID_NULL.
                    258: &�T�UR�� 7
aU*[running
U is returned; on the m68k this indicates whether the channel was enabled at the at &�T�UR��7
UinStime of the enqueue (if not, a channel enable will be required). On the m88k, this ��&�T�UR��7
U aYindicates whetehr or not the transfer engine had a non-empty descriptor list at the time R&�T�UR��7
UEO]of the enqueue. If on the m88k 
arunning
U is FALSE, a Load Descriptor operation will be fT�UR��@7
UUR necessary to start the channel.
                    259: erd=�
                    260: �>>�C$6�>�= n$6�<F|EN"HA����UT`9
[anchan_dma_dequeue()
                    261: 8k &UNUR��`�
U��/Dequeue DMA frames from the current DMA queue.
                    262: tor=UIUR��`�
Uy)&
                    263: eTUDUR��`�
Uh &
                    264: meU?UR��`�
Veg #import <Devices/user_driver.h>
                    265: hoU:UR��`;
U t(chan_return_t 
Vchan_dma_dequeue
U(
                    266: e �U5UR��`<
Udeport_t 
adev_port
U,
                    267:  mu�U0UR��`=
U Dint 
achan_num
U,
                    268: 7�U+UR��`>
Uis#chan_dequeue_opt_t 
aopts
U,
                    269:  wh�U&UR��`?
Uwavm_size_t *
abcount
U,
                    270: ��U!UR��`@
Uth&chan_status_t *
achan_status
U,
                    271: �UUR��`A
Uth$dma_status_t *
adma_status
U,
                    272: in�UUR��`B
U nboolean_t *
aeor
U,
                    273: �UUR��`C
Utounsigned *
adma_id
U);
                    274: �&U
UR��`D
UnqDESCRIPTION
                    275: e &UUR�� J
VUGchan_dma_dequeue
U dequeues a single DMA frame which was enqueued by ess&%UUR��J
VhaWchan_dma_enqueue
U.  It will only dequeue frames that meet the criteria specified in &2T�UR��J
a]opts
U. It unlocks the associated memory. It returns an indication if more descriptors are R&?T�UR��@J
UUT8available to dequeue by the criteria specified in opts.
                    276: �&YT�UR�� P
V��Mchan_dma_dequeue
U will return an error (CR_BUSY) if the CDO_ALL option is �&fT�UR��P
UurTspecified, the channel is running , and no completed frames are available. In other U0&sT�UR��P
UTwords, it is not possible to dequeue non-completed descriptors while the channel is U&&�T�UR��@P
U    running.
                    277: &�T�UR��`R
aU!;dev_port
U is the kernel provided handle for the device.
                    278: UR&�T�UR��`�
aa_*chan_num
U is a logical channel number.
                    279: &�T�UR��`�
an_Aopts
U are options to 
Vchan_dma_dequeue
U, these include:
                    280: �&�T�UR��`�
Unq+CDO_DONE -- dequeue only completed frames.
                    281: a_dT�UR��`�
Us CDO_ALL -- dequeue all frames.
                    282: eueT�UR��`�
U��*CDO_ENABLE_INTR -- enable interrupt msgs.
                    283: 6T�UR�� �
UhaNCDO_EI_IF_MT -- reenables device interrupts for the device if  no more frames CT�UR��@�
Urymay be dequeued.
                    284: i]T�UR��`�
Ucr!The flags may be or'ed together.
                    285: vwT�UR�� �
a b\bcount
U(returned)  is the byte count of actually transferred data.  It is only valid for er�T�UR��@�
UheQtransfer from the device into memory (i.e. DMA reads).  Zero returned on writes.
                    286: od?�n @@�P$6�@�? d$6�H| c idE�
                    287: FF�de$6�F�Eha$6�>H|a_
_nURUR�� �
al ^chan_status
U is the channel descriptor status (only valid for m88k).  It is only valid for UMUR���
U��Utransfer from the device into memory (i.e. DMA reads).  Zero returned on writes. The -!UHUR��@�
Us.*meaning of this field is device-specific.
                    288: ;UCUR�� �
ams\dma_status
U is machine-independent and indicates the current state of the channel (e.g., reHU>UR��@�
U��/running, idle, underrun). Only valid for m68k.
                    289: !ThbU9UR�� �
aed]eor
U is an end of record indication (only valid for certain device and only valid on "DMA eoU4UR��@�
Uy 0read" transactions).  FALSE returned on writes.
                    290: e �U/UR�� �
a (^dma_id
U is an integer, uninterpreted by the kernel, whose sole purpose is to identify this �U*UR���
U]frame to the device driver. 
adma_id
U matches the dma_id of a frame previously enqueued ��U%UR���
U]via 
Vchan_dma_enqueue
U. If 
adma_id 
Uis DMA_ID_NULL, no descriptors are available �U UR���
UURVfor dequeueing. (This is not an error - that is, 
Vchan_dma_dequeue
U will return �UUR��@�
Ur CR_SUCCESS in this case.)
                    291: �UUR��`�
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