File:  [Apple Darwin 0.x] / driverkit / doc / OLD_NRW / KernelLevelSupport.frame
Revision 1.1.1.1 (vendor branch): download - view: text, annotated - select for diffs
Tue Apr 24 17:37:51 2018 UTC (8 years, 3 months ago) by root
Branches: MAIN, Apple
CVS tags: HEAD, Darwin03, Darwin02
Darwin 0.2 Driver Kit

<MakerFile 2.0J>
	

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ULAn  NRW DMA device driver can map in the first 0xf00000 (15 M) bytes of its �XUMUR��8
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 r�T�UR��`T
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 po�T�UR��`V
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 7d*�or++�to$6�+�*R$6�)-|chURUR�� b
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 #import <Devices/user_driver.h>
 mlUUR��`�
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han�T�UR��`�
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Uf CCC_START_READ | CC_INTR_ENABLE).  Note than on NRW, CC_START_READ,  led4�R_55���$6�5�4it$6�%|othe
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U--cas the 
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adev_port
U's are created early in system initialization �U9UR��@!
UrrZand passed out to the appropriate device drivers by a process that is not described here.
ƪ���UT`"
[poRegister Mapping
��U0UR�� %
Umm[This interface provides various mechanisms for device drivers to map the physical register BLE�U+UR��%
URW[space associated with their devices into their local address space. Which mechanism(s) can ��U&UR��%
UitZbe used by a particular device driver are determined by the machine architecture, whether U!UR��@%
U��_the device is a native device or a NextBus device, and the Slot ID in which the device lives. 
rog"UUR�� &
Ul,_For the purposes of the following discussion, an 
VNRW DMA Device
U is defined as a device ght/UUR��&
Upo[in an m88k machine which resides in a slot with whose NextBus slot Id bits 9 through 7 are que<UUR��@&
UT�\'111'.  A 
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U is a device which is an integral part of an m68k-based CPU.
deVU
UR�� '
Ure[There are three kinds of device register space which can be mapped in to a device driver's evicUUR��@'
Uoclocal address space:
e}UUR�� )
VUT\Register Space
U consists of one page (the size of which is machine dependent but can for or�T�UR��)
U mZnow be assumed to be 8k bytes) consisting of device-specific registers. For m88k devices, �T�UR��)
U sYthe format of a device page is defined in the NRW system spec, section 5.2.8.2. For m68k  �T�UR��)
Uth\devices, a device page is the physical memory region comprising all of the registers in one us�T�UR��@)
UloUnative device; the start of the register space may not be page-aligned in this case.
w�T�UR��`+
] m88k devices:
�T�UR�� /
Us TA driver can map in a register page if and only if it is associated with an NRW DMA e �T�UR��@/
Uts	Device. 
7T�UR��`(
]��m68k devices:
&T�UR��`1
Uic_A driver can map in a register page if and only if it is associated with a native device.
S 
re @T�UR��`4
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VSlot Space 
Uconsists of up to 16 MB of memory, starting at 0xfs000000. 
ocZT�UR��`
]acm88k devices:
d6�st78�e $6�7�86ca$6�} ed 8URUR��`
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8�76 dH��X�
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_n O1--#./Running H/F 10:  2Running H/F 2;3PRELIMINARY4devd9�gi::�he$6�:�9)$6�3<|st&ceURUR���
UliNCC_START_WRITE, and CC_ABORT are done by the driver by directly accessing the UMUR��@�
Ua channel command register.
I����UT`
[wichan_dma_enqueue()
URgUDUR��`�
Uce*Add a DMA Frame to the current DMA queue.
~U?UR��`�
UA 
v�U:UR��`�
Vgi #import <Devices/user_driver.h>
oc�U5UR��`
Ue (chan_return_t 
Vchan_dma_enqueue
U(
S�U0UR��`
Uisport_t 
adev_port
U,
sta�U+UR��`
U0.int  
achan_num
U,
8�U&UR��`
Utask_t 
atask_port
U,
�U!UR��`	
Ue vm_offset_t 
aaddr
U,
�UUR��`

Uvm_size_t 
alen
U,
d�UUR��`
U��direction_t 
arw
U,
UUR��`
U dchan_desc_cmd_t 
acmd
U,
~U
UR��`

U��unsigned char 
aindex
U,
RuUUR��`
U$chan_enqueue_opts_t 
aopts
U,
4+UUR��`
Uunsigned 
adma_id
U,
::8T�UR��`
Uboolean_t *
arunning
U);
6ET�UR��`
U
<VT�UR�� 
VceWchan_dma_enqueue
U  builds and enqueues a list of dma descriptors describing a block esscT�UR��
U��]of memory.  This block of memory is referred to as a 
Vframe
U. The frame may cross page �pT�UR��
UamVboundaries in most cases. The exception is for channels which have been configured as }T�UR��
UocX"streaming mode" channels per 
Vdev_chan_attach
U(). Frames for DMA read operations rt�T�UR��
U,S(device to memory) for streaming mode channels must not cross page boundaries. The at�T�UR��
UU!\reason for this restriction is that when the device-specific logic signals "End of record", 
d�T�UR��
U��Wthe DMA hardware will advance to the next buffer descriptor, not the next frame. There UR�T�UR��
UsiOis no way for the hardware to advance to the next frame; frames are a software 
U�T�UR��
UTconstruct. Therefor for such channels, we force one frame to consist of exactly one );�T�UR��@
UDMA descriptor.
���T�UR�� 
U_eRThere are system dependent limits to the amount of memory that may be queued with �T�UR��
VofYchan_dma_enqueue
U; exceeding this limit will return an error and the data will not be ��T�UR��@
Uam
enqueued.
T�UR�� 
abaddr
U must be aligned to the size of the device buffer.  On m68K machines, 
alen
U must be &T�UR��
UanWa multiple of the device buffer length for all descriptors with CEO_EOR not set in the for3T�UR��
aan`opts
U argument. On m88k machines, 
alen
U must be a multiple of the device buffer length ha@T�UR��@
Uspfor DMA read operations.
fZT�UR��`
UURCChains of DMA frames will be limited to some length by the kernel.
ptotT�UR��`�
aam;dev_port
U is the kernel provided handle for the device.
to d;�ar<<�UR$6�<�;fo$6�:>|siexURUR��`
aUR(chan_num
U is a local channel number.
��!UMUR��`
ae :task_port
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;UHUR��`!
aURHaddr
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roUUCUR��`#
al Dlen
U is the length of the dma in the target tasks address space.
 moU>UR�� &
athTrw
U is the direction of the dma, either DMA_DIR_READ (from the device to memory) an|U9UR��@&
Ue .or DMA_DIR_WRITE (from memory to the device).
�U4UR��`(
ahe8cmd
U is a NRW channel descriptor command (m88k only)
ne�U/UR��`*
at \index
U  contains the region and register index to which cmd will be written (m88k only).
T��U*UR��`,
aCh[opts
U are channel options that should apply to the frame being enqueued. These include:
_po�U%UR�� -
UelGCEO_EOR -- the last descriptor in the frame should be indicated as the �U UR��@-
UURend-of-record.
<�UUR��`.
U9CEO_DESC_INTR -- interrupt when this frame is completed.
�%UUR��`/
U
3CEO_ENABLE_INTR -- enable interrupt notification.
:ta?UUR��`0
U tACEO_ENABLE_CHAN -- enable DMA channel after enqueue (m68k only).
iYUUR��`1
Uhe?CEO_DESC_CMD -- enable channel descriptor command (m88k only)
DlesUUR�� 5
ah ^dma_id
U is an integer, uninterpreted by the kernel, whose sole purpose is to identify this �UUR��@5
UMAZframe when 
Vchan_dma_dequeue
U()'d. 
adma_id
U must not be equal to DMA_ID_NULL.
�T�UR�� 7
aU4[running
U is returned; on the m68k this indicates whether the channel was enabled at the at �T�UR��7
UinStime of the enqueue (if not, a channel enable will be required). On the m88k, this ���T�UR��7
U aYindicates whetehr or not the transfer engine had a non-empty descriptor list at the time R�T�UR��7
UEO]of the enqueue. If on the m88k 
arunning
U is FALSE, a Load Descriptor operation will be f�T�UR��@7
UUR necessary to start the channel.
erd=�
�>>�C$6�>�= n$6�<F|EN!HA����UT`9
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U��/Dequeue DMA frames from the current DMA queue.
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Vh  #import <Devices/user_driver.h>
rphU?UR��`;
Ul,(chan_return_t 
Vchan_dma_dequeue
U(
UuU:UR��`<
Ufrport_t 
adev_port
U,

U�U5UR��`=
U
Uint 
achan_num
U,
_I�U0UR��`>
U��#chan_dequeue_opt_t 
aopts
U,
 th�U+UR��`?
Utevm_size_t *
abcount
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UUR&chan_status_t *
achan_status
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Ue $dma_status_t *
adma_status
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���UUR��`B
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adma_id
U);
a�UUR��`D
UURDESCRIPTION
ofU
UR�� J
Vn Gchan_dma_dequeue
U dequeues a single DMA frame which was enqueued by �T�UUR��J
VneWchan_dma_enqueue
U.  It will only dequeue frames that meet the criteria specified in CUUR��J
a�]opts
U. It unlocks the associated memory. It returns an indication if more descriptors are d(T�UR��@J
UUN8available to dequeue by the criteria specified in opts.
quBT�UR�� P
V��Mchan_dma_dequeue
U will return an error (CR_BUSY) if the CDO_ALL option is �OT�UR��P
UurTspecified, the channel is running , and no completed frames are available. In other U5\T�UR��P
UTwords, it is not possible to dequeue non-completed descriptors while the channel is U+iT�UR��@P
U	running.
�T�UR��`R
aU&;dev_port
U is the kernel provided handle for the device.
UR�T�UR��`�
aa_*chan_num
U is a logical channel number.
�T�UR��`�
an_Aopts
U are options to 
Vchan_dma_dequeue
U, these include:
a�T�UR��`�
UUR+CDO_DONE -- dequeue only completed frames.
a_d�T�UR��`�
Us CDO_ALL -- dequeue all frames.
eueT�UR��`�
U��*CDO_ENABLE_INTR -- enable interrupt msgs.
T�UR�� �
UhaNCDO_EI_IF_MT -- reenables device interrupts for the device if  no more frames ,T�UR��@�
Urymay be dequeued.
iFT�UR��`�
Ucr!The flags may be or'ed together.
v`T�UR�� �
a b\bcount
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od?�n @@�P$6�@�? d$6�H| c idE�
FF�de$6�F�Eha$6�>H|a_
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;UCUR�� �
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!ThbU9UR�� �
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e �U/UR�� �
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adma_id
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U]via 
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U. If 
adma_id 
Uis DMA_ID_NULL, no descriptors are available �U UR���
UURVfor dequeueing. (This is not an error - that is, 
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