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1.1 root 1: #ifndef _AS68K_H
2: #define _AS68K_H
3:
4: #ifdef WIN32
5: typedef unsigned int uint;
6: #endif /* WIN32 */
7:
8: #define LAB_LEN 64
9: /* atari .prg binaries have header then code at 0x1c */
10: #define BASE 0x1c
11:
12: /* ea modes as encoded in the 68k instructions */
13: #define MODE_DREG 0
14:
15: /* and ea modes as flags, used in various assembler funcs */
16: #define F_DREG (1<<0)
17: #define F_AREG (1<<1)
18: #define F_IND (1<<2)
19: #define F_POST (1<<3)
20: #define F_PRE (1<<4)
21: #define F_OFFSET (1<<5)
22: #define F_INDEX (1<<6)
23: #define F_MEM_W (1<<7)
24: #define F_MEM_L (1<<8)
25: #define F_IMM (1<<9)
26: #define F_PC_OFFSET (1<<10)
27: #define F_PC_INDEX (1<<11)
28:
29: #define F_NOLABELS (1<<12)
30:
31: #define F_NOIMM_NOPC_NOAREG (F_DREG | F_IND | F_POST | F_PRE | \
32: F_OFFSET | F_INDEX | F_MEM_W | F_MEM_L)
33: #define F_ALL (0xffffffff & (~(F_NOLABELS)))
34: #define F_ALL_NOAREG (F_ALL & (~F_AREG))
35:
36: enum SIZE { BYTE, WORD, LONG, LONG_FIXUP, C_ADDR, C_FUNC };
37: extern const int size2len[];
38:
39: struct ImmVal {
40: int has_label;
41: char label[LAB_LEN];
42: int val;
43: };
44:
45: typedef struct ea_t {
46: int mode;
47: int reg;
48: int op_size;
49: struct ImmVal imm;
50: union Ext {
51: short ext;
52: struct {
53: int displacement : 8;
54: int ZERO : 3;
55: uint size : 1;
56: uint reg : 3;
57: uint d_or_a : 1;
58: } _;
59: } ext;
60: /* used by the ->i386 compiler. set by x_readea, and will
61: * be (for example) eax, or some immediate value in string
62: * form */
63: char identifier[32];
64: int x86_reg;
65: /* used to keep the writeback address for complex addressing
66: * modes. reused at the end of the instruction... */
67: int x86_reg_writeback;
68: int do_writeback;
69: } ea_t;
70:
71: typedef union Opcode {
72: unsigned short code;
73: struct move {
74: uint src_reg : 3;
75: uint src_mode : 3;
76: uint dest_mode : 3;
77: uint dest_reg : 3;
78: uint size : 2;
79: uint op : 2;
80: } move;
81: struct adr_index {
82: int displacement : 8;
83: uint zeros : 3;
84: uint ind_size : 1;
85: uint reg : 3;
86: uint reg_type : 1;
87: } adr_index;
88: struct addq {
89: uint dest_reg : 3;
90: uint dest_mode : 3;
91: uint size : 2;
92: uint issub : 1;
93: uint data : 3;
94: uint op : 4;
95: } addq;
96: struct jmp {
97: uint dest_reg : 3;
98: uint dest_mode : 3;
99: uint op : 10;
100: } jmp;
101: struct addi {
102: uint dest_reg : 3;
103: uint dest_mode : 3;
104: uint size : 2;
105: uint OP6 : 8;
106: } addi;
107: /* size and effective address */
108: struct type1 {
109: uint ea_reg : 3;
110: uint ea_mode : 3;
111: uint size : 2;
112: uint op : 8;
113: } type1;
114: /* reg, opmode, ea */
115: struct type2 {
116: uint ea_reg : 3;
117: uint ea_mode : 3;
118: uint op_mode : 3;
119: uint reg : 3;
120: uint op : 4;
121: } type2;
122: struct MemShift {
123: uint ea_reg : 3;
124: uint ea_mode : 3;
125: uint OP3 : 2;
126: uint dr : 1;
127: uint type : 2;
128: uint OP0x1c : 5;
129: } MemShift;
130: struct ASx {
131: uint reg : 3;
132: uint OP0 : 2;
133: uint ir : 1;
134: uint size : 2;
135: uint dr : 1;
136: uint count_reg : 3;
137: uint OP0xe : 4;
138: } ASx;
139: struct abcd {
140: uint src_reg : 3;
141: uint rm : 1;
142: uint OP16 : 5;
143: uint dest_reg : 3;
144: uint OP12 : 4;
145: } abcd;
146: struct addx {
147: uint src_reg : 3;
148: uint rm : 1;
149: uint OP0 : 2;
150: uint size : 2;
151: uint OP1 : 1;
152: uint dest_reg : 3;
153: uint op : 4;
154: } addx;
155: struct cmpm {
156: uint src_reg : 3;
157: uint OP1_1 : 3;
158: uint size : 2;
159: uint OP2_1 : 1;
160: uint dest_reg : 3;
161: uint OP0xb : 4;
162: } cmpm;
163: /* branches */
164: struct DBcc {
165: uint reg : 3;
166: uint OP25 : 5;
167: uint cond : 4;
168: uint OP5 : 4;
169: } DBcc;
170: struct Bcc {
171: int displacement : 8;
172: uint cond : 4;
173: uint op : 4;
174: } Bcc;
175: struct bra {
176: int displacement : 8;
177: uint op : 8;
178: } bra;
179: struct movem {
180: uint dest_reg : 3;
181: uint dest_mode : 3;
182: uint sz : 1;
183: uint ONE : 3;
184: uint dr : 1;
185: uint NINE : 5;
186: } movem;
187: struct lea {
188: uint dest_reg : 3;
189: uint dest_mode : 3;
190: uint SEVEN : 3;
191: uint reg : 3;
192: uint FOUR : 4;
193: } lea;
194: struct moveq {
195: int data : 8;
196: uint ZERO : 1;
197: uint reg : 3;
198: uint SEVEN : 4;
199: } moveq;
200: struct exg {
201: uint dest_reg : 3;
202: uint op_mode : 5;
203: uint OP1 : 1;
204: uint src_reg : 3;
205: uint OP0xc : 4;
206: } exg;
207: } Opcode;
208:
209: struct Fixup {
210: int rel_to;
211: int line_no;
212: int size;
213: int adr;
214: char label[LAB_LEN];
215: struct Fixup *next;
216: };
217:
218: struct Label {
219: const char *name;
220: int val;
221: enum LAB_TYPE {
222: L_ADDR,
223: L_CONST
224: } type;
225: };
226:
227: /* label lookup */
228: struct Label *get_label (const char *name);
229: void add_label (const char *name, int type, int val);
230: void add_fixup (int adr, int size, const char *label);
231: void error (const char *format, ...);
232: void bug_error (const char *format, ...);
233: int get_bitpos ();
234:
235: /* fixups linked list */
236: extern struct Fixup *fix_first;
237: extern struct Fixup *fix_last;
238: extern int line_no;
239:
240: #endif /* _AS68K_H */
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