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1.1 root 1: #ifndef _AS68K_H
2: #define _AS68K_H
3:
4: typedef unsigned int uint;
5:
6: #define LAB_LEN 64
7: /* atari .prg binaries have header then code at 0x1c */
8: #define BASE 0x1c
9:
10: /* ea modes as encoded in the 68k instructions */
11: #define MODE_DREG 0
12:
13: /* and ea modes as flags, used in various assembler funcs */
14: #define F_DREG (1<<0)
15: #define F_AREG (1<<1)
16: #define F_IND (1<<2)
17: #define F_POST (1<<3)
18: #define F_PRE (1<<4)
19: #define F_OFFSET (1<<5)
20: #define F_INDEX (1<<6)
21: #define F_MEM_W (1<<7)
22: #define F_MEM_L (1<<8)
23: #define F_IMM (1<<9)
24: #define F_PC_OFFSET (1<<10)
25: #define F_PC_INDEX (1<<11)
26:
27: #define F_NOLABELS (1<<12)
28:
29: #define F_NOIMM_NOPC_NOAREG (F_DREG | F_IND | F_POST | F_PRE | \
30: F_OFFSET | F_INDEX | F_MEM_W | F_MEM_L)
31: #define F_ALL (0xffffffff & (~(F_NOLABELS)))
32: #define F_ALL_NOAREG (F_ALL & (~F_AREG))
33:
34: enum SIZE { BYTE, WORD, LONG, LONG_FIXUP, C_ADDR, C_FUNC };
35: extern const int size2len[];
36:
37: struct ImmVal {
38: int has_label;
39: char label[LAB_LEN];
40: int val;
41: };
42:
43: typedef struct ea_t {
44: int mode;
45: int reg;
46: int op_size;
47: struct ImmVal imm;
48: union Ext {
49: short ext;
50: struct {
51: int displacement : 8;
52: int ZERO : 3;
53: uint size : 1;
54: uint reg : 3;
55: uint d_or_a : 1;
56: } _;
57: } ext;
58: /* used by the ->i386 compiler. set by x_readea, and will
59: * be (for example) eax, or some immediate value in string
60: * form */
61: char identifier[32];
62: int x86_reg;
63: /* used to keep the writeback address for complex addressing
64: * modes. reused at the end of the instruction... */
65: int x86_reg_writeback;
66: int do_writeback;
67: } ea_t;
68:
69: typedef union Opcode {
70: unsigned short code;
71: struct move {
72: uint src_reg : 3;
73: uint src_mode : 3;
74: uint dest_mode : 3;
75: uint dest_reg : 3;
76: uint size : 2;
77: uint op : 2;
78: } move;
79: struct adr_index {
80: int displacement : 8;
81: uint zeros : 3;
82: uint ind_size : 1;
83: uint reg : 3;
84: uint reg_type : 1;
85: } adr_index;
86: struct addq {
87: uint dest_reg : 3;
88: uint dest_mode : 3;
89: uint size : 2;
90: uint issub : 1;
91: uint data : 3;
92: uint op : 4;
93: } addq;
94: struct jmp {
95: uint dest_reg : 3;
96: uint dest_mode : 3;
97: uint op : 10;
98: } jmp;
99: struct addi {
100: uint dest_reg : 3;
101: uint dest_mode : 3;
102: uint size : 2;
103: uint OP6 : 8;
104: } addi;
105: /* size and effective address */
106: struct type1 {
107: uint ea_reg : 3;
108: uint ea_mode : 3;
109: uint size : 2;
110: uint op : 8;
111: } type1;
112: /* reg, opmode, ea */
113: struct type2 {
114: uint ea_reg : 3;
115: uint ea_mode : 3;
116: uint op_mode : 3;
117: uint reg : 3;
118: uint op : 4;
119: } type2;
120: struct MemShift {
121: uint ea_reg : 3;
122: uint ea_mode : 3;
123: uint OP3 : 2;
124: uint dr : 1;
125: uint type : 2;
126: uint OP0x1c : 5;
127: } MemShift;
128: struct ASx {
129: uint reg : 3;
130: uint OP0 : 2;
131: uint ir : 1;
132: uint size : 2;
133: uint dr : 1;
134: uint count_reg : 3;
135: uint OP0xe : 4;
136: } ASx;
137: struct abcd {
138: uint src_reg : 3;
139: uint rm : 1;
140: uint OP16 : 5;
141: uint dest_reg : 3;
142: uint OP12 : 4;
143: } abcd;
144: struct addx {
145: uint src_reg : 3;
146: uint rm : 1;
147: uint OP0 : 2;
148: uint size : 2;
149: uint OP1 : 1;
150: uint dest_reg : 3;
151: uint op : 4;
152: } addx;
153: struct cmpm {
154: uint src_reg : 3;
155: uint OP1_1 : 3;
156: uint size : 2;
157: uint OP2_1 : 1;
158: uint dest_reg : 3;
159: uint OP0xb : 4;
160: } cmpm;
161: /* branches */
162: struct DBcc {
163: uint reg : 3;
164: uint OP25 : 5;
165: uint cond : 4;
166: uint OP5 : 4;
167: } DBcc;
168: struct Bcc {
169: int displacement : 8;
170: uint cond : 4;
171: uint op : 4;
172: } Bcc;
173: struct bra {
174: int displacement : 8;
175: uint op : 8;
176: } bra;
177: struct movem {
178: uint dest_reg : 3;
179: uint dest_mode : 3;
180: uint sz : 1;
181: uint ONE : 3;
182: uint dr : 1;
183: uint NINE : 5;
184: } movem;
185: struct lea {
186: uint dest_reg : 3;
187: uint dest_mode : 3;
188: uint SEVEN : 3;
189: uint reg : 3;
190: uint FOUR : 4;
191: } lea;
192: struct moveq {
193: int data : 8;
194: uint ZERO : 1;
195: uint reg : 3;
196: uint SEVEN : 4;
197: } moveq;
198: struct exg {
199: uint dest_reg : 3;
200: uint op_mode : 5;
201: uint OP1 : 1;
202: uint src_reg : 3;
203: uint OP0xc : 4;
204: } exg;
205: } Opcode;
206:
207: struct Fixup {
208: int rel_to;
209: int line_no;
210: int size;
211: int adr;
212: char label[LAB_LEN];
213: struct Fixup *next;
214: };
215:
216: struct Label {
217: const char *name;
218: int val;
219: enum LAB_TYPE {
220: L_ADDR,
221: L_CONST
222: } type;
223: };
224:
225: /* label lookup */
226: struct Label *get_label (const char *name);
227: void add_label (const char *name, int type, int val);
228: void add_fixup (int adr, int size, const char *label);
229: void error (const char *format, ...);
230: void bug_error (const char *format, ...);
231: int get_bitpos ();
232:
233: /* fixups linked list */
234: extern struct Fixup *fix_first;
235: extern struct Fixup *fix_last;
236: extern int line_no;
237:
238: #endif /* _AS68K_H */
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