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Annotation of gcc/PROBLEMS, revision 1.1

1.1     ! root        1: 3. When find_reloads is used to count number of spills needed
        !             2: it does not take into account the fact that a reload may
        !             3: turn out to be a dummy.
        !             4: 
        !             5: I'm not sure this really happens any more.  Doesn't it find
        !             6: all the dummies on both passes?
        !             7: 
        !             8: 10.     movl a3@,a0
        !             9:        movl a3@(16),a1
        !            10:        clrb a0@(a1:l)
        !            11: is generated and may be worse than
        !            12:        movl a3@,a0
        !            13:        addl a3@(16),a0
        !            14:        clrb a0@
        !            15: If ordering of operands is improved, many more
        !            16: such cases will be generated from typical array accesses.
        !            17: 
        !            18: 23. (memory >> 24) and (memory >> 24) == CONST  optimizations
        !            19: ought to be done machine independently.
        !            20: 
        !            21: 38. Hack expand_mult so that if there is no same-modes multiply
        !            22: it will use a widening multiply and then truncate rather than
        !            23: calling the library.
        !            24: 
        !            25: 39. Hack expanding of division to notice cases for
        !            26: long -> short division.
        !            27: 
        !            28: 40. Represent divide insns as (DIV:SI ...) followed by
        !            29: a separate lowpart extract.  Represent remainder insns as DIV:SI
        !            30: followed by a separate highpart extract.  Then cse can work on
        !            31: the DIV:SI part.  Problem is, this may not be desirable on machines
        !            32: where computing the quotient alone does not necessarily give
        !            33: a remainder--such as the 68020 for long operands.
        !            34: 
        !            35: 42. In subst in combine.c at line 704 or so, a reg that really
        !            36: wants an areg gets a dreg.  It is i*4, for indexing.  Why?
        !            37: 
        !            38: 45. What about reloading DFmode values?  Need a block of 2 regs
        !            39: as one spill.  But the 68000 and 68020 have no problems because
        !            40: they don't ever need to put a DF into ordinary registers and a
        !            41: DF needs only one FP register.
        !            42: 
        !            43: 48. Often see  tstl foo; jeq ...; movl foo,reg
        !            44: and it would be better perhaps to do  movl foo,dreg; jeq ...
        !            45: In some cases this could make things worse through the
        !            46: additional constraint on register usage (reg must be available
        !            47: before the jump and must be a dreg).  Also, this is a saving
        !            48: only if movl sets the cc's, which is a machine-dependent condition
        !            49: hard to test for.
        !            50: -optforcemem may solve this problem.
        !            51: 
        !            52: 49. Scheme for making cse work on operations done by library calls:
        !            53: generate insns for them using a new LIBCALL rtl type, then converting
        !            54: that during or after cse to actual push and call instructions.
        !            55: (SET result (LIBCALL:SI (MULT:SI foo bar) "mulsi3"))
        !            56: No additional temporaries are needed to turn this into
        !            57: push push call pop store.
        !            58: 
        !            59: 52. Reloading can look at how reload_contents got set up.
        !            60: If it was copied from a register, just reload from that register.
        !            61: Otherwise, perhaps can change the previous insn to move the
        !            62: data via the reload reg, thus avoiding one memory ref.
        !            63: 
        !            64: 53. Know that certain library routines do not clobber memory.
        !            65: 
        !            66: 63. Potential problem in cc_status.value2, if it ever activates itself
        !            67: after a two-address subtraction (which currently cannot happen).
        !            68: It is supposed to compare the current value of the destination
        !            69: but eliminating it would use the results of the subtraction, equivalent
        !            70: to comparing the previous value of the destination.
        !            71: 
        !            72: 65. Should loops that neither start nor end with a break
        !            73: be rearranged to end with the last break?
        !            74: 
        !            75: 68. At line 767 of flow.c, we have
        !            76:   (set (reg foo) (ashift 1 (reg bar)))
        !            77: Local-alloc puts foo and bar both in register 0 since no reason not to.
        !            78: Later, the shift must be done in another register and the result copied to 0.
        !            79: It would not need to copy if this insn were 2op'd before local-alloc,
        !            80: which is possible since one can be sure in advance that this insn will
        !            81: need a reload.
        !            82: 
        !            83: 69. Define the floating point converting arithmetic instructions
        !            84: for the 68881.
        !            85: 
        !            86: 74. Combine loop opt with cse opt in one pass.  Do cse on each loop,
        !            87: then loop opt on that loop, and go from innermost loops outward.
        !            88: Make loop invariants available for cse at end of loop.
        !            89: 
        !            90: 85. pea can force a value to be reloaded into an areg
        !            91: which can make it worse than separate adding and pushing.
        !            92: This can only happen for adding something within addql range
        !            93: and it only loses if the qty becomes dead at that point
        !            94: so it can be added to with no copying.
        !            95: 
        !            96: 93. If a pseudo doesn't get a hard reg everywhere,
        !            97: can it get one during a loop?
        !            98: 
        !            99: 95. Can simplify shift of result of a bfextu.  See testunsfld.c.
        !           100: Likewise and of result of a bfextu.  See hyph.c.
        !           101: 
        !           102: 96. Can do SImode bitfield insns without reloading, but must
        !           103: alter the operands in special ways.
        !           104: 
        !           105: 98. Reloading an operand of a compare insn
        !           106: prevented final from noticing that the compare was redundant.
        !           107: See hyph.c line 108.
        !           108: 
        !           109: 99. final could check loop-entry branches to see if they
        !           110: screw up deletion of a test instruction.  If they do,
        !           111: can put another test instruction before the branch and
        !           112: make it conditional and redirect it.
        !           113: 
        !           114: 101. In cse, stores at addresses that contain SYMBOL_REFS
        !           115: cannot alias if the symbols are different!
        !           116: But the symbols may not be explicitly present--they may
        !           117: be in address registers.
        !           118: 
        !           119: 106. Aliasing may be impossible if data types of refs differ
        !           120: and data type of containing objects also differ.
        !           121: (But check this wrt unions.)
        !           122: 
        !           123: 108. Can speed up flow analysis by making a table saying which
        !           124: register is set and which registers are used by each instruction that
        !           125: only sets one register and only uses two.  This way avoid the tree
        !           126: walk for such instructions (most instructions).
        !           127: 
        !           128: 109. It is desirable to avoid converting INDEX to SImode if a
        !           129: narrower mode suffices, as HImode does on the 68000.
        !           130: How can this be done?
        !           131: 
        !           132: 110. Possible special combination pattern:
        !           133: If the two operands to a comparison die there and both come from insns
        !           134: that are identical except for replacing one operand with the other,
        !           135: throw away those insns.  Ok if insns being discarded are known 1 to 1.
        !           136: An andl #1 after a seq is 1 to 1, but how should compiler know that?

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