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1.1 root 1: /* Save and restore call-clobbered registers which are live across a call.
2: Copyright (C) 1989, 1992 Free Software Foundation, Inc.
3:
4: This file is part of GNU CC.
5:
6: GNU CC is free software; you can redistribute it and/or modify
7: it under the terms of the GNU General Public License as published by
8: the Free Software Foundation; either version 2, or (at your option)
9: any later version.
10:
11: GNU CC is distributed in the hope that it will be useful,
12: but WITHOUT ANY WARRANTY; without even the implied warranty of
13: MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14: GNU General Public License for more details.
15:
16: You should have received a copy of the GNU General Public License
17: along with GNU CC; see the file COPYING. If not, write to
18: the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
19:
20: #include "config.h"
21: #include "rtl.h"
22: #include "insn-config.h"
23: #include "flags.h"
24: #include "regs.h"
25: #include "hard-reg-set.h"
26: #include "recog.h"
27: #include "basic-block.h"
28: #include "reload.h"
29: #include "expr.h"
30:
1.1.1.3 root 31: /* Modes for each hard register that we can save. The smallest mode is wide
32: enough to save the entire contents of the register. When saving the
33: register because it is live we first try to save in multi-register modes.
34: If that is not possible the save is done one register at a time. */
35:
36: static enum machine_mode
37: regno_save_mode[FIRST_PSEUDO_REGISTER][MOVE_MAX / UNITS_PER_WORD + 1];
1.1 root 38:
39: /* For each hard register, a place on the stack where it can be saved,
40: if needed. */
41:
1.1.1.3 root 42: static rtx
43: regno_save_mem[FIRST_PSEUDO_REGISTER][MOVE_MAX / UNITS_PER_WORD + 1];
1.1 root 44:
45: /* We will only make a register eligible for caller-save if it can be
46: saved in its widest mode with a simple SET insn as long as the memory
47: address is valid. We record the INSN_CODE is those insns here since
48: when we emit them, the addresses might not be valid, so they might not
49: be recognized. */
50:
1.1.1.3 root 51: static enum insn_code
52: reg_save_code[FIRST_PSEUDO_REGISTER][MOVE_MAX / UNITS_PER_WORD + 1];
53: static enum insn_code
54: reg_restore_code[FIRST_PSEUDO_REGISTER][MOVE_MAX / UNITS_PER_WORD + 1];
1.1 root 55:
56: /* Set of hard regs currently live (during scan of all insns). */
57:
58: static HARD_REG_SET hard_regs_live;
59:
60: /* Set of hard regs currently residing in save area (during insn scan). */
61:
62: static HARD_REG_SET hard_regs_saved;
63:
1.1.1.3 root 64: /* Set of hard regs which need to be restored before referenced. */
65:
66: static HARD_REG_SET hard_regs_need_restore;
67:
1.1 root 68: /* Number of registers currently in hard_regs_saved. */
69:
70: int n_regs_saved;
71:
1.1.1.4 ! root 72: static enum machine_mode choose_hard_reg_mode PROTO((int, int));
! 73: static void set_reg_live PROTO((rtx, rtx));
! 74: static void clear_reg_live PROTO((rtx));
! 75: static void restore_referenced_regs PROTO((rtx, rtx, enum machine_mode));
! 76: static int insert_save_restore PROTO((rtx, int, int,
! 77: enum machine_mode, int));
1.1 root 78:
79: /* Return a machine mode that is legitimate for hard reg REGNO and large
1.1.1.3 root 80: enough to save nregs. If we can't find one, return VOIDmode. */
1.1 root 81:
82: static enum machine_mode
1.1.1.3 root 83: choose_hard_reg_mode (regno, nregs)
1.1 root 84: int regno;
1.1.1.4 ! root 85: int nregs;
1.1 root 86: {
87: enum machine_mode found_mode = VOIDmode, mode;
88:
89: /* We first look for the largest integer mode that can be validly
90: held in REGNO. If none, we look for the largest floating-point mode.
91: If we still didn't find a valid mode, try CCmode. */
92:
93: for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
94: mode = GET_MODE_WIDER_MODE (mode))
1.1.1.3 root 95: if (HARD_REGNO_NREGS (regno, mode) == nregs
1.1 root 96: && HARD_REGNO_MODE_OK (regno, mode))
97: found_mode = mode;
98:
99: if (found_mode != VOIDmode)
100: return found_mode;
101:
102: for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
103: mode = GET_MODE_WIDER_MODE (mode))
1.1.1.3 root 104: if (HARD_REGNO_NREGS (regno, mode) == nregs
1.1 root 105: && HARD_REGNO_MODE_OK (regno, mode))
106: found_mode = mode;
107:
108: if (found_mode != VOIDmode)
109: return found_mode;
110:
1.1.1.3 root 111: if (HARD_REGNO_NREGS (regno, CCmode) == nregs
1.1 root 112: && HARD_REGNO_MODE_OK (regno, CCmode))
113: return CCmode;
114:
115: /* We can't find a mode valid for this register. */
116: return VOIDmode;
117: }
118:
119: /* Initialize for caller-save.
120:
121: Look at all the hard registers that are used by a call and for which
122: regclass.c has not already excluded from being used across a call.
123:
124: Ensure that we can find a mode to save the register and that there is a
125: simple insn to save and restore the register. This latter check avoids
126: problems that would occur if we tried to save the MQ register of some
127: machines directly into memory. */
128:
129: void
130: init_caller_save ()
131: {
132: char *first_obj = (char *) oballoc (0);
133: rtx addr_reg;
134: int offset;
135: rtx address;
1.1.1.3 root 136: int i, j;
1.1 root 137:
138: /* First find all the registers that we need to deal with and all
139: the modes that they can have. If we can't find a mode to use,
140: we can't have the register live over calls. */
141:
142: for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
143: {
144: if (call_used_regs[i] && ! call_fixed_regs[i])
145: {
1.1.1.3 root 146: for (j = 1; j <= MOVE_MAX / UNITS_PER_WORD; j++)
1.1 root 147: {
1.1.1.3 root 148: regno_save_mode[i][j] = choose_hard_reg_mode (i, j);
149: if (regno_save_mode[i][j] == VOIDmode && j == 1)
150: {
151: call_fixed_regs[i] = 1;
152: SET_HARD_REG_BIT (call_fixed_reg_set, i);
153: }
1.1 root 154: }
155: }
156: else
1.1.1.3 root 157: regno_save_mode[i][1] = VOIDmode;
1.1 root 158: }
159:
160: /* The following code tries to approximate the conditions under which
161: we can easily save and restore a register without scratch registers or
162: other complexities. It will usually work, except under conditions where
163: the validity of an insn operand is dependent on the address offset.
164: No such cases are currently known.
165:
166: We first find a typical offset from some BASE_REG_CLASS register.
167: This address is chosen by finding the first register in the class
168: and by finding the smallest power of two that is a valid offset from
169: that register in every mode we will use to save registers. */
170:
171: for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
172: if (TEST_HARD_REG_BIT (reg_class_contents[(int) BASE_REG_CLASS], i))
173: break;
174:
175: if (i == FIRST_PSEUDO_REGISTER)
176: abort ();
177:
178: addr_reg = gen_rtx (REG, Pmode, i);
179:
180: for (offset = 1 << (HOST_BITS_PER_INT / 2); offset; offset >>= 1)
181: {
1.1.1.3 root 182: address = gen_rtx (PLUS, Pmode, addr_reg, GEN_INT (offset));
1.1 root 183:
184: for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1.1.1.3 root 185: if (regno_save_mode[i][1] != VOIDmode
186: && ! strict_memory_address_p (regno_save_mode[i][1], address))
1.1 root 187: break;
188:
189: if (i == FIRST_PSEUDO_REGISTER)
190: break;
191: }
192:
193: /* If we didn't find a valid address, we must use register indirect. */
194: if (offset == 0)
195: address = addr_reg;
196:
197: /* Next we try to form an insn to save and restore the register. We
198: see if such an insn is recognized and meets its constraints. */
199:
200: start_sequence ();
201:
202: for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1.1.1.3 root 203: for (j = 1; j <= MOVE_MAX / UNITS_PER_WORD; j++)
204: if (regno_save_mode[i][j] != VOIDmode)
205: {
206: rtx mem = gen_rtx (MEM, regno_save_mode[i][j], address);
207: rtx reg = gen_rtx (REG, regno_save_mode[i][j], i);
208: rtx savepat = gen_rtx (SET, VOIDmode, mem, reg);
209: rtx restpat = gen_rtx (SET, VOIDmode, reg, mem);
210: rtx saveinsn = emit_insn (savepat);
211: rtx restinsn = emit_insn (restpat);
212: int ok;
213:
214: reg_save_code[i][j] = recog_memoized (saveinsn);
215: reg_restore_code[i][j] = recog_memoized (restinsn);
216:
217: /* Now extract both insns and see if we can meet their constraints. */
218: ok = (reg_save_code[i][j] != -1 && reg_restore_code[i][j] != -1);
219: if (ok)
220: {
221: insn_extract (saveinsn);
222: ok = constrain_operands (reg_save_code[i][j], 1);
223: insn_extract (restinsn);
224: ok &= constrain_operands (reg_restore_code[i][j], 1);
225: }
1.1 root 226:
1.1.1.3 root 227: if (! ok)
228: {
229: regno_save_mode[i][j] = VOIDmode;
230: if (j == 1)
231: {
232: call_fixed_regs[i] = 1;
233: SET_HARD_REG_BIT (call_fixed_reg_set, i);
234: }
235: }
1.1 root 236: }
237:
238: end_sequence ();
239:
240: obfree (first_obj);
241: }
242:
243: /* Initialize save areas by showing that we haven't allocated any yet. */
244:
245: void
246: init_save_areas ()
247: {
1.1.1.3 root 248: int i, j;
1.1 root 249:
250: for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1.1.1.3 root 251: for (j = 1; j <= MOVE_MAX / UNITS_PER_WORD; j++)
252: regno_save_mem[i][j] = 0;
1.1 root 253: }
254:
255: /* Allocate save areas for any hard registers that might need saving.
256: We take a conservative approach here and look for call-clobbered hard
257: registers that are assigned to pseudos that cross calls. This may
258: overestimate slightly (especially if some of these registers are later
259: used as spill registers), but it should not be significant.
260:
261: Then perform register elimination in the addresses of the save area
262: locations; return 1 if all eliminated addresses are strictly valid.
263: We assume that our caller has set up the elimination table to the
264: worst (largest) possible offsets.
265:
1.1.1.3 root 266: Set *PCHANGED to 1 if we had to allocate some memory for the save area.
267:
268: Future work:
269:
270: In the fallback case we should iterate backwards across all possible
271: modes for the save, choosing the largest available one instead of
272: falling back to the smallest mode immediately. (eg TF -> DF -> SF).
273:
274: We do not try to use "move multiple" instructions that exist
275: on some machines (such as the 68k moveml). It could be a win to try
276: and use them when possible. The hard part is doing it in a way that is
277: machine independent since they might be saving non-consecutive
278: registers. (imagine caller-saving d0,d1,a0,a1 on the 68k) */
1.1 root 279:
280: int
281: setup_save_areas (pchanged)
282: int *pchanged;
283: {
1.1.1.3 root 284: int i, j, k;
285: HARD_REG_SET hard_regs_used;
1.1 root 286: int ok = 1;
287:
1.1.1.3 root 288:
289: /* Allocate space in the save area for the largest multi-register
290: pseudos first, then work backwards to single register
291: pseudos. */
292:
293: /* Find and record all call-used hard-registers in this function. */
294: CLEAR_HARD_REG_SET (hard_regs_used);
1.1 root 295: for (i = FIRST_PSEUDO_REGISTER; i < max_regno; i++)
296: if (reg_renumber[i] >= 0 && reg_n_calls_crossed[i] > 0)
297: {
298: int regno = reg_renumber[i];
1.1.1.3 root 299: int endregno
1.1 root 300: = regno + HARD_REGNO_NREGS (regno, GET_MODE (regno_reg_rtx[i]));
1.1.1.3 root 301: int nregs = endregno - regno;
302:
303: for (j = 0; j < nregs; j++)
304: {
305: if (call_used_regs[regno+j])
306: SET_HARD_REG_BIT (hard_regs_used, regno+j);
307: }
308: }
309:
310: /* Now run through all the call-used hard-registers and allocate
311: space for them in the caller-save area. Try to allocate space
312: in a manner which allows multi-register saves/restores to be done. */
1.1 root 313:
1.1.1.3 root 314: for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
315: for (j = MOVE_MAX / UNITS_PER_WORD; j > 0; j--)
316: {
317: int ok = 1;
1.1.1.4 ! root 318: int do_save;
1.1.1.3 root 319:
320: /* If no mode exists for this size, try another. Also break out
321: if we have already saved this hard register. */
322: if (regno_save_mode[i][j] == VOIDmode || regno_save_mem[i][1] != 0)
323: continue;
324:
1.1.1.4 ! root 325: /* See if any register in this group has been saved. */
! 326: do_save = 1;
! 327: for (k = 0; k < j; k++)
! 328: if (regno_save_mem[i + k][1])
! 329: {
! 330: do_save = 0;
! 331: break;
! 332: }
! 333: if (! do_save)
! 334: continue;
! 335:
1.1.1.3 root 336: for (k = 0; k < j; k++)
1.1 root 337: {
1.1.1.3 root 338: int regno = i + k;
339: ok &= (TEST_HARD_REG_BIT (hard_regs_used, regno) != 0);
1.1 root 340: }
1.1.1.3 root 341:
342: /* We have found an acceptable mode to store in. */
343: if (ok)
344: {
345:
346: regno_save_mem[i][j]
347: = assign_stack_local (regno_save_mode[i][j],
348: GET_MODE_SIZE (regno_save_mode[i][j]), 0);
349:
350: /* Setup single word save area just in case... */
351: for (k = 0; k < j; k++)
352: {
353: /* This should not depend on WORDS_BIG_ENDIAN.
354: The order of words in regs is the same as in memory. */
355: rtx temp = gen_rtx (MEM, regno_save_mode[i+k][1],
356: XEXP (regno_save_mem[i][j], 0));
357:
358: regno_save_mem[i+k][1]
359: = adj_offsettable_operand (temp, k * UNITS_PER_WORD);
360: }
361: *pchanged = 1;
362: }
1.1 root 363: }
364:
365: for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1.1.1.3 root 366: for (j = 1; j <= MOVE_MAX / UNITS_PER_WORD; j++)
367: if (regno_save_mem[i][j] != 0)
368: ok &= strict_memory_address_p (GET_MODE (regno_save_mem[i][j]),
369: XEXP (eliminate_regs (regno_save_mem[i][j], 0, NULL_RTX), 0));
1.1 root 370:
371: return ok;
372: }
373:
374: /* Find the places where hard regs are live across calls and save them.
375:
376: INSN_MODE is the mode to assign to any insns that we add. This is used
377: by reload to determine whether or not reloads or register eliminations
378: need be done on these insns. */
379:
380: void
381: save_call_clobbered_regs (insn_mode)
382: enum machine_mode insn_mode;
383: {
384: rtx insn;
385: int b;
386:
387: for (b = 0; b < n_basic_blocks; b++)
388: {
389: regset regs_live = basic_block_live_at_start[b];
1.1.1.3 root 390: rtx prev_block_last = PREV_INSN (basic_block_head[b]);
391: REGSET_ELT_TYPE bit;
392: int offset, i, j;
1.1 root 393: int regno;
394:
395: /* Compute hard regs live at start of block -- this is the
396: real hard regs marked live, plus live pseudo regs that
397: have been renumbered to hard regs. No registers have yet been
398: saved because we restore all of them before the end of the basic
399: block. */
400:
401: #ifdef HARD_REG_SET
402: hard_regs_live = *regs_live;
403: #else
404: COPY_HARD_REG_SET (hard_regs_live, regs_live);
405: #endif
406:
407: CLEAR_HARD_REG_SET (hard_regs_saved);
1.1.1.3 root 408: CLEAR_HARD_REG_SET (hard_regs_need_restore);
1.1 root 409: n_regs_saved = 0;
410:
411: for (offset = 0, i = 0; offset < regset_size; offset++)
412: {
413: if (regs_live[offset] == 0)
1.1.1.3 root 414: i += REGSET_ELT_BITS;
1.1 root 415: else
416: for (bit = 1; bit && i < max_regno; bit <<= 1, i++)
417: if ((regs_live[offset] & bit)
418: && (regno = reg_renumber[i]) >= 0)
419: for (j = regno;
420: j < regno + HARD_REGNO_NREGS (regno,
421: PSEUDO_REGNO_MODE (i));
422: j++)
423: SET_HARD_REG_BIT (hard_regs_live, j);
1.1.1.3 root 424:
1.1 root 425: }
426:
427: /* Now scan the insns in the block, keeping track of what hard
428: regs are live as we go. When we see a call, save the live
429: call-clobbered hard regs. */
430:
431: for (insn = basic_block_head[b]; ; insn = NEXT_INSN (insn))
432: {
433: RTX_CODE code = GET_CODE (insn);
434:
435: if (GET_RTX_CLASS (code) == 'i')
436: {
437: rtx link;
438:
439: /* If some registers have been saved, see if INSN references
440: any of them. We must restore them before the insn if so. */
441:
442: if (n_regs_saved)
443: restore_referenced_regs (PATTERN (insn), insn, insn_mode);
444:
445: /* NB: the normal procedure is to first enliven any
446: registers set by insn, then deaden any registers that
447: had their last use at insn. This is incorrect now,
448: since multiple pseudos may have been mapped to the
449: same hard reg, and the death notes are ambiguous. So
450: it must be done in the other, safe, order. */
451:
452: for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
453: if (REG_NOTE_KIND (link) == REG_DEAD)
454: clear_reg_live (XEXP (link, 0));
455:
456: /* When we reach a call, we need to save all registers that are
457: live, call-used, not fixed, and not already saved. We must
458: test at this point because registers that die in a CALL_INSN
459: are not live across the call and likewise for registers that
460: are born in the CALL_INSN. */
461:
462: if (code == CALL_INSN)
1.1.1.3 root 463: {
464: for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
465: if (call_used_regs[regno] && ! call_fixed_regs[regno]
466: && TEST_HARD_REG_BIT (hard_regs_live, regno)
467: && ! TEST_HARD_REG_BIT (hard_regs_saved, regno))
468: regno += insert_save_restore (insn, 1, regno,
469: insn_mode, 0);
470: #ifdef HARD_REG_SET
471: hard_regs_need_restore = hard_regs_saved;
472: #else
473: COPY_HARD_REG_SET (hard_regs_need_restore,
474: hard_regs_saved);
475: #endif
476:
477: /* Must recompute n_regs_saved. */
478: n_regs_saved = 0;
479: for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
480: if (TEST_HARD_REG_BIT (hard_regs_saved, regno))
481: n_regs_saved++;
482:
483: }
1.1 root 484:
485: note_stores (PATTERN (insn), set_reg_live);
486:
487: for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
488: if (REG_NOTE_KIND (link) == REG_UNUSED)
489: clear_reg_live (XEXP (link, 0));
490: }
491:
492: if (insn == basic_block_end[b])
493: break;
494: }
495:
496: /* At the end of the basic block, we must restore any registers that
497: remain saved. If the last insn in the block is a JUMP_INSN, put
498: the restore before the insn, otherwise, put it after the insn. */
499:
500: if (n_regs_saved)
501: for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
1.1.1.3 root 502: if (TEST_HARD_REG_BIT (hard_regs_need_restore, regno))
503: regno += insert_save_restore ((GET_CODE (insn) == JUMP_INSN
504: ? insn : NEXT_INSN (insn)), 0,
505: regno, insn_mode, MOVE_MAX / UNITS_PER_WORD);
506:
507: /* If we added any insns at the start of the block, update the start
508: of the block to point at those insns. */
509: basic_block_head[b] = NEXT_INSN (prev_block_last);
1.1 root 510: }
511: }
512:
513: /* Here from note_stores when an insn stores a value in a register.
514: Set the proper bit or bits in hard_regs_live. All pseudos that have
515: been assigned hard regs have had their register number changed already,
516: so we can ignore pseudos. */
517:
518: static void
519: set_reg_live (reg, setter)
520: rtx reg, setter;
521: {
522: register int regno, endregno, i;
523: enum machine_mode mode = GET_MODE (reg);
524: int word = 0;
525:
526: if (GET_CODE (reg) == SUBREG)
527: {
528: word = SUBREG_WORD (reg);
529: reg = SUBREG_REG (reg);
530: }
531:
532: if (GET_CODE (reg) != REG || REGNO (reg) >= FIRST_PSEUDO_REGISTER)
533: return;
534:
535: regno = REGNO (reg) + word;
536: endregno = regno + HARD_REGNO_NREGS (regno, mode);
537:
538: for (i = regno; i < endregno; i++)
1.1.1.3 root 539: {
540: SET_HARD_REG_BIT (hard_regs_live, i);
541: CLEAR_HARD_REG_BIT (hard_regs_saved, i);
542: CLEAR_HARD_REG_BIT (hard_regs_need_restore, i);
543: }
1.1 root 544: }
545:
546: /* Here when a REG_DEAD note records the last use of a reg. Clear
547: the appropriate bit or bits in hard_regs_live. Again we can ignore
548: pseudos. */
549:
550: static void
551: clear_reg_live (reg)
552: rtx reg;
553: {
554: register int regno, endregno, i;
555:
556: if (GET_CODE (reg) != REG || REGNO (reg) >= FIRST_PSEUDO_REGISTER)
557: return;
558:
559: regno = REGNO (reg);
560: endregno= regno + HARD_REGNO_NREGS (regno, GET_MODE (reg));
561:
562: for (i = regno; i < endregno; i++)
1.1.1.3 root 563: {
564: CLEAR_HARD_REG_BIT (hard_regs_live, i);
565: CLEAR_HARD_REG_BIT (hard_regs_need_restore, i);
566: CLEAR_HARD_REG_BIT (hard_regs_saved, i);
567: }
1.1 root 568: }
569:
570: /* If any register currently residing in the save area is referenced in X,
571: which is part of INSN, emit code to restore the register in front of INSN.
572: INSN_MODE is the mode to assign to any insns that we add. */
573:
574: static void
575: restore_referenced_regs (x, insn, insn_mode)
576: rtx x;
577: rtx insn;
578: enum machine_mode insn_mode;
579: {
580: enum rtx_code code = GET_CODE (x);
581: char *fmt;
582: int i, j;
583:
1.1.1.3 root 584: if (code == CLOBBER)
585: return;
586:
1.1 root 587: if (code == REG)
588: {
589: int regno = REGNO (x);
590:
591: /* If this is a pseudo, scan its memory location, since it might
592: involve the use of another register, which might be saved. */
593:
594: if (regno >= FIRST_PSEUDO_REGISTER
595: && reg_equiv_mem[regno] != 0)
596: restore_referenced_regs (XEXP (reg_equiv_mem[regno], 0),
597: insn, insn_mode);
598: else if (regno >= FIRST_PSEUDO_REGISTER
599: && reg_equiv_address[regno] != 0)
1.1.1.2 root 600: restore_referenced_regs (reg_equiv_address[regno],
1.1 root 601: insn, insn_mode);
602:
603: /* Otherwise if this is a hard register, restore any piece of it that
604: is currently saved. */
605:
606: else if (regno < FIRST_PSEUDO_REGISTER)
607: {
1.1.1.4 ! root 608: int numregs = HARD_REGNO_NREGS (regno, GET_MODE (x));
! 609: /* Save at most SAVEREGS at a time. This can not be larger than
! 610: MOVE_MAX, because that causes insert_save_restore to fail. */
! 611: int saveregs = MIN (numregs, MOVE_MAX / UNITS_PER_WORD);
! 612: int endregno = regno + numregs;
1.1 root 613:
1.1.1.3 root 614: for (i = regno; i < endregno; i++)
615: if (TEST_HARD_REG_BIT (hard_regs_need_restore, i))
1.1.1.4 ! root 616: i += insert_save_restore (insn, 0, i, insn_mode, saveregs);
1.1 root 617: }
618:
619: return;
620: }
621:
622: fmt = GET_RTX_FORMAT (code);
623: for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
624: {
625: if (fmt[i] == 'e')
626: restore_referenced_regs (XEXP (x, i), insn, insn_mode);
627: else if (fmt[i] == 'E')
628: for (j = XVECLEN (x, i) - 1; j >= 0; j--)
629: restore_referenced_regs (XVECEXP (x, i, j), insn, insn_mode);
630: }
631: }
632:
633: /* Insert a sequence of insns to save or restore, SAVE_P says which,
634: REGNO. Place these insns in front of INSN. INSN_MODE is the mode
1.1.1.3 root 635: to assign to these insns. MAXRESTORE is the maximum number of registers
636: which should be restored during this call (when SAVE_P == 0). It should
637: never be less than 1 since we only work with entire registers.
1.1 root 638:
639: Note that we have verified in init_caller_save that we can do this
640: with a simple SET, so use it. Set INSN_CODE to what we save there
641: since the address might not be valid so the insn might not be recognized.
642: These insns will be reloaded and have register elimination done by
1.1.1.3 root 643: find_reload, so we need not worry about that here.
1.1 root 644:
1.1.1.3 root 645: Return the extra number of registers saved. */
646:
647: static int
648: insert_save_restore (insn, save_p, regno, insn_mode, maxrestore)
1.1 root 649: rtx insn;
650: int save_p;
651: int regno;
652: enum machine_mode insn_mode;
1.1.1.3 root 653: int maxrestore;
1.1 root 654: {
655: rtx pat;
656: enum insn_code code;
1.1.1.3 root 657: int i, numregs;
1.1 root 658:
1.1.1.2 root 659: /* A common failure mode if register status is not correct in the RTL
660: is for this routine to be called with a REGNO we didn't expect to
661: save. That will cause us to write an insn with a (nil) SET_DEST
662: or SET_SRC. Instead of doing so and causing a crash later, check
663: for this common case and abort here instead. This will remove one
664: step in debugging such problems. */
665:
1.1.1.3 root 666: if (regno_save_mem[regno][1] == 0)
1.1.1.2 root 667: abort ();
668:
1.1 root 669: /* If INSN is a CALL_INSN, we must insert our insns before any
670: USE insns in front of the CALL_INSN. */
671:
672: if (GET_CODE (insn) == CALL_INSN)
673: while (GET_CODE (PREV_INSN (insn)) == INSN
674: && GET_CODE (PATTERN (PREV_INSN (insn))) == USE)
675: insn = PREV_INSN (insn);
676:
677: #ifdef HAVE_cc0
678: /* If INSN references CC0, put our insns in front of the insn that sets
679: CC0. This is always safe, since the only way we could be passed an
680: insn that references CC0 is for a restore, and doing a restore earlier
681: isn't a problem. We do, however, assume here that CALL_INSNs don't
682: reference CC0. Guard against non-INSN's like CODE_LABEL. */
683:
684: if ((GET_CODE (insn) == INSN || GET_CODE (insn) == JUMP_INSN)
685: && reg_referenced_p (cc0_rtx, PATTERN (insn)))
686: insn = prev_nonnote_insn (insn);
687: #endif
688:
689: /* Get the pattern to emit and update our status. */
690: if (save_p)
691: {
1.1.1.3 root 692: int i, j, k;
693: int ok;
694:
695: /* See if we can save several registers with a single instruction.
696: Work backwards to the single register case. */
697: for (i = MOVE_MAX / UNITS_PER_WORD; i > 0; i--)
698: {
699: ok = 1;
700: if (regno_save_mem[regno][i] != 0)
701: for (j = 0; j < i; j++)
702: {
703: if (! call_used_regs[regno + j] || call_fixed_regs[regno + j]
704: || ! TEST_HARD_REG_BIT (hard_regs_live, regno + j)
705: || TEST_HARD_REG_BIT (hard_regs_saved, regno + j))
706: ok = 0;
707: }
708: else
709: continue;
710:
711: /* Must do this one save at a time */
712: if (! ok)
713: continue;
714:
715: pat = gen_rtx (SET, VOIDmode, regno_save_mem[regno][i],
716: gen_rtx (REG, GET_MODE (regno_save_mem[regno][i]), regno));
717: code = reg_save_code[regno][i];
718:
719: /* Set hard_regs_saved for all the registers we saved. */
720: for (k = 0; k < i; k++)
721: {
722: SET_HARD_REG_BIT (hard_regs_saved, regno + k);
723: SET_HARD_REG_BIT (hard_regs_need_restore, regno + k);
724: n_regs_saved++;
725: }
726:
727: numregs = i;
728: break;
729: }
1.1 root 730: }
731: else
732: {
1.1.1.3 root 733: int i, j, k;
734: int ok;
735:
736: /* See if we can restore `maxrestore' registers at once. Work
737: backwards to the single register case. */
738: for (i = maxrestore; i > 0; i--)
739: {
740: ok = 1;
741: if (regno_save_mem[regno][i])
742: for (j = 0; j < i; j++)
743: {
744: if (! TEST_HARD_REG_BIT (hard_regs_need_restore, regno + j))
745: ok = 0;
746: }
747: else
748: continue;
1.1 root 749:
1.1.1.3 root 750: /* Must do this one restore at a time */
751: if (! ok)
752: continue;
753:
754: pat = gen_rtx (SET, VOIDmode,
755: gen_rtx (REG, GET_MODE (regno_save_mem[regno][i]),
756: regno),
757: regno_save_mem[regno][i]);
758: code = reg_restore_code[regno][i];
759:
760:
761: /* Clear status for all registers we restored. */
762: for (k = 0; k < i; k++)
763: {
764: CLEAR_HARD_REG_BIT (hard_regs_need_restore, regno + k);
765: n_regs_saved--;
766: }
767:
768: numregs = i;
769: break;
770: }
771: }
1.1 root 772: /* Emit the insn and set the code and mode. */
773:
774: insn = emit_insn_before (pat, insn);
775: PUT_MODE (insn, insn_mode);
776: INSN_CODE (insn) = code;
1.1.1.3 root 777:
778: /* Tell our callers how many extra registers we saved/restored */
779: return numregs - 1;
1.1 root 780: }
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