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1.1 root 1: /* Save and restore call-clobbered registers which are live across a call. 1.1.1.6 ! root 2: Copyright (C) 1989, 1992, 1994 Free Software Foundation, Inc. 1.1 root 3: 4: This file is part of GNU CC. 5: 6: GNU CC is free software; you can redistribute it and/or modify 7: it under the terms of the GNU General Public License as published by 8: the Free Software Foundation; either version 2, or (at your option) 9: any later version. 10: 11: GNU CC is distributed in the hope that it will be useful, 12: but WITHOUT ANY WARRANTY; without even the implied warranty of 13: MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14: GNU General Public License for more details. 15: 16: You should have received a copy of the GNU General Public License 17: along with GNU CC; see the file COPYING. If not, write to 18: the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */ 19: 20: #include "config.h" 21: #include "rtl.h" 22: #include "insn-config.h" 23: #include "flags.h" 24: #include "regs.h" 25: #include "hard-reg-set.h" 26: #include "recog.h" 27: #include "basic-block.h" 28: #include "reload.h" 29: #include "expr.h" 30: 1.1.1.5 root 31: #ifndef MAX_MOVE_MAX 32: #define MAX_MOVE_MAX MOVE_MAX 33: #endif 34: 35: #ifndef MAX_UNITS_PER_WORD 36: #define MAX_UNITS_PER_WORD UNITS_PER_WORD 37: #endif 38: 1.1.1.3 root 39: /* Modes for each hard register that we can save. The smallest mode is wide 40: enough to save the entire contents of the register. When saving the 41: register because it is live we first try to save in multi-register modes. 42: If that is not possible the save is done one register at a time. */ 43: 44: static enum machine_mode 1.1.1.5 root 45: regno_save_mode[FIRST_PSEUDO_REGISTER][MAX_MOVE_MAX / MAX_UNITS_PER_WORD + 1]; 1.1 root 46: 47: /* For each hard register, a place on the stack where it can be saved, 48: if needed. */ 49: 1.1.1.3 root 50: static rtx 1.1.1.5 root 51: regno_save_mem[FIRST_PSEUDO_REGISTER][MAX_MOVE_MAX / MAX_UNITS_PER_WORD + 1]; 1.1 root 52: 53: /* We will only make a register eligible for caller-save if it can be 54: saved in its widest mode with a simple SET insn as long as the memory 55: address is valid. We record the INSN_CODE is those insns here since 56: when we emit them, the addresses might not be valid, so they might not 57: be recognized. */ 58: 1.1.1.3 root 59: static enum insn_code 1.1.1.5 root 60: reg_save_code[FIRST_PSEUDO_REGISTER][MAX_MOVE_MAX / MAX_UNITS_PER_WORD + 1]; 1.1.1.3 root 61: static enum insn_code 1.1.1.5 root 62: reg_restore_code[FIRST_PSEUDO_REGISTER][MAX_MOVE_MAX / MAX_UNITS_PER_WORD + 1]; 1.1 root 63: 64: /* Set of hard regs currently live (during scan of all insns). */ 65: 66: static HARD_REG_SET hard_regs_live; 67: 68: /* Set of hard regs currently residing in save area (during insn scan). */ 69: 70: static HARD_REG_SET hard_regs_saved; 71: 1.1.1.3 root 72: /* Set of hard regs which need to be restored before referenced. */ 73: 74: static HARD_REG_SET hard_regs_need_restore; 75: 1.1 root 76: /* Number of registers currently in hard_regs_saved. */ 77: 78: int n_regs_saved; 79: 1.1.1.4 root 80: static void set_reg_live PROTO((rtx, rtx)); 81: static void clear_reg_live PROTO((rtx)); 82: static void restore_referenced_regs PROTO((rtx, rtx, enum machine_mode)); 83: static int insert_save_restore PROTO((rtx, int, int, 84: enum machine_mode, int)); 1.1 root 85: 86: /* Initialize for caller-save. 87: 88: Look at all the hard registers that are used by a call and for which 89: regclass.c has not already excluded from being used across a call. 90: 91: Ensure that we can find a mode to save the register and that there is a 92: simple insn to save and restore the register. This latter check avoids 93: problems that would occur if we tried to save the MQ register of some 94: machines directly into memory. */ 95: 96: void 97: init_caller_save () 98: { 99: char *first_obj = (char *) oballoc (0); 100: rtx addr_reg; 101: int offset; 102: rtx address; 1.1.1.3 root 103: int i, j; 1.1 root 104: 105: /* First find all the registers that we need to deal with and all 106: the modes that they can have. If we can't find a mode to use, 107: we can't have the register live over calls. */ 108: 109: for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) 110: { 111: if (call_used_regs[i] && ! call_fixed_regs[i]) 112: { 1.1.1.3 root 113: for (j = 1; j <= MOVE_MAX / UNITS_PER_WORD; j++) 1.1 root 114: { 1.1.1.3 root 115: regno_save_mode[i][j] = choose_hard_reg_mode (i, j); 116: if (regno_save_mode[i][j] == VOIDmode && j == 1) 117: { 118: call_fixed_regs[i] = 1; 119: SET_HARD_REG_BIT (call_fixed_reg_set, i); 120: } 1.1 root 121: } 122: } 123: else 1.1.1.3 root 124: regno_save_mode[i][1] = VOIDmode; 1.1 root 125: } 126: 127: /* The following code tries to approximate the conditions under which 128: we can easily save and restore a register without scratch registers or 129: other complexities. It will usually work, except under conditions where 130: the validity of an insn operand is dependent on the address offset. 131: No such cases are currently known. 132: 133: We first find a typical offset from some BASE_REG_CLASS register. 134: This address is chosen by finding the first register in the class 135: and by finding the smallest power of two that is a valid offset from 136: that register in every mode we will use to save registers. */ 137: 138: for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) 139: if (TEST_HARD_REG_BIT (reg_class_contents[(int) BASE_REG_CLASS], i)) 140: break; 141: 142: if (i == FIRST_PSEUDO_REGISTER) 143: abort (); 144: 145: addr_reg = gen_rtx (REG, Pmode, i); 146: 147: for (offset = 1 << (HOST_BITS_PER_INT / 2); offset; offset >>= 1) 148: { 1.1.1.3 root 149: address = gen_rtx (PLUS, Pmode, addr_reg, GEN_INT (offset)); 1.1 root 150: 151: for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) 1.1.1.3 root 152: if (regno_save_mode[i][1] != VOIDmode 153: && ! strict_memory_address_p (regno_save_mode[i][1], address)) 1.1 root 154: break; 155: 156: if (i == FIRST_PSEUDO_REGISTER) 157: break; 158: } 159: 160: /* If we didn't find a valid address, we must use register indirect. */ 161: if (offset == 0) 162: address = addr_reg; 163: 164: /* Next we try to form an insn to save and restore the register. We 165: see if such an insn is recognized and meets its constraints. */ 166: 167: start_sequence (); 168: 169: for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) 1.1.1.3 root 170: for (j = 1; j <= MOVE_MAX / UNITS_PER_WORD; j++) 171: if (regno_save_mode[i][j] != VOIDmode) 172: { 173: rtx mem = gen_rtx (MEM, regno_save_mode[i][j], address); 174: rtx reg = gen_rtx (REG, regno_save_mode[i][j], i); 175: rtx savepat = gen_rtx (SET, VOIDmode, mem, reg); 176: rtx restpat = gen_rtx (SET, VOIDmode, reg, mem); 177: rtx saveinsn = emit_insn (savepat); 178: rtx restinsn = emit_insn (restpat); 179: int ok; 180: 181: reg_save_code[i][j] = recog_memoized (saveinsn); 182: reg_restore_code[i][j] = recog_memoized (restinsn); 183: 184: /* Now extract both insns and see if we can meet their constraints. */ 185: ok = (reg_save_code[i][j] != -1 && reg_restore_code[i][j] != -1); 186: if (ok) 187: { 188: insn_extract (saveinsn); 189: ok = constrain_operands (reg_save_code[i][j], 1); 190: insn_extract (restinsn); 191: ok &= constrain_operands (reg_restore_code[i][j], 1); 192: } 1.1 root 193: 1.1.1.3 root 194: if (! ok) 195: { 196: regno_save_mode[i][j] = VOIDmode; 197: if (j == 1) 198: { 199: call_fixed_regs[i] = 1; 200: SET_HARD_REG_BIT (call_fixed_reg_set, i); 201: } 202: } 1.1 root 203: } 204: 205: end_sequence (); 206: 207: obfree (first_obj); 208: } 209: 210: /* Initialize save areas by showing that we haven't allocated any yet. */ 211: 212: void 213: init_save_areas () 214: { 1.1.1.3 root 215: int i, j; 1.1 root 216: 217: for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) 1.1.1.3 root 218: for (j = 1; j <= MOVE_MAX / UNITS_PER_WORD; j++) 219: regno_save_mem[i][j] = 0; 1.1 root 220: } 221: 222: /* Allocate save areas for any hard registers that might need saving. 223: We take a conservative approach here and look for call-clobbered hard 224: registers that are assigned to pseudos that cross calls. This may 225: overestimate slightly (especially if some of these registers are later 226: used as spill registers), but it should not be significant. 227: 228: Then perform register elimination in the addresses of the save area 229: locations; return 1 if all eliminated addresses are strictly valid. 230: We assume that our caller has set up the elimination table to the 231: worst (largest) possible offsets. 232: 1.1.1.3 root 233: Set *PCHANGED to 1 if we had to allocate some memory for the save area. 234: 235: Future work: 236: 237: In the fallback case we should iterate backwards across all possible 238: modes for the save, choosing the largest available one instead of 239: falling back to the smallest mode immediately. (eg TF -> DF -> SF). 240: 241: We do not try to use "move multiple" instructions that exist 242: on some machines (such as the 68k moveml). It could be a win to try 243: and use them when possible. The hard part is doing it in a way that is 244: machine independent since they might be saving non-consecutive 245: registers. (imagine caller-saving d0,d1,a0,a1 on the 68k) */ 1.1 root 246: 247: int 248: setup_save_areas (pchanged) 249: int *pchanged; 250: { 1.1.1.3 root 251: int i, j, k; 252: HARD_REG_SET hard_regs_used; 1.1 root 253: int ok = 1; 254: 1.1.1.3 root 255: 256: /* Allocate space in the save area for the largest multi-register 257: pseudos first, then work backwards to single register 258: pseudos. */ 259: 260: /* Find and record all call-used hard-registers in this function. */ 261: CLEAR_HARD_REG_SET (hard_regs_used); 1.1 root 262: for (i = FIRST_PSEUDO_REGISTER; i < max_regno; i++) 263: if (reg_renumber[i] >= 0 && reg_n_calls_crossed[i] > 0) 264: { 265: int regno = reg_renumber[i]; 1.1.1.3 root 266: int endregno 1.1 root 267: = regno + HARD_REGNO_NREGS (regno, GET_MODE (regno_reg_rtx[i])); 1.1.1.3 root 268: int nregs = endregno - regno; 269: 270: for (j = 0; j < nregs; j++) 271: { 272: if (call_used_regs[regno+j]) 273: SET_HARD_REG_BIT (hard_regs_used, regno+j); 274: } 275: } 276: 277: /* Now run through all the call-used hard-registers and allocate 278: space for them in the caller-save area. Try to allocate space 279: in a manner which allows multi-register saves/restores to be done. */ 1.1 root 280: 1.1.1.3 root 281: for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) 282: for (j = MOVE_MAX / UNITS_PER_WORD; j > 0; j--) 283: { 284: int ok = 1; 1.1.1.4 root 285: int do_save; 1.1.1.3 root 286: 287: /* If no mode exists for this size, try another. Also break out 288: if we have already saved this hard register. */ 289: if (regno_save_mode[i][j] == VOIDmode || regno_save_mem[i][1] != 0) 290: continue; 291: 1.1.1.4 root 292: /* See if any register in this group has been saved. */ 293: do_save = 1; 294: for (k = 0; k < j; k++) 295: if (regno_save_mem[i + k][1]) 296: { 297: do_save = 0; 298: break; 299: } 300: if (! do_save) 301: continue; 302: 1.1.1.3 root 303: for (k = 0; k < j; k++) 1.1 root 304: { 1.1.1.3 root 305: int regno = i + k; 306: ok &= (TEST_HARD_REG_BIT (hard_regs_used, regno) != 0); 1.1 root 307: } 1.1.1.3 root 308: 309: /* We have found an acceptable mode to store in. */ 310: if (ok) 311: { 312: 313: regno_save_mem[i][j] 314: = assign_stack_local (regno_save_mode[i][j], 315: GET_MODE_SIZE (regno_save_mode[i][j]), 0); 316: 317: /* Setup single word save area just in case... */ 318: for (k = 0; k < j; k++) 319: { 320: /* This should not depend on WORDS_BIG_ENDIAN. 321: The order of words in regs is the same as in memory. */ 322: rtx temp = gen_rtx (MEM, regno_save_mode[i+k][1], 323: XEXP (regno_save_mem[i][j], 0)); 324: 325: regno_save_mem[i+k][1] 326: = adj_offsettable_operand (temp, k * UNITS_PER_WORD); 327: } 328: *pchanged = 1; 329: } 1.1 root 330: } 331: 332: for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) 1.1.1.3 root 333: for (j = 1; j <= MOVE_MAX / UNITS_PER_WORD; j++) 334: if (regno_save_mem[i][j] != 0) 335: ok &= strict_memory_address_p (GET_MODE (regno_save_mem[i][j]), 336: XEXP (eliminate_regs (regno_save_mem[i][j], 0, NULL_RTX), 0)); 1.1 root 337: 338: return ok; 339: } 340: 341: /* Find the places where hard regs are live across calls and save them. 342: 343: INSN_MODE is the mode to assign to any insns that we add. This is used 344: by reload to determine whether or not reloads or register eliminations 345: need be done on these insns. */ 346: 347: void 348: save_call_clobbered_regs (insn_mode) 349: enum machine_mode insn_mode; 350: { 351: rtx insn; 352: int b; 353: 354: for (b = 0; b < n_basic_blocks; b++) 355: { 356: regset regs_live = basic_block_live_at_start[b]; 1.1.1.3 root 357: rtx prev_block_last = PREV_INSN (basic_block_head[b]); 358: REGSET_ELT_TYPE bit; 359: int offset, i, j; 1.1 root 360: int regno; 361: 362: /* Compute hard regs live at start of block -- this is the 363: real hard regs marked live, plus live pseudo regs that 364: have been renumbered to hard regs. No registers have yet been 365: saved because we restore all of them before the end of the basic 366: block. */ 367: 368: #ifdef HARD_REG_SET 369: hard_regs_live = *regs_live; 370: #else 371: COPY_HARD_REG_SET (hard_regs_live, regs_live); 372: #endif 373: 374: CLEAR_HARD_REG_SET (hard_regs_saved); 1.1.1.3 root 375: CLEAR_HARD_REG_SET (hard_regs_need_restore); 1.1 root 376: n_regs_saved = 0; 377: 378: for (offset = 0, i = 0; offset < regset_size; offset++) 379: { 380: if (regs_live[offset] == 0) 1.1.1.3 root 381: i += REGSET_ELT_BITS; 1.1 root 382: else 383: for (bit = 1; bit && i < max_regno; bit <<= 1, i++) 384: if ((regs_live[offset] & bit) 385: && (regno = reg_renumber[i]) >= 0) 386: for (j = regno; 387: j < regno + HARD_REGNO_NREGS (regno, 388: PSEUDO_REGNO_MODE (i)); 389: j++) 390: SET_HARD_REG_BIT (hard_regs_live, j); 1.1.1.3 root 391: 1.1 root 392: } 393: 394: /* Now scan the insns in the block, keeping track of what hard 395: regs are live as we go. When we see a call, save the live 396: call-clobbered hard regs. */ 397: 398: for (insn = basic_block_head[b]; ; insn = NEXT_INSN (insn)) 399: { 400: RTX_CODE code = GET_CODE (insn); 401: 402: if (GET_RTX_CLASS (code) == 'i') 403: { 404: rtx link; 405: 406: /* If some registers have been saved, see if INSN references 407: any of them. We must restore them before the insn if so. */ 408: 409: if (n_regs_saved) 410: restore_referenced_regs (PATTERN (insn), insn, insn_mode); 411: 412: /* NB: the normal procedure is to first enliven any 413: registers set by insn, then deaden any registers that 414: had their last use at insn. This is incorrect now, 415: since multiple pseudos may have been mapped to the 416: same hard reg, and the death notes are ambiguous. So 417: it must be done in the other, safe, order. */ 418: 419: for (link = REG_NOTES (insn); link; link = XEXP (link, 1)) 420: if (REG_NOTE_KIND (link) == REG_DEAD) 421: clear_reg_live (XEXP (link, 0)); 422: 423: /* When we reach a call, we need to save all registers that are 424: live, call-used, not fixed, and not already saved. We must 425: test at this point because registers that die in a CALL_INSN 426: are not live across the call and likewise for registers that 1.1.1.6 ! root 427: are born in the CALL_INSN. ! 428: ! 429: If registers are filled with parameters for this function, ! 430: and some of these are also being set by this function, then ! 431: they will not appear to die (no REG_DEAD note for them), ! 432: to check if in fact they do, collect the set registers in ! 433: hard_regs_live first. */ 1.1 root 434: 435: if (code == CALL_INSN) 1.1.1.3 root 436: { 1.1.1.6 ! root 437: HARD_REG_SET this_call_sets; ! 438: { ! 439: HARD_REG_SET old_hard_regs_live; ! 440: ! 441: /* Save the hard_regs_live information. */ ! 442: COPY_HARD_REG_SET (old_hard_regs_live, hard_regs_live); ! 443: ! 444: /* Now calculate hard_regs_live for this CALL_INSN ! 445: only. */ ! 446: CLEAR_HARD_REG_SET (hard_regs_live); ! 447: note_stores (PATTERN (insn), set_reg_live); ! 448: COPY_HARD_REG_SET (this_call_sets, hard_regs_live); ! 449: ! 450: /* Restore the hard_regs_live information. */ ! 451: COPY_HARD_REG_SET (hard_regs_live, old_hard_regs_live); ! 452: } ! 453: 1.1.1.3 root 454: for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++) 455: if (call_used_regs[regno] && ! call_fixed_regs[regno] 456: && TEST_HARD_REG_BIT (hard_regs_live, regno) 1.1.1.6 ! root 457: /* It must not be set by this instruction. */ ! 458: && ! TEST_HARD_REG_BIT (this_call_sets, regno) 1.1.1.3 root 459: && ! TEST_HARD_REG_BIT (hard_regs_saved, regno)) 460: regno += insert_save_restore (insn, 1, regno, 461: insn_mode, 0); 1.1.1.6 ! root 462: ! 463: /* Put the information for this CALL_INSN on top of what ! 464: we already had. */ ! 465: IOR_HARD_REG_SET (hard_regs_live, this_call_sets); ! 466: COPY_HARD_REG_SET (hard_regs_need_restore, hard_regs_saved); 1.1.1.3 root 467: 468: /* Must recompute n_regs_saved. */ 469: n_regs_saved = 0; 470: for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++) 471: if (TEST_HARD_REG_BIT (hard_regs_saved, regno)) 472: n_regs_saved++; 473: } 1.1.1.6 ! root 474: else ! 475: note_stores (PATTERN (insn), set_reg_live); 1.1 root 476: 477: for (link = REG_NOTES (insn); link; link = XEXP (link, 1)) 478: if (REG_NOTE_KIND (link) == REG_UNUSED) 479: clear_reg_live (XEXP (link, 0)); 480: } 481: 482: if (insn == basic_block_end[b]) 483: break; 484: } 485: 486: /* At the end of the basic block, we must restore any registers that 487: remain saved. If the last insn in the block is a JUMP_INSN, put 488: the restore before the insn, otherwise, put it after the insn. */ 489: 490: if (n_regs_saved) 491: for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++) 1.1.1.3 root 492: if (TEST_HARD_REG_BIT (hard_regs_need_restore, regno)) 493: regno += insert_save_restore ((GET_CODE (insn) == JUMP_INSN 494: ? insn : NEXT_INSN (insn)), 0, 495: regno, insn_mode, MOVE_MAX / UNITS_PER_WORD); 496: 497: /* If we added any insns at the start of the block, update the start 498: of the block to point at those insns. */ 499: basic_block_head[b] = NEXT_INSN (prev_block_last); 1.1 root 500: } 501: } 502: 503: /* Here from note_stores when an insn stores a value in a register. 504: Set the proper bit or bits in hard_regs_live. All pseudos that have 505: been assigned hard regs have had their register number changed already, 506: so we can ignore pseudos. */ 507: 508: static void 509: set_reg_live (reg, setter) 510: rtx reg, setter; 511: { 512: register int regno, endregno, i; 513: enum machine_mode mode = GET_MODE (reg); 514: int word = 0; 515: 516: if (GET_CODE (reg) == SUBREG) 517: { 518: word = SUBREG_WORD (reg); 519: reg = SUBREG_REG (reg); 520: } 521: 522: if (GET_CODE (reg) != REG || REGNO (reg) >= FIRST_PSEUDO_REGISTER) 523: return; 524: 525: regno = REGNO (reg) + word; 526: endregno = regno + HARD_REGNO_NREGS (regno, mode); 527: 528: for (i = regno; i < endregno; i++) 1.1.1.3 root 529: { 530: SET_HARD_REG_BIT (hard_regs_live, i); 531: CLEAR_HARD_REG_BIT (hard_regs_saved, i); 532: CLEAR_HARD_REG_BIT (hard_regs_need_restore, i); 533: } 1.1 root 534: } 535: 536: /* Here when a REG_DEAD note records the last use of a reg. Clear 537: the appropriate bit or bits in hard_regs_live. Again we can ignore 538: pseudos. */ 539: 540: static void 541: clear_reg_live (reg) 542: rtx reg; 543: { 544: register int regno, endregno, i; 545: 546: if (GET_CODE (reg) != REG || REGNO (reg) >= FIRST_PSEUDO_REGISTER) 547: return; 548: 549: regno = REGNO (reg); 550: endregno= regno + HARD_REGNO_NREGS (regno, GET_MODE (reg)); 551: 552: for (i = regno; i < endregno; i++) 1.1.1.3 root 553: { 554: CLEAR_HARD_REG_BIT (hard_regs_live, i); 555: CLEAR_HARD_REG_BIT (hard_regs_need_restore, i); 556: CLEAR_HARD_REG_BIT (hard_regs_saved, i); 557: } 1.1 root 558: } 559: 560: /* If any register currently residing in the save area is referenced in X, 561: which is part of INSN, emit code to restore the register in front of INSN. 562: INSN_MODE is the mode to assign to any insns that we add. */ 563: 564: static void 565: restore_referenced_regs (x, insn, insn_mode) 566: rtx x; 567: rtx insn; 568: enum machine_mode insn_mode; 569: { 570: enum rtx_code code = GET_CODE (x); 571: char *fmt; 572: int i, j; 573: 1.1.1.3 root 574: if (code == CLOBBER) 575: return; 576: 1.1 root 577: if (code == REG) 578: { 579: int regno = REGNO (x); 580: 581: /* If this is a pseudo, scan its memory location, since it might 582: involve the use of another register, which might be saved. */ 583: 584: if (regno >= FIRST_PSEUDO_REGISTER 585: && reg_equiv_mem[regno] != 0) 586: restore_referenced_regs (XEXP (reg_equiv_mem[regno], 0), 587: insn, insn_mode); 588: else if (regno >= FIRST_PSEUDO_REGISTER 589: && reg_equiv_address[regno] != 0) 1.1.1.2 root 590: restore_referenced_regs (reg_equiv_address[regno], 1.1 root 591: insn, insn_mode); 592: 593: /* Otherwise if this is a hard register, restore any piece of it that 594: is currently saved. */ 595: 596: else if (regno < FIRST_PSEUDO_REGISTER) 597: { 1.1.1.4 root 598: int numregs = HARD_REGNO_NREGS (regno, GET_MODE (x)); 599: /* Save at most SAVEREGS at a time. This can not be larger than 600: MOVE_MAX, because that causes insert_save_restore to fail. */ 601: int saveregs = MIN (numregs, MOVE_MAX / UNITS_PER_WORD); 602: int endregno = regno + numregs; 1.1 root 603: 1.1.1.3 root 604: for (i = regno; i < endregno; i++) 605: if (TEST_HARD_REG_BIT (hard_regs_need_restore, i)) 1.1.1.4 root 606: i += insert_save_restore (insn, 0, i, insn_mode, saveregs); 1.1 root 607: } 608: 609: return; 610: } 611: 612: fmt = GET_RTX_FORMAT (code); 613: for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) 614: { 615: if (fmt[i] == 'e') 616: restore_referenced_regs (XEXP (x, i), insn, insn_mode); 617: else if (fmt[i] == 'E') 618: for (j = XVECLEN (x, i) - 1; j >= 0; j--) 619: restore_referenced_regs (XVECEXP (x, i, j), insn, insn_mode); 620: } 621: } 622: 623: /* Insert a sequence of insns to save or restore, SAVE_P says which, 624: REGNO. Place these insns in front of INSN. INSN_MODE is the mode 1.1.1.3 root 625: to assign to these insns. MAXRESTORE is the maximum number of registers 626: which should be restored during this call (when SAVE_P == 0). It should 627: never be less than 1 since we only work with entire registers. 1.1 root 628: 629: Note that we have verified in init_caller_save that we can do this 630: with a simple SET, so use it. Set INSN_CODE to what we save there 631: since the address might not be valid so the insn might not be recognized. 632: These insns will be reloaded and have register elimination done by 1.1.1.3 root 633: find_reload, so we need not worry about that here. 1.1 root 634: 1.1.1.3 root 635: Return the extra number of registers saved. */ 636: 637: static int 638: insert_save_restore (insn, save_p, regno, insn_mode, maxrestore) 1.1 root 639: rtx insn; 640: int save_p; 641: int regno; 642: enum machine_mode insn_mode; 1.1.1.3 root 643: int maxrestore; 1.1 root 644: { 645: rtx pat; 646: enum insn_code code; 1.1.1.3 root 647: int i, numregs; 1.1 root 648: 1.1.1.2 root 649: /* A common failure mode if register status is not correct in the RTL 650: is for this routine to be called with a REGNO we didn't expect to 651: save. That will cause us to write an insn with a (nil) SET_DEST 652: or SET_SRC. Instead of doing so and causing a crash later, check 653: for this common case and abort here instead. This will remove one 654: step in debugging such problems. */ 655: 1.1.1.3 root 656: if (regno_save_mem[regno][1] == 0) 1.1.1.2 root 657: abort (); 658: 1.1 root 659: #ifdef HAVE_cc0 660: /* If INSN references CC0, put our insns in front of the insn that sets 661: CC0. This is always safe, since the only way we could be passed an 662: insn that references CC0 is for a restore, and doing a restore earlier 663: isn't a problem. We do, however, assume here that CALL_INSNs don't 664: reference CC0. Guard against non-INSN's like CODE_LABEL. */ 665: 666: if ((GET_CODE (insn) == INSN || GET_CODE (insn) == JUMP_INSN) 667: && reg_referenced_p (cc0_rtx, PATTERN (insn))) 668: insn = prev_nonnote_insn (insn); 669: #endif 670: 671: /* Get the pattern to emit and update our status. */ 672: if (save_p) 673: { 1.1.1.3 root 674: int i, j, k; 675: int ok; 676: 677: /* See if we can save several registers with a single instruction. 678: Work backwards to the single register case. */ 679: for (i = MOVE_MAX / UNITS_PER_WORD; i > 0; i--) 680: { 681: ok = 1; 682: if (regno_save_mem[regno][i] != 0) 683: for (j = 0; j < i; j++) 684: { 685: if (! call_used_regs[regno + j] || call_fixed_regs[regno + j] 686: || ! TEST_HARD_REG_BIT (hard_regs_live, regno + j) 687: || TEST_HARD_REG_BIT (hard_regs_saved, regno + j)) 688: ok = 0; 689: } 690: else 691: continue; 692: 693: /* Must do this one save at a time */ 694: if (! ok) 695: continue; 696: 697: pat = gen_rtx (SET, VOIDmode, regno_save_mem[regno][i], 698: gen_rtx (REG, GET_MODE (regno_save_mem[regno][i]), regno)); 699: code = reg_save_code[regno][i]; 700: 701: /* Set hard_regs_saved for all the registers we saved. */ 702: for (k = 0; k < i; k++) 703: { 704: SET_HARD_REG_BIT (hard_regs_saved, regno + k); 705: SET_HARD_REG_BIT (hard_regs_need_restore, regno + k); 706: n_regs_saved++; 707: } 708: 709: numregs = i; 710: break; 711: } 1.1 root 712: } 713: else 714: { 1.1.1.3 root 715: int i, j, k; 716: int ok; 717: 718: /* See if we can restore `maxrestore' registers at once. Work 719: backwards to the single register case. */ 720: for (i = maxrestore; i > 0; i--) 721: { 722: ok = 1; 723: if (regno_save_mem[regno][i]) 724: for (j = 0; j < i; j++) 725: { 726: if (! TEST_HARD_REG_BIT (hard_regs_need_restore, regno + j)) 727: ok = 0; 728: } 729: else 730: continue; 1.1 root 731: 1.1.1.3 root 732: /* Must do this one restore at a time */ 733: if (! ok) 734: continue; 735: 736: pat = gen_rtx (SET, VOIDmode, 737: gen_rtx (REG, GET_MODE (regno_save_mem[regno][i]), 738: regno), 739: regno_save_mem[regno][i]); 740: code = reg_restore_code[regno][i]; 741: 742: 743: /* Clear status for all registers we restored. */ 744: for (k = 0; k < i; k++) 745: { 746: CLEAR_HARD_REG_BIT (hard_regs_need_restore, regno + k); 747: n_regs_saved--; 748: } 749: 750: numregs = i; 751: break; 752: } 753: } 1.1 root 754: /* Emit the insn and set the code and mode. */ 755: 756: insn = emit_insn_before (pat, insn); 757: PUT_MODE (insn, insn_mode); 758: INSN_CODE (insn) = code; 1.1.1.3 root 759: 760: /* Tell our callers how many extra registers we saved/restored */ 761: return numregs - 1; 1.1 root 762: }
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