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Annotation of gcc/config/1750a/ms1750.inc, revision 1.1.1.1

1.1       root        1: ;; GCC assembler includefile for AS1750
                      2: ;;
                      3: ;; Macros defined:
                      4: ;;   EFLR.M  #d,#s     Load the three regs starting at R#s to R#d following.
                      5: ;;   RET.M   #fs       Return from function (uses the framesize #fs)
                      6: 
                      7: 
                      8: UC     SET     15
                      9: 
                     10: ; Return from function ; parameter: framesize
                     11:      MACRO RET.M
                     12:        IF `1` > 0
                     13:            IF `1` <= 16
                     14:                AISP R14,`1`
                     15:            ELSE
                     16:                AIM  R14,`1`
                     17:            ENDIF
                     18:        ENDIF
                     19:        LR   R15,R14
                     20:        URS  R15
                     21:      ENDMACRO
                     22: 
                     23: ; Useful instructions missing from the 1750A standard:
                     24: 
                     25: ; Extended Float Load from Registers
                     26:      MACRO EFLR.M      ; args : #1=dest-regno, #2=source-regno
                     27: ONE    SET  `1` + 2
                     28: TWO    SET  `2` + 2
                     29:        IF `1` >= `2` || `1`+2 < `2`
                     30:            LR    R`ONE`,R`TWO`
                     31:            DLR   R`1`,R`2`
                     32:        ELSE
                     33:            DLR   R`1`,R`2`
                     34:            LR    R`ONE`,R`TWO`
                     35:            DLR   R`1`,R`1`     ; Just to update condition codes
                     36:        ENDIF
                     37:      ENDMACRO
                     38: 
                     39: ; The following leave the condition codes haywire. But that is
                     40: ; accounted for (see notice_update_cc in config/1750a.c.)
                     41: 
                     42: ; Double ANd Register with Register
                     43:      MACRO DANR.M
                     44: ONE    SET  `1` + 1
                     45: TWO    SET  `2` + 1
                     46:        ANDR  R`1`,R`2`
                     47:        ANDR  R`ONE`,R`TWO`
                     48:      ENDMACRO
                     49: 
                     50: ; Double OR Register with Register
                     51:      MACRO DORR.M
                     52: ONE    SET  `1` + 1
                     53: TWO    SET  `2` + 1
                     54:        ORR   R`1`,R`2`
                     55:        ORR   R`ONE`,R`TWO`
                     56:      ENDMACRO
                     57: 
                     58: ; Double eXoR Register with Register
                     59:      MACRO DXRR.M
                     60: ONE    SET  `1` + 1
                     61: TWO    SET  `2` + 1
                     62:        XORR  R`1`,R`2`
                     63:        XORR  R`ONE`,R`TWO`
                     64:      ENDMACRO
                     65: 
                     66: ; Double Nand Register with register
                     67:      MACRO DNR.M
                     68: ONE    SET  `1` + 1
                     69: TWO    SET  `2` + 1
                     70:        NR    R`1`,R`2`
                     71:        NR    R`ONE`,R`TWO`
                     72:      ENDMACRO
                     73: 

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