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1.1 ! root 1: /* Definitions of target machine for GNU compiler, for AMD Am29000 CPU. ! 2: Copyright (C) 1988, 1990, 1991 Free Software Foundation, Inc. ! 3: Contributed by Richard Kenner ([email protected]) ! 4: ! 5: This file is part of GNU CC. ! 6: ! 7: GNU CC is free software; you can redistribute it and/or modify ! 8: it under the terms of the GNU General Public License as published by ! 9: the Free Software Foundation; either version 2, or (at your option) ! 10: any later version. ! 11: ! 12: GNU CC is distributed in the hope that it will be useful, ! 13: but WITHOUT ANY WARRANTY; without even the implied warranty of ! 14: MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ! 15: GNU General Public License for more details. ! 16: ! 17: You should have received a copy of the GNU General Public License ! 18: along with GNU CC; see the file COPYING. If not, write to ! 19: the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */ ! 20: ! 21: ! 22: /* Names to predefine in the preprocessor for this target machine. */ ! 23: ! 24: #define CPP_PREDEFINES "-D_AM29K -D_AM29000 -D_EPI" ! 25: ! 26: /* Print subsidiary information on the compiler version in use. */ ! 27: #define TARGET_VERSION ! 28: ! 29: /* Pass -w to assembler. */ ! 30: #define ASM_SPEC "-w" ! 31: ! 32: /* Run-time compilation parameters selecting different hardware subsets. */ ! 33: ! 34: extern int target_flags; ! 35: ! 36: /* Macro to define tables used to set the flags. ! 37: This is a list in braces of pairs in braces, ! 38: each pair being { "NAME", VALUE } ! 39: where VALUE is the bits to set or minus the bits to clear. ! 40: An empty string NAME is used to identify the default VALUE. */ ! 41: ! 42: /* This means that the DW bit will be enabled, to allow direct loads ! 43: of bytes. */ ! 44: ! 45: #define TARGET_DW_ENABLE (target_flags & 1) ! 46: ! 47: /* This means that the external hardware does supports byte writes. */ ! 48: ! 49: #define TARGET_BYTE_WRITES (target_flags & 2) ! 50: ! 51: /* This means that a "small memory model" has been selected where all ! 52: function addresses are known to be within 256K. This allows CALL to be ! 53: used. */ ! 54: ! 55: #define TARGET_SMALL_MEMORY (target_flags & 4) ! 56: ! 57: /* This means that we are compiling for a 29050. */ ! 58: ! 59: #define TARGET_29050 (target_flags & 8) ! 60: ! 61: /* This means that we are compiling for the kernel which means that we use ! 62: gr64-gr95 instead of gr96-126. */ ! 63: ! 64: #define TARGET_KERNEL_REGISTERS (target_flags & 16) ! 65: ! 66: /* This means that a call to "__msp_check" should be inserted after each stack ! 67: adjustment to check for stack overflow. */ ! 68: ! 69: #define TARGET_STACK_CHECK (target_flags & 32) ! 70: ! 71: /* This handles 29k processors which cannot handle the separation ! 72: of a mtsrim insns and a storem insn (most 29000 chips to date, but ! 73: not the 29050. */ ! 74: ! 75: #define TARGET_NO_STOREM_BUG (target_flags & 64) ! 76: ! 77: /* This forces the compiler not to use incoming argument registers except ! 78: for copying out arguments. It helps detect problems when a function is ! 79: called with fewer arguments than it is declared with. */ ! 80: ! 81: #define TARGET_NO_REUSE_ARGS (target_flags & 128) ! 82: ! 83: #define TARGET_SWITCHES \ ! 84: { {"dw", 1}, \ ! 85: {"ndw", -1}, \ ! 86: {"bw", 2}, \ ! 87: {"nbw", - (1|2)}, \ ! 88: {"small", 4}, \ ! 89: {"large", -4}, \ ! 90: {"29050", 8+64}, \ ! 91: {"29000", -8}, \ ! 92: {"kernel-registers", 16}, \ ! 93: {"user-registers", -16}, \ ! 94: {"stack-check", 32}, \ ! 95: {"no-storem-bug", 64}, \ ! 96: {"reuse-arg-regs", -128}, \ ! 97: {"no-reuse-arg-regs", 128}, \ ! 98: {"", TARGET_DEFAULT}} ! 99: ! 100: #define TARGET_DEFAULT 3 ! 101: ! 102: /* Define this to change the optimizations peformed by default. */ ! 103: ! 104: #define OPTIMIZATION_OPTIONS(LEVEL) \ ! 105: { \ ! 106: if ((LEVEL) > 0) \ ! 107: { \ ! 108: flag_force_addr = 1; \ ! 109: flag_force_mem = 1; \ ! 110: flag_omit_frame_pointer = 1; \ ! 111: } \ ! 112: } ! 113: ! 114: /* target machine storage layout */ ! 115: ! 116: /* Define the types for size_t, ptrdiff_t, and wchar_t. These are the ! 117: same as those used by EPI. The type for wchar_t does not make much ! 118: sense, but is what is used. */ ! 119: ! 120: #define SIZE_TYPE "unsigned int" ! 121: #define PTRDIFF_TYPE "int" ! 122: #define WCHAR_TYPE "char" ! 123: #define WCHAR_TYPE_SIZE BITS_PER_UNIT ! 124: ! 125: /* Define this if most significant bit is lowest numbered ! 126: in instructions that operate on numbered bit-fields. ! 127: This is arbitrary on the 29k since it has no actual bit-field insns. ! 128: It is better to define this as TRUE because BYTES_BIG_ENDIAN is TRUE ! 129: and we want to be able to convert BP position to bit position with ! 130: just a shift. */ ! 131: #define BITS_BIG_ENDIAN 1 ! 132: ! 133: /* Define this if most significant byte of a word is the lowest numbered. ! 134: This is true on 29k. */ ! 135: #define BYTES_BIG_ENDIAN 1 ! 136: ! 137: /* Define this if most significant word of a multiword number is lowest ! 138: numbered. ! 139: ! 140: For 29k we can decide arbitrarily since there are no machine instructions ! 141: for them. Might as well be consistent with bytes. */ ! 142: #define WORDS_BIG_ENDIAN 1 ! 143: ! 144: /* number of bits in an addressible storage unit */ ! 145: #define BITS_PER_UNIT 8 ! 146: ! 147: /* Width in bits of a "word", which is the contents of a machine register. ! 148: Note that this is not necessarily the width of data type `int'; ! 149: if using 16-bit ints on a 68000, this would still be 32. ! 150: But on a machine with 16-bit registers, this would be 16. */ ! 151: #define BITS_PER_WORD 32 ! 152: ! 153: /* Width of a word, in units (bytes). */ ! 154: #define UNITS_PER_WORD 4 ! 155: ! 156: /* Width in bits of a pointer. ! 157: See also the macro `Pmode' defined below. */ ! 158: #define POINTER_SIZE 32 ! 159: ! 160: /* Allocation boundary (in *bits*) for storing arguments in argument list. */ ! 161: #define PARM_BOUNDARY 32 ! 162: ! 163: /* Boundary (in *bits*) on which stack pointer should be aligned. */ ! 164: #define STACK_BOUNDARY 64 ! 165: ! 166: /* Allocation boundary (in *bits*) for the code of a function. */ ! 167: #define FUNCTION_BOUNDARY 32 ! 168: ! 169: /* Alignment of field after `int : 0' in a structure. */ ! 170: #define EMPTY_FIELD_BOUNDARY 32 ! 171: ! 172: /* Every structure's size must be a multiple of this. */ ! 173: #define STRUCTURE_SIZE_BOUNDARY 8 ! 174: ! 175: /* No data type wants to be aligned rounder than this. */ ! 176: #define BIGGEST_ALIGNMENT 32 ! 177: ! 178: /* Make strings word-aligned so strcpy from constants will be faster. */ ! 179: #define CONSTANT_ALIGNMENT(EXP, ALIGN) \ ! 180: (TREE_CODE (EXP) == STRING_CST \ ! 181: && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN)) ! 182: ! 183: /* Make arrays of chars word-aligned for the same reasons. */ ! 184: #define DATA_ALIGNMENT(TYPE, ALIGN) \ ! 185: (TREE_CODE (TYPE) == ARRAY_TYPE \ ! 186: && TYPE_MODE (TREE_TYPE (TYPE)) == QImode \ ! 187: && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN)) ! 188: ! 189: /* Define this if move instructions will actually fail to work ! 190: when given unaligned data. */ ! 191: /* #define STRICT_ALIGNMENT */ ! 192: ! 193: /* Define this if unaligned move instructions are extremely slow. ! 194: ! 195: On the 29k, they trap. */ ! 196: #define SLOW_UNALIGNED_ACCESS ! 197: ! 198: /* Standard register usage. */ ! 199: ! 200: /* Number of actual hardware registers. ! 201: The hardware registers are assigned numbers for the compiler ! 202: from 0 to just below FIRST_PSEUDO_REGISTER. ! 203: All registers that the compiler knows about must be given numbers, ! 204: even those that are not normally considered general registers. ! 205: ! 206: 29k has 256 registers, of which 62 are not defined. gr0 and gr1 are ! 207: not produced in generated RTL so we can start at gr96, and call it ! 208: register zero. ! 209: ! 210: So 0-31 are gr96-gr127, lr0-lr127 are 32-159. To represent the input ! 211: arguments, whose register numbers we won't know until we are done, ! 212: use register 160-175. They cannot be modified. Similarly, 176 is used ! 213: for the frame pointer. It is assigned the last local register number ! 214: once the number of registers used is known. ! 215: ! 216: We use 177, 178, 179, and 180 for the special registers BP, FC, CR, and Q, ! 217: respectively. Registers 181 through 199 are used for the other special ! 218: registers that may be used by the programmer, but are never used by the ! 219: compiler. ! 220: ! 221: Registers 200-203 are the four floating-point accumulator register in ! 222: the 29050. ! 223: ! 224: When -mkernel-registers is specified, we still use the same register ! 225: map but change the names so 0-31 print as gr64-gr95. */ ! 226: ! 227: #define FIRST_PSEUDO_REGISTER 204 ! 228: ! 229: /* Because of the large number of registers on the 29k, we define macros ! 230: to refer to each group of registers and then define the number for some ! 231: registers used in the calling sequence. */ ! 232: ! 233: #define R_GR(N) ((N) - 96) /* gr96 is register number 0 */ ! 234: #define R_LR(N) ((N) + 32) /* lr0 is register number 32 */ ! 235: #define R_FP 176 /* frame pointer is register 176 */ ! 236: #define R_AR(N) ((N) + 160) /* first incoming arg reg is 160 */ ! 237: ! 238: /* Define the numbers of the special registers. */ ! 239: #define R_BP 177 ! 240: #define R_FC 178 ! 241: #define R_CR 179 ! 242: #define R_Q 180 ! 243: ! 244: /* These special registers are not used by the compiler, but may be referenced ! 245: by the programmer via asm declarations. */ ! 246: ! 247: #define R_VAB 181 ! 248: #define R_OPS 182 ! 249: #define R_CPS 183 ! 250: #define R_CFG 184 ! 251: #define R_CHA 185 ! 252: #define R_CHD 186 ! 253: #define R_CHC 187 ! 254: #define R_RBP 188 ! 255: #define R_TMC 189 ! 256: #define R_TMR 190 ! 257: #define R_PC0 191 ! 258: #define R_PC1 192 ! 259: #define R_PC2 193 ! 260: #define R_MMU 194 ! 261: #define R_LRU 195 ! 262: #define R_FPE 196 ! 263: #define R_INT 197 ! 264: #define R_FPS 198 ! 265: #define R_EXO 199 ! 266: ! 267: /* Define the number for floating-point accumulator N. */ ! 268: #define R_ACC(N) ((N) + 200) ! 269: ! 270: /* Now define the registers used in the calling sequence. */ ! 271: #define R_TAV R_GR (121) ! 272: #define R_TPC R_GR (122) ! 273: #define R_LRP R_GR (123) ! 274: #define R_SLP R_GR (124) ! 275: #define R_MSP R_GR (125) ! 276: #define R_RAB R_GR (126) ! 277: #define R_RFB R_GR (127) ! 278: ! 279: /* 1 for registers that have pervasive standard uses ! 280: and are not available for the register allocator. */ ! 281: ! 282: #define FIXED_REGISTERS \ ! 283: {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ ! 284: 1, 1, 1, 1, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, \ ! 285: 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ ! 286: 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ ! 287: 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ ! 288: 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ ! 289: 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ ! 290: 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ ! 291: 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ ! 292: 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ ! 293: 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \ ! 294: 1, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \ ! 295: 1, 1, 1, 1, 1, 1, 1, 1, \ ! 296: 0, 0, 0, 0 } ! 297: ! 298: /* 1 for registers not available across function calls. ! 299: These must include the FIXED_REGISTERS and also any ! 300: registers that can be used without being saved. ! 301: The latter must include the registers where values are returned ! 302: and the register where structure-value addresses are passed. ! 303: Aside from that, you can include as many other registers as you like. */ ! 304: #define CALL_USED_REGISTERS \ ! 305: {1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \ ! 306: 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \ ! 307: 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ ! 308: 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ ! 309: 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ ! 310: 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ ! 311: 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ ! 312: 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ ! 313: 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ ! 314: 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ ! 315: 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \ ! 316: 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \ ! 317: 1, 1, 1, 1, 1, 1, 1, 1, \ ! 318: 1, 1, 1, 1 } ! 319: ! 320: /* List the order in which to allocate registers. Each register must be ! 321: listed once, even those in FIXED_REGISTERS. ! 322: ! 323: We allocate in the following order: ! 324: gr116-gr120 (not used for anything but temps) ! 325: gr96-gr111 (function return values, reverse order) ! 326: argument registers (160-175) ! 327: lr0-lr127 (locals, saved) ! 328: acc3-0 (acc0 special) ! 329: everything else */ ! 330: ! 331: #define REG_ALLOC_ORDER \ ! 332: {R_GR (116), R_GR (117), R_GR (118), R_GR (119), R_GR (120), \ ! 333: R_GR (111), R_GR (110), R_GR (109), R_GR (108), R_GR (107), \ ! 334: R_GR (106), R_GR (105), R_GR (104), R_GR (103), R_GR (102), \ ! 335: R_GR (101), R_GR (100), R_GR (99), R_GR (98), R_GR (97), R_GR (96), \ ! 336: R_AR (0), R_AR (1), R_AR (2), R_AR (3), R_AR (4), R_AR (5), \ ! 337: R_AR (6), R_AR (7), R_AR (8), R_AR (9), R_AR (10), R_AR (11), \ ! 338: R_AR (12), R_AR (13), R_AR (14), R_AR (15), \ ! 339: R_LR (0), R_LR (1), R_LR (2), R_LR (3), R_LR (4), R_LR (5), \ ! 340: R_LR (6), R_LR (7), R_LR (8), R_LR (9), R_LR (10), R_LR (11), \ ! 341: R_LR (12), R_LR (13), R_LR (14), R_LR (15), R_LR (16), R_LR (17), \ ! 342: R_LR (18), R_LR (19), R_LR (20), R_LR (21), R_LR (22), R_LR (23), \ ! 343: R_LR (24), R_LR (25), R_LR (26), R_LR (27), R_LR (28), R_LR (29), \ ! 344: R_LR (30), R_LR (31), R_LR (32), R_LR (33), R_LR (34), R_LR (35), \ ! 345: R_LR (36), R_LR (37), R_LR (38), R_LR (39), R_LR (40), R_LR (41), \ ! 346: R_LR (42), R_LR (43), R_LR (44), R_LR (45), R_LR (46), R_LR (47), \ ! 347: R_LR (48), R_LR (49), R_LR (50), R_LR (51), R_LR (52), R_LR (53), \ ! 348: R_LR (54), R_LR (55), R_LR (56), R_LR (57), R_LR (58), R_LR (59), \ ! 349: R_LR (60), R_LR (61), R_LR (62), R_LR (63), R_LR (64), R_LR (65), \ ! 350: R_LR (66), R_LR (67), R_LR (68), R_LR (69), R_LR (70), R_LR (71), \ ! 351: R_LR (72), R_LR (73), R_LR (74), R_LR (75), R_LR (76), R_LR (77), \ ! 352: R_LR (78), R_LR (79), R_LR (80), R_LR (81), R_LR (82), R_LR (83), \ ! 353: R_LR (84), R_LR (85), R_LR (86), R_LR (87), R_LR (88), R_LR (89), \ ! 354: R_LR (90), R_LR (91), R_LR (92), R_LR (93), R_LR (94), R_LR (95), \ ! 355: R_LR (96), R_LR (97), R_LR (98), R_LR (99), R_LR (100), R_LR (101), \ ! 356: R_LR (102), R_LR (103), R_LR (104), R_LR (105), R_LR (106), \ ! 357: R_LR (107), R_LR (108), R_LR (109), R_LR (110), R_LR (111), \ ! 358: R_LR (112), R_LR (113), R_LR (114), R_LR (115), R_LR (116), \ ! 359: R_LR (117), R_LR (118), R_LR (119), R_LR (120), R_LR (121), \ ! 360: R_LR (122), R_LR (123), R_LR (124), R_LR (124), R_LR (126), \ ! 361: R_LR (127), \ ! 362: R_ACC (3), R_ACC (2), R_ACC (1), R_ACC (0), \ ! 363: R_GR (112), R_GR (113), R_GR (114), R_GR (115), R_GR (121), \ ! 364: R_GR (122), R_GR (123), R_GR (124), R_GR (125), R_GR (126), \ ! 365: R_GR (127), \ ! 366: R_FP, R_BP, R_FC, R_CR, R_Q, \ ! 367: R_VAB, R_OPS, R_CPS, R_CFG, R_CHA, R_CHD, R_CHC, R_RBP, R_TMC, \ ! 368: R_TMR, R_PC0, R_PC1, R_PC2, R_MMU, R_LRU, R_FPE, R_INT, R_FPS, \ ! 369: R_EXO } ! 370: ! 371: /* Return number of consecutive hard regs needed starting at reg REGNO ! 372: to hold something of mode MODE. ! 373: This is ordinarily the length in words of a value of mode MODE ! 374: but can be less for certain modes in special long registers. */ ! 375: ! 376: #define HARD_REGNO_NREGS(REGNO, MODE) \ ! 377: ((REGNO) >= R_ACC (0) ? 1 \ ! 378: : (GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD) ! 379: ! 380: /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE. ! 381: On 29k, the cpu registers can hold any mode. But a double-precision ! 382: floating-point value should start at an even register. The special ! 383: registers cannot hold floating-point values and the accumulators cannot ! 384: hold integer values. ! 385: ! 386: (I'd like to use the "?:" syntax to make this more readable, but Sun's ! 387: compiler doesn't seem to accept it.) */ ! 388: #define HARD_REGNO_MODE_OK(REGNO, MODE) \ ! 389: (((REGNO) >= R_ACC (0) \ ! 390: && (GET_MODE_CLASS (MODE) == MODE_FLOAT \ ! 391: || GET_MODE_CLASS (MODE) == MODE_COMPLEX_FLOAT)) \ ! 392: || ((REGNO) >= R_BP && (REGNO) < R_ACC (0) \ ! 393: && GET_MODE_CLASS (MODE) != MODE_FLOAT \ ! 394: && GET_MODE_CLASS (MODE) != MODE_COMPLEX_FLOAT) \ ! 395: || ((REGNO) < R_BP \ ! 396: && ((((REGNO) & 1) == 0) || GET_MODE_CLASS (MODE) == MODE_INT \ ! 397: || GET_MODE_CLASS (MODE) == MODE_COMPLEX_INT \ ! 398: || GET_MODE_UNIT_SIZE (MODE) <= UNITS_PER_WORD))) ! 399: ! 400: /* Value is 1 if it is a good idea to tie two pseudo registers ! 401: when one has mode MODE1 and one has mode MODE2. ! 402: If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2, ! 403: for any hard reg, then this must be 0 for correct output. ! 404: ! 405: On the 29k, normally we'd just have problems with DFmode because of the ! 406: even alignment. However, we also have to be a bit concerned about ! 407: the special register's restriction to non-floating and the floating-point ! 408: accumulator's restriction to only floating. This probably won't ! 409: cause any great inefficiencies in practice. */ ! 410: #define MODES_TIEABLE_P(MODE1, MODE2) \ ! 411: ((MODE1) == (MODE2) \ ! 412: || (GET_MODE_CLASS (MODE1) != MODE_FLOAT \ ! 413: && GET_MODE_CLASS (MODE1) != MODE_COMPLEX_FLOAT \ ! 414: && GET_MODE_CLASS (MODE2) != MODE_FLOAT \ ! 415: && GET_MODE_CLASS (MODE2) != MODE_COMPLEX_FLOAT)) ! 416: ! 417: /* Specify the registers used for certain standard purposes. ! 418: The values of these macros are register numbers. */ ! 419: ! 420: /* 29k pc isn't overloaded on a register that the compiler knows about. */ ! 421: /* #define PC_REGNUM */ ! 422: ! 423: /* Register to use for pushing function arguments. */ ! 424: #define STACK_POINTER_REGNUM R_GR (125) ! 425: ! 426: /* Base register for access to local variables of the function. */ ! 427: #define FRAME_POINTER_REGNUM R_FP ! 428: ! 429: /* Value should be nonzero if functions must have frame pointers. ! 430: Zero means the frame pointer need not be set up (and parms ! 431: may be accessed via the stack pointer) in functions that seem suitable. ! 432: This is computed in `reload', in reload1.c. */ ! 433: #define FRAME_POINTER_REQUIRED 0 ! 434: ! 435: /* Base register for access to arguments of the function. */ ! 436: #define ARG_POINTER_REGNUM R_FP ! 437: ! 438: /* Register in which static-chain is passed to a function. */ ! 439: #define STATIC_CHAIN_REGNUM R_SLP ! 440: ! 441: /* Register in which address to store a structure value ! 442: is passed to a function. */ ! 443: #define STRUCT_VALUE_REGNUM R_LRP ! 444: ! 445: /* Define the classes of registers for register constraints in the ! 446: machine description. Also define ranges of constants. ! 447: ! 448: One of the classes must always be named ALL_REGS and include all hard regs. ! 449: If there is more than one class, another class must be named NO_REGS ! 450: and contain no registers. ! 451: ! 452: The name GENERAL_REGS must be the name of a class (or an alias for ! 453: another name such as ALL_REGS). This is the class of registers ! 454: that is allowed by "g" or "r" in a register constraint. ! 455: Also, registers outside this class are allocated only when ! 456: instructions express preferences for them. ! 457: ! 458: The classes must be numbered in nondecreasing order; that is, ! 459: a larger-numbered class must never be contained completely ! 460: in a smaller-numbered class. ! 461: ! 462: For any two classes, it is very desirable that there be another ! 463: class that represents their union. ! 464: ! 465: The 29k has six registers classes: GENERAL_REGS, SPECIAL_REGS, ! 466: BP_REGS, Q_REGS, ACCUM_REGS, and ACCUM0_REGS. BP_REGS contains just BP and ! 467: is used for the extract and insert operations to allow combinations; Q ! 468: contains just the Q register. The latter two classes are used to represent ! 469: the floating-point accumulator registers in the 29050. We also define the ! 470: union class FLOAT_REGS to represent any register that can be used to hold a ! 471: floating-point value. The union of SPECIAL_REGS and ACCUM_REGS isn't ! 472: useful as the former cannot contain floating-point and the latter can only ! 473: contain floating-point. */ ! 474: ! 475: enum reg_class { NO_REGS, GENERAL_REGS, BP_REGS, Q_REGS, SPECIAL_REGS, ! 476: ACCUM0_REGS, ACCUM_REGS, FLOAT_REGS, ALL_REGS, ! 477: LIM_REG_CLASSES }; ! 478: ! 479: #define N_REG_CLASSES (int) LIM_REG_CLASSES ! 480: ! 481: /* Give names of register classes as strings for dump file. */ ! 482: ! 483: #define REG_CLASS_NAMES \ ! 484: {"NO_REGS", "GENERAL_REGS", "BP_REGS", "Q_REGS", "SPECIAL_REGS", \ ! 485: "ACCUM0_REGS", "ACCUM_REGS", "FLOAT_REGS", "ALL_REGS" } ! 486: ! 487: /* Define which registers fit in which classes. ! 488: This is an initializer for a vector of HARD_REG_SET ! 489: of length N_REG_CLASSES. */ ! 490: ! 491: #define REG_CLASS_CONTENTS \ ! 492: { {0, 0, 0, 0, 0, 0, 0}, \ ! 493: {~0, ~0, ~0, ~0, ~0, ~ 0xfffe0000, 0}, \ ! 494: {0, 0, 0, 0, 0, 0x20000, 0}, \ ! 495: {0, 0, 0, 0, 0, 0x100000, 0}, \ ! 496: {0, 0, 0, 0, 0, 0xfffe0000, 0xff}, \ ! 497: {0, 0, 0, 0, 0, 0, 0x100}, \ ! 498: {0, 0, 0, 0, 0, 0, 0xf00}, \ ! 499: {~0, ~0, ~0, ~0, ~0, ~ 0xfffe0000, 0xf00}, \ ! 500: {~0, ~0, ~0, ~0, ~0, ~0, ~0} } ! 501: ! 502: /* The same information, inverted: ! 503: Return the class number of the smallest class containing ! 504: reg number REGNO. This could be a conditional expression ! 505: or could index an array. */ ! 506: ! 507: #define REGNO_REG_CLASS(REGNO) \ ! 508: ((REGNO) == R_BP ? BP_REGS \ ! 509: : (REGNO) == R_Q ? Q_REGS \ ! 510: : (REGNO) > R_BP && (REGNO) <= R_EXO ? SPECIAL_REGS \ ! 511: : (REGNO) == R_ACC (0) ? ACCUM0_REGS \ ! 512: : (REGNO) > R_ACC (0) ? ACCUM_REGS \ ! 513: : GENERAL_REGS) ! 514: ! 515: /* The class value for index registers, and the one for base regs. */ ! 516: #define INDEX_REG_CLASS NO_REGS ! 517: #define BASE_REG_CLASS GENERAL_REGS ! 518: ! 519: /* Get reg_class from a letter such as appears in the machine description. */ ! 520: ! 521: #define REG_CLASS_FROM_LETTER(C) \ ! 522: ((C) == 'r' ? GENERAL_REGS \ ! 523: : (C) == 'b' ? BP_REGS \ ! 524: : (C) == 'q' ? Q_REGS \ ! 525: : (C) == 'h' ? SPECIAL_REGS \ ! 526: : (C) == 'a' ? ACCUM_REGS \ ! 527: : (C) == 'A' ? ACCUM0_REGS \ ! 528: : (C) == 'f' ? FLOAT_REGS \ ! 529: : NO_REGS) ! 530: ! 531: /* Define this macro to change register usage conditional on target flags. ! 532: ! 533: On the 29k, we use this to change the register names for kernel mapping. */ ! 534: ! 535: #define CONDITIONAL_REGISTER_USAGE \ ! 536: { \ ! 537: static char *kernel_names[] = {"gr64", "gr65", "gr66", "gr67", \ ! 538: "gr68", "gr69", "gr70", "gr71", \ ! 539: "gr72", "gr73", "gr74", "gr75", \ ! 540: "gr76", "gr77", "gr78", "gr79", \ ! 541: "gr80", "gr81", "gr82", "gr83", \ ! 542: "gr84", "gr85", "gr86", "gr87", \ ! 543: "gr88", "gr89", "gr90", "gr91", \ ! 544: "gr92", "gr93", "gr94", "gr95"}; \ ! 545: int i; \ ! 546: \ ! 547: if (TARGET_KERNEL_REGISTERS) \ ! 548: for (i = 0; i < 32; i++) \ ! 549: reg_names[i] = kernel_names[i]; \ ! 550: } ! 551: ! 552: /* The letters I, J, K, L, M, N, O, and P in a register constraint string ! 553: can be used to stand for particular ranges of immediate operands. ! 554: This macro defines what the ranges are. ! 555: C is the letter, and VALUE is a constant value. ! 556: Return 1 if VALUE is in the range specified by C. ! 557: ! 558: For 29k: ! 559: `I' is used for the range of constants most insns can contain. ! 560: `J' is for the few 16-bit insns. ! 561: `K' is a constant whose high-order 24 bits are all one ! 562: `L' is a HImode constant whose high-order 8 bits are all one ! 563: `M' is a 32-bit constant whose high-order 16 bits are all one (for CONSTN) ! 564: `N' is a 32-bit constant whose negative is 8 bits ! 565: `O' is the 32-bit constant 0x80000000, any constant with low-order ! 566: 16 bits zero for 29050. ! 567: `P' is a HImode constant whose negative is 8 bits */ ! 568: ! 569: #define CONST_OK_FOR_LETTER_P(VALUE, C) \ ! 570: ((C) == 'I' ? (unsigned) (VALUE) < 0x100 \ ! 571: : (C) == 'J' ? (unsigned) (VALUE) < 0x10000 \ ! 572: : (C) == 'K' ? ((VALUE) & 0xffffff00) == 0xffffff00 \ ! 573: : (C) == 'L' ? ((VALUE) & 0xff00) == 0xff00 \ ! 574: : (C) == 'M' ? ((VALUE) & 0xffff0000) == 0xffff0000 \ ! 575: : (C) == 'N' ? ((VALUE) < 0 && (VALUE) > -256) \ ! 576: : (C) == 'O' ? ((VALUE) == 0x80000000 \ ! 577: || (TARGET_29050 && ((VALUE) & 0xffff) == 0)) \ ! 578: : (C) == 'P' ? (((VALUE) | 0xffff0000) < 0 \ ! 579: && ((VALUE) | 0xffff0000) > -256) \ ! 580: : 0) ! 581: ! 582: /* Similar, but for floating constants, and defining letters G and H. ! 583: Here VALUE is the CONST_DOUBLE rtx itself. ! 584: All floating-point constants are valid on 29k. */ ! 585: ! 586: #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) 1 ! 587: ! 588: /* Given an rtx X being reloaded into a reg required to be ! 589: in class CLASS, return the class of reg to actually use. ! 590: In general this is just CLASS; but on some machines ! 591: in some cases it is preferable to use a more restrictive class. */ ! 592: ! 593: #define PREFERRED_RELOAD_CLASS(X,CLASS) CLASS ! 594: ! 595: /* Return the register class of a scratch register needed to copy IN into ! 596: or out of a register in CLASS in MODE. If it can be done directly, ! 597: NO_REGS is returned. */ ! 598: ! 599: #define SECONDARY_RELOAD_CLASS(CLASS,MODE,IN) \ ! 600: secondary_reload_class (CLASS, MODE, IN) ! 601: ! 602: /* Return the maximum number of consecutive registers ! 603: needed to represent mode MODE in a register of class CLASS. ! 604: ! 605: On 29k, this is the size of MODE in words except that the floating-point ! 606: accumulators only require one word for anything they can hold. */ ! 607: ! 608: #define CLASS_MAX_NREGS(CLASS, MODE) \ ! 609: (((CLASS) == ACCUM_REGS || (CLASS) == ACCUM0_REGS) ? 1 \ ! 610: : (GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD) ! 611: ! 612: /* Define the cost of moving between registers of various classes. Everything ! 613: involving a general register is cheap, but moving between the other types ! 614: (even within a class) is two insns. */ ! 615: ! 616: #define REGISTER_MOVE_COST(CLASS1, CLASS2) \ ! 617: ((CLASS1) == GENERAL_REGS || (CLASS2) == GENERAL_REGS ? 2 : 4) ! 618: ! 619: /* Stack layout; function entry, exit and calling. */ ! 620: ! 621: /* Define this if pushing a word on the stack ! 622: makes the stack pointer a smaller address. */ ! 623: #define STACK_GROWS_DOWNWARD ! 624: ! 625: /* Define this if the nominal address of the stack frame ! 626: is at the high-address end of the local variables; ! 627: that is, each additional local variable allocated ! 628: goes at a more negative offset in the frame. */ ! 629: #define FRAME_GROWS_DOWNWARD ! 630: ! 631: /* Offset within stack frame to start allocating local variables at. ! 632: If FRAME_GROWS_DOWNWARD, this is the offset to the END of the ! 633: first local allocated. Otherwise, it is the offset to the BEGINNING ! 634: of the first local allocated. */ ! 635: ! 636: #define STARTING_FRAME_OFFSET (- current_function_pretend_args_size) ! 637: ! 638: /* If we generate an insn to push BYTES bytes, ! 639: this says how many the stack pointer really advances by. ! 640: On 29k, don't define this because there are no push insns. */ ! 641: /* #define PUSH_ROUNDING(BYTES) */ ! 642: ! 643: /* Define this if the maximum size of all the outgoing args is to be ! 644: accumulated and pushed during the prologue. The amount can be ! 645: found in the variable current_function_outgoing_args_size. */ ! 646: #define ACCUMULATE_OUTGOING_ARGS ! 647: ! 648: /* Offset of first parameter from the argument pointer register value. */ ! 649: ! 650: #define FIRST_PARM_OFFSET(FNDECL) (- current_function_pretend_args_size) ! 651: ! 652: /* Define this if stack space is still allocated for a parameter passed ! 653: in a register. */ ! 654: /* #define REG_PARM_STACK_SPACE */ ! 655: ! 656: /* Value is the number of bytes of arguments automatically ! 657: popped when returning from a subroutine call. ! 658: FUNTYPE is the data type of the function (as a tree), ! 659: or for a library call it is an identifier node for the subroutine name. ! 660: SIZE is the number of bytes of arguments passed on the stack. */ ! 661: ! 662: #define RETURN_POPS_ARGS(FUNTYPE,SIZE) 0 ! 663: ! 664: /* Define how to find the value returned by a function. ! 665: VALTYPE is the data type of the value (as a tree). ! 666: If the precise function being called is known, FUNC is its FUNCTION_DECL; ! 667: otherwise, FUNC is 0. ! 668: ! 669: On 29k the value is found in gr96. */ ! 670: ! 671: #define FUNCTION_VALUE(VALTYPE, FUNC) \ ! 672: gen_rtx (REG, TYPE_MODE (VALTYPE), R_GR (96)) ! 673: ! 674: /* Define how to find the value returned by a library function ! 675: assuming the value has mode MODE. */ ! 676: ! 677: #define LIBCALL_VALUE(MODE) gen_rtx (REG, MODE, R_GR (96)) ! 678: ! 679: /* 1 if N is a possible register number for a function value ! 680: as seen by the caller. ! 681: On 29k, gr96-gr111 are used. */ ! 682: ! 683: #define FUNCTION_VALUE_REGNO_P(N) ((N) < R_GR (112)) ! 684: ! 685: /* 1 if N is a possible register number for function argument passing. ! 686: On 29k, these are lr2-lr17. */ ! 687: ! 688: #define FUNCTION_ARG_REGNO_P(N) ((N) <= R_LR (17) && (N) >= R_LR (2)) ! 689: ! 690: /* Define a data type for recording info about an argument list ! 691: during the scan of that argument list. This data type should ! 692: hold all necessary information about the function itself ! 693: and about the args processed so far, enough to enable macros ! 694: such as FUNCTION_ARG to determine where the next arg should go. ! 695: ! 696: On 29k, this is a single integer, which is a number of words ! 697: of arguments scanned so far. ! 698: Thus 16 or more means all following args should go on the stack. */ ! 699: ! 700: #define CUMULATIVE_ARGS int ! 701: ! 702: /* Initialize a variable CUM of type CUMULATIVE_ARGS ! 703: for a call to a function whose data type is FNTYPE. ! 704: For a library call, FNTYPE is 0. */ ! 705: ! 706: #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME) (CUM) = 0 ! 707: ! 708: /* Same, but called for incoming args. ! 709: ! 710: On the 29k, we use this to set all argument registers to fixed and ! 711: set the last 16 local regs (lr112-lr127) to available. Some ! 712: will later be changed to call-saved by FUNCTION_INCOMING_ARG. */ ! 713: ! 714: #define INIT_CUMULATIVE_INCOMING_ARGS(CUM,FNTYPE,IGNORE) \ ! 715: { int i; \ ! 716: for (i = R_AR (0); i < R_AR (16); i++) \ ! 717: { \ ! 718: fixed_regs[i] = call_used_regs[i] = call_fixed_regs[i] = 1; \ ! 719: SET_HARD_REG_BIT (fixed_reg_set, i); \ ! 720: SET_HARD_REG_BIT (call_used_reg_set, i); \ ! 721: SET_HARD_REG_BIT (call_fixed_reg_set, i); \ ! 722: } \ ! 723: for (i = R_LR (112); i < R_LR (128); i++) \ ! 724: { \ ! 725: fixed_regs[i] = call_used_regs[i] = call_fixed_regs[i] = 0; \ ! 726: CLEAR_HARD_REG_BIT (fixed_reg_set, i); \ ! 727: CLEAR_HARD_REG_BIT (call_used_reg_set, i); \ ! 728: CLEAR_HARD_REG_BIT (call_fixed_reg_set, i); \ ! 729: } \ ! 730: (CUM) = 0; \ ! 731: } ! 732: ! 733: /* Define intermediate macro to compute the size (in registers) of an argument ! 734: for the 29k. */ ! 735: ! 736: #define A29K_ARG_SIZE(MODE, TYPE, NAMED) \ ! 737: (! (NAMED) ? 0 \ ! 738: : (MODE) != BLKmode \ ! 739: ? (GET_MODE_SIZE (MODE) + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD \ ! 740: : (int_size_in_bytes (TYPE) + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD) ! 741: ! 742: /* Update the data in CUM to advance over an argument ! 743: of mode MODE and data type TYPE. ! 744: (TYPE is null for libcalls where that information may not be available.) */ ! 745: ! 746: #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \ ! 747: if (MUST_PASS_IN_STACK (MODE, TYPE)) \ ! 748: (CUM) = 16; \ ! 749: else \ ! 750: (CUM) += A29K_ARG_SIZE (MODE, TYPE, NAMED) ! 751: ! 752: /* Determine where to put an argument to a function. ! 753: Value is zero to push the argument on the stack, ! 754: or a hard register in which to store the argument. ! 755: ! 756: MODE is the argument's machine mode. ! 757: TYPE is the data type of the argument (as a tree). ! 758: This is null for libcalls where that information may ! 759: not be available. ! 760: CUM is a variable of type CUMULATIVE_ARGS which gives info about ! 761: the preceding args and about the function being called. ! 762: NAMED is nonzero if this argument is a named parameter ! 763: (otherwise it is an extra parameter matching an ellipsis). ! 764: ! 765: On 29k the first 16 words of args are normally in registers ! 766: and the rest are pushed. */ ! 767: ! 768: #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \ ! 769: ((CUM) < 16 && (NAMED) && ! MUST_PASS_IN_STACK (MODE, TYPE) \ ! 770: ? gen_rtx(REG, (MODE), R_LR (2) + (CUM)) : 0) ! 771: ! 772: /* Define where a function finds its arguments. ! 773: This is different from FUNCTION_ARG because of register windows. ! 774: ! 775: On the 29k, we hack this to call a function that sets the used registers ! 776: as non-fixed and not used by calls. */ ! 777: ! 778: #define FUNCTION_INCOMING_ARG(CUM, MODE, TYPE, NAMED) \ ! 779: ((CUM) < 16 && (NAMED) && ! MUST_PASS_IN_STACK (MODE, TYPE) \ ! 780: ? gen_rtx (REG, MODE, \ ! 781: incoming_reg (CUM, A29K_ARG_SIZE (MODE, TYPE, NAMED))) \ ! 782: : 0) ! 783: ! 784: /* This indicates that an argument is to be passed with an invisible reference ! 785: (i.e., a pointer to the object is passed). ! 786: ! 787: On the 29k, we do this if it must be passed on the stack. */ ! 788: ! 789: #define FUNCTION_ARG_PASS_BY_REFERENCE(CUM, MODE, TYPE, NAMED) \ ! 790: (MUST_PASS_IN_STACK (MODE, TYPE)) ! 791: ! 792: /* Specify the padding direction of arguments. ! 793: ! 794: On the 29k, we must pad upwards in order to be able to pass args in ! 795: registers. */ ! 796: ! 797: #define FUNCTION_ARG_PADDING(MODE, TYPE) upward ! 798: ! 799: /* For an arg passed partly in registers and partly in memory, ! 800: this is the number of registers used. ! 801: For args passed entirely in registers or entirely in memory, zero. */ ! 802: ! 803: #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) \ ! 804: ((CUM) < 16 && 16 < (CUM) + A29K_ARG_SIZE (MODE, TYPE, NAMED) && (NAMED) \ ! 805: ? 16 - (CUM) : 0) ! 806: ! 807: /* Perform any needed actions needed for a function that is receiving a ! 808: variable number of arguments. ! 809: ! 810: CUM is as above. ! 811: ! 812: MODE and TYPE are the mode and type of the current parameter. ! 813: ! 814: PRETEND_SIZE is a variable that should be set to the amount of stack ! 815: that must be pushed by the prolog to pretend that our caller pushed ! 816: it. ! 817: ! 818: Normally, this macro will push all remaining incoming registers on the ! 819: stack and set PRETEND_SIZE to the length of the registers pushed. */ ! 820: ! 821: #define SETUP_INCOMING_VARARGS(CUM,MODE,TYPE,PRETEND_SIZE,NO_RTL) \ ! 822: { if ((CUM) < 16) \ ! 823: { \ ! 824: int first_reg_offset = (CUM); \ ! 825: \ ! 826: if (MUST_PASS_IN_STACK (MODE, TYPE)) \ ! 827: first_reg_offset += A29K_ARG_SIZE (TYPE_MODE (TYPE), TYPE, 1); \ ! 828: \ ! 829: if (first_reg_offset > 16) \ ! 830: first_reg_offset = 16; \ ! 831: \ ! 832: if (! (NO_RTL) && first_reg_offset != 16) \ ! 833: move_block_from_reg \ ! 834: (R_AR (0) + first_reg_offset, \ ! 835: gen_rtx (MEM, BLKmode, virtual_incoming_args_rtx), \ ! 836: 16 - first_reg_offset); \ ! 837: PRETEND_SIZE = (16 - first_reg_offset) * UNITS_PER_WORD; \ ! 838: } \ ! 839: } ! 840: ! 841: /* Define the information needed to generate branch and scc insns. This is ! 842: stored from the compare operation. Note that we can't use "rtx" here ! 843: since it hasn't been defined! */ ! 844: ! 845: extern struct rtx_def *a29k_compare_op0, *a29k_compare_op1; ! 846: extern int a29k_compare_fp_p; ! 847: ! 848: /* This macro produces the initial definition of a function name. ! 849: ! 850: For the 29k, we need the prolog to contain one or two words prior to ! 851: the declaration of the function name. So just store away the name and ! 852: write it as part of the prolog. */ ! 853: ! 854: extern char *a29k_function_name; ! 855: ! 856: #define ASM_DECLARE_FUNCTION_NAME(FILE,NAME,DECL) \ ! 857: a29k_function_name = NAME; ! 858: ! 859: /* This macro generates the assembly code for function entry. ! 860: FILE is a stdio stream to output the code to. ! 861: SIZE is an int: how many units of temporary storage to allocate. ! 862: Refer to the array `regs_ever_live' to determine which registers ! 863: to save; `regs_ever_live[I]' is nonzero if register number I ! 864: is ever used in the function. This macro is responsible for ! 865: knowing which registers should not be saved even if used. */ ! 866: ! 867: #define FUNCTION_PROLOGUE(FILE, SIZE) output_prolog (FILE, SIZE) ! 868: ! 869: /* Output assembler code to FILE to increment profiler label # LABELNO ! 870: for profiling a function entry. */ ! 871: ! 872: #define FUNCTION_PROFILER(FILE, LABELNO) ! 873: ! 874: /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function, ! 875: the stack pointer does not matter. The value is tested only in ! 876: functions that have frame pointers. ! 877: No definition is equivalent to always zero. */ ! 878: ! 879: #define EXIT_IGNORE_STACK 1 ! 880: ! 881: /* This macro generates the assembly code for function exit, ! 882: on machines that need it. If FUNCTION_EPILOGUE is not defined ! 883: then individual return instructions are generated for each ! 884: return statement. Args are same as for FUNCTION_PROLOGUE. ! 885: ! 886: The function epilogue should not depend on the current stack pointer! ! 887: It should use the frame pointer only. This is mandatory because ! 888: of alloca; we also take advantage of it to omit stack adjustments ! 889: before returning. */ ! 890: ! 891: #define FUNCTION_EPILOGUE(FILE, SIZE) output_epilog (FILE, SIZE) ! 892: ! 893: /* Define the number of delay slots needed for the function epilogue. ! 894: ! 895: On the 29k, we need a slot except when we have a register stack adjustment, ! 896: have a memory stack adjustment, and have no frame pointer. */ ! 897: ! 898: #define DELAY_SLOTS_FOR_EPILOGUE \ ! 899: (! (needs_regstack_p () \ ! 900: && (get_frame_size () + current_function_pretend_args_size \ ! 901: + current_function_outgoing_args_size) != 0 \ ! 902: && ! frame_pointer_needed)) ! 903: ! 904: /* Define whether INSN can be placed in delay slot N for the epilogue. ! 905: ! 906: On the 29k, we must be able to place it in a delay slot, it must ! 907: not use sp if the frame pointer cannot be eliminated, and it cannot ! 908: use local regs if we need to push the register stack. */ ! 909: ! 910: #define ELIGIBLE_FOR_EPILOGUE_DELAY(INSN,N) \ ! 911: (get_attr_in_delay_slot (INSN) == IN_DELAY_SLOT_YES \ ! 912: && ! (frame_pointer_needed \ ! 913: && reg_mentioned_p (stack_pointer_rtx, PATTERN (INSN))) \ ! 914: && ! (needs_regstack_p () && uses_local_reg_p (PATTERN (INSN)))) ! 915: ! 916: /* Output assembler code for a block containing the constant parts ! 917: of a trampoline, leaving space for the variable parts. ! 918: ! 919: The trampoline should set the static chain pointer to value placed ! 920: into the trampoline and should branch to the specified routine. We ! 921: use gr121 (tav) as a temporary. */ ! 922: ! 923: #define TRAMPOLINE_TEMPLATE(FILE) \ ! 924: { \ ! 925: fprintf (FILE, "\tconst %s,0\n", reg_names[R_TAV]); \ ! 926: fprintf (FILE, "\tconsth %s,0\n", reg_names[R_TAV]); \ ! 927: fprintf (FILE, "\tconst %s,0\n", reg_names[R_SLP]); \ ! 928: fprintf (FILE, "\tjmpi %s\n", reg_names[R_TAV]); \ ! 929: fprintf (FILE, "\tconsth %s,0\n", reg_names[R_SLP]); \ ! 930: } ! 931: ! 932: /* Length in units of the trampoline for entering a nested function. */ ! 933: ! 934: #define TRAMPOLINE_SIZE 20 ! 935: ! 936: /* Emit RTL insns to initialize the variable parts of a trampoline. ! 937: FNADDR is an RTX for the address of the function's pure code. ! 938: CXT is an RTX for the static chain value for the function. ! 939: ! 940: We do this on the 29k by writing the bytes of the addresses into the ! 941: trampoline one byte at a time. */ ! 942: ! 943: #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \ ! 944: { \ ! 945: INITIALIZE_TRAMPOLINE_VALUE (TRAMP, FNADDR, 0, 4); \ ! 946: INITIALIZE_TRAMPOLINE_VALUE (TRAMP, CXT, 8, 16); \ ! 947: } ! 948: ! 949: /* Define a sub-macro to initialize one value into the trampoline. ! 950: We specify the offsets of the CONST and CONSTH instructions, respectively ! 951: and copy the value a byte at a time into these instructions. */ ! 952: ! 953: #define INITIALIZE_TRAMPOLINE_VALUE(TRAMP, VALUE, CONST, CONSTH) \ ! 954: { \ ! 955: rtx _addr, _temp; \ ! 956: rtx _val = force_reg (SImode, VALUE); \ ! 957: \ ! 958: _addr = memory_address (QImode, plus_constant (TRAMP, (CONST) + 3)); \ ! 959: emit_move_insn (gen_rtx (MEM, QImode, _addr), \ ! 960: gen_lowpart (QImode, _val)); \ ! 961: \ ! 962: _temp = expand_shift (RSHIFT_EXPR, SImode, _val, \ ! 963: build_int_2 (8, 0), 0, 1); \ ! 964: _addr = memory_address (QImode, plus_constant (TRAMP, (CONST) + 1)); \ ! 965: emit_move_insn (gen_rtx (MEM, QImode, _addr), \ ! 966: gen_lowpart (QImode, _temp)); \ ! 967: \ ! 968: _temp = expand_shift (RSHIFT_EXPR, SImode, _temp, \ ! 969: build_int_2 (8, 0), _temp, 1); \ ! 970: _addr = memory_address (QImode, plus_constant (TRAMP, (CONSTH) + 3)); \ ! 971: emit_move_insn (gen_rtx (MEM, QImode, _addr), \ ! 972: gen_lowpart (QImode, _temp)); \ ! 973: \ ! 974: _temp = expand_shift (RSHIFT_EXPR, SImode, _temp, \ ! 975: build_int_2 (8, 0), _temp, 1); \ ! 976: _addr = memory_address (QImode, plus_constant (TRAMP, (CONSTH) + 1)); \ ! 977: emit_move_insn (gen_rtx (MEM, QImode, _addr), \ ! 978: gen_lowpart (QImode, _temp)); \ ! 979: } ! 980: ! 981: /* Addressing modes, and classification of registers for them. */ ! 982: ! 983: /* #define HAVE_POST_INCREMENT */ ! 984: /* #define HAVE_POST_DECREMENT */ ! 985: ! 986: /* #define HAVE_PRE_DECREMENT */ ! 987: /* #define HAVE_PRE_INCREMENT */ ! 988: ! 989: /* Macros to check register numbers against specific register classes. */ ! 990: ! 991: /* These assume that REGNO is a hard or pseudo reg number. ! 992: They give nonzero only if REGNO is a hard reg of the suitable class ! 993: or a pseudo reg currently allocated to a suitable hard reg. ! 994: Since they use reg_renumber, they are safe only once reg_renumber ! 995: has been allocated, which happens in local-alloc.c. */ ! 996: ! 997: #define REGNO_OK_FOR_INDEX_P(REGNO) 0 ! 998: #define REGNO_OK_FOR_BASE_P(REGNO) 1 ! 999: ! 1000: /* Given the value returned from get_frame_size, compute the actual size ! 1001: of the frame we will allocate. We include the pretend and outgoing ! 1002: arg sizes and round to a doubleword. */ ! 1003: ! 1004: #define ACTUAL_FRAME_SIZE(SIZE) \ ! 1005: (((SIZE) + current_function_pretend_args_size \ ! 1006: + current_function_outgoing_args_size + 7) & ~7) ! 1007: ! 1008: /* Define the initial offset between the frame and stack pointer. */ ! 1009: ! 1010: #define INITIAL_FRAME_POINTER_OFFSET(DEPTH) \ ! 1011: (DEPTH) = ACTUAL_FRAME_SIZE (get_frame_size ()) ! 1012: ! 1013: /* Maximum number of registers that can appear in a valid memory address. */ ! 1014: #define MAX_REGS_PER_ADDRESS 1 ! 1015: ! 1016: /* Recognize any constant value that is a valid address. ! 1017: ! 1018: None are on the 29K. */ ! 1019: #define CONSTANT_ADDRESS_P(X) 0 ! 1020: ! 1021: /* Include all constant integers and constant doubles */ ! 1022: #define LEGITIMATE_CONSTANT_P(X) 1 ! 1023: ! 1024: /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx ! 1025: and check its validity for a certain class. ! 1026: We have two alternate definitions for each of them. ! 1027: The usual definition accepts all pseudo regs; the other rejects ! 1028: them unless they have been allocated suitable hard regs. ! 1029: The symbol REG_OK_STRICT causes the latter definition to be used. ! 1030: ! 1031: Most source files want to accept pseudo regs in the hope that ! 1032: they will get allocated to the class that the insn wants them to be in. ! 1033: Source files for reload pass need to be strict. ! 1034: After reload, it makes no difference, since pseudo regs have ! 1035: been eliminated by then. */ ! 1036: ! 1037: #ifndef REG_OK_STRICT ! 1038: ! 1039: /* Nonzero if X is a hard reg that can be used as an index ! 1040: or if it is a pseudo reg. */ ! 1041: #define REG_OK_FOR_INDEX_P(X) 0 ! 1042: /* Nonzero if X is a hard reg that can be used as a base reg ! 1043: or if it is a pseudo reg. */ ! 1044: #define REG_OK_FOR_BASE_P(X) 1 ! 1045: ! 1046: #else ! 1047: ! 1048: /* Nonzero if X is a hard reg that can be used as an index. */ ! 1049: #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X)) ! 1050: /* Nonzero if X is a hard reg that can be used as a base reg. */ ! 1051: #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X)) ! 1052: ! 1053: #endif ! 1054: ! 1055: /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression ! 1056: that is a valid memory address for an instruction. ! 1057: The MODE argument is the machine mode for the MEM expression ! 1058: that wants to use this address. ! 1059: ! 1060: On the 29k, a legitimate address is a register and so is a ! 1061: constant of less than 256. */ ! 1062: ! 1063: #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \ ! 1064: { if (REG_P (X) && REG_OK_FOR_BASE_P (X)) \ ! 1065: goto ADDR; \ ! 1066: if (GET_CODE (X) == CONST_INT \ ! 1067: && (unsigned) INTVAL (X) < 0x100) \ ! 1068: goto ADDR; \ ! 1069: } ! 1070: ! 1071: /* Try machine-dependent ways of modifying an illegitimate address ! 1072: to be legitimate. If we find one, return the new, valid address. ! 1073: This macro is used in only one place: `memory_address' in explow.c. ! 1074: ! 1075: OLDX is the address as it was before break_out_memory_refs was called. ! 1076: In some cases it is useful to look at this to decide what needs to be done. ! 1077: ! 1078: MODE and WIN are passed so that this macro can use ! 1079: GO_IF_LEGITIMATE_ADDRESS. ! 1080: ! 1081: It is always safe for this macro to do nothing. It exists to recognize ! 1082: opportunities to optimize the output. ! 1083: ! 1084: For the 29k, we need not do anything. However, if we don't, ! 1085: `memory_address' will try lots of things to get a valid address, most of ! 1086: which will result in dead code and extra pseudos. So we make the address ! 1087: valid here. ! 1088: ! 1089: This is easy: The only valid addresses are an offset from a register ! 1090: and we know the address isn't valid. So just call either `force_operand' ! 1091: or `force_reg' unless this is a (plus (reg ...) (const_int 0)). */ ! 1092: ! 1093: #define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) \ ! 1094: { if (GET_CODE (X) == PLUS && XEXP (X, 1) == const0_rtx) \ ! 1095: X = XEXP (x, 0); \ ! 1096: if (GET_CODE (X) == MULT || GET_CODE (X) == PLUS) \ ! 1097: X = force_operand (X, 0); \ ! 1098: else \ ! 1099: X = force_reg (Pmode, X); \ ! 1100: goto WIN; \ ! 1101: } ! 1102: ! 1103: /* Go to LABEL if ADDR (a legitimate address expression) ! 1104: has an effect that depends on the machine mode it is used for. ! 1105: On the 29k this is never true. */ ! 1106: ! 1107: #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) ! 1108: ! 1109: /* Compute the cost of an address. For the 29k, all valid addresses are ! 1110: the same cost. */ ! 1111: ! 1112: #define ADDRESS_COST(X) 0 ! 1113: ! 1114: /* Define this if some processing needs to be done immediately before ! 1115: emitting code for an insn. */ ! 1116: ! 1117: /* #define FINAL_PRESCAN_INSN(INSN,OPERANDS,NOPERANDS) */ ! 1118: ! 1119: /* Specify the machine mode that this machine uses ! 1120: for the index in the tablejump instruction. */ ! 1121: #define CASE_VECTOR_MODE SImode ! 1122: ! 1123: /* Define this if the tablejump instruction expects the table ! 1124: to contain offsets from the address of the table. ! 1125: Do not define this if the table should contain absolute addresses. */ ! 1126: /* #define CASE_VECTOR_PC_RELATIVE */ ! 1127: ! 1128: /* Specify the tree operation to be used to convert reals to integers. */ ! 1129: #define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR ! 1130: ! 1131: /* This is the kind of divide that is easiest to do in the general case. */ ! 1132: #define EASY_DIV_EXPR TRUNC_DIV_EXPR ! 1133: ! 1134: /* Define this as 1 if `char' should by default be signed; else as 0. */ ! 1135: #define DEFAULT_SIGNED_CHAR 0 ! 1136: ! 1137: /* This flag, if defined, says the same insns that convert to a signed fixnum ! 1138: also convert validly to an unsigned one. ! 1139: ! 1140: We actually lie a bit here as overflow conditions are different. But ! 1141: they aren't being checked anyway. */ ! 1142: ! 1143: #define FIXUNS_TRUNC_LIKE_FIX_TRUNC ! 1144: ! 1145: /* Max number of bytes we can move to of from memory ! 1146: in one reasonably fast instruction. ! 1147: ! 1148: For the 29k, we will define movti, so put this at 4 words. */ ! 1149: #define MOVE_MAX 16 ! 1150: ! 1151: /* Largest number of bytes of an object that can be placed in a register. ! 1152: On the 29k we have plenty of registers, so use TImode. */ ! 1153: #define MAX_FIXED_MODE_SIZE GET_MODE_BITSIZE (TImode) ! 1154: ! 1155: /* Nonzero if access to memory by bytes is no faster than for words. ! 1156: Also non-zero if doing byte operations (specifically shifts) in registers ! 1157: is undesirable. ! 1158: ! 1159: On the 29k, large masks are expensive, so we want to use bytes to ! 1160: manipulate fields. */ ! 1161: #define SLOW_BYTE_ACCESS 0 ! 1162: ! 1163: /* Define if normal loads of shorter-than-word items from memory clears ! 1164: the rest of the bigs in the register. */ ! 1165: #define BYTE_LOADS_ZERO_EXTEND ! 1166: ! 1167: /* This uses COFF, so it wants SDB format. */ ! 1168: #define SDB_DEBUGGING_INFO ! 1169: ! 1170: /* Define this to be the delimiter between SDB sub-sections. The default ! 1171: is ";". */ ! 1172: #define SDB_DELIM "\n" ! 1173: ! 1174: /* Do not break .stabs pseudos into continuations. */ ! 1175: #define DBX_CONTIN_LENGTH 0 ! 1176: ! 1177: /* Don't try to use the `x' type-cross-reference character in DBX data. ! 1178: Also has the consequence of putting each struct, union or enum ! 1179: into a separate .stabs, containing only cross-refs to the others. */ ! 1180: #define DBX_NO_XREFS ! 1181: ! 1182: /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits ! 1183: is done just by pretending it is already truncated. */ ! 1184: #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1 ! 1185: ! 1186: /* We assume that the store-condition-codes instructions store 0 for false ! 1187: and some other value for true. This is the value stored for true. */ ! 1188: ! 1189: #define STORE_FLAG_VALUE 0x80000000 ! 1190: ! 1191: /* Specify the machine mode that pointers have. ! 1192: After generation of rtl, the compiler makes no further distinction ! 1193: between pointers and any other objects of this machine mode. */ ! 1194: #define Pmode SImode ! 1195: ! 1196: /* Mode of a function address in a call instruction (for indexing purposes). ! 1197: ! 1198: Doesn't matter on 29k. */ ! 1199: #define FUNCTION_MODE SImode ! 1200: ! 1201: /* Define this if addresses of constant functions ! 1202: shouldn't be put through pseudo regs where they can be cse'd. ! 1203: Desirable on machines where ordinary constants are expensive ! 1204: but a CALL with constant address is cheap. */ ! 1205: #define NO_FUNCTION_CSE ! 1206: ! 1207: /* Define this if shift instructions ignore all but the low-order ! 1208: few bits. */ ! 1209: #define SHIFT_COUNT_TRUNCATED ! 1210: ! 1211: /* Compute the cost of computing a constant rtl expression RTX ! 1212: whose rtx-code is CODE. The body of this macro is a portion ! 1213: of a switch statement. If the code is computed here, ! 1214: return it with a return statement. Otherwise, break from the switch. ! 1215: ! 1216: We only care about the cost if it is valid in an insn. The only ! 1217: constants that cause an insn to generate more than one machine ! 1218: instruction are those involving floating-point or address. So ! 1219: only these need be expensive. */ ! 1220: ! 1221: #define CONST_COSTS(RTX,CODE) \ ! 1222: case CONST_INT: \ ! 1223: return 0; \ ! 1224: case CONST: \ ! 1225: case LABEL_REF: \ ! 1226: case SYMBOL_REF: \ ! 1227: return 6; \ ! 1228: case CONST_DOUBLE: \ ! 1229: return GET_MODE (RTX) == SFmode ? 6 : 8; ! 1230: ! 1231: /* Provide the costs of a rtl expression. This is in the body of a ! 1232: switch on CODE. ! 1233: ! 1234: All MEMs cost the same if they are valid. This is used to ensure ! 1235: that (mem (symbol_ref ...)) is placed into a CALL when valid. ! 1236: ! 1237: The multiply cost depends on whether this is a 29050 or not. */ ! 1238: ! 1239: #define RTX_COSTS(X,CODE) \ ! 1240: case MULT: \ ! 1241: return TARGET_29050 ? COSTS_N_INSNS (2) : COSTS_N_INSNS (40); \ ! 1242: case DIV: \ ! 1243: case UDIV: \ ! 1244: case MOD: \ ! 1245: case UMOD: \ ! 1246: return COSTS_N_INSNS (50); \ ! 1247: case MEM: \ ! 1248: return COSTS_N_INSNS (2); ! 1249: ! 1250: /* Control the assembler format that we output. */ ! 1251: ! 1252: /* Output at beginning of assembler file. */ ! 1253: ! 1254: #define ASM_FILE_START(FILE) \ ! 1255: { char *p, *after_dir = main_input_filename; \ ! 1256: if (TARGET_29050) \ ! 1257: fprintf (FILE, "\t.cputype 29050\n"); \ ! 1258: for (p = main_input_filename; *p; p++) \ ! 1259: if (*p == '/') \ ! 1260: after_dir = p + 1; \ ! 1261: fprintf (FILE, "\t.file \"%s\"\n", after_dir); \ ! 1262: fprintf (FILE, "\t.sect .lit,lit\n"); } ! 1263: ! 1264: /* Output to assembler file text saying following lines ! 1265: may contain character constants, extra white space, comments, etc. */ ! 1266: ! 1267: #define ASM_APP_ON "" ! 1268: ! 1269: /* Output to assembler file text saying following lines ! 1270: no longer contain unusual constructs. */ ! 1271: ! 1272: #define ASM_APP_OFF "" ! 1273: ! 1274: /* Output before instructions. */ ! 1275: ! 1276: #define TEXT_SECTION_ASM_OP "\t.text" ! 1277: ! 1278: /* Output before read-only data. */ ! 1279: ! 1280: #define READONLY_DATA_SECTION_ASM_OP "\t.use .lit" ! 1281: ! 1282: /* Output before writable data. */ ! 1283: ! 1284: #define DATA_SECTION_ASM_OP "\t.data" ! 1285: ! 1286: /* Define an extra section for read-only data, a routine to enter it, and ! 1287: indicate that it is for read-only data. */ ! 1288: ! 1289: #define EXTRA_SECTIONS readonly_data ! 1290: ! 1291: #define EXTRA_SECTION_FUNCTIONS \ ! 1292: void \ ! 1293: literal_section () \ ! 1294: { \ ! 1295: if (in_section != readonly_data) \ ! 1296: { \ ! 1297: fprintf (asm_out_file, "%s\n", READONLY_DATA_SECTION_ASM_OP); \ ! 1298: in_section = readonly_data; \ ! 1299: } \ ! 1300: } \ ! 1301: ! 1302: #define READONLY_DATA_SECTION literal_section ! 1303: ! 1304: /* How to refer to registers in assembler output. ! 1305: This sequence is indexed by compiler's hard-register-number (see above). */ ! 1306: ! 1307: #define REGISTER_NAMES \ ! 1308: {"gr96", "gr97", "gr98", "gr99", "gr100", "gr101", "gr102", "gr103", "gr104", \ ! 1309: "gr105", "gr106", "gr107", "gr108", "gr109", "gr110", "gr111", "gr112", \ ! 1310: "gr113", "gr114", "gr115", "gr116", "gr117", "gr118", "gr119", "gr120", \ ! 1311: "gr121", "gr122", "gr123", "gr124", "gr125", "gr126", "gr127", \ ! 1312: "lr0", "lr1", "lr2", "lr3", "lr4", "lr5", "lr6", "lr7", "lr8", "lr9", \ ! 1313: "lr10", "lr11", "lr12", "lr13", "lr14", "lr15", "lr16", "lr17", "lr18", \ ! 1314: "lr19", "lr20", "lr21", "lr22", "lr23", "lr24", "lr25", "lr26", "lr27", \ ! 1315: "lr28", "lr29", "lr30", "lr31", "lr32", "lr33", "lr34", "lr35", "lr36", \ ! 1316: "lr37", "lr38", "lr39", "lr40", "lr41", "lr42", "lr43", "lr44", "lr45", \ ! 1317: "lr46", "lr47", "lr48", "lr49", "lr50", "lr51", "lr52", "lr53", "lr54", \ ! 1318: "lr55", "lr56", "lr57", "lr58", "lr59", "lr60", "lr61", "lr62", "lr63", \ ! 1319: "lr64", "lr65", "lr66", "lr67", "lr68", "lr69", "lr70", "lr71", "lr72", \ ! 1320: "lr73", "lr74", "lr75", "lr76", "lr77", "lr78", "lr79", "lr80", "lr81", \ ! 1321: "lr82", "lr83", "lr84", "lr85", "lr86", "lr87", "lr88", "lr89", "lr90", \ ! 1322: "lr91", "lr92", "lr93", "lr94", "lr95", "lr96", "lr97", "lr98", "lr99", \ ! 1323: "lr100", "lr101", "lr102", "lr103", "lr104", "lr105", "lr106", "lr107", \ ! 1324: "lr108", "lr109", "lr110", "lr111", "lr112", "lr113", "lr114", "lr115", \ ! 1325: "lr116", "lr117", "lr118", "lr119", "lr120", "lr121", "lr122", "lr123", \ ! 1326: "lr124", "lr125", "lr126", "lr127", \ ! 1327: "AI0", "AI1", "AI2", "AI3", "AI4", "AI5", "AI6", "AI7", "AI8", "AI9", \ ! 1328: "AI10", "AI11", "AI12", "AI13", "AI14", "AI15", "FP", \ ! 1329: "bp", "fc", "cr", "q", \ ! 1330: "vab", "ops", "cps", "cfg", "cha", "chd", "chc", "rbp", "tmc", "tmr", \ ! 1331: "pc0", "pc1", "pc2", "mmu", "lru", "fpe", "int", "fps", "exo", \ ! 1332: "0", "1", "2", "3" } ! 1333: ! 1334: /* How to renumber registers for dbx and gdb. */ ! 1335: ! 1336: extern int a29k_debug_reg_map[]; ! 1337: #define DBX_REGISTER_NUMBER(REGNO) a29k_debug_reg_map[REGNO] ! 1338: ! 1339: /* This is how to output the definition of a user-level label named NAME, ! 1340: such as the label on a static function or variable NAME. */ ! 1341: ! 1342: #define ASM_OUTPUT_LABEL(FILE,NAME) \ ! 1343: do { assemble_name (FILE, NAME); fputs (":\n", FILE); } while (0) ! 1344: ! 1345: /* This is how to output a command to make the user-level label named NAME ! 1346: defined for reference from other files. */ ! 1347: ! 1348: #define ASM_GLOBALIZE_LABEL(FILE,NAME) \ ! 1349: do { fputs ("\t.global ", FILE); assemble_name (FILE, NAME); fputs ("\n", FILE);} while (0) ! 1350: ! 1351: /* This is how to output a reference to a user-level label named NAME. ! 1352: `assemble_name' uses this. */ ! 1353: ! 1354: #define ASM_OUTPUT_LABELREF(FILE,NAME) \ ! 1355: fprintf (FILE, "_%s", NAME) ! 1356: ! 1357: /* This is how to output an internal numbered label where ! 1358: PREFIX is the class of label and NUM is the number within the class. */ ! 1359: ! 1360: #define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \ ! 1361: fprintf (FILE, "%s%d:\n", PREFIX, NUM) ! 1362: ! 1363: /* This is how to output a label for a jump table. Arguments are the same as ! 1364: for ASM_OUTPUT_INTERNAL_LABEL, except the insn for the jump table is ! 1365: passed. */ ! 1366: ! 1367: #define ASM_OUTPUT_CASE_LABEL(FILE,PREFIX,NUM,TABLEINSN) \ ! 1368: { ASM_OUTPUT_ALIGN (FILE, 2); ASM_OUTPUT_INTERNAL_LABEL (FILE, PREFIX, NUM); } ! 1369: ! 1370: /* This is how to store into the string LABEL ! 1371: the symbol_ref name of an internal numbered label where ! 1372: PREFIX is the class of label and NUM is the number within the class. ! 1373: This is suitable for output with `assemble_name'. */ ! 1374: ! 1375: #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \ ! 1376: sprintf (LABEL, "*%s%d", PREFIX, NUM) ! 1377: ! 1378: /* This is how to output an assembler line defining a `double' constant. */ ! 1379: ! 1380: #define ASM_OUTPUT_DOUBLE(FILE,VALUE) \ ! 1381: fprintf (FILE, "\t.double %.20e\n", (VALUE)) ! 1382: ! 1383: /* This is how to output an assembler line defining a `float' constant. */ ! 1384: ! 1385: #define ASM_OUTPUT_FLOAT(FILE,VALUE) \ ! 1386: fprintf (FILE, "\t.float %.20e\n", (VALUE)) ! 1387: ! 1388: /* This is how to output an assembler line defining an `int' constant. */ ! 1389: ! 1390: #define ASM_OUTPUT_INT(FILE,VALUE) \ ! 1391: ( fprintf (FILE, "\t.word "), \ ! 1392: output_addr_const (FILE, (VALUE)), \ ! 1393: fprintf (FILE, "\n")) ! 1394: ! 1395: /* Likewise for `char' and `short' constants. */ ! 1396: ! 1397: #define ASM_OUTPUT_SHORT(FILE,VALUE) \ ! 1398: ( fprintf (FILE, "\t.hword "), \ ! 1399: output_addr_const (FILE, (VALUE)), \ ! 1400: fprintf (FILE, "\n")) ! 1401: ! 1402: #define ASM_OUTPUT_CHAR(FILE,VALUE) \ ! 1403: ( fprintf (FILE, "\t.byte "), \ ! 1404: output_addr_const (FILE, (VALUE)), \ ! 1405: fprintf (FILE, "\n")) ! 1406: ! 1407: /* This is how to output an insn to push a register on the stack. ! 1408: It need not be very fast code. */ ! 1409: ! 1410: #define ASM_OUTPUT_REG_PUSH(FILE,REGNO) \ ! 1411: fprintf (FILE, "\tsub %s,%s,4\n\tstore 0,0,%s,%s\n", \ ! 1412: reg_names[R_MSP], reg_names[R_MSP], reg_names[REGNO], \ ! 1413: reg_names[R_MSP]); ! 1414: ! 1415: /* This is how to output an insn to pop a register from the stack. ! 1416: It need not be very fast code. */ ! 1417: ! 1418: #define ASM_OUTPUT_REG_POP(FILE,REGNO) \ ! 1419: fprintf (FILE, "\tload 0,0,%s,%s\n\tadd %s,%s,4\n", \ ! 1420: reg_names[REGNO], reg_names[R_MSP], reg_names[R_MSP], \ ! 1421: reg_names[R_MSP]); ! 1422: ! 1423: /* This is how to output an assembler line for a numeric constant byte. */ ! 1424: ! 1425: #define ASM_OUTPUT_BYTE(FILE,VALUE) \ ! 1426: fprintf (FILE, "\t.byte 0x%x\n", (VALUE)) ! 1427: ! 1428: /* This is how to output an element of a case-vector that is absolute. */ ! 1429: ! 1430: #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \ ! 1431: fprintf (FILE, "\t.word L%d\n", VALUE) ! 1432: ! 1433: /* This is how to output an element of a case-vector that is relative. ! 1434: (29k does not use such vectors, ! 1435: but we must define this macro anyway.) */ ! 1436: ! 1437: #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, VALUE, REL) abort () ! 1438: ! 1439: /* This is how to output an assembler line ! 1440: that says to advance the location counter ! 1441: to a multiple of 2**LOG bytes. */ ! 1442: ! 1443: #define ASM_OUTPUT_ALIGN(FILE,LOG) \ ! 1444: if ((LOG) != 0) \ ! 1445: fprintf (FILE, "\t.align %d\n", 1 << (LOG)) ! 1446: ! 1447: #define ASM_OUTPUT_SKIP(FILE,SIZE) \ ! 1448: fprintf (FILE, "\t.block %d\n", (SIZE)) ! 1449: ! 1450: /* This says how to output an assembler line ! 1451: to define a global common symbol. */ ! 1452: ! 1453: #define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \ ! 1454: ( fputs ("\t.comm ", (FILE)), \ ! 1455: assemble_name ((FILE), (NAME)), \ ! 1456: fprintf ((FILE), ",%d\n", (SIZE))) ! 1457: ! 1458: /* This says how to output an assembler line ! 1459: to define a local common symbol. */ ! 1460: ! 1461: #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE,ROUNDED) \ ! 1462: ( fputs ("\t.lcomm ", (FILE)), \ ! 1463: assemble_name ((FILE), (NAME)), \ ! 1464: fprintf ((FILE), ",%d\n", (SIZE))) ! 1465: ! 1466: /* Store in OUTPUT a string (made with alloca) containing ! 1467: an assembler-name for a local static variable named NAME. ! 1468: LABELNO is an integer which is different for each call. */ ! 1469: ! 1470: #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \ ! 1471: ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \ ! 1472: sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO))) ! 1473: ! 1474: /* Define the parentheses used to group arithmetic operations ! 1475: in assembler code. */ ! 1476: ! 1477: #define ASM_OPEN_PAREN "(" ! 1478: #define ASM_CLOSE_PAREN ")" ! 1479: ! 1480: /* Define results of standard character escape sequences. */ ! 1481: #define TARGET_BELL 007 ! 1482: #define TARGET_BS 010 ! 1483: #define TARGET_TAB 011 ! 1484: #define TARGET_NEWLINE 012 ! 1485: #define TARGET_VT 013 ! 1486: #define TARGET_FF 014 ! 1487: #define TARGET_CR 015 ! 1488: ! 1489: /* Print operand X (an rtx) in assembler syntax to file FILE. ! 1490: CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified. ! 1491: For `%' followed by punctuation, CODE is the punctuation and X is null. */ ! 1492: ! 1493: #define PRINT_OPERAND(FILE, X, CODE) print_operand (FILE, X, CODE) ! 1494: ! 1495: /* Determine which codes are valid without a following integer. These must ! 1496: not be alphabetic. ! 1497: ! 1498: We support `#' which is null if a delay slot exists, otherwise ! 1499: "\n\tnop" and `*' which prints the register name for TPC (gr122). */ ! 1500: ! 1501: #define PRINT_OPERAND_PUNCT_VALID_P(CODE) ((CODE) == '#' || (CODE) == '*') ! 1502: ! 1503: /* Print a memory address as an operand to reference that memory location. */ ! 1504: ! 1505: #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \ ! 1506: { register rtx addr = ADDR; \ ! 1507: if (!REG_P (addr) \ ! 1508: && ! (GET_CODE (addr) == CONST_INT \ ! 1509: && INTVAL (addr) >= 0 && INTVAL (addr) < 256)) \ ! 1510: abort (); \ ! 1511: output_operand (addr, 0); \ ! 1512: } ! 1513: /* Define the codes that are matched by predicates in a29k.c. */ ! 1514: ! 1515: #define PREDICATE_CODES \ ! 1516: {"cint_8_operand", {CONST_INT}}, \ ! 1517: {"cint_16_operand", {CONST_INT}}, \ ! 1518: {"long_const_operand", {CONST_INT, CONST, CONST_DOUBLE, \ ! 1519: LABEL_REF, SYMBOL_REF}}, \ ! 1520: {"shift_constant_operand", {CONST_INT, ASHIFT}}, \ ! 1521: {"const_0__operand", {CONST_INT, ASHIFT}}, \ ! 1522: {"const_8__operand", {CONST_INT, ASHIFT}}, \ ! 1523: {"const_16__operand", {CONST_INT, ASHIFT}}, \ ! 1524: {"const_24__operand", {CONST_INT, ASHIFT}}, \ ! 1525: {"float_const_operand", {CONST_DOUBLE}}, \ ! 1526: {"gen_reg_operand", {SUBREG, REG}}, \ ! 1527: {"gen_reg_or_float_constant_operand", {SUBREG, REG, CONST_DOUBLE}}, \ ! 1528: {"gen_reg_or_integer_constant_operand", {SUBREG, REG, \ ! 1529: CONST_INT, CONST_DOUBLE}}, \ ! 1530: {"spec_reg_operand", {REG}}, \ ! 1531: {"accum_reg_operand", {REG}}, \ ! 1532: {"srcb_operand", {SUBREG, REG, CONST_INT}}, \ ! 1533: {"reg_or_immediate_operand", {SUBREG, REG, CONST_INT, CONST, \ ! 1534: CONST_DOUBLE, CONST, SYMBOL_REF, LABEL_REF}}, \ ! 1535: {"reg_or_u_short_operand", {SUBREG, REG, CONST_INT}}, \ ! 1536: {"and_operand", {SUBREG, REG, CONST_INT}}, \ ! 1537: {"add_operand", {SUBREG, REG, CONST_INT}}, \ ! 1538: {"in_operand", {SUBREG, MEM, REG, CONST_INT, CONST, SYMBOL_REF, \ ! 1539: LABEL_REF, CONST_DOUBLE}}, \ ! 1540: {"out_operand", {SUBREG, REG, MEM}}, \ ! 1541: {"extend_operator", {ZERO_EXTEND, SIGN_EXTEND}}, \ ! 1542: {"fp_comparison_operator", {EQ, GT, GE}}, \ ! 1543: {"branch_operator", {GE, LT}}, \ ! 1544: {"epilogue_operand", {CODE_LABEL}},
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