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1.1 root 1: /* Definitions of target machine for GNU compiler, for AMD Am29000 CPU. 1.1.1.4 ! root 2: Copyright (C) 1988, 1990, 1991, 1992 Free Software Foundation, Inc. 1.1 root 3: Contributed by Richard Kenner ([email protected]) 4: 5: This file is part of GNU CC. 6: 7: GNU CC is free software; you can redistribute it and/or modify 8: it under the terms of the GNU General Public License as published by 9: the Free Software Foundation; either version 2, or (at your option) 10: any later version. 11: 12: GNU CC is distributed in the hope that it will be useful, 13: but WITHOUT ANY WARRANTY; without even the implied warranty of 14: MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15: GNU General Public License for more details. 16: 17: You should have received a copy of the GNU General Public License 18: along with GNU CC; see the file COPYING. If not, write to 19: the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */ 20: 21: 22: /* Names to predefine in the preprocessor for this target machine. */ 23: 24: #define CPP_PREDEFINES "-D_AM29K -D_AM29000 -D_EPI" 25: 26: /* Print subsidiary information on the compiler version in use. */ 27: #define TARGET_VERSION 28: 29: /* Pass -w to assembler. */ 30: #define ASM_SPEC "-w" 31: 32: /* Run-time compilation parameters selecting different hardware subsets. */ 33: 34: extern int target_flags; 35: 36: /* Macro to define tables used to set the flags. 37: This is a list in braces of pairs in braces, 38: each pair being { "NAME", VALUE } 39: where VALUE is the bits to set or minus the bits to clear. 40: An empty string NAME is used to identify the default VALUE. */ 41: 42: /* This means that the DW bit will be enabled, to allow direct loads 43: of bytes. */ 44: 45: #define TARGET_DW_ENABLE (target_flags & 1) 46: 47: /* This means that the external hardware does supports byte writes. */ 48: 49: #define TARGET_BYTE_WRITES (target_flags & 2) 50: 51: /* This means that a "small memory model" has been selected where all 52: function addresses are known to be within 256K. This allows CALL to be 53: used. */ 54: 55: #define TARGET_SMALL_MEMORY (target_flags & 4) 56: 57: /* This means that we are compiling for a 29050. */ 58: 59: #define TARGET_29050 (target_flags & 8) 60: 61: /* This means that we are compiling for the kernel which means that we use 62: gr64-gr95 instead of gr96-126. */ 63: 64: #define TARGET_KERNEL_REGISTERS (target_flags & 16) 65: 66: /* This means that a call to "__msp_check" should be inserted after each stack 67: adjustment to check for stack overflow. */ 68: 69: #define TARGET_STACK_CHECK (target_flags & 32) 70: 71: /* This handles 29k processors which cannot handle the separation 72: of a mtsrim insns and a storem insn (most 29000 chips to date, but 73: not the 29050. */ 74: 75: #define TARGET_NO_STOREM_BUG (target_flags & 64) 76: 77: /* This forces the compiler not to use incoming argument registers except 78: for copying out arguments. It helps detect problems when a function is 79: called with fewer arguments than it is declared with. */ 80: 81: #define TARGET_NO_REUSE_ARGS (target_flags & 128) 82: 83: #define TARGET_SWITCHES \ 84: { {"dw", 1}, \ 85: {"ndw", -1}, \ 86: {"bw", 2}, \ 87: {"nbw", - (1|2)}, \ 88: {"small", 4}, \ 89: {"large", -4}, \ 90: {"29050", 8+64}, \ 91: {"29000", -8}, \ 92: {"kernel-registers", 16}, \ 93: {"user-registers", -16}, \ 94: {"stack-check", 32}, \ 1.1.1.4 ! root 95: {"no-stack-check", - 32}, \ ! 96: {"storem-bug", -64}, \ 1.1 root 97: {"no-storem-bug", 64}, \ 98: {"reuse-arg-regs", -128}, \ 99: {"no-reuse-arg-regs", 128}, \ 100: {"", TARGET_DEFAULT}} 101: 102: #define TARGET_DEFAULT 3 103: 1.1.1.2 root 104: /* Define this to change the optimizations performed by default. */ 1.1 root 105: 106: #define OPTIMIZATION_OPTIONS(LEVEL) \ 107: { \ 108: if ((LEVEL) > 0) \ 109: { \ 110: flag_force_addr = 1; \ 111: flag_force_mem = 1; \ 112: flag_omit_frame_pointer = 1; \ 113: } \ 114: } 115: 116: /* target machine storage layout */ 117: 118: /* Define the types for size_t, ptrdiff_t, and wchar_t. These are the 119: same as those used by EPI. The type for wchar_t does not make much 120: sense, but is what is used. */ 121: 122: #define SIZE_TYPE "unsigned int" 123: #define PTRDIFF_TYPE "int" 124: #define WCHAR_TYPE "char" 125: #define WCHAR_TYPE_SIZE BITS_PER_UNIT 126: 1.1.1.4 ! root 127: /* Define this macro if it is advisible to hold scalars in registers ! 128: in a wider mode than that declared by the program. In such cases, ! 129: the value is constrained to be within the bounds of the declared ! 130: type, but kept valid in the wider mode. The signedness of the ! 131: extension may differ from that of the type. */ ! 132: ! 133: #define PROMOTE_MODE(MODE,UNSIGNEDP,TYPE) \ ! 134: if (GET_MODE_CLASS (MODE) == MODE_INT \ ! 135: && GET_MODE_SIZE (MODE) < 4) \ ! 136: (MODE) == SImode; ! 137: 1.1 root 138: /* Define this if most significant bit is lowest numbered 139: in instructions that operate on numbered bit-fields. 140: This is arbitrary on the 29k since it has no actual bit-field insns. 141: It is better to define this as TRUE because BYTES_BIG_ENDIAN is TRUE 142: and we want to be able to convert BP position to bit position with 143: just a shift. */ 144: #define BITS_BIG_ENDIAN 1 145: 146: /* Define this if most significant byte of a word is the lowest numbered. 147: This is true on 29k. */ 148: #define BYTES_BIG_ENDIAN 1 149: 150: /* Define this if most significant word of a multiword number is lowest 151: numbered. 152: 153: For 29k we can decide arbitrarily since there are no machine instructions 154: for them. Might as well be consistent with bytes. */ 155: #define WORDS_BIG_ENDIAN 1 156: 1.1.1.2 root 157: /* number of bits in an addressable storage unit */ 1.1 root 158: #define BITS_PER_UNIT 8 159: 160: /* Width in bits of a "word", which is the contents of a machine register. 161: Note that this is not necessarily the width of data type `int'; 162: if using 16-bit ints on a 68000, this would still be 32. 163: But on a machine with 16-bit registers, this would be 16. */ 164: #define BITS_PER_WORD 32 165: 166: /* Width of a word, in units (bytes). */ 167: #define UNITS_PER_WORD 4 168: 169: /* Width in bits of a pointer. 170: See also the macro `Pmode' defined below. */ 171: #define POINTER_SIZE 32 172: 173: /* Allocation boundary (in *bits*) for storing arguments in argument list. */ 174: #define PARM_BOUNDARY 32 175: 176: /* Boundary (in *bits*) on which stack pointer should be aligned. */ 177: #define STACK_BOUNDARY 64 178: 179: /* Allocation boundary (in *bits*) for the code of a function. */ 180: #define FUNCTION_BOUNDARY 32 181: 182: /* Alignment of field after `int : 0' in a structure. */ 183: #define EMPTY_FIELD_BOUNDARY 32 184: 185: /* Every structure's size must be a multiple of this. */ 186: #define STRUCTURE_SIZE_BOUNDARY 8 187: 1.1.1.2 root 188: /* A bitfield declared as `int' forces `int' alignment for the struct. */ 189: #define PCC_BITFIELD_TYPE_MATTERS 1 190: 1.1 root 191: /* No data type wants to be aligned rounder than this. */ 192: #define BIGGEST_ALIGNMENT 32 193: 194: /* Make strings word-aligned so strcpy from constants will be faster. */ 195: #define CONSTANT_ALIGNMENT(EXP, ALIGN) \ 196: (TREE_CODE (EXP) == STRING_CST \ 197: && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN)) 198: 199: /* Make arrays of chars word-aligned for the same reasons. */ 200: #define DATA_ALIGNMENT(TYPE, ALIGN) \ 201: (TREE_CODE (TYPE) == ARRAY_TYPE \ 202: && TYPE_MODE (TREE_TYPE (TYPE)) == QImode \ 203: && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN)) 204: 1.1.1.2 root 205: /* Set this non-zero if move instructions will actually fail to work 1.1 root 206: when given unaligned data. */ 1.1.1.2 root 207: #define STRICT_ALIGNMENT 0 1.1 root 208: 1.1.1.2 root 209: /* Set this non-zero if unaligned move instructions are extremely slow. 1.1 root 210: 211: On the 29k, they trap. */ 1.1.1.2 root 212: #define SLOW_UNALIGNED_ACCESS 1 1.1 root 213: 214: /* Standard register usage. */ 215: 216: /* Number of actual hardware registers. 217: The hardware registers are assigned numbers for the compiler 218: from 0 to just below FIRST_PSEUDO_REGISTER. 219: All registers that the compiler knows about must be given numbers, 220: even those that are not normally considered general registers. 221: 222: 29k has 256 registers, of which 62 are not defined. gr0 and gr1 are 223: not produced in generated RTL so we can start at gr96, and call it 224: register zero. 225: 226: So 0-31 are gr96-gr127, lr0-lr127 are 32-159. To represent the input 227: arguments, whose register numbers we won't know until we are done, 228: use register 160-175. They cannot be modified. Similarly, 176 is used 229: for the frame pointer. It is assigned the last local register number 230: once the number of registers used is known. 231: 232: We use 177, 178, 179, and 180 for the special registers BP, FC, CR, and Q, 233: respectively. Registers 181 through 199 are used for the other special 234: registers that may be used by the programmer, but are never used by the 235: compiler. 236: 237: Registers 200-203 are the four floating-point accumulator register in 238: the 29050. 239: 240: When -mkernel-registers is specified, we still use the same register 241: map but change the names so 0-31 print as gr64-gr95. */ 242: 243: #define FIRST_PSEUDO_REGISTER 204 244: 245: /* Because of the large number of registers on the 29k, we define macros 246: to refer to each group of registers and then define the number for some 247: registers used in the calling sequence. */ 248: 249: #define R_GR(N) ((N) - 96) /* gr96 is register number 0 */ 250: #define R_LR(N) ((N) + 32) /* lr0 is register number 32 */ 251: #define R_FP 176 /* frame pointer is register 176 */ 252: #define R_AR(N) ((N) + 160) /* first incoming arg reg is 160 */ 253: 254: /* Define the numbers of the special registers. */ 255: #define R_BP 177 256: #define R_FC 178 257: #define R_CR 179 258: #define R_Q 180 259: 260: /* These special registers are not used by the compiler, but may be referenced 261: by the programmer via asm declarations. */ 262: 263: #define R_VAB 181 264: #define R_OPS 182 265: #define R_CPS 183 266: #define R_CFG 184 267: #define R_CHA 185 268: #define R_CHD 186 269: #define R_CHC 187 270: #define R_RBP 188 271: #define R_TMC 189 272: #define R_TMR 190 273: #define R_PC0 191 274: #define R_PC1 192 275: #define R_PC2 193 276: #define R_MMU 194 277: #define R_LRU 195 278: #define R_FPE 196 279: #define R_INT 197 280: #define R_FPS 198 281: #define R_EXO 199 282: 283: /* Define the number for floating-point accumulator N. */ 284: #define R_ACC(N) ((N) + 200) 285: 286: /* Now define the registers used in the calling sequence. */ 287: #define R_TAV R_GR (121) 288: #define R_TPC R_GR (122) 289: #define R_LRP R_GR (123) 290: #define R_SLP R_GR (124) 291: #define R_MSP R_GR (125) 292: #define R_RAB R_GR (126) 293: #define R_RFB R_GR (127) 294: 295: /* 1 for registers that have pervasive standard uses 296: and are not available for the register allocator. */ 297: 298: #define FIXED_REGISTERS \ 299: {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ 300: 1, 1, 1, 1, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, \ 301: 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ 302: 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ 303: 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ 304: 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ 305: 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ 306: 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ 307: 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ 308: 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ 309: 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \ 310: 1, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \ 311: 1, 1, 1, 1, 1, 1, 1, 1, \ 312: 0, 0, 0, 0 } 313: 314: /* 1 for registers not available across function calls. 315: These must include the FIXED_REGISTERS and also any 316: registers that can be used without being saved. 317: The latter must include the registers where values are returned 318: and the register where structure-value addresses are passed. 319: Aside from that, you can include as many other registers as you like. */ 320: #define CALL_USED_REGISTERS \ 321: {1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \ 322: 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \ 1.1.1.4 ! root 323: 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ 1.1 root 324: 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ 325: 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ 326: 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ 327: 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ 328: 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ 329: 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ 330: 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ 331: 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \ 332: 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \ 333: 1, 1, 1, 1, 1, 1, 1, 1, \ 334: 1, 1, 1, 1 } 335: 336: /* List the order in which to allocate registers. Each register must be 337: listed once, even those in FIXED_REGISTERS. 338: 339: We allocate in the following order: 340: gr116-gr120 (not used for anything but temps) 341: gr96-gr111 (function return values, reverse order) 342: argument registers (160-175) 343: lr0-lr127 (locals, saved) 344: acc3-0 (acc0 special) 345: everything else */ 346: 347: #define REG_ALLOC_ORDER \ 348: {R_GR (116), R_GR (117), R_GR (118), R_GR (119), R_GR (120), \ 349: R_GR (111), R_GR (110), R_GR (109), R_GR (108), R_GR (107), \ 350: R_GR (106), R_GR (105), R_GR (104), R_GR (103), R_GR (102), \ 351: R_GR (101), R_GR (100), R_GR (99), R_GR (98), R_GR (97), R_GR (96), \ 352: R_AR (0), R_AR (1), R_AR (2), R_AR (3), R_AR (4), R_AR (5), \ 353: R_AR (6), R_AR (7), R_AR (8), R_AR (9), R_AR (10), R_AR (11), \ 354: R_AR (12), R_AR (13), R_AR (14), R_AR (15), \ 355: R_LR (0), R_LR (1), R_LR (2), R_LR (3), R_LR (4), R_LR (5), \ 356: R_LR (6), R_LR (7), R_LR (8), R_LR (9), R_LR (10), R_LR (11), \ 357: R_LR (12), R_LR (13), R_LR (14), R_LR (15), R_LR (16), R_LR (17), \ 358: R_LR (18), R_LR (19), R_LR (20), R_LR (21), R_LR (22), R_LR (23), \ 359: R_LR (24), R_LR (25), R_LR (26), R_LR (27), R_LR (28), R_LR (29), \ 360: R_LR (30), R_LR (31), R_LR (32), R_LR (33), R_LR (34), R_LR (35), \ 361: R_LR (36), R_LR (37), R_LR (38), R_LR (39), R_LR (40), R_LR (41), \ 362: R_LR (42), R_LR (43), R_LR (44), R_LR (45), R_LR (46), R_LR (47), \ 363: R_LR (48), R_LR (49), R_LR (50), R_LR (51), R_LR (52), R_LR (53), \ 364: R_LR (54), R_LR (55), R_LR (56), R_LR (57), R_LR (58), R_LR (59), \ 365: R_LR (60), R_LR (61), R_LR (62), R_LR (63), R_LR (64), R_LR (65), \ 366: R_LR (66), R_LR (67), R_LR (68), R_LR (69), R_LR (70), R_LR (71), \ 367: R_LR (72), R_LR (73), R_LR (74), R_LR (75), R_LR (76), R_LR (77), \ 368: R_LR (78), R_LR (79), R_LR (80), R_LR (81), R_LR (82), R_LR (83), \ 369: R_LR (84), R_LR (85), R_LR (86), R_LR (87), R_LR (88), R_LR (89), \ 370: R_LR (90), R_LR (91), R_LR (92), R_LR (93), R_LR (94), R_LR (95), \ 371: R_LR (96), R_LR (97), R_LR (98), R_LR (99), R_LR (100), R_LR (101), \ 372: R_LR (102), R_LR (103), R_LR (104), R_LR (105), R_LR (106), \ 373: R_LR (107), R_LR (108), R_LR (109), R_LR (110), R_LR (111), \ 374: R_LR (112), R_LR (113), R_LR (114), R_LR (115), R_LR (116), \ 375: R_LR (117), R_LR (118), R_LR (119), R_LR (120), R_LR (121), \ 376: R_LR (122), R_LR (123), R_LR (124), R_LR (124), R_LR (126), \ 377: R_LR (127), \ 378: R_ACC (3), R_ACC (2), R_ACC (1), R_ACC (0), \ 379: R_GR (112), R_GR (113), R_GR (114), R_GR (115), R_GR (121), \ 380: R_GR (122), R_GR (123), R_GR (124), R_GR (125), R_GR (126), \ 381: R_GR (127), \ 382: R_FP, R_BP, R_FC, R_CR, R_Q, \ 383: R_VAB, R_OPS, R_CPS, R_CFG, R_CHA, R_CHD, R_CHC, R_RBP, R_TMC, \ 384: R_TMR, R_PC0, R_PC1, R_PC2, R_MMU, R_LRU, R_FPE, R_INT, R_FPS, \ 385: R_EXO } 386: 387: /* Return number of consecutive hard regs needed starting at reg REGNO 388: to hold something of mode MODE. 389: This is ordinarily the length in words of a value of mode MODE 390: but can be less for certain modes in special long registers. */ 391: 392: #define HARD_REGNO_NREGS(REGNO, MODE) \ 393: ((REGNO) >= R_ACC (0) ? 1 \ 394: : (GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD) 395: 396: /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE. 397: On 29k, the cpu registers can hold any mode. But a double-precision 398: floating-point value should start at an even register. The special 1.1.1.4 ! root 399: registers cannot hold floating-point values, BP, CR, and FC cannot ! 400: hold integer or floating-point values, and the accumulators cannot 1.1 root 401: hold integer values. 402: 1.1.1.3 root 403: DImode and larger values should start at an even register just like 404: DFmode values, even though the instruction set doesn't require it, in order 405: to prevent reload from aborting due to a modes_equiv_for_class_p failure. 406: 1.1 root 407: (I'd like to use the "?:" syntax to make this more readable, but Sun's 408: compiler doesn't seem to accept it.) */ 409: #define HARD_REGNO_MODE_OK(REGNO, MODE) \ 410: (((REGNO) >= R_ACC (0) \ 411: && (GET_MODE_CLASS (MODE) == MODE_FLOAT \ 412: || GET_MODE_CLASS (MODE) == MODE_COMPLEX_FLOAT)) \ 1.1.1.4 ! root 413: || ((REGNO) >= R_BP && (REGNO) <= R_CR \ ! 414: && GET_MODE_CLASS (MODE) == MODE_PARTIAL_INT) \ ! 415: || ((REGNO) >= R_Q && (REGNO) < R_ACC (0) \ 1.1 root 416: && GET_MODE_CLASS (MODE) != MODE_FLOAT \ 417: && GET_MODE_CLASS (MODE) != MODE_COMPLEX_FLOAT) \ 418: || ((REGNO) < R_BP \ 1.1.1.3 root 419: && ((((REGNO) & 1) == 0) \ 1.1 root 420: || GET_MODE_UNIT_SIZE (MODE) <= UNITS_PER_WORD))) 421: 422: /* Value is 1 if it is a good idea to tie two pseudo registers 423: when one has mode MODE1 and one has mode MODE2. 424: If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2, 425: for any hard reg, then this must be 0 for correct output. 426: 427: On the 29k, normally we'd just have problems with DFmode because of the 428: even alignment. However, we also have to be a bit concerned about 429: the special register's restriction to non-floating and the floating-point 430: accumulator's restriction to only floating. This probably won't 431: cause any great inefficiencies in practice. */ 1.1.1.4 ! root 432: 1.1 root 433: #define MODES_TIEABLE_P(MODE1, MODE2) \ 434: ((MODE1) == (MODE2) \ 1.1.1.4 ! root 435: || (GET_MODE_CLASS (MODE1) == MODE_INT \ ! 436: && GET_MODE_CLASS (MODE2) == MODE_INT)) 1.1 root 437: 438: /* Specify the registers used for certain standard purposes. 439: The values of these macros are register numbers. */ 440: 441: /* 29k pc isn't overloaded on a register that the compiler knows about. */ 442: /* #define PC_REGNUM */ 443: 444: /* Register to use for pushing function arguments. */ 445: #define STACK_POINTER_REGNUM R_GR (125) 446: 447: /* Base register for access to local variables of the function. */ 448: #define FRAME_POINTER_REGNUM R_FP 449: 450: /* Value should be nonzero if functions must have frame pointers. 451: Zero means the frame pointer need not be set up (and parms 452: may be accessed via the stack pointer) in functions that seem suitable. 453: This is computed in `reload', in reload1.c. */ 454: #define FRAME_POINTER_REQUIRED 0 455: 456: /* Base register for access to arguments of the function. */ 457: #define ARG_POINTER_REGNUM R_FP 458: 459: /* Register in which static-chain is passed to a function. */ 460: #define STATIC_CHAIN_REGNUM R_SLP 461: 462: /* Register in which address to store a structure value 463: is passed to a function. */ 464: #define STRUCT_VALUE_REGNUM R_LRP 465: 466: /* Define the classes of registers for register constraints in the 467: machine description. Also define ranges of constants. 468: 469: One of the classes must always be named ALL_REGS and include all hard regs. 470: If there is more than one class, another class must be named NO_REGS 471: and contain no registers. 472: 473: The name GENERAL_REGS must be the name of a class (or an alias for 474: another name such as ALL_REGS). This is the class of registers 475: that is allowed by "g" or "r" in a register constraint. 476: Also, registers outside this class are allocated only when 477: instructions express preferences for them. 478: 479: The classes must be numbered in nondecreasing order; that is, 480: a larger-numbered class must never be contained completely 481: in a smaller-numbered class. 482: 483: For any two classes, it is very desirable that there be another 484: class that represents their union. 485: 1.1.1.4 ! root 486: The 29k has nine registers classes: LR0_REGS, GENERAL_REGS, SPECIAL_REGS, ! 487: BP_REGS, FC_REGS, CR_REGS, Q_REGS, ACCUM_REGS, and ACCUM0_REGS. ! 488: LR0_REGS, BP_REGS, FC_REGS, CR_REGS, and Q_REGS contain just the single ! 489: register. The latter two classes are used to represent the floating-point ! 490: accumulator registers in the 29050. We also define the union class ! 491: FLOAT_REGS to represent any register that can be used to hold a 1.1 root 492: floating-point value. The union of SPECIAL_REGS and ACCUM_REGS isn't 493: useful as the former cannot contain floating-point and the latter can only 494: contain floating-point. */ 495: 1.1.1.4 ! root 496: enum reg_class { NO_REGS, LR0_REGS, GENERAL_REGS, BP_REGS, FC_REGS, CR_REGS, ! 497: Q_REGS, SPECIAL_REGS, ACCUM0_REGS, ACCUM_REGS, FLOAT_REGS, ! 498: ALL_REGS, LIM_REG_CLASSES }; 1.1 root 499: 500: #define N_REG_CLASSES (int) LIM_REG_CLASSES 501: 502: /* Give names of register classes as strings for dump file. */ 503: 504: #define REG_CLASS_NAMES \ 1.1.1.4 ! root 505: {"NO_REGS", "LR0_REGS", "GENERAL_REGS", "BP_REGS", "FC_REGS", "CR_REGS", \ ! 506: "Q_REGS", "SPECIAL_REGS", "ACCUM0_REGS", "ACCUM_REGS", "FLOAT_REGS", \ ! 507: "ALL_REGS" } 1.1 root 508: 509: /* Define which registers fit in which classes. 510: This is an initializer for a vector of HARD_REG_SET 511: of length N_REG_CLASSES. */ 512: 513: #define REG_CLASS_CONTENTS \ 514: { {0, 0, 0, 0, 0, 0, 0}, \ 1.1.1.4 ! root 515: {0, 1, 0, 0, 0, 0, 0}, \ 1.1 root 516: {~0, ~0, ~0, ~0, ~0, ~ 0xfffe0000, 0}, \ 517: {0, 0, 0, 0, 0, 0x20000, 0}, \ 1.1.1.4 ! root 518: {0, 0, 0, 0, 0, 0x40000, 0}, \ ! 519: {0, 0, 0, 0, 0, 0x80000, 0}, \ 1.1 root 520: {0, 0, 0, 0, 0, 0x100000, 0}, \ 521: {0, 0, 0, 0, 0, 0xfffe0000, 0xff}, \ 522: {0, 0, 0, 0, 0, 0, 0x100}, \ 523: {0, 0, 0, 0, 0, 0, 0xf00}, \ 524: {~0, ~0, ~0, ~0, ~0, ~ 0xfffe0000, 0xf00}, \ 525: {~0, ~0, ~0, ~0, ~0, ~0, ~0} } 526: 527: /* The same information, inverted: 528: Return the class number of the smallest class containing 529: reg number REGNO. This could be a conditional expression 530: or could index an array. */ 531: 532: #define REGNO_REG_CLASS(REGNO) \ 533: ((REGNO) == R_BP ? BP_REGS \ 1.1.1.4 ! root 534: : (REGNO) == R_FC ? FC_REGS \ ! 535: : (REGNO) == R_CR ? CR_REGS \ 1.1 root 536: : (REGNO) == R_Q ? Q_REGS \ 537: : (REGNO) > R_BP && (REGNO) <= R_EXO ? SPECIAL_REGS \ 538: : (REGNO) == R_ACC (0) ? ACCUM0_REGS \ 539: : (REGNO) > R_ACC (0) ? ACCUM_REGS \ 1.1.1.4 ! root 540: : (REGNO) == R_LR (0) ? LR0_REGS \ 1.1 root 541: : GENERAL_REGS) 542: 543: /* The class value for index registers, and the one for base regs. */ 544: #define INDEX_REG_CLASS NO_REGS 545: #define BASE_REG_CLASS GENERAL_REGS 546: 547: /* Get reg_class from a letter such as appears in the machine description. */ 548: 549: #define REG_CLASS_FROM_LETTER(C) \ 550: ((C) == 'r' ? GENERAL_REGS \ 1.1.1.4 ! root 551: : (C) == 'l' ? LR0_REGS \ 1.1 root 552: : (C) == 'b' ? BP_REGS \ 1.1.1.4 ! root 553: : (C) == 'f' ? FC_REGS \ ! 554: : (C) == 'c' ? CR_REGS \ 1.1 root 555: : (C) == 'q' ? Q_REGS \ 556: : (C) == 'h' ? SPECIAL_REGS \ 557: : (C) == 'a' ? ACCUM_REGS \ 558: : (C) == 'A' ? ACCUM0_REGS \ 559: : (C) == 'f' ? FLOAT_REGS \ 560: : NO_REGS) 561: 562: /* Define this macro to change register usage conditional on target flags. 563: 564: On the 29k, we use this to change the register names for kernel mapping. */ 565: 566: #define CONDITIONAL_REGISTER_USAGE \ 567: { \ 568: static char *kernel_names[] = {"gr64", "gr65", "gr66", "gr67", \ 569: "gr68", "gr69", "gr70", "gr71", \ 570: "gr72", "gr73", "gr74", "gr75", \ 571: "gr76", "gr77", "gr78", "gr79", \ 572: "gr80", "gr81", "gr82", "gr83", \ 573: "gr84", "gr85", "gr86", "gr87", \ 574: "gr88", "gr89", "gr90", "gr91", \ 575: "gr92", "gr93", "gr94", "gr95"}; \ 576: int i; \ 577: \ 578: if (TARGET_KERNEL_REGISTERS) \ 579: for (i = 0; i < 32; i++) \ 580: reg_names[i] = kernel_names[i]; \ 581: } 582: 583: /* The letters I, J, K, L, M, N, O, and P in a register constraint string 584: can be used to stand for particular ranges of immediate operands. 585: This macro defines what the ranges are. 586: C is the letter, and VALUE is a constant value. 587: Return 1 if VALUE is in the range specified by C. 588: 589: For 29k: 590: `I' is used for the range of constants most insns can contain. 591: `J' is for the few 16-bit insns. 592: `K' is a constant whose high-order 24 bits are all one 593: `L' is a HImode constant whose high-order 8 bits are all one 594: `M' is a 32-bit constant whose high-order 16 bits are all one (for CONSTN) 595: `N' is a 32-bit constant whose negative is 8 bits 596: `O' is the 32-bit constant 0x80000000, any constant with low-order 597: 16 bits zero for 29050. 598: `P' is a HImode constant whose negative is 8 bits */ 599: 600: #define CONST_OK_FOR_LETTER_P(VALUE, C) \ 601: ((C) == 'I' ? (unsigned) (VALUE) < 0x100 \ 602: : (C) == 'J' ? (unsigned) (VALUE) < 0x10000 \ 603: : (C) == 'K' ? ((VALUE) & 0xffffff00) == 0xffffff00 \ 604: : (C) == 'L' ? ((VALUE) & 0xff00) == 0xff00 \ 605: : (C) == 'M' ? ((VALUE) & 0xffff0000) == 0xffff0000 \ 606: : (C) == 'N' ? ((VALUE) < 0 && (VALUE) > -256) \ 607: : (C) == 'O' ? ((VALUE) == 0x80000000 \ 608: || (TARGET_29050 && ((VALUE) & 0xffff) == 0)) \ 609: : (C) == 'P' ? (((VALUE) | 0xffff0000) < 0 \ 610: && ((VALUE) | 0xffff0000) > -256) \ 611: : 0) 612: 613: /* Similar, but for floating constants, and defining letters G and H. 614: Here VALUE is the CONST_DOUBLE rtx itself. 615: All floating-point constants are valid on 29k. */ 616: 617: #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) 1 618: 619: /* Given an rtx X being reloaded into a reg required to be 620: in class CLASS, return the class of reg to actually use. 621: In general this is just CLASS; but on some machines 622: in some cases it is preferable to use a more restrictive class. */ 623: 624: #define PREFERRED_RELOAD_CLASS(X,CLASS) CLASS 625: 626: /* Return the register class of a scratch register needed to copy IN into 627: or out of a register in CLASS in MODE. If it can be done directly, 628: NO_REGS is returned. */ 629: 630: #define SECONDARY_RELOAD_CLASS(CLASS,MODE,IN) \ 631: secondary_reload_class (CLASS, MODE, IN) 632: 1.1.1.4 ! root 633: /* This function is used to get the address of an object. */ ! 634: ! 635: extern struct rtx_def *a29k_get_reloaded_address (); ! 636: 1.1 root 637: /* Return the maximum number of consecutive registers 638: needed to represent mode MODE in a register of class CLASS. 639: 640: On 29k, this is the size of MODE in words except that the floating-point 641: accumulators only require one word for anything they can hold. */ 642: 643: #define CLASS_MAX_NREGS(CLASS, MODE) \ 644: (((CLASS) == ACCUM_REGS || (CLASS) == ACCUM0_REGS) ? 1 \ 645: : (GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD) 646: 647: /* Define the cost of moving between registers of various classes. Everything 648: involving a general register is cheap, but moving between the other types 649: (even within a class) is two insns. */ 650: 651: #define REGISTER_MOVE_COST(CLASS1, CLASS2) \ 652: ((CLASS1) == GENERAL_REGS || (CLASS2) == GENERAL_REGS ? 2 : 4) 1.1.1.4 ! root 653: ! 654: /* A C statement (sans semicolon) to update the integer variable COST ! 655: based on the relationship between INSN that is dependent on ! 656: DEP_INSN through the dependence LINK. The default is to make no ! 657: adjustment to COST. On the a29k, ignore the cost of anti- and ! 658: output-dependencies. */ ! 659: #define ADJUST_COST(INSN,LINK,DEP_INSN,COST) \ ! 660: if (REG_NOTE_KIND (LINK) != 0) \ ! 661: (COST) = 0; /* Anti or output dependence. */ 1.1 root 662: 663: /* Stack layout; function entry, exit and calling. */ 664: 665: /* Define this if pushing a word on the stack 666: makes the stack pointer a smaller address. */ 667: #define STACK_GROWS_DOWNWARD 668: 669: /* Define this if the nominal address of the stack frame 670: is at the high-address end of the local variables; 671: that is, each additional local variable allocated 672: goes at a more negative offset in the frame. */ 673: #define FRAME_GROWS_DOWNWARD 674: 675: /* Offset within stack frame to start allocating local variables at. 676: If FRAME_GROWS_DOWNWARD, this is the offset to the END of the 677: first local allocated. Otherwise, it is the offset to the BEGINNING 678: of the first local allocated. */ 679: 680: #define STARTING_FRAME_OFFSET (- current_function_pretend_args_size) 681: 682: /* If we generate an insn to push BYTES bytes, 683: this says how many the stack pointer really advances by. 684: On 29k, don't define this because there are no push insns. */ 685: /* #define PUSH_ROUNDING(BYTES) */ 686: 687: /* Define this if the maximum size of all the outgoing args is to be 688: accumulated and pushed during the prologue. The amount can be 689: found in the variable current_function_outgoing_args_size. */ 690: #define ACCUMULATE_OUTGOING_ARGS 691: 692: /* Offset of first parameter from the argument pointer register value. */ 693: 694: #define FIRST_PARM_OFFSET(FNDECL) (- current_function_pretend_args_size) 695: 696: /* Define this if stack space is still allocated for a parameter passed 697: in a register. */ 698: /* #define REG_PARM_STACK_SPACE */ 699: 700: /* Value is the number of bytes of arguments automatically 701: popped when returning from a subroutine call. 702: FUNTYPE is the data type of the function (as a tree), 703: or for a library call it is an identifier node for the subroutine name. 704: SIZE is the number of bytes of arguments passed on the stack. */ 705: 706: #define RETURN_POPS_ARGS(FUNTYPE,SIZE) 0 707: 708: /* Define how to find the value returned by a function. 709: VALTYPE is the data type of the value (as a tree). 710: If the precise function being called is known, FUNC is its FUNCTION_DECL; 711: otherwise, FUNC is 0. 712: 713: On 29k the value is found in gr96. */ 714: 715: #define FUNCTION_VALUE(VALTYPE, FUNC) \ 716: gen_rtx (REG, TYPE_MODE (VALTYPE), R_GR (96)) 717: 718: /* Define how to find the value returned by a library function 719: assuming the value has mode MODE. */ 720: 721: #define LIBCALL_VALUE(MODE) gen_rtx (REG, MODE, R_GR (96)) 722: 723: /* 1 if N is a possible register number for a function value 724: as seen by the caller. 725: On 29k, gr96-gr111 are used. */ 726: 727: #define FUNCTION_VALUE_REGNO_P(N) ((N) < R_GR (112)) 728: 729: /* 1 if N is a possible register number for function argument passing. 730: On 29k, these are lr2-lr17. */ 731: 732: #define FUNCTION_ARG_REGNO_P(N) ((N) <= R_LR (17) && (N) >= R_LR (2)) 733: 734: /* Define a data type for recording info about an argument list 735: during the scan of that argument list. This data type should 736: hold all necessary information about the function itself 737: and about the args processed so far, enough to enable macros 738: such as FUNCTION_ARG to determine where the next arg should go. 739: 740: On 29k, this is a single integer, which is a number of words 741: of arguments scanned so far. 742: Thus 16 or more means all following args should go on the stack. */ 743: 744: #define CUMULATIVE_ARGS int 745: 746: /* Initialize a variable CUM of type CUMULATIVE_ARGS 747: for a call to a function whose data type is FNTYPE. 748: For a library call, FNTYPE is 0. */ 749: 750: #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME) (CUM) = 0 751: 752: /* Same, but called for incoming args. 753: 754: On the 29k, we use this to set all argument registers to fixed and 755: set the last 16 local regs (lr112-lr127) to available. Some 756: will later be changed to call-saved by FUNCTION_INCOMING_ARG. */ 757: 758: #define INIT_CUMULATIVE_INCOMING_ARGS(CUM,FNTYPE,IGNORE) \ 759: { int i; \ 760: for (i = R_AR (0); i < R_AR (16); i++) \ 761: { \ 762: fixed_regs[i] = call_used_regs[i] = call_fixed_regs[i] = 1; \ 763: SET_HARD_REG_BIT (fixed_reg_set, i); \ 764: SET_HARD_REG_BIT (call_used_reg_set, i); \ 765: SET_HARD_REG_BIT (call_fixed_reg_set, i); \ 766: } \ 767: for (i = R_LR (112); i < R_LR (128); i++) \ 768: { \ 769: fixed_regs[i] = call_used_regs[i] = call_fixed_regs[i] = 0; \ 770: CLEAR_HARD_REG_BIT (fixed_reg_set, i); \ 771: CLEAR_HARD_REG_BIT (call_used_reg_set, i); \ 772: CLEAR_HARD_REG_BIT (call_fixed_reg_set, i); \ 773: } \ 774: (CUM) = 0; \ 775: } 776: 777: /* Define intermediate macro to compute the size (in registers) of an argument 778: for the 29k. */ 779: 780: #define A29K_ARG_SIZE(MODE, TYPE, NAMED) \ 781: (! (NAMED) ? 0 \ 782: : (MODE) != BLKmode \ 783: ? (GET_MODE_SIZE (MODE) + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD \ 784: : (int_size_in_bytes (TYPE) + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD) 785: 786: /* Update the data in CUM to advance over an argument 787: of mode MODE and data type TYPE. 788: (TYPE is null for libcalls where that information may not be available.) */ 789: 790: #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \ 791: if (MUST_PASS_IN_STACK (MODE, TYPE)) \ 792: (CUM) = 16; \ 793: else \ 794: (CUM) += A29K_ARG_SIZE (MODE, TYPE, NAMED) 795: 796: /* Determine where to put an argument to a function. 797: Value is zero to push the argument on the stack, 798: or a hard register in which to store the argument. 799: 800: MODE is the argument's machine mode. 801: TYPE is the data type of the argument (as a tree). 802: This is null for libcalls where that information may 803: not be available. 804: CUM is a variable of type CUMULATIVE_ARGS which gives info about 805: the preceding args and about the function being called. 806: NAMED is nonzero if this argument is a named parameter 807: (otherwise it is an extra parameter matching an ellipsis). 808: 809: On 29k the first 16 words of args are normally in registers 810: and the rest are pushed. */ 811: 812: #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \ 813: ((CUM) < 16 && (NAMED) && ! MUST_PASS_IN_STACK (MODE, TYPE) \ 814: ? gen_rtx(REG, (MODE), R_LR (2) + (CUM)) : 0) 815: 816: /* Define where a function finds its arguments. 817: This is different from FUNCTION_ARG because of register windows. 818: 819: On the 29k, we hack this to call a function that sets the used registers 820: as non-fixed and not used by calls. */ 821: 822: #define FUNCTION_INCOMING_ARG(CUM, MODE, TYPE, NAMED) \ 823: ((CUM) < 16 && (NAMED) && ! MUST_PASS_IN_STACK (MODE, TYPE) \ 824: ? gen_rtx (REG, MODE, \ 825: incoming_reg (CUM, A29K_ARG_SIZE (MODE, TYPE, NAMED))) \ 826: : 0) 827: 828: /* This indicates that an argument is to be passed with an invisible reference 829: (i.e., a pointer to the object is passed). 830: 831: On the 29k, we do this if it must be passed on the stack. */ 832: 833: #define FUNCTION_ARG_PASS_BY_REFERENCE(CUM, MODE, TYPE, NAMED) \ 834: (MUST_PASS_IN_STACK (MODE, TYPE)) 835: 836: /* Specify the padding direction of arguments. 837: 838: On the 29k, we must pad upwards in order to be able to pass args in 839: registers. */ 840: 841: #define FUNCTION_ARG_PADDING(MODE, TYPE) upward 842: 843: /* For an arg passed partly in registers and partly in memory, 844: this is the number of registers used. 845: For args passed entirely in registers or entirely in memory, zero. */ 846: 847: #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) \ 848: ((CUM) < 16 && 16 < (CUM) + A29K_ARG_SIZE (MODE, TYPE, NAMED) && (NAMED) \ 849: ? 16 - (CUM) : 0) 850: 851: /* Perform any needed actions needed for a function that is receiving a 852: variable number of arguments. 853: 854: CUM is as above. 855: 856: MODE and TYPE are the mode and type of the current parameter. 857: 858: PRETEND_SIZE is a variable that should be set to the amount of stack 859: that must be pushed by the prolog to pretend that our caller pushed 860: it. 861: 862: Normally, this macro will push all remaining incoming registers on the 863: stack and set PRETEND_SIZE to the length of the registers pushed. */ 864: 865: #define SETUP_INCOMING_VARARGS(CUM,MODE,TYPE,PRETEND_SIZE,NO_RTL) \ 866: { if ((CUM) < 16) \ 867: { \ 868: int first_reg_offset = (CUM); \ 869: \ 870: if (MUST_PASS_IN_STACK (MODE, TYPE)) \ 871: first_reg_offset += A29K_ARG_SIZE (TYPE_MODE (TYPE), TYPE, 1); \ 872: \ 873: if (first_reg_offset > 16) \ 874: first_reg_offset = 16; \ 875: \ 876: if (! (NO_RTL) && first_reg_offset != 16) \ 877: move_block_from_reg \ 878: (R_AR (0) + first_reg_offset, \ 879: gen_rtx (MEM, BLKmode, virtual_incoming_args_rtx), \ 880: 16 - first_reg_offset); \ 881: PRETEND_SIZE = (16 - first_reg_offset) * UNITS_PER_WORD; \ 882: } \ 883: } 884: 885: /* Define the information needed to generate branch and scc insns. This is 886: stored from the compare operation. Note that we can't use "rtx" here 887: since it hasn't been defined! */ 888: 889: extern struct rtx_def *a29k_compare_op0, *a29k_compare_op1; 890: extern int a29k_compare_fp_p; 891: 892: /* This macro produces the initial definition of a function name. 893: 894: For the 29k, we need the prolog to contain one or two words prior to 895: the declaration of the function name. So just store away the name and 896: write it as part of the prolog. */ 897: 898: extern char *a29k_function_name; 899: 900: #define ASM_DECLARE_FUNCTION_NAME(FILE,NAME,DECL) \ 901: a29k_function_name = NAME; 902: 903: /* This macro generates the assembly code for function entry. 904: FILE is a stdio stream to output the code to. 905: SIZE is an int: how many units of temporary storage to allocate. 906: Refer to the array `regs_ever_live' to determine which registers 907: to save; `regs_ever_live[I]' is nonzero if register number I 908: is ever used in the function. This macro is responsible for 909: knowing which registers should not be saved even if used. */ 910: 911: #define FUNCTION_PROLOGUE(FILE, SIZE) output_prolog (FILE, SIZE) 912: 913: /* Output assembler code to FILE to increment profiler label # LABELNO 914: for profiling a function entry. */ 915: 916: #define FUNCTION_PROFILER(FILE, LABELNO) 917: 918: /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function, 919: the stack pointer does not matter. The value is tested only in 920: functions that have frame pointers. 921: No definition is equivalent to always zero. */ 922: 923: #define EXIT_IGNORE_STACK 1 924: 925: /* This macro generates the assembly code for function exit, 926: on machines that need it. If FUNCTION_EPILOGUE is not defined 927: then individual return instructions are generated for each 928: return statement. Args are same as for FUNCTION_PROLOGUE. 929: 930: The function epilogue should not depend on the current stack pointer! 931: It should use the frame pointer only. This is mandatory because 932: of alloca; we also take advantage of it to omit stack adjustments 933: before returning. */ 934: 935: #define FUNCTION_EPILOGUE(FILE, SIZE) output_epilog (FILE, SIZE) 936: 937: /* Define the number of delay slots needed for the function epilogue. 938: 939: On the 29k, we need a slot except when we have a register stack adjustment, 940: have a memory stack adjustment, and have no frame pointer. */ 941: 942: #define DELAY_SLOTS_FOR_EPILOGUE \ 943: (! (needs_regstack_p () \ 944: && (get_frame_size () + current_function_pretend_args_size \ 945: + current_function_outgoing_args_size) != 0 \ 946: && ! frame_pointer_needed)) 947: 948: /* Define whether INSN can be placed in delay slot N for the epilogue. 949: 950: On the 29k, we must be able to place it in a delay slot, it must 951: not use sp if the frame pointer cannot be eliminated, and it cannot 952: use local regs if we need to push the register stack. */ 953: 954: #define ELIGIBLE_FOR_EPILOGUE_DELAY(INSN,N) \ 955: (get_attr_in_delay_slot (INSN) == IN_DELAY_SLOT_YES \ 956: && ! (frame_pointer_needed \ 957: && reg_mentioned_p (stack_pointer_rtx, PATTERN (INSN))) \ 958: && ! (needs_regstack_p () && uses_local_reg_p (PATTERN (INSN)))) 959: 960: /* Output assembler code for a block containing the constant parts 961: of a trampoline, leaving space for the variable parts. 962: 963: The trampoline should set the static chain pointer to value placed 964: into the trampoline and should branch to the specified routine. We 965: use gr121 (tav) as a temporary. */ 966: 967: #define TRAMPOLINE_TEMPLATE(FILE) \ 968: { \ 969: fprintf (FILE, "\tconst %s,0\n", reg_names[R_TAV]); \ 970: fprintf (FILE, "\tconsth %s,0\n", reg_names[R_TAV]); \ 971: fprintf (FILE, "\tconst %s,0\n", reg_names[R_SLP]); \ 972: fprintf (FILE, "\tjmpi %s\n", reg_names[R_TAV]); \ 973: fprintf (FILE, "\tconsth %s,0\n", reg_names[R_SLP]); \ 974: } 975: 976: /* Length in units of the trampoline for entering a nested function. */ 977: 978: #define TRAMPOLINE_SIZE 20 979: 980: /* Emit RTL insns to initialize the variable parts of a trampoline. 981: FNADDR is an RTX for the address of the function's pure code. 982: CXT is an RTX for the static chain value for the function. 983: 984: We do this on the 29k by writing the bytes of the addresses into the 985: trampoline one byte at a time. */ 986: 987: #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \ 988: { \ 989: INITIALIZE_TRAMPOLINE_VALUE (TRAMP, FNADDR, 0, 4); \ 990: INITIALIZE_TRAMPOLINE_VALUE (TRAMP, CXT, 8, 16); \ 991: } 992: 993: /* Define a sub-macro to initialize one value into the trampoline. 994: We specify the offsets of the CONST and CONSTH instructions, respectively 995: and copy the value a byte at a time into these instructions. */ 996: 997: #define INITIALIZE_TRAMPOLINE_VALUE(TRAMP, VALUE, CONST, CONSTH) \ 998: { \ 999: rtx _addr, _temp; \ 1000: rtx _val = force_reg (SImode, VALUE); \ 1001: \ 1002: _addr = memory_address (QImode, plus_constant (TRAMP, (CONST) + 3)); \ 1003: emit_move_insn (gen_rtx (MEM, QImode, _addr), \ 1004: gen_lowpart (QImode, _val)); \ 1005: \ 1006: _temp = expand_shift (RSHIFT_EXPR, SImode, _val, \ 1007: build_int_2 (8, 0), 0, 1); \ 1008: _addr = memory_address (QImode, plus_constant (TRAMP, (CONST) + 1)); \ 1009: emit_move_insn (gen_rtx (MEM, QImode, _addr), \ 1010: gen_lowpart (QImode, _temp)); \ 1011: \ 1012: _temp = expand_shift (RSHIFT_EXPR, SImode, _temp, \ 1013: build_int_2 (8, 0), _temp, 1); \ 1014: _addr = memory_address (QImode, plus_constant (TRAMP, (CONSTH) + 3)); \ 1015: emit_move_insn (gen_rtx (MEM, QImode, _addr), \ 1016: gen_lowpart (QImode, _temp)); \ 1017: \ 1018: _temp = expand_shift (RSHIFT_EXPR, SImode, _temp, \ 1019: build_int_2 (8, 0), _temp, 1); \ 1020: _addr = memory_address (QImode, plus_constant (TRAMP, (CONSTH) + 1)); \ 1021: emit_move_insn (gen_rtx (MEM, QImode, _addr), \ 1022: gen_lowpart (QImode, _temp)); \ 1023: } 1024: 1025: /* Addressing modes, and classification of registers for them. */ 1026: 1027: /* #define HAVE_POST_INCREMENT */ 1028: /* #define HAVE_POST_DECREMENT */ 1029: 1030: /* #define HAVE_PRE_DECREMENT */ 1031: /* #define HAVE_PRE_INCREMENT */ 1032: 1033: /* Macros to check register numbers against specific register classes. */ 1034: 1035: /* These assume that REGNO is a hard or pseudo reg number. 1036: They give nonzero only if REGNO is a hard reg of the suitable class 1037: or a pseudo reg currently allocated to a suitable hard reg. 1038: Since they use reg_renumber, they are safe only once reg_renumber 1039: has been allocated, which happens in local-alloc.c. */ 1040: 1041: #define REGNO_OK_FOR_INDEX_P(REGNO) 0 1042: #define REGNO_OK_FOR_BASE_P(REGNO) 1 1043: 1044: /* Given the value returned from get_frame_size, compute the actual size 1045: of the frame we will allocate. We include the pretend and outgoing 1046: arg sizes and round to a doubleword. */ 1047: 1048: #define ACTUAL_FRAME_SIZE(SIZE) \ 1049: (((SIZE) + current_function_pretend_args_size \ 1050: + current_function_outgoing_args_size + 7) & ~7) 1051: 1052: /* Define the initial offset between the frame and stack pointer. */ 1053: 1054: #define INITIAL_FRAME_POINTER_OFFSET(DEPTH) \ 1055: (DEPTH) = ACTUAL_FRAME_SIZE (get_frame_size ()) 1056: 1057: /* Maximum number of registers that can appear in a valid memory address. */ 1058: #define MAX_REGS_PER_ADDRESS 1 1059: 1060: /* Recognize any constant value that is a valid address. 1061: 1062: None are on the 29K. */ 1063: #define CONSTANT_ADDRESS_P(X) 0 1064: 1065: /* Include all constant integers and constant doubles */ 1066: #define LEGITIMATE_CONSTANT_P(X) 1 1067: 1068: /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx 1069: and check its validity for a certain class. 1070: We have two alternate definitions for each of them. 1071: The usual definition accepts all pseudo regs; the other rejects 1072: them unless they have been allocated suitable hard regs. 1073: The symbol REG_OK_STRICT causes the latter definition to be used. 1074: 1075: Most source files want to accept pseudo regs in the hope that 1076: they will get allocated to the class that the insn wants them to be in. 1077: Source files for reload pass need to be strict. 1078: After reload, it makes no difference, since pseudo regs have 1079: been eliminated by then. */ 1080: 1081: #ifndef REG_OK_STRICT 1082: 1083: /* Nonzero if X is a hard reg that can be used as an index 1084: or if it is a pseudo reg. */ 1085: #define REG_OK_FOR_INDEX_P(X) 0 1086: /* Nonzero if X is a hard reg that can be used as a base reg 1087: or if it is a pseudo reg. */ 1088: #define REG_OK_FOR_BASE_P(X) 1 1089: 1090: #else 1091: 1092: /* Nonzero if X is a hard reg that can be used as an index. */ 1093: #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X)) 1094: /* Nonzero if X is a hard reg that can be used as a base reg. */ 1095: #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X)) 1096: 1097: #endif 1098: 1099: /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression 1100: that is a valid memory address for an instruction. 1101: The MODE argument is the machine mode for the MEM expression 1102: that wants to use this address. 1103: 1104: On the 29k, a legitimate address is a register and so is a 1105: constant of less than 256. */ 1106: 1107: #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \ 1108: { if (REG_P (X) && REG_OK_FOR_BASE_P (X)) \ 1109: goto ADDR; \ 1110: if (GET_CODE (X) == CONST_INT \ 1111: && (unsigned) INTVAL (X) < 0x100) \ 1112: goto ADDR; \ 1113: } 1114: 1115: /* Try machine-dependent ways of modifying an illegitimate address 1116: to be legitimate. If we find one, return the new, valid address. 1117: This macro is used in only one place: `memory_address' in explow.c. 1118: 1119: OLDX is the address as it was before break_out_memory_refs was called. 1120: In some cases it is useful to look at this to decide what needs to be done. 1121: 1122: MODE and WIN are passed so that this macro can use 1123: GO_IF_LEGITIMATE_ADDRESS. 1124: 1125: It is always safe for this macro to do nothing. It exists to recognize 1126: opportunities to optimize the output. 1127: 1128: For the 29k, we need not do anything. However, if we don't, 1129: `memory_address' will try lots of things to get a valid address, most of 1130: which will result in dead code and extra pseudos. So we make the address 1131: valid here. 1132: 1133: This is easy: The only valid addresses are an offset from a register 1134: and we know the address isn't valid. So just call either `force_operand' 1135: or `force_reg' unless this is a (plus (reg ...) (const_int 0)). */ 1136: 1137: #define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) \ 1138: { if (GET_CODE (X) == PLUS && XEXP (X, 1) == const0_rtx) \ 1139: X = XEXP (x, 0); \ 1140: if (GET_CODE (X) == MULT || GET_CODE (X) == PLUS) \ 1141: X = force_operand (X, 0); \ 1142: else \ 1143: X = force_reg (Pmode, X); \ 1144: goto WIN; \ 1145: } 1146: 1147: /* Go to LABEL if ADDR (a legitimate address expression) 1148: has an effect that depends on the machine mode it is used for. 1149: On the 29k this is never true. */ 1150: 1151: #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) 1152: 1153: /* Compute the cost of an address. For the 29k, all valid addresses are 1154: the same cost. */ 1155: 1156: #define ADDRESS_COST(X) 0 1157: 1158: /* Define this if some processing needs to be done immediately before 1159: emitting code for an insn. */ 1160: 1161: /* #define FINAL_PRESCAN_INSN(INSN,OPERANDS,NOPERANDS) */ 1162: 1163: /* Specify the machine mode that this machine uses 1164: for the index in the tablejump instruction. */ 1165: #define CASE_VECTOR_MODE SImode 1166: 1167: /* Define this if the tablejump instruction expects the table 1168: to contain offsets from the address of the table. 1169: Do not define this if the table should contain absolute addresses. */ 1170: /* #define CASE_VECTOR_PC_RELATIVE */ 1171: 1172: /* Specify the tree operation to be used to convert reals to integers. */ 1173: #define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR 1174: 1175: /* This is the kind of divide that is easiest to do in the general case. */ 1176: #define EASY_DIV_EXPR TRUNC_DIV_EXPR 1177: 1178: /* Define this as 1 if `char' should by default be signed; else as 0. */ 1179: #define DEFAULT_SIGNED_CHAR 0 1180: 1181: /* This flag, if defined, says the same insns that convert to a signed fixnum 1182: also convert validly to an unsigned one. 1183: 1184: We actually lie a bit here as overflow conditions are different. But 1185: they aren't being checked anyway. */ 1186: 1187: #define FIXUNS_TRUNC_LIKE_FIX_TRUNC 1188: 1189: /* Max number of bytes we can move to of from memory 1190: in one reasonably fast instruction. 1191: 1192: For the 29k, we will define movti, so put this at 4 words. */ 1193: #define MOVE_MAX 16 1194: 1195: /* Largest number of bytes of an object that can be placed in a register. 1196: On the 29k we have plenty of registers, so use TImode. */ 1197: #define MAX_FIXED_MODE_SIZE GET_MODE_BITSIZE (TImode) 1198: 1199: /* Nonzero if access to memory by bytes is no faster than for words. 1200: Also non-zero if doing byte operations (specifically shifts) in registers 1201: is undesirable. 1202: 1203: On the 29k, large masks are expensive, so we want to use bytes to 1204: manipulate fields. */ 1205: #define SLOW_BYTE_ACCESS 0 1206: 1207: /* Define if normal loads of shorter-than-word items from memory clears 1208: the rest of the bigs in the register. */ 1209: #define BYTE_LOADS_ZERO_EXTEND 1210: 1211: /* This uses COFF, so it wants SDB format. */ 1212: #define SDB_DEBUGGING_INFO 1213: 1214: /* Define this to be the delimiter between SDB sub-sections. The default 1215: is ";". */ 1216: #define SDB_DELIM "\n" 1217: 1218: /* Do not break .stabs pseudos into continuations. */ 1219: #define DBX_CONTIN_LENGTH 0 1220: 1221: /* Don't try to use the `x' type-cross-reference character in DBX data. 1222: Also has the consequence of putting each struct, union or enum 1223: into a separate .stabs, containing only cross-refs to the others. */ 1224: #define DBX_NO_XREFS 1225: 1226: /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits 1227: is done just by pretending it is already truncated. */ 1228: #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1 1229: 1230: /* We assume that the store-condition-codes instructions store 0 for false 1231: and some other value for true. This is the value stored for true. */ 1232: 1233: #define STORE_FLAG_VALUE 0x80000000 1234: 1235: /* Specify the machine mode that pointers have. 1236: After generation of rtl, the compiler makes no further distinction 1237: between pointers and any other objects of this machine mode. */ 1238: #define Pmode SImode 1239: 1240: /* Mode of a function address in a call instruction (for indexing purposes). 1241: 1242: Doesn't matter on 29k. */ 1243: #define FUNCTION_MODE SImode 1244: 1245: /* Define this if addresses of constant functions 1246: shouldn't be put through pseudo regs where they can be cse'd. 1247: Desirable on machines where ordinary constants are expensive 1248: but a CALL with constant address is cheap. */ 1249: #define NO_FUNCTION_CSE 1250: 1251: /* Define this if shift instructions ignore all but the low-order 1252: few bits. */ 1253: #define SHIFT_COUNT_TRUNCATED 1254: 1255: /* Compute the cost of computing a constant rtl expression RTX 1256: whose rtx-code is CODE. The body of this macro is a portion 1257: of a switch statement. If the code is computed here, 1258: return it with a return statement. Otherwise, break from the switch. 1259: 1260: We only care about the cost if it is valid in an insn. The only 1261: constants that cause an insn to generate more than one machine 1262: instruction are those involving floating-point or address. So 1263: only these need be expensive. */ 1264: 1.1.1.3 root 1265: #define CONST_COSTS(RTX,CODE,OUTER_CODE) \ 1.1 root 1266: case CONST_INT: \ 1267: return 0; \ 1268: case CONST: \ 1269: case LABEL_REF: \ 1270: case SYMBOL_REF: \ 1271: return 6; \ 1272: case CONST_DOUBLE: \ 1273: return GET_MODE (RTX) == SFmode ? 6 : 8; 1274: 1275: /* Provide the costs of a rtl expression. This is in the body of a 1276: switch on CODE. 1277: 1278: All MEMs cost the same if they are valid. This is used to ensure 1279: that (mem (symbol_ref ...)) is placed into a CALL when valid. 1280: 1281: The multiply cost depends on whether this is a 29050 or not. */ 1282: 1.1.1.3 root 1283: #define RTX_COSTS(X,CODE,OUTER_CODE) \ 1.1 root 1284: case MULT: \ 1285: return TARGET_29050 ? COSTS_N_INSNS (2) : COSTS_N_INSNS (40); \ 1286: case DIV: \ 1287: case UDIV: \ 1288: case MOD: \ 1289: case UMOD: \ 1290: return COSTS_N_INSNS (50); \ 1291: case MEM: \ 1292: return COSTS_N_INSNS (2); 1293: 1294: /* Control the assembler format that we output. */ 1295: 1296: /* Output at beginning of assembler file. */ 1297: 1298: #define ASM_FILE_START(FILE) \ 1299: { char *p, *after_dir = main_input_filename; \ 1300: if (TARGET_29050) \ 1301: fprintf (FILE, "\t.cputype 29050\n"); \ 1302: for (p = main_input_filename; *p; p++) \ 1303: if (*p == '/') \ 1304: after_dir = p + 1; \ 1305: fprintf (FILE, "\t.file \"%s\"\n", after_dir); \ 1306: fprintf (FILE, "\t.sect .lit,lit\n"); } 1307: 1308: /* Output to assembler file text saying following lines 1309: may contain character constants, extra white space, comments, etc. */ 1310: 1311: #define ASM_APP_ON "" 1312: 1313: /* Output to assembler file text saying following lines 1314: no longer contain unusual constructs. */ 1315: 1316: #define ASM_APP_OFF "" 1317: 1.1.1.3 root 1318: /* The next few macros don't have tabs on most machines, but 1319: at least one 29K assembler wants them. */ 1320: 1.1 root 1321: /* Output before instructions. */ 1322: 1.1.1.3 root 1323: #define TEXT_SECTION_ASM_OP "\t.text" 1.1 root 1324: 1325: /* Output before read-only data. */ 1326: 1.1.1.3 root 1327: #define READONLY_DATA_SECTION_ASM_OP "\t.use .lit" 1.1 root 1328: 1329: /* Output before writable data. */ 1330: 1.1.1.3 root 1331: #define DATA_SECTION_ASM_OP "\t.data" 1.1 root 1332: 1333: /* Define an extra section for read-only data, a routine to enter it, and 1334: indicate that it is for read-only data. */ 1335: 1336: #define EXTRA_SECTIONS readonly_data 1337: 1338: #define EXTRA_SECTION_FUNCTIONS \ 1339: void \ 1340: literal_section () \ 1341: { \ 1342: if (in_section != readonly_data) \ 1343: { \ 1344: fprintf (asm_out_file, "%s\n", READONLY_DATA_SECTION_ASM_OP); \ 1345: in_section = readonly_data; \ 1346: } \ 1347: } \ 1348: 1349: #define READONLY_DATA_SECTION literal_section 1350: 1351: /* How to refer to registers in assembler output. 1352: This sequence is indexed by compiler's hard-register-number (see above). */ 1353: 1354: #define REGISTER_NAMES \ 1355: {"gr96", "gr97", "gr98", "gr99", "gr100", "gr101", "gr102", "gr103", "gr104", \ 1356: "gr105", "gr106", "gr107", "gr108", "gr109", "gr110", "gr111", "gr112", \ 1357: "gr113", "gr114", "gr115", "gr116", "gr117", "gr118", "gr119", "gr120", \ 1358: "gr121", "gr122", "gr123", "gr124", "gr125", "gr126", "gr127", \ 1359: "lr0", "lr1", "lr2", "lr3", "lr4", "lr5", "lr6", "lr7", "lr8", "lr9", \ 1360: "lr10", "lr11", "lr12", "lr13", "lr14", "lr15", "lr16", "lr17", "lr18", \ 1361: "lr19", "lr20", "lr21", "lr22", "lr23", "lr24", "lr25", "lr26", "lr27", \ 1362: "lr28", "lr29", "lr30", "lr31", "lr32", "lr33", "lr34", "lr35", "lr36", \ 1363: "lr37", "lr38", "lr39", "lr40", "lr41", "lr42", "lr43", "lr44", "lr45", \ 1364: "lr46", "lr47", "lr48", "lr49", "lr50", "lr51", "lr52", "lr53", "lr54", \ 1365: "lr55", "lr56", "lr57", "lr58", "lr59", "lr60", "lr61", "lr62", "lr63", \ 1366: "lr64", "lr65", "lr66", "lr67", "lr68", "lr69", "lr70", "lr71", "lr72", \ 1367: "lr73", "lr74", "lr75", "lr76", "lr77", "lr78", "lr79", "lr80", "lr81", \ 1368: "lr82", "lr83", "lr84", "lr85", "lr86", "lr87", "lr88", "lr89", "lr90", \ 1369: "lr91", "lr92", "lr93", "lr94", "lr95", "lr96", "lr97", "lr98", "lr99", \ 1370: "lr100", "lr101", "lr102", "lr103", "lr104", "lr105", "lr106", "lr107", \ 1371: "lr108", "lr109", "lr110", "lr111", "lr112", "lr113", "lr114", "lr115", \ 1372: "lr116", "lr117", "lr118", "lr119", "lr120", "lr121", "lr122", "lr123", \ 1373: "lr124", "lr125", "lr126", "lr127", \ 1374: "AI0", "AI1", "AI2", "AI3", "AI4", "AI5", "AI6", "AI7", "AI8", "AI9", \ 1375: "AI10", "AI11", "AI12", "AI13", "AI14", "AI15", "FP", \ 1376: "bp", "fc", "cr", "q", \ 1377: "vab", "ops", "cps", "cfg", "cha", "chd", "chc", "rbp", "tmc", "tmr", \ 1378: "pc0", "pc1", "pc2", "mmu", "lru", "fpe", "int", "fps", "exo", \ 1379: "0", "1", "2", "3" } 1380: 1381: /* How to renumber registers for dbx and gdb. */ 1382: 1383: extern int a29k_debug_reg_map[]; 1384: #define DBX_REGISTER_NUMBER(REGNO) a29k_debug_reg_map[REGNO] 1385: 1386: /* This is how to output the definition of a user-level label named NAME, 1387: such as the label on a static function or variable NAME. */ 1388: 1389: #define ASM_OUTPUT_LABEL(FILE,NAME) \ 1390: do { assemble_name (FILE, NAME); fputs (":\n", FILE); } while (0) 1391: 1392: /* This is how to output a command to make the user-level label named NAME 1393: defined for reference from other files. */ 1394: 1395: #define ASM_GLOBALIZE_LABEL(FILE,NAME) \ 1396: do { fputs ("\t.global ", FILE); assemble_name (FILE, NAME); fputs ("\n", FILE);} while (0) 1397: 1398: /* This is how to output a reference to a user-level label named NAME. 1399: `assemble_name' uses this. */ 1400: 1401: #define ASM_OUTPUT_LABELREF(FILE,NAME) \ 1402: fprintf (FILE, "_%s", NAME) 1403: 1404: /* This is how to output an internal numbered label where 1405: PREFIX is the class of label and NUM is the number within the class. */ 1406: 1407: #define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \ 1408: fprintf (FILE, "%s%d:\n", PREFIX, NUM) 1409: 1410: /* This is how to output a label for a jump table. Arguments are the same as 1411: for ASM_OUTPUT_INTERNAL_LABEL, except the insn for the jump table is 1412: passed. */ 1413: 1414: #define ASM_OUTPUT_CASE_LABEL(FILE,PREFIX,NUM,TABLEINSN) \ 1415: { ASM_OUTPUT_ALIGN (FILE, 2); ASM_OUTPUT_INTERNAL_LABEL (FILE, PREFIX, NUM); } 1416: 1417: /* This is how to store into the string LABEL 1418: the symbol_ref name of an internal numbered label where 1419: PREFIX is the class of label and NUM is the number within the class. 1420: This is suitable for output with `assemble_name'. */ 1421: 1422: #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \ 1423: sprintf (LABEL, "*%s%d", PREFIX, NUM) 1424: 1425: /* This is how to output an assembler line defining a `double' constant. */ 1426: 1427: #define ASM_OUTPUT_DOUBLE(FILE,VALUE) \ 1428: fprintf (FILE, "\t.double %.20e\n", (VALUE)) 1429: 1430: /* This is how to output an assembler line defining a `float' constant. */ 1431: 1432: #define ASM_OUTPUT_FLOAT(FILE,VALUE) \ 1433: fprintf (FILE, "\t.float %.20e\n", (VALUE)) 1434: 1435: /* This is how to output an assembler line defining an `int' constant. */ 1436: 1437: #define ASM_OUTPUT_INT(FILE,VALUE) \ 1438: ( fprintf (FILE, "\t.word "), \ 1439: output_addr_const (FILE, (VALUE)), \ 1440: fprintf (FILE, "\n")) 1441: 1442: /* Likewise for `char' and `short' constants. */ 1443: 1444: #define ASM_OUTPUT_SHORT(FILE,VALUE) \ 1445: ( fprintf (FILE, "\t.hword "), \ 1446: output_addr_const (FILE, (VALUE)), \ 1447: fprintf (FILE, "\n")) 1448: 1449: #define ASM_OUTPUT_CHAR(FILE,VALUE) \ 1450: ( fprintf (FILE, "\t.byte "), \ 1451: output_addr_const (FILE, (VALUE)), \ 1452: fprintf (FILE, "\n")) 1453: 1454: /* This is how to output an insn to push a register on the stack. 1455: It need not be very fast code. */ 1456: 1457: #define ASM_OUTPUT_REG_PUSH(FILE,REGNO) \ 1458: fprintf (FILE, "\tsub %s,%s,4\n\tstore 0,0,%s,%s\n", \ 1459: reg_names[R_MSP], reg_names[R_MSP], reg_names[REGNO], \ 1460: reg_names[R_MSP]); 1461: 1462: /* This is how to output an insn to pop a register from the stack. 1463: It need not be very fast code. */ 1464: 1465: #define ASM_OUTPUT_REG_POP(FILE,REGNO) \ 1466: fprintf (FILE, "\tload 0,0,%s,%s\n\tadd %s,%s,4\n", \ 1467: reg_names[REGNO], reg_names[R_MSP], reg_names[R_MSP], \ 1468: reg_names[R_MSP]); 1469: 1470: /* This is how to output an assembler line for a numeric constant byte. */ 1471: 1472: #define ASM_OUTPUT_BYTE(FILE,VALUE) \ 1473: fprintf (FILE, "\t.byte 0x%x\n", (VALUE)) 1474: 1475: /* This is how to output an element of a case-vector that is absolute. */ 1476: 1477: #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \ 1478: fprintf (FILE, "\t.word L%d\n", VALUE) 1479: 1480: /* This is how to output an element of a case-vector that is relative. 1481: (29k does not use such vectors, 1482: but we must define this macro anyway.) */ 1483: 1484: #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, VALUE, REL) abort () 1485: 1486: /* This is how to output an assembler line 1487: that says to advance the location counter 1488: to a multiple of 2**LOG bytes. */ 1489: 1490: #define ASM_OUTPUT_ALIGN(FILE,LOG) \ 1491: if ((LOG) != 0) \ 1492: fprintf (FILE, "\t.align %d\n", 1 << (LOG)) 1493: 1494: #define ASM_OUTPUT_SKIP(FILE,SIZE) \ 1495: fprintf (FILE, "\t.block %d\n", (SIZE)) 1496: 1497: /* This says how to output an assembler line 1498: to define a global common symbol. */ 1499: 1500: #define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \ 1501: ( fputs ("\t.comm ", (FILE)), \ 1502: assemble_name ((FILE), (NAME)), \ 1503: fprintf ((FILE), ",%d\n", (SIZE))) 1504: 1505: /* This says how to output an assembler line 1506: to define a local common symbol. */ 1507: 1508: #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE,ROUNDED) \ 1509: ( fputs ("\t.lcomm ", (FILE)), \ 1510: assemble_name ((FILE), (NAME)), \ 1511: fprintf ((FILE), ",%d\n", (SIZE))) 1512: 1513: /* Store in OUTPUT a string (made with alloca) containing 1514: an assembler-name for a local static variable named NAME. 1515: LABELNO is an integer which is different for each call. */ 1516: 1517: #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \ 1518: ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \ 1519: sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO))) 1520: 1521: /* Define the parentheses used to group arithmetic operations 1522: in assembler code. */ 1523: 1524: #define ASM_OPEN_PAREN "(" 1525: #define ASM_CLOSE_PAREN ")" 1526: 1527: /* Define results of standard character escape sequences. */ 1528: #define TARGET_BELL 007 1529: #define TARGET_BS 010 1530: #define TARGET_TAB 011 1531: #define TARGET_NEWLINE 012 1532: #define TARGET_VT 013 1533: #define TARGET_FF 014 1534: #define TARGET_CR 015 1535: 1536: /* Print operand X (an rtx) in assembler syntax to file FILE. 1537: CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified. 1538: For `%' followed by punctuation, CODE is the punctuation and X is null. */ 1539: 1540: #define PRINT_OPERAND(FILE, X, CODE) print_operand (FILE, X, CODE) 1541: 1542: /* Determine which codes are valid without a following integer. These must 1543: not be alphabetic. 1544: 1545: We support `#' which is null if a delay slot exists, otherwise 1546: "\n\tnop" and `*' which prints the register name for TPC (gr122). */ 1547: 1548: #define PRINT_OPERAND_PUNCT_VALID_P(CODE) ((CODE) == '#' || (CODE) == '*') 1549: 1550: /* Print a memory address as an operand to reference that memory location. */ 1551: 1552: #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \ 1553: { register rtx addr = ADDR; \ 1554: if (!REG_P (addr) \ 1555: && ! (GET_CODE (addr) == CONST_INT \ 1556: && INTVAL (addr) >= 0 && INTVAL (addr) < 256)) \ 1557: abort (); \ 1558: output_operand (addr, 0); \ 1559: } 1560: /* Define the codes that are matched by predicates in a29k.c. */ 1561: 1562: #define PREDICATE_CODES \ 1563: {"cint_8_operand", {CONST_INT}}, \ 1564: {"cint_16_operand", {CONST_INT}}, \ 1565: {"long_const_operand", {CONST_INT, CONST, CONST_DOUBLE, \ 1566: LABEL_REF, SYMBOL_REF}}, \ 1567: {"shift_constant_operand", {CONST_INT, ASHIFT}}, \ 1568: {"const_0__operand", {CONST_INT, ASHIFT}}, \ 1569: {"const_8__operand", {CONST_INT, ASHIFT}}, \ 1570: {"const_16__operand", {CONST_INT, ASHIFT}}, \ 1571: {"const_24__operand", {CONST_INT, ASHIFT}}, \ 1572: {"float_const_operand", {CONST_DOUBLE}}, \ 1.1.1.3 root 1573: {"gpc_reg_operand", {SUBREG, REG}}, \ 1574: {"gpc_reg_or_float_constant_operand", {SUBREG, REG, CONST_DOUBLE}}, \ 1575: {"gpc_reg_or_integer_constant_operand", {SUBREG, REG, \ 1.1 root 1576: CONST_INT, CONST_DOUBLE}}, \ 1577: {"spec_reg_operand", {REG}}, \ 1578: {"accum_reg_operand", {REG}}, \ 1579: {"srcb_operand", {SUBREG, REG, CONST_INT}}, \ 1580: {"reg_or_immediate_operand", {SUBREG, REG, CONST_INT, CONST, \ 1581: CONST_DOUBLE, CONST, SYMBOL_REF, LABEL_REF}}, \ 1582: {"reg_or_u_short_operand", {SUBREG, REG, CONST_INT}}, \ 1583: {"and_operand", {SUBREG, REG, CONST_INT}}, \ 1584: {"add_operand", {SUBREG, REG, CONST_INT}}, \ 1.1.1.4 ! root 1585: {"call_operand", {SYMBOL_REF, CONST_INT}}, \ 1.1 root 1586: {"in_operand", {SUBREG, MEM, REG, CONST_INT, CONST, SYMBOL_REF, \ 1587: LABEL_REF, CONST_DOUBLE}}, \ 1588: {"out_operand", {SUBREG, REG, MEM}}, \ 1.1.1.4 ! root 1589: {"reload_memory_operand", {SUBREG, REG, MEM}}, \ 1.1 root 1590: {"fp_comparison_operator", {EQ, GT, GE}}, \ 1591: {"branch_operator", {GE, LT}}, \ 1592: {"epilogue_operand", {CODE_LABEL}},
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