--- gcc/config/a29k/a29k.c 2018/04/24 18:15:31 1.1.1.2 +++ gcc/config/a29k/a29k.c 2018/04/24 18:21:48 1.1.1.3 @@ -1,5 +1,5 @@ /* Subroutines used for code generation on AMD Am29000. - Copyright (C) 1987, 88, 90, 91, 92, 1993 Free Software Foundation, Inc. + Copyright (C) 1987, 88, 90, 91, 92, 93, 1994 Free Software Foundation, Inc. Contributed by Richard Kenner (kenner@nyu.edu) This file is part of GNU CC. @@ -233,7 +233,7 @@ accum_reg_operand (op, mode) enum machine_mode mode; { return (GET_CODE (op) == REG - && REGNO (op) >= R_ACC (0) && REGNO (op) <= R_ACC (3)); + && REGNO (op) >= R_ACU (0) && REGNO (op) <= R_ACU (3)); } /* Returns 1 if OP is a normal data register. */ @@ -282,6 +282,22 @@ srcb_operand (op, mode) return gpc_reg_operand (op, mode); } +int +cmplsrcb_operand (op, mode) + register rtx op; + enum machine_mode mode; +{ + if (GET_CODE (op) == CONST_INT + && (mode == QImode + || (INTVAL (op) & 0xffffff00) == 0xffffff00)) + return 1; + + if (GET_MODE (op) != mode && mode != VOIDmode) + return 0; + + return gpc_reg_operand (op, mode); +} + /* Return 1 if OP is either an immediate or a general register. This is used for the input operand of mtsr/mtrsim. */ @@ -802,6 +818,33 @@ incoming_reg (start, count) return R_AR (start); } +/* Add CLOBBERs to CALL_INSN_FUNCTION_USAGE chain of INSN indicating + that LR2 up to, but not including, OP are clobbered. If OP is + zero, indicate all parameter registers are clobbered. */ + +void +a29k_clobbers_to (insn, op) + rtx insn; + rtx op; +{ + int i; + int high_regno; + + if (op == 0) + high_regno = R_LR (18); + else if (GET_CODE (op) != REG || REGNO (op) < R_LR (0) + || REGNO (op) > R_LR (18)) + abort (); + else + high_regno = REGNO (op); + + for (i = R_LR (2); i < high_regno; i++) + CALL_INSN_FUNCTION_USAGE (insn) + = gen_rtx (EXPR_LIST, VOIDmode, + gen_rtx (CLOBBER, VOIDmode, gen_rtx (REG, SImode, i)), + CALL_INSN_FUNCTION_USAGE (insn)); +} + /* These routines are used in finding insns to fill delay slots in the epilogue. */