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1.1 root 1: /* Definitions of target machine for GNU compiler, for AMD Am29000 CPU. 1.1.1.3 ! root 2: Copyright (C) 1988, 90, 91, 92, 93, 1994 Free Software Foundation, Inc. 1.1 root 3: Contributed by Richard Kenner ([email protected]) 4: 5: This file is part of GNU CC. 6: 7: GNU CC is free software; you can redistribute it and/or modify 8: it under the terms of the GNU General Public License as published by 9: the Free Software Foundation; either version 2, or (at your option) 10: any later version. 11: 12: GNU CC is distributed in the hope that it will be useful, 13: but WITHOUT ANY WARRANTY; without even the implied warranty of 14: MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15: GNU General Public License for more details. 16: 17: You should have received a copy of the GNU General Public License 18: along with GNU CC; see the file COPYING. If not, write to 19: the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */ 20: 21: 22: /* Names to predefine in the preprocessor for this target machine. */ 23: 1.1.1.2 root 24: #define CPP_PREDEFINES "-D_AM29K -D_AM29000 -D_EPI -Acpu(a29k) -Amachine(a29k)" 1.1 root 25: 26: /* Print subsidiary information on the compiler version in use. */ 27: #define TARGET_VERSION 28: 29: /* Pass -w to assembler. */ 30: #define ASM_SPEC "-w" 31: 32: /* Run-time compilation parameters selecting different hardware subsets. */ 33: 34: extern int target_flags; 35: 36: /* Macro to define tables used to set the flags. 37: This is a list in braces of pairs in braces, 38: each pair being { "NAME", VALUE } 39: where VALUE is the bits to set or minus the bits to clear. 40: An empty string NAME is used to identify the default VALUE. */ 41: 42: /* This means that the DW bit will be enabled, to allow direct loads 43: of bytes. */ 44: 45: #define TARGET_DW_ENABLE (target_flags & 1) 46: 47: /* This means that the external hardware does supports byte writes. */ 48: 49: #define TARGET_BYTE_WRITES (target_flags & 2) 50: 51: /* This means that a "small memory model" has been selected where all 52: function addresses are known to be within 256K. This allows CALL to be 53: used. */ 54: 55: #define TARGET_SMALL_MEMORY (target_flags & 4) 56: 1.1.1.2 root 57: /* This means that we must always used on indirect call, even when 58: calling a function in the same file, since the file might be > 256KB. */ 59: 60: #define TARGET_LARGE_MEMORY (target_flags & 8) 61: 1.1 root 62: /* This means that we are compiling for a 29050. */ 63: 1.1.1.2 root 64: #define TARGET_29050 (target_flags & 16) 1.1 root 65: 66: /* This means that we are compiling for the kernel which means that we use 67: gr64-gr95 instead of gr96-126. */ 68: 1.1.1.2 root 69: #define TARGET_KERNEL_REGISTERS (target_flags & 32) 1.1 root 70: 71: /* This means that a call to "__msp_check" should be inserted after each stack 72: adjustment to check for stack overflow. */ 73: 1.1.1.2 root 74: #define TARGET_STACK_CHECK (target_flags & 64) 1.1 root 75: 76: /* This handles 29k processors which cannot handle the separation 77: of a mtsrim insns and a storem insn (most 29000 chips to date, but 78: not the 29050. */ 79: 1.1.1.2 root 80: #define TARGET_NO_STOREM_BUG (target_flags & 128) 1.1 root 81: 82: /* This forces the compiler not to use incoming argument registers except 83: for copying out arguments. It helps detect problems when a function is 84: called with fewer arguments than it is declared with. */ 85: 1.1.1.2 root 86: #define TARGET_NO_REUSE_ARGS (target_flags & 256) 1.1 root 87: 1.1.1.3 ! root 88: /* This means that neither builtin nor emulated float operations are ! 89: available, and that GCC should generate libcalls instead. */ ! 90: ! 91: #define TARGET_SOFT_FLOAT (target_flags & 512) ! 92: 1.1 root 93: #define TARGET_SWITCHES \ 94: { {"dw", 1}, \ 95: {"ndw", -1}, \ 96: {"bw", 2}, \ 97: {"nbw", - (1|2)}, \ 98: {"small", 4}, \ 1.1.1.2 root 99: {"normal", - (4|8)}, \ 100: {"large", 8}, \ 101: {"29050", 16+128}, \ 102: {"29000", -16}, \ 103: {"kernel-registers", 32}, \ 104: {"user-registers", -32}, \ 105: {"stack-check", 64}, \ 106: {"no-stack-check", - 74}, \ 107: {"storem-bug", -128}, \ 108: {"no-storem-bug", 128}, \ 109: {"reuse-arg-regs", -256}, \ 110: {"no-reuse-arg-regs", 256}, \ 1.1.1.3 ! root 111: {"soft-float", 512}, \ 1.1 root 112: {"", TARGET_DEFAULT}} 113: 114: #define TARGET_DEFAULT 3 115: 1.1.1.3 ! root 116: /* Show we can debug even without a frame pointer. */ ! 117: #define CAN_DEBUG_WITHOUT_FP 1.1 root 118: 119: /* target machine storage layout */ 120: 121: /* Define the types for size_t, ptrdiff_t, and wchar_t. These are the 122: same as those used by EPI. The type for wchar_t does not make much 123: sense, but is what is used. */ 124: 125: #define SIZE_TYPE "unsigned int" 126: #define PTRDIFF_TYPE "int" 127: #define WCHAR_TYPE "char" 128: #define WCHAR_TYPE_SIZE BITS_PER_UNIT 129: 130: /* Define this macro if it is advisable to hold scalars in registers 131: in a wider mode than that declared by the program. In such cases, 132: the value is constrained to be within the bounds of the declared 133: type, but kept valid in the wider mode. The signedness of the 134: extension may differ from that of the type. */ 135: 136: #define PROMOTE_MODE(MODE,UNSIGNEDP,TYPE) \ 137: if (GET_MODE_CLASS (MODE) == MODE_INT \ 138: && GET_MODE_SIZE (MODE) < 4) \ 139: (MODE) = SImode; 140: 141: /* Define this if most significant bit is lowest numbered 142: in instructions that operate on numbered bit-fields. 143: This is arbitrary on the 29k since it has no actual bit-field insns. 144: It is better to define this as TRUE because BYTES_BIG_ENDIAN is TRUE 145: and we want to be able to convert BP position to bit position with 146: just a shift. */ 147: #define BITS_BIG_ENDIAN 1 148: 149: /* Define this if most significant byte of a word is the lowest numbered. 150: This is true on 29k. */ 151: #define BYTES_BIG_ENDIAN 1 152: 153: /* Define this if most significant word of a multiword number is lowest 154: numbered. 155: 156: For 29k we can decide arbitrarily since there are no machine instructions 157: for them. Might as well be consistent with bytes. */ 158: #define WORDS_BIG_ENDIAN 1 159: 160: /* number of bits in an addressable storage unit */ 161: #define BITS_PER_UNIT 8 162: 163: /* Width in bits of a "word", which is the contents of a machine register. 164: Note that this is not necessarily the width of data type `int'; 165: if using 16-bit ints on a 68000, this would still be 32. 166: But on a machine with 16-bit registers, this would be 16. */ 167: #define BITS_PER_WORD 32 168: 169: /* Width of a word, in units (bytes). */ 170: #define UNITS_PER_WORD 4 171: 172: /* Width in bits of a pointer. 173: See also the macro `Pmode' defined below. */ 174: #define POINTER_SIZE 32 175: 176: /* Allocation boundary (in *bits*) for storing arguments in argument list. */ 177: #define PARM_BOUNDARY 32 178: 179: /* Boundary (in *bits*) on which stack pointer should be aligned. */ 180: #define STACK_BOUNDARY 64 181: 182: /* Allocation boundary (in *bits*) for the code of a function. */ 183: #define FUNCTION_BOUNDARY 32 184: 185: /* Alignment of field after `int : 0' in a structure. */ 186: #define EMPTY_FIELD_BOUNDARY 32 187: 188: /* Every structure's size must be a multiple of this. */ 189: #define STRUCTURE_SIZE_BOUNDARY 8 190: 191: /* A bitfield declared as `int' forces `int' alignment for the struct. */ 192: #define PCC_BITFIELD_TYPE_MATTERS 1 193: 194: /* No data type wants to be aligned rounder than this. */ 195: #define BIGGEST_ALIGNMENT 32 196: 197: /* Make strings word-aligned so strcpy from constants will be faster. */ 198: #define CONSTANT_ALIGNMENT(EXP, ALIGN) \ 199: (TREE_CODE (EXP) == STRING_CST \ 200: && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN)) 201: 202: /* Make arrays of chars word-aligned for the same reasons. */ 203: #define DATA_ALIGNMENT(TYPE, ALIGN) \ 204: (TREE_CODE (TYPE) == ARRAY_TYPE \ 205: && TYPE_MODE (TREE_TYPE (TYPE)) == QImode \ 206: && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN)) 207: 208: /* Set this non-zero if move instructions will actually fail to work 209: when given unaligned data. */ 210: #define STRICT_ALIGNMENT 0 211: 212: /* Set this non-zero if unaligned move instructions are extremely slow. 213: 214: On the 29k, they trap. */ 215: #define SLOW_UNALIGNED_ACCESS 1 216: 217: /* Standard register usage. */ 218: 219: /* Number of actual hardware registers. 220: The hardware registers are assigned numbers for the compiler 221: from 0 to just below FIRST_PSEUDO_REGISTER. 222: All registers that the compiler knows about must be given numbers, 223: even those that are not normally considered general registers. 224: 225: 29k has 256 registers, of which 62 are not defined. gr0 and gr1 are 226: not produced in generated RTL so we can start at gr96, and call it 227: register zero. 228: 229: So 0-31 are gr96-gr127, lr0-lr127 are 32-159. To represent the input 230: arguments, whose register numbers we won't know until we are done, 231: use register 160-175. They cannot be modified. Similarly, 176 is used 232: for the frame pointer. It is assigned the last local register number 233: once the number of registers used is known. 234: 235: We use 177, 178, 179, and 180 for the special registers BP, FC, CR, and Q, 236: respectively. Registers 181 through 199 are used for the other special 237: registers that may be used by the programmer, but are never used by the 238: compiler. 239: 240: Registers 200-203 are the four floating-point accumulator register in 241: the 29050. 242: 1.1.1.2 root 243: Registers 204-235 are the 32 global registers for kernel mode when 244: -mkernel-registers is not specified, and the 32 global user registers 245: when it is. 246: 1.1 root 247: When -mkernel-registers is specified, we still use the same register 248: map but change the names so 0-31 print as gr64-gr95. */ 249: 1.1.1.2 root 250: #define FIRST_PSEUDO_REGISTER 236 1.1 root 251: 252: /* Because of the large number of registers on the 29k, we define macros 253: to refer to each group of registers and then define the number for some 254: registers used in the calling sequence. */ 255: 256: #define R_GR(N) ((N) - 96) /* gr96 is register number 0 */ 257: #define R_LR(N) ((N) + 32) /* lr0 is register number 32 */ 258: #define R_FP 176 /* frame pointer is register 176 */ 259: #define R_AR(N) ((N) + 160) /* first incoming arg reg is 160 */ 1.1.1.2 root 260: #define R_KR(N) ((N) + 204) /* kernel registers (gr64 to gr95) */ 1.1 root 261: 262: /* Define the numbers of the special registers. */ 263: #define R_BP 177 264: #define R_FC 178 265: #define R_CR 179 266: #define R_Q 180 267: 268: /* These special registers are not used by the compiler, but may be referenced 269: by the programmer via asm declarations. */ 270: 271: #define R_VAB 181 272: #define R_OPS 182 273: #define R_CPS 183 274: #define R_CFG 184 275: #define R_CHA 185 276: #define R_CHD 186 277: #define R_CHC 187 278: #define R_RBP 188 279: #define R_TMC 189 280: #define R_TMR 190 281: #define R_PC0 191 282: #define R_PC1 192 283: #define R_PC2 193 284: #define R_MMU 194 285: #define R_LRU 195 286: #define R_FPE 196 287: #define R_INT 197 288: #define R_FPS 198 289: #define R_EXO 199 290: 291: /* Define the number for floating-point accumulator N. */ 1.1.1.3 ! root 292: #define R_ACU(N) ((N) + 200) 1.1 root 293: 294: /* Now define the registers used in the calling sequence. */ 295: #define R_TAV R_GR (121) 296: #define R_TPC R_GR (122) 297: #define R_LRP R_GR (123) 298: #define R_SLP R_GR (124) 299: #define R_MSP R_GR (125) 300: #define R_RAB R_GR (126) 301: #define R_RFB R_GR (127) 302: 303: /* 1 for registers that have pervasive standard uses 304: and are not available for the register allocator. */ 305: 306: #define FIXED_REGISTERS \ 307: {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ 308: 1, 1, 1, 1, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, \ 309: 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ 310: 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ 311: 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ 312: 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ 313: 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ 314: 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ 315: 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ 316: 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ 317: 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \ 318: 1, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \ 319: 1, 1, 1, 1, 1, 1, 1, 1, \ 1.1.1.2 root 320: 0, 0, 0, 0, \ 321: 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \ 322: 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 } 1.1 root 323: 324: /* 1 for registers not available across function calls. 325: These must include the FIXED_REGISTERS and also any 326: registers that can be used without being saved. 327: The latter must include the registers where values are returned 328: and the register where structure-value addresses are passed. 329: Aside from that, you can include as many other registers as you like. */ 330: #define CALL_USED_REGISTERS \ 331: {1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \ 332: 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \ 333: 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ 334: 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ 335: 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ 336: 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ 337: 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ 338: 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ 339: 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ 340: 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ 341: 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \ 342: 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \ 343: 1, 1, 1, 1, 1, 1, 1, 1, \ 1.1.1.2 root 344: 1, 1, 1, 1, \ 345: 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \ 346: 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 } 1.1 root 347: 348: /* List the order in which to allocate registers. Each register must be 349: listed once, even those in FIXED_REGISTERS. 350: 351: We allocate in the following order: 352: gr116-gr120 (not used for anything but temps) 353: gr96-gr111 (function return values, reverse order) 354: argument registers (160-175) 355: lr0-lr127 (locals, saved) 356: acc3-0 (acc0 special) 357: everything else */ 358: 359: #define REG_ALLOC_ORDER \ 360: {R_GR (116), R_GR (117), R_GR (118), R_GR (119), R_GR (120), \ 361: R_GR (111), R_GR (110), R_GR (109), R_GR (108), R_GR (107), \ 362: R_GR (106), R_GR (105), R_GR (104), R_GR (103), R_GR (102), \ 363: R_GR (101), R_GR (100), R_GR (99), R_GR (98), R_GR (97), R_GR (96), \ 364: R_AR (0), R_AR (1), R_AR (2), R_AR (3), R_AR (4), R_AR (5), \ 365: R_AR (6), R_AR (7), R_AR (8), R_AR (9), R_AR (10), R_AR (11), \ 366: R_AR (12), R_AR (13), R_AR (14), R_AR (15), \ 367: R_LR (0), R_LR (1), R_LR (2), R_LR (3), R_LR (4), R_LR (5), \ 368: R_LR (6), R_LR (7), R_LR (8), R_LR (9), R_LR (10), R_LR (11), \ 369: R_LR (12), R_LR (13), R_LR (14), R_LR (15), R_LR (16), R_LR (17), \ 370: R_LR (18), R_LR (19), R_LR (20), R_LR (21), R_LR (22), R_LR (23), \ 371: R_LR (24), R_LR (25), R_LR (26), R_LR (27), R_LR (28), R_LR (29), \ 372: R_LR (30), R_LR (31), R_LR (32), R_LR (33), R_LR (34), R_LR (35), \ 373: R_LR (36), R_LR (37), R_LR (38), R_LR (39), R_LR (40), R_LR (41), \ 374: R_LR (42), R_LR (43), R_LR (44), R_LR (45), R_LR (46), R_LR (47), \ 375: R_LR (48), R_LR (49), R_LR (50), R_LR (51), R_LR (52), R_LR (53), \ 376: R_LR (54), R_LR (55), R_LR (56), R_LR (57), R_LR (58), R_LR (59), \ 377: R_LR (60), R_LR (61), R_LR (62), R_LR (63), R_LR (64), R_LR (65), \ 378: R_LR (66), R_LR (67), R_LR (68), R_LR (69), R_LR (70), R_LR (71), \ 379: R_LR (72), R_LR (73), R_LR (74), R_LR (75), R_LR (76), R_LR (77), \ 380: R_LR (78), R_LR (79), R_LR (80), R_LR (81), R_LR (82), R_LR (83), \ 381: R_LR (84), R_LR (85), R_LR (86), R_LR (87), R_LR (88), R_LR (89), \ 382: R_LR (90), R_LR (91), R_LR (92), R_LR (93), R_LR (94), R_LR (95), \ 383: R_LR (96), R_LR (97), R_LR (98), R_LR (99), R_LR (100), R_LR (101), \ 384: R_LR (102), R_LR (103), R_LR (104), R_LR (105), R_LR (106), \ 385: R_LR (107), R_LR (108), R_LR (109), R_LR (110), R_LR (111), \ 386: R_LR (112), R_LR (113), R_LR (114), R_LR (115), R_LR (116), \ 387: R_LR (117), R_LR (118), R_LR (119), R_LR (120), R_LR (121), \ 388: R_LR (122), R_LR (123), R_LR (124), R_LR (124), R_LR (126), \ 389: R_LR (127), \ 1.1.1.3 ! root 390: R_ACU (3), R_ACU (2), R_ACU (1), R_ACU (0), \ 1.1 root 391: R_GR (112), R_GR (113), R_GR (114), R_GR (115), R_GR (121), \ 392: R_GR (122), R_GR (123), R_GR (124), R_GR (125), R_GR (126), \ 393: R_GR (127), \ 394: R_FP, R_BP, R_FC, R_CR, R_Q, \ 395: R_VAB, R_OPS, R_CPS, R_CFG, R_CHA, R_CHD, R_CHC, R_RBP, R_TMC, \ 396: R_TMR, R_PC0, R_PC1, R_PC2, R_MMU, R_LRU, R_FPE, R_INT, R_FPS, \ 1.1.1.2 root 397: R_EXO, \ 398: R_KR (0), R_KR (1), R_KR (2), R_KR (3), R_KR (4), R_KR (5), \ 399: R_KR (6), R_KR (7), R_KR (8), R_KR (9), R_KR (10), R_KR (11), \ 400: R_KR (12), R_KR (13), R_KR (14), R_KR (15), R_KR (16), R_KR (17), \ 401: R_KR (18), R_KR (19), R_KR (20), R_KR (21), R_KR (22), R_KR (23), \ 402: R_KR (24), R_KR (25), R_KR (26), R_KR (27), R_KR (28), R_KR (29), \ 403: R_KR (30), R_KR (31) } 1.1 root 404: 405: /* Return number of consecutive hard regs needed starting at reg REGNO 406: to hold something of mode MODE. 407: This is ordinarily the length in words of a value of mode MODE 408: but can be less for certain modes in special long registers. */ 409: 410: #define HARD_REGNO_NREGS(REGNO, MODE) \ 1.1.1.3 ! root 411: ((REGNO) >= R_ACU (0) && (REGNO) <= R_ACU (3)? 1 \ 1.1 root 412: : (GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD) 413: 414: /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE. 415: On 29k, the cpu registers can hold any mode. But a double-precision 416: floating-point value should start at an even register. The special 417: registers cannot hold floating-point values, BP, CR, and FC cannot 418: hold integer or floating-point values, and the accumulators cannot 419: hold integer values. 420: 421: DImode and larger values should start at an even register just like 422: DFmode values, even though the instruction set doesn't require it, in order 423: to prevent reload from aborting due to a modes_equiv_for_class_p failure. 424: 425: (I'd like to use the "?:" syntax to make this more readable, but Sun's 426: compiler doesn't seem to accept it.) */ 427: #define HARD_REGNO_MODE_OK(REGNO, MODE) \ 1.1.1.3 ! root 428: (((REGNO) >= R_ACU (0) && (REGNO) <= R_ACU (3) \ 1.1 root 429: && (GET_MODE_CLASS (MODE) == MODE_FLOAT \ 430: || GET_MODE_CLASS (MODE) == MODE_COMPLEX_FLOAT)) \ 431: || ((REGNO) >= R_BP && (REGNO) <= R_CR \ 432: && GET_MODE_CLASS (MODE) == MODE_PARTIAL_INT) \ 1.1.1.3 ! root 433: || ((REGNO) >= R_Q && (REGNO) < R_ACU (0) \ 1.1 root 434: && GET_MODE_CLASS (MODE) != MODE_FLOAT \ 435: && GET_MODE_CLASS (MODE) != MODE_COMPLEX_FLOAT) \ 1.1.1.2 root 436: || (((REGNO) < R_BP || (REGNO) >= R_KR (0)) \ 1.1 root 437: && ((((REGNO) & 1) == 0) \ 438: || GET_MODE_UNIT_SIZE (MODE) <= UNITS_PER_WORD))) 439: 440: /* Value is 1 if it is a good idea to tie two pseudo registers 441: when one has mode MODE1 and one has mode MODE2. 442: If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2, 443: for any hard reg, then this must be 0 for correct output. 444: 445: On the 29k, normally we'd just have problems with DFmode because of the 446: even alignment. However, we also have to be a bit concerned about 447: the special register's restriction to non-floating and the floating-point 448: accumulator's restriction to only floating. This probably won't 449: cause any great inefficiencies in practice. */ 450: 451: #define MODES_TIEABLE_P(MODE1, MODE2) \ 452: ((MODE1) == (MODE2) \ 453: || (GET_MODE_CLASS (MODE1) == MODE_INT \ 454: && GET_MODE_CLASS (MODE2) == MODE_INT)) 455: 456: /* Specify the registers used for certain standard purposes. 457: The values of these macros are register numbers. */ 458: 459: /* 29k pc isn't overloaded on a register that the compiler knows about. */ 460: /* #define PC_REGNUM */ 461: 462: /* Register to use for pushing function arguments. */ 463: #define STACK_POINTER_REGNUM R_GR (125) 464: 465: /* Base register for access to local variables of the function. */ 466: #define FRAME_POINTER_REGNUM R_FP 467: 468: /* Value should be nonzero if functions must have frame pointers. 469: Zero means the frame pointer need not be set up (and parms 470: may be accessed via the stack pointer) in functions that seem suitable. 471: This is computed in `reload', in reload1.c. */ 472: #define FRAME_POINTER_REQUIRED 0 473: 474: /* Base register for access to arguments of the function. */ 475: #define ARG_POINTER_REGNUM R_FP 476: 477: /* Register in which static-chain is passed to a function. */ 478: #define STATIC_CHAIN_REGNUM R_SLP 479: 480: /* Register in which address to store a structure value 481: is passed to a function. */ 482: #define STRUCT_VALUE_REGNUM R_LRP 483: 484: /* Define the classes of registers for register constraints in the 485: machine description. Also define ranges of constants. 486: 487: One of the classes must always be named ALL_REGS and include all hard regs. 488: If there is more than one class, another class must be named NO_REGS 489: and contain no registers. 490: 491: The name GENERAL_REGS must be the name of a class (or an alias for 492: another name such as ALL_REGS). This is the class of registers 493: that is allowed by "g" or "r" in a register constraint. 494: Also, registers outside this class are allocated only when 495: instructions express preferences for them. 496: 497: The classes must be numbered in nondecreasing order; that is, 498: a larger-numbered class must never be contained completely 499: in a smaller-numbered class. 500: 501: For any two classes, it is very desirable that there be another 502: class that represents their union. 503: 504: The 29k has nine registers classes: LR0_REGS, GENERAL_REGS, SPECIAL_REGS, 505: BP_REGS, FC_REGS, CR_REGS, Q_REGS, ACCUM_REGS, and ACCUM0_REGS. 506: LR0_REGS, BP_REGS, FC_REGS, CR_REGS, and Q_REGS contain just the single 507: register. The latter two classes are used to represent the floating-point 508: accumulator registers in the 29050. We also define the union class 509: FLOAT_REGS to represent any register that can be used to hold a 510: floating-point value. The union of SPECIAL_REGS and ACCUM_REGS isn't 511: useful as the former cannot contain floating-point and the latter can only 512: contain floating-point. */ 513: 514: enum reg_class { NO_REGS, LR0_REGS, GENERAL_REGS, BP_REGS, FC_REGS, CR_REGS, 515: Q_REGS, SPECIAL_REGS, ACCUM0_REGS, ACCUM_REGS, FLOAT_REGS, 516: ALL_REGS, LIM_REG_CLASSES }; 517: 518: #define N_REG_CLASSES (int) LIM_REG_CLASSES 519: 520: /* Give names of register classes as strings for dump file. */ 521: 522: #define REG_CLASS_NAMES \ 523: {"NO_REGS", "LR0_REGS", "GENERAL_REGS", "BP_REGS", "FC_REGS", "CR_REGS", \ 524: "Q_REGS", "SPECIAL_REGS", "ACCUM0_REGS", "ACCUM_REGS", "FLOAT_REGS", \ 525: "ALL_REGS" } 526: 527: /* Define which registers fit in which classes. 528: This is an initializer for a vector of HARD_REG_SET 529: of length N_REG_CLASSES. */ 530: 531: #define REG_CLASS_CONTENTS \ 1.1.1.2 root 532: { {0, 0, 0, 0, 0, 0, 0, 0}, \ 533: {0, 1, 0, 0, 0, 0, 0, 0}, \ 1.1.1.3 ! root 534: {~0, ~0, ~0, ~0, ~0, ~ 0xfffe0000, ~ 0xfff, 0xfff}, \ 1.1.1.2 root 535: {0, 0, 0, 0, 0, 0x20000, 0, 0}, \ 536: {0, 0, 0, 0, 0, 0x40000, 0, 0}, \ 537: {0, 0, 0, 0, 0, 0x80000, 0, 0}, \ 538: {0, 0, 0, 0, 0, 0x100000, 0, 0}, \ 539: {0, 0, 0, 0, 0, 0xfffe0000, 0xff, 0}, \ 540: {0, 0, 0, 0, 0, 0, 0x100, 0}, \ 541: {0, 0, 0, 0, 0, 0, 0xf00, 0}, \ 1.1.1.3 ! root 542: {~0, ~0, ~0, ~0, ~0, ~ 0xfffe0000, ~ 0xff, 0xfff}, \ ! 543: {~0, ~0, ~0, ~0, ~0, ~0, ~0, 0xfff} } 1.1 root 544: 545: /* The same information, inverted: 546: Return the class number of the smallest class containing 547: reg number REGNO. This could be a conditional expression 548: or could index an array. */ 549: 550: #define REGNO_REG_CLASS(REGNO) \ 551: ((REGNO) == R_BP ? BP_REGS \ 552: : (REGNO) == R_FC ? FC_REGS \ 553: : (REGNO) == R_CR ? CR_REGS \ 554: : (REGNO) == R_Q ? Q_REGS \ 555: : (REGNO) > R_BP && (REGNO) <= R_EXO ? SPECIAL_REGS \ 1.1.1.3 ! root 556: : (REGNO) == R_ACU (0) ? ACCUM0_REGS \ 1.1.1.2 root 557: : (REGNO) >= R_KR (0) ? GENERAL_REGS \ 1.1.1.3 ! root 558: : (REGNO) > R_ACU (0) ? ACCUM_REGS \ 1.1 root 559: : (REGNO) == R_LR (0) ? LR0_REGS \ 560: : GENERAL_REGS) 561: 562: /* The class value for index registers, and the one for base regs. */ 563: #define INDEX_REG_CLASS NO_REGS 564: #define BASE_REG_CLASS GENERAL_REGS 565: 566: /* Get reg_class from a letter such as appears in the machine description. */ 567: 568: #define REG_CLASS_FROM_LETTER(C) \ 569: ((C) == 'r' ? GENERAL_REGS \ 570: : (C) == 'l' ? LR0_REGS \ 571: : (C) == 'b' ? BP_REGS \ 572: : (C) == 'f' ? FC_REGS \ 573: : (C) == 'c' ? CR_REGS \ 574: : (C) == 'q' ? Q_REGS \ 575: : (C) == 'h' ? SPECIAL_REGS \ 576: : (C) == 'a' ? ACCUM_REGS \ 577: : (C) == 'A' ? ACCUM0_REGS \ 578: : (C) == 'f' ? FLOAT_REGS \ 579: : NO_REGS) 580: 581: /* Define this macro to change register usage conditional on target flags. 582: 583: On the 29k, we use this to change the register names for kernel mapping. */ 584: 1.1.1.2 root 585: #define CONDITIONAL_REGISTER_USAGE \ 586: { \ 587: char *p; \ 588: int i; \ 589: \ 590: if (TARGET_KERNEL_REGISTERS) \ 591: for (i = 0; i < 32; i++) \ 592: { \ 593: p = reg_names[i]; \ 594: reg_names[i] = reg_names[R_KR (i)]; \ 595: reg_names[R_KR (i)] = p; \ 596: } \ 1.1 root 597: } 598: 599: /* The letters I, J, K, L, M, N, O, and P in a register constraint string 600: can be used to stand for particular ranges of immediate operands. 601: This macro defines what the ranges are. 602: C is the letter, and VALUE is a constant value. 603: Return 1 if VALUE is in the range specified by C. 604: 605: For 29k: 606: `I' is used for the range of constants most insns can contain. 607: `J' is for the few 16-bit insns. 608: `K' is a constant whose high-order 24 bits are all one 609: `L' is a HImode constant whose high-order 8 bits are all one 610: `M' is a 32-bit constant whose high-order 16 bits are all one (for CONSTN) 611: `N' is a 32-bit constant whose negative is 8 bits 612: `O' is the 32-bit constant 0x80000000, any constant with low-order 613: 16 bits zero for 29050. 614: `P' is a HImode constant whose negative is 8 bits */ 615: 616: #define CONST_OK_FOR_LETTER_P(VALUE, C) \ 617: ((C) == 'I' ? (unsigned) (VALUE) < 0x100 \ 618: : (C) == 'J' ? (unsigned) (VALUE) < 0x10000 \ 619: : (C) == 'K' ? ((VALUE) & 0xffffff00) == 0xffffff00 \ 620: : (C) == 'L' ? ((VALUE) & 0xff00) == 0xff00 \ 621: : (C) == 'M' ? ((VALUE) & 0xffff0000) == 0xffff0000 \ 622: : (C) == 'N' ? ((VALUE) < 0 && (VALUE) > -256) \ 623: : (C) == 'O' ? ((VALUE) == 0x80000000 \ 624: || (TARGET_29050 && ((VALUE) & 0xffff) == 0)) \ 625: : (C) == 'P' ? (((VALUE) | 0xffff0000) < 0 \ 626: && ((VALUE) | 0xffff0000) > -256) \ 627: : 0) 628: 629: /* Similar, but for floating constants, and defining letters G and H. 630: Here VALUE is the CONST_DOUBLE rtx itself. 631: All floating-point constants are valid on 29k. */ 632: 633: #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) 1 634: 635: /* Given an rtx X being reloaded into a reg required to be 636: in class CLASS, return the class of reg to actually use. 637: In general this is just CLASS; but on some machines 638: in some cases it is preferable to use a more restrictive class. */ 639: 640: #define PREFERRED_RELOAD_CLASS(X,CLASS) CLASS 641: 642: /* Return the register class of a scratch register needed to copy IN into 643: or out of a register in CLASS in MODE. If it can be done directly, 644: NO_REGS is returned. */ 645: 646: #define SECONDARY_RELOAD_CLASS(CLASS,MODE,IN) \ 647: secondary_reload_class (CLASS, MODE, IN) 648: 649: /* This function is used to get the address of an object. */ 650: 651: extern struct rtx_def *a29k_get_reloaded_address (); 652: 653: /* Return the maximum number of consecutive registers 654: needed to represent mode MODE in a register of class CLASS. 655: 656: On 29k, this is the size of MODE in words except that the floating-point 657: accumulators only require one word for anything they can hold. */ 658: 659: #define CLASS_MAX_NREGS(CLASS, MODE) \ 660: (((CLASS) == ACCUM_REGS || (CLASS) == ACCUM0_REGS) ? 1 \ 661: : (GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD) 662: 663: /* Define the cost of moving between registers of various classes. Everything 664: involving a general register is cheap, but moving between the other types 665: (even within a class) is two insns. */ 666: 667: #define REGISTER_MOVE_COST(CLASS1, CLASS2) \ 668: ((CLASS1) == GENERAL_REGS || (CLASS2) == GENERAL_REGS ? 2 : 4) 669: 1.1.1.3 ! root 670: /* A C expressions returning the cost of moving data of MODE from a register to ! 671: or from memory. ! 672: ! 673: It takes extra insns on the 29k to form addresses, so we want to make ! 674: this higher. In addition, we need to keep it more expensive than the ! 675: most expensive register-register copy. */ ! 676: ! 677: #define MEMORY_MOVE_COST(MODE) 6 ! 678: 1.1 root 679: /* A C statement (sans semicolon) to update the integer variable COST 680: based on the relationship between INSN that is dependent on 681: DEP_INSN through the dependence LINK. The default is to make no 682: adjustment to COST. On the a29k, ignore the cost of anti- and 683: output-dependencies. */ 684: #define ADJUST_COST(INSN,LINK,DEP_INSN,COST) \ 685: if (REG_NOTE_KIND (LINK) != 0) \ 686: (COST) = 0; /* Anti or output dependence. */ 687: 688: /* Stack layout; function entry, exit and calling. */ 689: 690: /* Define this if pushing a word on the stack 691: makes the stack pointer a smaller address. */ 692: #define STACK_GROWS_DOWNWARD 693: 694: /* Define this if the nominal address of the stack frame 695: is at the high-address end of the local variables; 696: that is, each additional local variable allocated 697: goes at a more negative offset in the frame. */ 698: #define FRAME_GROWS_DOWNWARD 699: 700: /* Offset within stack frame to start allocating local variables at. 701: If FRAME_GROWS_DOWNWARD, this is the offset to the END of the 702: first local allocated. Otherwise, it is the offset to the BEGINNING 703: of the first local allocated. */ 704: 705: #define STARTING_FRAME_OFFSET (- current_function_pretend_args_size) 706: 707: /* If we generate an insn to push BYTES bytes, 708: this says how many the stack pointer really advances by. 709: On 29k, don't define this because there are no push insns. */ 710: /* #define PUSH_ROUNDING(BYTES) */ 711: 712: /* Define this if the maximum size of all the outgoing args is to be 713: accumulated and pushed during the prologue. The amount can be 714: found in the variable current_function_outgoing_args_size. */ 715: #define ACCUMULATE_OUTGOING_ARGS 716: 717: /* Offset of first parameter from the argument pointer register value. */ 718: 719: #define FIRST_PARM_OFFSET(FNDECL) (- current_function_pretend_args_size) 720: 721: /* Define this if stack space is still allocated for a parameter passed 722: in a register. */ 723: /* #define REG_PARM_STACK_SPACE */ 724: 725: /* Value is the number of bytes of arguments automatically 726: popped when returning from a subroutine call. 727: FUNTYPE is the data type of the function (as a tree), 728: or for a library call it is an identifier node for the subroutine name. 729: SIZE is the number of bytes of arguments passed on the stack. */ 730: 731: #define RETURN_POPS_ARGS(FUNTYPE,SIZE) 0 732: 733: /* Define how to find the value returned by a function. 734: VALTYPE is the data type of the value (as a tree). 735: If the precise function being called is known, FUNC is its FUNCTION_DECL; 736: otherwise, FUNC is 0. 737: 738: On 29k the value is found in gr96. */ 739: 740: #define FUNCTION_VALUE(VALTYPE, FUNC) \ 741: gen_rtx (REG, TYPE_MODE (VALTYPE), R_GR (96)) 742: 743: /* Define how to find the value returned by a library function 744: assuming the value has mode MODE. */ 745: 746: #define LIBCALL_VALUE(MODE) gen_rtx (REG, MODE, R_GR (96)) 747: 748: /* 1 if N is a possible register number for a function value 749: as seen by the caller. 750: On 29k, gr96-gr111 are used. */ 751: 752: #define FUNCTION_VALUE_REGNO_P(N) ((N) == R_GR (96)) 753: 754: /* 1 if N is a possible register number for function argument passing. 755: On 29k, these are lr2-lr17. */ 756: 757: #define FUNCTION_ARG_REGNO_P(N) ((N) <= R_LR (17) && (N) >= R_LR (2)) 758: 759: /* Define a data type for recording info about an argument list 760: during the scan of that argument list. This data type should 761: hold all necessary information about the function itself 762: and about the args processed so far, enough to enable macros 763: such as FUNCTION_ARG to determine where the next arg should go. 764: 765: On 29k, this is a single integer, which is a number of words 766: of arguments scanned so far. 767: Thus 16 or more means all following args should go on the stack. */ 768: 769: #define CUMULATIVE_ARGS int 770: 771: /* Initialize a variable CUM of type CUMULATIVE_ARGS 772: for a call to a function whose data type is FNTYPE. 773: For a library call, FNTYPE is 0. */ 774: 775: #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME) (CUM) = 0 776: 777: /* Same, but called for incoming args. 778: 779: On the 29k, we use this to set all argument registers to fixed and 780: set the last 16 local regs (lr112-lr127) to available. Some 781: will later be changed to call-saved by FUNCTION_INCOMING_ARG. */ 782: 783: #define INIT_CUMULATIVE_INCOMING_ARGS(CUM,FNTYPE,IGNORE) \ 784: { int i; \ 785: for (i = R_AR (0); i < R_AR (16); i++) \ 786: { \ 787: fixed_regs[i] = call_used_regs[i] = call_fixed_regs[i] = 1; \ 788: SET_HARD_REG_BIT (fixed_reg_set, i); \ 789: SET_HARD_REG_BIT (call_used_reg_set, i); \ 790: SET_HARD_REG_BIT (call_fixed_reg_set, i); \ 791: } \ 792: for (i = R_LR (112); i < R_LR (128); i++) \ 793: { \ 794: fixed_regs[i] = call_used_regs[i] = call_fixed_regs[i] = 0; \ 795: CLEAR_HARD_REG_BIT (fixed_reg_set, i); \ 796: CLEAR_HARD_REG_BIT (call_used_reg_set, i); \ 797: CLEAR_HARD_REG_BIT (call_fixed_reg_set, i); \ 798: } \ 799: (CUM) = 0; \ 800: } 801: 802: /* Define intermediate macro to compute the size (in registers) of an argument 803: for the 29k. */ 804: 805: #define A29K_ARG_SIZE(MODE, TYPE, NAMED) \ 806: (! (NAMED) ? 0 \ 807: : (MODE) != BLKmode \ 808: ? (GET_MODE_SIZE (MODE) + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD \ 809: : (int_size_in_bytes (TYPE) + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD) 810: 811: /* Update the data in CUM to advance over an argument 812: of mode MODE and data type TYPE. 813: (TYPE is null for libcalls where that information may not be available.) */ 814: 815: #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \ 816: if (MUST_PASS_IN_STACK (MODE, TYPE)) \ 817: (CUM) = 16; \ 818: else \ 819: (CUM) += A29K_ARG_SIZE (MODE, TYPE, NAMED) 820: 821: /* Determine where to put an argument to a function. 822: Value is zero to push the argument on the stack, 823: or a hard register in which to store the argument. 824: 825: MODE is the argument's machine mode. 826: TYPE is the data type of the argument (as a tree). 827: This is null for libcalls where that information may 828: not be available. 829: CUM is a variable of type CUMULATIVE_ARGS which gives info about 830: the preceding args and about the function being called. 831: NAMED is nonzero if this argument is a named parameter 832: (otherwise it is an extra parameter matching an ellipsis). 833: 834: On 29k the first 16 words of args are normally in registers 835: and the rest are pushed. */ 836: 837: #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \ 838: ((CUM) < 16 && (NAMED) && ! MUST_PASS_IN_STACK (MODE, TYPE) \ 839: ? gen_rtx(REG, (MODE), R_LR (2) + (CUM)) : 0) 840: 841: /* Define where a function finds its arguments. 842: This is different from FUNCTION_ARG because of register windows. 843: 844: On the 29k, we hack this to call a function that sets the used registers 845: as non-fixed and not used by calls. */ 846: 847: #define FUNCTION_INCOMING_ARG(CUM, MODE, TYPE, NAMED) \ 848: ((CUM) < 16 && (NAMED) && ! MUST_PASS_IN_STACK (MODE, TYPE) \ 849: ? gen_rtx (REG, MODE, \ 850: incoming_reg (CUM, A29K_ARG_SIZE (MODE, TYPE, NAMED))) \ 851: : 0) 852: 853: /* This indicates that an argument is to be passed with an invisible reference 854: (i.e., a pointer to the object is passed). 855: 856: On the 29k, we do this if it must be passed on the stack. */ 857: 858: #define FUNCTION_ARG_PASS_BY_REFERENCE(CUM, MODE, TYPE, NAMED) \ 859: (MUST_PASS_IN_STACK (MODE, TYPE)) 860: 861: /* Specify the padding direction of arguments. 862: 863: On the 29k, we must pad upwards in order to be able to pass args in 864: registers. */ 865: 866: #define FUNCTION_ARG_PADDING(MODE, TYPE) upward 867: 868: /* For an arg passed partly in registers and partly in memory, 869: this is the number of registers used. 870: For args passed entirely in registers or entirely in memory, zero. */ 871: 872: #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) \ 873: ((CUM) < 16 && 16 < (CUM) + A29K_ARG_SIZE (MODE, TYPE, NAMED) && (NAMED) \ 874: ? 16 - (CUM) : 0) 875: 876: /* Perform any needed actions needed for a function that is receiving a 877: variable number of arguments. 878: 879: CUM is as above. 880: 881: MODE and TYPE are the mode and type of the current parameter. 882: 883: PRETEND_SIZE is a variable that should be set to the amount of stack 884: that must be pushed by the prolog to pretend that our caller pushed 885: it. 886: 887: Normally, this macro will push all remaining incoming registers on the 888: stack and set PRETEND_SIZE to the length of the registers pushed. */ 889: 890: #define SETUP_INCOMING_VARARGS(CUM,MODE,TYPE,PRETEND_SIZE,NO_RTL) \ 891: { if ((CUM) < 16) \ 892: { \ 893: int first_reg_offset = (CUM); \ 894: \ 895: if (MUST_PASS_IN_STACK (MODE, TYPE)) \ 896: first_reg_offset += A29K_ARG_SIZE (TYPE_MODE (TYPE), TYPE, 1); \ 897: \ 898: if (first_reg_offset > 16) \ 899: first_reg_offset = 16; \ 900: \ 901: if (! (NO_RTL) && first_reg_offset != 16) \ 902: move_block_from_reg \ 903: (R_AR (0) + first_reg_offset, \ 904: gen_rtx (MEM, BLKmode, virtual_incoming_args_rtx), \ 1.1.1.2 root 905: 16 - first_reg_offset, (16 - first_reg_offset) * UNITS_PER_WORD); \ 1.1 root 906: PRETEND_SIZE = (16 - first_reg_offset) * UNITS_PER_WORD; \ 907: } \ 908: } 909: 910: /* Define the information needed to generate branch and scc insns. This is 911: stored from the compare operation. Note that we can't use "rtx" here 912: since it hasn't been defined! */ 913: 914: extern struct rtx_def *a29k_compare_op0, *a29k_compare_op1; 915: extern int a29k_compare_fp_p; 916: 917: /* This macro produces the initial definition of a function name. 918: 919: For the 29k, we need the prolog to contain one or two words prior to 920: the declaration of the function name. So just store away the name and 921: write it as part of the prolog. */ 922: 923: extern char *a29k_function_name; 924: 925: #define ASM_DECLARE_FUNCTION_NAME(FILE,NAME,DECL) \ 926: a29k_function_name = NAME; 927: 928: /* This macro generates the assembly code for function entry. 929: FILE is a stdio stream to output the code to. 930: SIZE is an int: how many units of temporary storage to allocate. 931: Refer to the array `regs_ever_live' to determine which registers 932: to save; `regs_ever_live[I]' is nonzero if register number I 933: is ever used in the function. This macro is responsible for 934: knowing which registers should not be saved even if used. */ 935: 936: #define FUNCTION_PROLOGUE(FILE, SIZE) output_prolog (FILE, SIZE) 937: 938: /* Output assembler code to FILE to increment profiler label # LABELNO 939: for profiling a function entry. */ 940: 941: #define FUNCTION_PROFILER(FILE, LABELNO) 942: 943: /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function, 944: the stack pointer does not matter. The value is tested only in 945: functions that have frame pointers. 946: No definition is equivalent to always zero. */ 947: 948: #define EXIT_IGNORE_STACK 1 949: 950: /* This macro generates the assembly code for function exit, 951: on machines that need it. If FUNCTION_EPILOGUE is not defined 952: then individual return instructions are generated for each 953: return statement. Args are same as for FUNCTION_PROLOGUE. 954: 955: The function epilogue should not depend on the current stack pointer! 956: It should use the frame pointer only. This is mandatory because 957: of alloca; we also take advantage of it to omit stack adjustments 958: before returning. */ 959: 960: #define FUNCTION_EPILOGUE(FILE, SIZE) output_epilog (FILE, SIZE) 961: 962: /* Define the number of delay slots needed for the function epilogue. 963: 964: On the 29k, we need a slot except when we have a register stack adjustment, 965: have a memory stack adjustment, and have no frame pointer. */ 966: 967: #define DELAY_SLOTS_FOR_EPILOGUE \ 968: (! (needs_regstack_p () \ 969: && (get_frame_size () + current_function_pretend_args_size \ 970: + current_function_outgoing_args_size) != 0 \ 971: && ! frame_pointer_needed)) 972: 973: /* Define whether INSN can be placed in delay slot N for the epilogue. 974: 975: On the 29k, we must be able to place it in a delay slot, it must 976: not use sp if the frame pointer cannot be eliminated, and it cannot 977: use local regs if we need to push the register stack. */ 978: 979: #define ELIGIBLE_FOR_EPILOGUE_DELAY(INSN,N) \ 980: (get_attr_in_delay_slot (INSN) == IN_DELAY_SLOT_YES \ 981: && ! (frame_pointer_needed \ 982: && reg_mentioned_p (stack_pointer_rtx, PATTERN (INSN))) \ 983: && ! (needs_regstack_p () && uses_local_reg_p (PATTERN (INSN)))) 984: 985: /* Output assembler code for a block containing the constant parts 986: of a trampoline, leaving space for the variable parts. 987: 988: The trampoline should set the static chain pointer to value placed 989: into the trampoline and should branch to the specified routine. We 990: use gr121 (tav) as a temporary. */ 991: 992: #define TRAMPOLINE_TEMPLATE(FILE) \ 993: { \ 994: fprintf (FILE, "\tconst %s,0\n", reg_names[R_TAV]); \ 995: fprintf (FILE, "\tconsth %s,0\n", reg_names[R_TAV]); \ 996: fprintf (FILE, "\tconst %s,0\n", reg_names[R_SLP]); \ 997: fprintf (FILE, "\tjmpi %s\n", reg_names[R_TAV]); \ 998: fprintf (FILE, "\tconsth %s,0\n", reg_names[R_SLP]); \ 999: } 1000: 1001: /* Length in units of the trampoline for entering a nested function. */ 1002: 1003: #define TRAMPOLINE_SIZE 20 1004: 1005: /* Emit RTL insns to initialize the variable parts of a trampoline. 1006: FNADDR is an RTX for the address of the function's pure code. 1007: CXT is an RTX for the static chain value for the function. 1008: 1009: We do this on the 29k by writing the bytes of the addresses into the 1010: trampoline one byte at a time. */ 1011: 1012: #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \ 1013: { \ 1014: INITIALIZE_TRAMPOLINE_VALUE (TRAMP, FNADDR, 0, 4); \ 1015: INITIALIZE_TRAMPOLINE_VALUE (TRAMP, CXT, 8, 16); \ 1016: } 1017: 1018: /* Define a sub-macro to initialize one value into the trampoline. 1019: We specify the offsets of the CONST and CONSTH instructions, respectively 1020: and copy the value a byte at a time into these instructions. */ 1021: 1022: #define INITIALIZE_TRAMPOLINE_VALUE(TRAMP, VALUE, CONST, CONSTH) \ 1023: { \ 1024: rtx _addr, _temp; \ 1025: rtx _val = force_reg (SImode, VALUE); \ 1026: \ 1027: _addr = memory_address (QImode, plus_constant (TRAMP, (CONST) + 3)); \ 1028: emit_move_insn (gen_rtx (MEM, QImode, _addr), \ 1029: gen_lowpart (QImode, _val)); \ 1030: \ 1031: _temp = expand_shift (RSHIFT_EXPR, SImode, _val, \ 1032: build_int_2 (8, 0), 0, 1); \ 1033: _addr = memory_address (QImode, plus_constant (TRAMP, (CONST) + 1)); \ 1034: emit_move_insn (gen_rtx (MEM, QImode, _addr), \ 1035: gen_lowpart (QImode, _temp)); \ 1036: \ 1037: _temp = expand_shift (RSHIFT_EXPR, SImode, _temp, \ 1038: build_int_2 (8, 0), _temp, 1); \ 1039: _addr = memory_address (QImode, plus_constant (TRAMP, (CONSTH) + 3)); \ 1040: emit_move_insn (gen_rtx (MEM, QImode, _addr), \ 1041: gen_lowpart (QImode, _temp)); \ 1042: \ 1043: _temp = expand_shift (RSHIFT_EXPR, SImode, _temp, \ 1044: build_int_2 (8, 0), _temp, 1); \ 1045: _addr = memory_address (QImode, plus_constant (TRAMP, (CONSTH) + 1)); \ 1046: emit_move_insn (gen_rtx (MEM, QImode, _addr), \ 1047: gen_lowpart (QImode, _temp)); \ 1048: } 1049: 1050: /* Addressing modes, and classification of registers for them. */ 1051: 1052: /* #define HAVE_POST_INCREMENT */ 1053: /* #define HAVE_POST_DECREMENT */ 1054: 1055: /* #define HAVE_PRE_DECREMENT */ 1056: /* #define HAVE_PRE_INCREMENT */ 1057: 1058: /* Macros to check register numbers against specific register classes. */ 1059: 1060: /* These assume that REGNO is a hard or pseudo reg number. 1061: They give nonzero only if REGNO is a hard reg of the suitable class 1062: or a pseudo reg currently allocated to a suitable hard reg. 1063: Since they use reg_renumber, they are safe only once reg_renumber 1064: has been allocated, which happens in local-alloc.c. */ 1065: 1066: #define REGNO_OK_FOR_INDEX_P(REGNO) 0 1067: #define REGNO_OK_FOR_BASE_P(REGNO) 1 1068: 1069: /* Given the value returned from get_frame_size, compute the actual size 1070: of the frame we will allocate. We include the pretend and outgoing 1071: arg sizes and round to a doubleword. */ 1072: 1073: #define ACTUAL_FRAME_SIZE(SIZE) \ 1074: (((SIZE) + current_function_pretend_args_size \ 1075: + current_function_outgoing_args_size + 7) & ~7) 1076: 1077: /* Define the initial offset between the frame and stack pointer. */ 1078: 1079: #define INITIAL_FRAME_POINTER_OFFSET(DEPTH) \ 1080: (DEPTH) = ACTUAL_FRAME_SIZE (get_frame_size ()) 1081: 1082: /* Maximum number of registers that can appear in a valid memory address. */ 1083: #define MAX_REGS_PER_ADDRESS 1 1084: 1085: /* Recognize any constant value that is a valid address. 1086: 1087: None are on the 29K. */ 1088: #define CONSTANT_ADDRESS_P(X) 0 1089: 1090: /* Include all constant integers and constant doubles */ 1091: #define LEGITIMATE_CONSTANT_P(X) 1 1092: 1093: /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx 1094: and check its validity for a certain class. 1095: We have two alternate definitions for each of them. 1096: The usual definition accepts all pseudo regs; the other rejects 1097: them unless they have been allocated suitable hard regs. 1098: The symbol REG_OK_STRICT causes the latter definition to be used. 1099: 1100: Most source files want to accept pseudo regs in the hope that 1101: they will get allocated to the class that the insn wants them to be in. 1102: Source files for reload pass need to be strict. 1103: After reload, it makes no difference, since pseudo regs have 1104: been eliminated by then. */ 1105: 1106: #ifndef REG_OK_STRICT 1107: 1108: /* Nonzero if X is a hard reg that can be used as an index 1109: or if it is a pseudo reg. */ 1110: #define REG_OK_FOR_INDEX_P(X) 0 1111: /* Nonzero if X is a hard reg that can be used as a base reg 1112: or if it is a pseudo reg. */ 1113: #define REG_OK_FOR_BASE_P(X) 1 1114: 1115: #else 1116: 1117: /* Nonzero if X is a hard reg that can be used as an index. */ 1118: #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X)) 1119: /* Nonzero if X is a hard reg that can be used as a base reg. */ 1120: #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X)) 1121: 1122: #endif 1123: 1124: /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression 1125: that is a valid memory address for an instruction. 1126: The MODE argument is the machine mode for the MEM expression 1127: that wants to use this address. 1128: 1129: On the 29k, a legitimate address is a register and so is a 1130: constant of less than 256. */ 1131: 1132: #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \ 1133: { if (REG_P (X) && REG_OK_FOR_BASE_P (X)) \ 1134: goto ADDR; \ 1135: if (GET_CODE (X) == CONST_INT \ 1136: && (unsigned) INTVAL (X) < 0x100) \ 1137: goto ADDR; \ 1138: } 1139: 1140: /* Try machine-dependent ways of modifying an illegitimate address 1141: to be legitimate. If we find one, return the new, valid address. 1142: This macro is used in only one place: `memory_address' in explow.c. 1143: 1144: OLDX is the address as it was before break_out_memory_refs was called. 1145: In some cases it is useful to look at this to decide what needs to be done. 1146: 1147: MODE and WIN are passed so that this macro can use 1148: GO_IF_LEGITIMATE_ADDRESS. 1149: 1150: It is always safe for this macro to do nothing. It exists to recognize 1151: opportunities to optimize the output. 1152: 1153: For the 29k, we need not do anything. However, if we don't, 1154: `memory_address' will try lots of things to get a valid address, most of 1155: which will result in dead code and extra pseudos. So we make the address 1156: valid here. 1157: 1158: This is easy: The only valid addresses are an offset from a register 1159: and we know the address isn't valid. So just call either `force_operand' 1160: or `force_reg' unless this is a (plus (reg ...) (const_int 0)). */ 1161: 1162: #define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) \ 1163: { if (GET_CODE (X) == PLUS && XEXP (X, 1) == const0_rtx) \ 1164: X = XEXP (x, 0); \ 1165: if (GET_CODE (X) == MULT || GET_CODE (X) == PLUS) \ 1166: X = force_operand (X, 0); \ 1167: else \ 1168: X = force_reg (Pmode, X); \ 1169: goto WIN; \ 1170: } 1171: 1172: /* Go to LABEL if ADDR (a legitimate address expression) 1173: has an effect that depends on the machine mode it is used for. 1174: On the 29k this is never true. */ 1175: 1176: #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) 1177: 1178: /* Compute the cost of an address. For the 29k, all valid addresses are 1179: the same cost. */ 1180: 1181: #define ADDRESS_COST(X) 0 1182: 1183: /* Define this if some processing needs to be done immediately before 1184: emitting code for an insn. */ 1185: 1186: /* #define FINAL_PRESCAN_INSN(INSN,OPERANDS,NOPERANDS) */ 1187: 1188: /* Specify the machine mode that this machine uses 1189: for the index in the tablejump instruction. */ 1190: #define CASE_VECTOR_MODE SImode 1191: 1192: /* Define this if the tablejump instruction expects the table 1193: to contain offsets from the address of the table. 1194: Do not define this if the table should contain absolute addresses. */ 1195: /* #define CASE_VECTOR_PC_RELATIVE */ 1196: 1197: /* Specify the tree operation to be used to convert reals to integers. */ 1198: #define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR 1199: 1200: /* This is the kind of divide that is easiest to do in the general case. */ 1201: #define EASY_DIV_EXPR TRUNC_DIV_EXPR 1202: 1203: /* Define this as 1 if `char' should by default be signed; else as 0. */ 1204: #define DEFAULT_SIGNED_CHAR 0 1205: 1206: /* This flag, if defined, says the same insns that convert to a signed fixnum 1207: also convert validly to an unsigned one. 1208: 1209: We actually lie a bit here as overflow conditions are different. But 1210: they aren't being checked anyway. */ 1211: 1212: #define FIXUNS_TRUNC_LIKE_FIX_TRUNC 1213: 1214: /* Max number of bytes we can move to of from memory 1215: in one reasonably fast instruction. 1216: 1217: For the 29k, we will define movti, so put this at 4 words. */ 1218: #define MOVE_MAX 16 1219: 1220: /* Largest number of bytes of an object that can be placed in a register. 1221: On the 29k we have plenty of registers, so use TImode. */ 1222: #define MAX_FIXED_MODE_SIZE GET_MODE_BITSIZE (TImode) 1223: 1224: /* Nonzero if access to memory by bytes is no faster than for words. 1225: Also non-zero if doing byte operations (specifically shifts) in registers 1226: is undesirable. 1227: 1228: On the 29k, large masks are expensive, so we want to use bytes to 1229: manipulate fields. */ 1230: #define SLOW_BYTE_ACCESS 0 1231: 1.1.1.2 root 1232: /* Define if operations between registers always perform the operation 1233: on the full register even if a narrower mode is specified. */ 1234: #define WORD_REGISTER_OPERATIONS 1235: 1236: /* Define if loading in MODE, an integral mode narrower than BITS_PER_WORD 1237: will either zero-extend or sign-extend. The value of this macro should 1238: be the code that says which one of the two operations is implicitly 1239: done, NIL if none. */ 1240: #define LOAD_EXTEND_OP(MODE) ZERO_EXTEND 1.1 root 1241: 1242: /* Define if the object format being used is COFF or a superset. */ 1243: #define OBJECT_FORMAT_COFF 1244: 1245: /* This uses COFF, so it wants SDB format. */ 1246: #define SDB_DEBUGGING_INFO 1247: 1248: /* Define this to be the delimiter between SDB sub-sections. The default 1249: is ";". */ 1250: #define SDB_DELIM "\n" 1251: 1252: /* Do not break .stabs pseudos into continuations. */ 1253: #define DBX_CONTIN_LENGTH 0 1254: 1255: /* Don't try to use the `x' type-cross-reference character in DBX data. 1256: Also has the consequence of putting each struct, union or enum 1257: into a separate .stabs, containing only cross-refs to the others. */ 1258: #define DBX_NO_XREFS 1259: 1260: /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits 1261: is done just by pretending it is already truncated. */ 1262: #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1 1263: 1264: /* We assume that the store-condition-codes instructions store 0 for false 1265: and some other value for true. This is the value stored for true. */ 1266: 1267: #define STORE_FLAG_VALUE 0x80000000 1268: 1269: /* Specify the machine mode that pointers have. 1270: After generation of rtl, the compiler makes no further distinction 1271: between pointers and any other objects of this machine mode. */ 1272: #define Pmode SImode 1273: 1274: /* Mode of a function address in a call instruction (for indexing purposes). 1275: 1276: Doesn't matter on 29k. */ 1277: #define FUNCTION_MODE SImode 1278: 1279: /* Define this if addresses of constant functions 1280: shouldn't be put through pseudo regs where they can be cse'd. 1281: Desirable on machines where ordinary constants are expensive 1282: but a CALL with constant address is cheap. */ 1283: #define NO_FUNCTION_CSE 1284: 1.1.1.2 root 1285: /* Define this to be nonzero if shift instructions ignore all but the low-order 1.1 root 1286: few bits. */ 1.1.1.2 root 1287: #define SHIFT_COUNT_TRUNCATED 1 1.1 root 1288: 1289: /* Compute the cost of computing a constant rtl expression RTX 1290: whose rtx-code is CODE. The body of this macro is a portion 1291: of a switch statement. If the code is computed here, 1292: return it with a return statement. Otherwise, break from the switch. 1293: 1294: We only care about the cost if it is valid in an insn. The only 1295: constants that cause an insn to generate more than one machine 1296: instruction are those involving floating-point or address. So 1297: only these need be expensive. */ 1298: 1299: #define CONST_COSTS(RTX,CODE,OUTER_CODE) \ 1300: case CONST_INT: \ 1301: return 0; \ 1302: case CONST: \ 1303: case LABEL_REF: \ 1304: case SYMBOL_REF: \ 1305: return 6; \ 1306: case CONST_DOUBLE: \ 1307: return GET_MODE (RTX) == SFmode ? 6 : 8; 1308: 1309: /* Provide the costs of a rtl expression. This is in the body of a 1310: switch on CODE. 1311: 1312: All MEMs cost the same if they are valid. This is used to ensure 1313: that (mem (symbol_ref ...)) is placed into a CALL when valid. 1314: 1315: The multiply cost depends on whether this is a 29050 or not. */ 1316: 1317: #define RTX_COSTS(X,CODE,OUTER_CODE) \ 1318: case MULT: \ 1319: return TARGET_29050 ? COSTS_N_INSNS (2) : COSTS_N_INSNS (40); \ 1320: case DIV: \ 1321: case UDIV: \ 1322: case MOD: \ 1323: case UMOD: \ 1324: return COSTS_N_INSNS (50); \ 1325: case MEM: \ 1326: return COSTS_N_INSNS (2); 1327: 1328: /* Control the assembler format that we output. */ 1329: 1330: /* Output at beginning of assembler file. */ 1331: 1332: #define ASM_FILE_START(FILE) \ 1333: { char *p, *after_dir = main_input_filename; \ 1334: if (TARGET_29050) \ 1335: fprintf (FILE, "\t.cputype 29050\n"); \ 1336: for (p = main_input_filename; *p; p++) \ 1337: if (*p == '/') \ 1338: after_dir = p + 1; \ 1.1.1.2 root 1339: fprintf (FILE, "\t.file "); \ 1340: output_quoted_string (FILE, after_dir); \ 1341: fprintf (FILE, "\n"); \ 1.1 root 1342: fprintf (FILE, "\t.sect .lit,lit\n"); } 1343: 1344: /* Output to assembler file text saying following lines 1345: may contain character constants, extra white space, comments, etc. */ 1346: 1347: #define ASM_APP_ON "" 1348: 1349: /* Output to assembler file text saying following lines 1350: no longer contain unusual constructs. */ 1351: 1352: #define ASM_APP_OFF "" 1353: 1354: /* The next few macros don't have tabs on most machines, but 1355: at least one 29K assembler wants them. */ 1356: 1357: /* Output before instructions. */ 1358: 1359: #define TEXT_SECTION_ASM_OP "\t.text" 1360: 1361: /* Output before read-only data. */ 1362: 1363: #define READONLY_DATA_SECTION_ASM_OP "\t.use .lit" 1364: 1365: /* Output before writable data. */ 1366: 1367: #define DATA_SECTION_ASM_OP "\t.data" 1368: 1369: /* Define an extra section for read-only data, a routine to enter it, and 1370: indicate that it is for read-only data. */ 1371: 1372: #define EXTRA_SECTIONS readonly_data 1373: 1374: #define EXTRA_SECTION_FUNCTIONS \ 1375: void \ 1376: literal_section () \ 1377: { \ 1378: if (in_section != readonly_data) \ 1379: { \ 1380: fprintf (asm_out_file, "%s\n", READONLY_DATA_SECTION_ASM_OP); \ 1381: in_section = readonly_data; \ 1382: } \ 1383: } \ 1384: 1385: #define READONLY_DATA_SECTION literal_section 1386: 1.1.1.2 root 1387: /* If we are referencing a function that is static or is known to be 1388: in this file, make the SYMBOL_REF special. We can use this to indicate 1389: that we can branch to this function without emitting a no-op after the 1390: call. */ 1391: 1392: #define ENCODE_SECTION_INFO(DECL) \ 1393: if (TREE_CODE (DECL) == FUNCTION_DECL \ 1394: && (TREE_ASM_WRITTEN (DECL) || ! TREE_PUBLIC (DECL))) \ 1395: SYMBOL_REF_FLAG (XEXP (DECL_RTL (DECL), 0)) = 1; 1396: 1.1 root 1397: /* How to refer to registers in assembler output. 1398: This sequence is indexed by compiler's hard-register-number (see above). */ 1399: 1400: #define REGISTER_NAMES \ 1401: {"gr96", "gr97", "gr98", "gr99", "gr100", "gr101", "gr102", "gr103", "gr104", \ 1402: "gr105", "gr106", "gr107", "gr108", "gr109", "gr110", "gr111", "gr112", \ 1403: "gr113", "gr114", "gr115", "gr116", "gr117", "gr118", "gr119", "gr120", \ 1404: "gr121", "gr122", "gr123", "gr124", "gr125", "gr126", "gr127", \ 1405: "lr0", "lr1", "lr2", "lr3", "lr4", "lr5", "lr6", "lr7", "lr8", "lr9", \ 1406: "lr10", "lr11", "lr12", "lr13", "lr14", "lr15", "lr16", "lr17", "lr18", \ 1407: "lr19", "lr20", "lr21", "lr22", "lr23", "lr24", "lr25", "lr26", "lr27", \ 1408: "lr28", "lr29", "lr30", "lr31", "lr32", "lr33", "lr34", "lr35", "lr36", \ 1409: "lr37", "lr38", "lr39", "lr40", "lr41", "lr42", "lr43", "lr44", "lr45", \ 1410: "lr46", "lr47", "lr48", "lr49", "lr50", "lr51", "lr52", "lr53", "lr54", \ 1411: "lr55", "lr56", "lr57", "lr58", "lr59", "lr60", "lr61", "lr62", "lr63", \ 1412: "lr64", "lr65", "lr66", "lr67", "lr68", "lr69", "lr70", "lr71", "lr72", \ 1413: "lr73", "lr74", "lr75", "lr76", "lr77", "lr78", "lr79", "lr80", "lr81", \ 1414: "lr82", "lr83", "lr84", "lr85", "lr86", "lr87", "lr88", "lr89", "lr90", \ 1415: "lr91", "lr92", "lr93", "lr94", "lr95", "lr96", "lr97", "lr98", "lr99", \ 1416: "lr100", "lr101", "lr102", "lr103", "lr104", "lr105", "lr106", "lr107", \ 1417: "lr108", "lr109", "lr110", "lr111", "lr112", "lr113", "lr114", "lr115", \ 1418: "lr116", "lr117", "lr118", "lr119", "lr120", "lr121", "lr122", "lr123", \ 1419: "lr124", "lr125", "lr126", "lr127", \ 1420: "AI0", "AI1", "AI2", "AI3", "AI4", "AI5", "AI6", "AI7", "AI8", "AI9", \ 1421: "AI10", "AI11", "AI12", "AI13", "AI14", "AI15", "FP", \ 1422: "bp", "fc", "cr", "q", \ 1423: "vab", "ops", "cps", "cfg", "cha", "chd", "chc", "rbp", "tmc", "tmr", \ 1424: "pc0", "pc1", "pc2", "mmu", "lru", "fpe", "int", "fps", "exo", \ 1.1.1.2 root 1425: "0", "1", "2", "3", \ 1426: "gr64", "gr65", "gr66", "gr67", "gr68", "gr69", "gr70", "gr71", \ 1427: "gr72", "gr73", "gr74", "gr75", "gr76", "gr77", "gr78", "gr79", \ 1428: "gr80", "gr81", "gr82", "gr83", "gr84", "gr85", "gr86", "gr87", \ 1429: "gr88", "gr89", "gr90", "gr91", "gr92", "gr93", "gr94", "gr95" } 1.1 root 1430: 1431: /* How to renumber registers for dbx and gdb. */ 1432: 1433: extern int a29k_debug_reg_map[]; 1434: #define DBX_REGISTER_NUMBER(REGNO) a29k_debug_reg_map[REGNO] 1435: 1436: /* This is how to output the definition of a user-level label named NAME, 1437: such as the label on a static function or variable NAME. */ 1438: 1439: #define ASM_OUTPUT_LABEL(FILE,NAME) \ 1440: do { assemble_name (FILE, NAME); fputs (":\n", FILE); } while (0) 1441: 1442: /* This is how to output a command to make the user-level label named NAME 1443: defined for reference from other files. */ 1444: 1445: #define ASM_GLOBALIZE_LABEL(FILE,NAME) \ 1446: do { fputs ("\t.global ", FILE); assemble_name (FILE, NAME); fputs ("\n", FILE);} while (0) 1447: 1448: /* This is how to output a reference to a user-level label named NAME. 1449: `assemble_name' uses this. */ 1450: 1451: #define ASM_OUTPUT_LABELREF(FILE,NAME) \ 1452: fprintf (FILE, "_%s", NAME) 1453: 1454: /* This is how to output an internal numbered label where 1455: PREFIX is the class of label and NUM is the number within the class. */ 1456: 1457: #define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \ 1458: fprintf (FILE, "%s%d:\n", PREFIX, NUM) 1459: 1460: /* This is how to output a label for a jump table. Arguments are the same as 1461: for ASM_OUTPUT_INTERNAL_LABEL, except the insn for the jump table is 1462: passed. */ 1463: 1464: #define ASM_OUTPUT_CASE_LABEL(FILE,PREFIX,NUM,TABLEINSN) \ 1465: { ASM_OUTPUT_ALIGN (FILE, 2); ASM_OUTPUT_INTERNAL_LABEL (FILE, PREFIX, NUM); } 1466: 1467: /* This is how to store into the string LABEL 1468: the symbol_ref name of an internal numbered label where 1469: PREFIX is the class of label and NUM is the number within the class. 1470: This is suitable for output with `assemble_name'. */ 1471: 1472: #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \ 1473: sprintf (LABEL, "*%s%d", PREFIX, NUM) 1474: 1475: /* This is how to output an assembler line defining a `double' constant. */ 1476: 1477: #define ASM_OUTPUT_DOUBLE(FILE,VALUE) \ 1478: fprintf (FILE, "\t.double %.20e\n", (VALUE)) 1479: 1480: /* This is how to output an assembler line defining a `float' constant. */ 1481: 1482: #define ASM_OUTPUT_FLOAT(FILE,VALUE) \ 1483: fprintf (FILE, "\t.float %.20e\n", (VALUE)) 1484: 1485: /* This is how to output an assembler line defining an `int' constant. */ 1486: 1487: #define ASM_OUTPUT_INT(FILE,VALUE) \ 1488: ( fprintf (FILE, "\t.word "), \ 1489: output_addr_const (FILE, (VALUE)), \ 1490: fprintf (FILE, "\n")) 1491: 1492: /* Likewise for `char' and `short' constants. */ 1493: 1494: #define ASM_OUTPUT_SHORT(FILE,VALUE) \ 1495: ( fprintf (FILE, "\t.hword "), \ 1496: output_addr_const (FILE, (VALUE)), \ 1497: fprintf (FILE, "\n")) 1498: 1499: #define ASM_OUTPUT_CHAR(FILE,VALUE) \ 1500: ( fprintf (FILE, "\t.byte "), \ 1501: output_addr_const (FILE, (VALUE)), \ 1502: fprintf (FILE, "\n")) 1503: 1504: /* This is how to output an insn to push a register on the stack. 1505: It need not be very fast code. */ 1506: 1507: #define ASM_OUTPUT_REG_PUSH(FILE,REGNO) \ 1508: fprintf (FILE, "\tsub %s,%s,4\n\tstore 0,0,%s,%s\n", \ 1509: reg_names[R_MSP], reg_names[R_MSP], reg_names[REGNO], \ 1510: reg_names[R_MSP]); 1511: 1512: /* This is how to output an insn to pop a register from the stack. 1513: It need not be very fast code. */ 1514: 1515: #define ASM_OUTPUT_REG_POP(FILE,REGNO) \ 1516: fprintf (FILE, "\tload 0,0,%s,%s\n\tadd %s,%s,4\n", \ 1517: reg_names[REGNO], reg_names[R_MSP], reg_names[R_MSP], \ 1518: reg_names[R_MSP]); 1519: 1520: /* This is how to output an assembler line for a numeric constant byte. */ 1521: 1522: #define ASM_OUTPUT_BYTE(FILE,VALUE) \ 1523: fprintf (FILE, "\t.byte 0x%x\n", (VALUE)) 1524: 1525: /* This is how to output an element of a case-vector that is absolute. */ 1526: 1527: #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \ 1528: fprintf (FILE, "\t.word L%d\n", VALUE) 1529: 1530: /* This is how to output an element of a case-vector that is relative. 1531: (29k does not use such vectors, 1532: but we must define this macro anyway.) */ 1533: 1534: #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, VALUE, REL) abort () 1535: 1536: /* This is how to output an assembler line 1537: that says to advance the location counter 1538: to a multiple of 2**LOG bytes. */ 1539: 1540: #define ASM_OUTPUT_ALIGN(FILE,LOG) \ 1541: if ((LOG) != 0) \ 1542: fprintf (FILE, "\t.align %d\n", 1 << (LOG)) 1543: 1544: #define ASM_OUTPUT_SKIP(FILE,SIZE) \ 1545: fprintf (FILE, "\t.block %d\n", (SIZE)) 1546: 1547: /* This says how to output an assembler line 1548: to define a global common symbol. */ 1549: 1550: #define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \ 1551: ( fputs ("\t.comm ", (FILE)), \ 1552: assemble_name ((FILE), (NAME)), \ 1553: fprintf ((FILE), ",%d\n", (SIZE))) 1554: 1555: /* This says how to output an assembler line 1556: to define a local common symbol. */ 1557: 1558: #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE,ROUNDED) \ 1559: ( fputs ("\t.lcomm ", (FILE)), \ 1560: assemble_name ((FILE), (NAME)), \ 1561: fprintf ((FILE), ",%d\n", (SIZE))) 1562: 1563: /* Store in OUTPUT a string (made with alloca) containing 1564: an assembler-name for a local static variable named NAME. 1565: LABELNO is an integer which is different for each call. */ 1566: 1567: #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \ 1568: ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \ 1569: sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO))) 1570: 1571: /* Define the parentheses used to group arithmetic operations 1572: in assembler code. */ 1573: 1574: #define ASM_OPEN_PAREN "(" 1575: #define ASM_CLOSE_PAREN ")" 1576: 1577: /* Define results of standard character escape sequences. */ 1578: #define TARGET_BELL 007 1579: #define TARGET_BS 010 1580: #define TARGET_TAB 011 1581: #define TARGET_NEWLINE 012 1582: #define TARGET_VT 013 1583: #define TARGET_FF 014 1584: #define TARGET_CR 015 1585: 1586: /* Print operand X (an rtx) in assembler syntax to file FILE. 1587: CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified. 1588: For `%' followed by punctuation, CODE is the punctuation and X is null. */ 1589: 1590: #define PRINT_OPERAND(FILE, X, CODE) print_operand (FILE, X, CODE) 1591: 1592: /* Determine which codes are valid without a following integer. These must 1593: not be alphabetic. 1594: 1595: We support `#' which is null if a delay slot exists, otherwise 1596: "\n\tnop" and `*' which prints the register name for TPC (gr122). */ 1597: 1598: #define PRINT_OPERAND_PUNCT_VALID_P(CODE) ((CODE) == '#' || (CODE) == '*') 1599: 1600: /* Print a memory address as an operand to reference that memory location. */ 1601: 1602: #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \ 1603: { register rtx addr = ADDR; \ 1604: if (!REG_P (addr) \ 1605: && ! (GET_CODE (addr) == CONST_INT \ 1606: && INTVAL (addr) >= 0 && INTVAL (addr) < 256)) \ 1607: abort (); \ 1608: output_operand (addr, 0); \ 1609: } 1610: /* Define the codes that are matched by predicates in a29k.c. */ 1611: 1612: #define PREDICATE_CODES \ 1613: {"cint_8_operand", {CONST_INT}}, \ 1614: {"cint_16_operand", {CONST_INT}}, \ 1615: {"long_const_operand", {CONST_INT, CONST, CONST_DOUBLE, \ 1616: LABEL_REF, SYMBOL_REF}}, \ 1617: {"shift_constant_operand", {CONST_INT, ASHIFT}}, \ 1.1.1.2 root 1618: {"const_0_operand", {CONST_INT, ASHIFT}}, \ 1619: {"const_8_operand", {CONST_INT, ASHIFT}}, \ 1620: {"const_16_operand", {CONST_INT, ASHIFT}}, \ 1621: {"const_24_operand", {CONST_INT, ASHIFT}}, \ 1.1 root 1622: {"float_const_operand", {CONST_DOUBLE}}, \ 1623: {"gpc_reg_operand", {SUBREG, REG}}, \ 1624: {"gpc_reg_or_float_constant_operand", {SUBREG, REG, CONST_DOUBLE}}, \ 1625: {"gpc_reg_or_integer_constant_operand", {SUBREG, REG, \ 1626: CONST_INT, CONST_DOUBLE}}, \ 1.1.1.2 root 1627: {"gpc_reg_or_immediate_operand", {SUBREG, REG, CONST_INT, \ 1628: CONST_DOUBLE, CONST, \ 1629: SYMBOL_REF, LABEL_REF}}, \ 1.1 root 1630: {"spec_reg_operand", {REG}}, \ 1631: {"accum_reg_operand", {REG}}, \ 1632: {"srcb_operand", {SUBREG, REG, CONST_INT}}, \ 1.1.1.3 ! root 1633: {"cmplsrcb_operand", {SUBREG, REG, CONST_INT}}, \ 1.1 root 1634: {"reg_or_immediate_operand", {SUBREG, REG, CONST_INT, CONST, \ 1635: CONST_DOUBLE, CONST, SYMBOL_REF, LABEL_REF}}, \ 1636: {"reg_or_u_short_operand", {SUBREG, REG, CONST_INT}}, \ 1637: {"and_operand", {SUBREG, REG, CONST_INT}}, \ 1638: {"add_operand", {SUBREG, REG, CONST_INT}}, \ 1639: {"call_operand", {SYMBOL_REF, CONST_INT}}, \ 1640: {"in_operand", {SUBREG, MEM, REG, CONST_INT, CONST, SYMBOL_REF, \ 1641: LABEL_REF, CONST_DOUBLE}}, \ 1642: {"out_operand", {SUBREG, REG, MEM}}, \ 1643: {"reload_memory_operand", {SUBREG, REG, MEM}}, \ 1644: {"fp_comparison_operator", {EQ, GT, GE}}, \ 1645: {"branch_operator", {GE, LT}}, \ 1.1.1.2 root 1646: {"load_multiple_operation", {PARALLEL}}, \ 1647: {"store_multiple_operation", {PARALLEL}}, \ 1.1 root 1648: {"epilogue_operand", {CODE_LABEL}},
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