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1.1 root 1: /* Definitions of target machine for GNU compiler, for AMD Am29000 CPU. 1.1.1.4 ! root 2: Copyright (C) 1988, 90-94, 1995 Free Software Foundation, Inc. 1.1 root 3: Contributed by Richard Kenner ([email protected]) 4: 5: This file is part of GNU CC. 6: 7: GNU CC is free software; you can redistribute it and/or modify 8: it under the terms of the GNU General Public License as published by 9: the Free Software Foundation; either version 2, or (at your option) 10: any later version. 11: 12: GNU CC is distributed in the hope that it will be useful, 13: but WITHOUT ANY WARRANTY; without even the implied warranty of 14: MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15: GNU General Public License for more details. 16: 17: You should have received a copy of the GNU General Public License 18: along with GNU CC; see the file COPYING. If not, write to 1.1.1.4 ! root 19: the Free Software Foundation, 59 Temple Place - Suite 330, ! 20: Boston, MA 02111-1307, USA. */ 1.1 root 21: 22: 23: /* Names to predefine in the preprocessor for this target machine. */ 24: 1.1.1.2 root 25: #define CPP_PREDEFINES "-D_AM29K -D_AM29000 -D_EPI -Acpu(a29k) -Amachine(a29k)" 1.1 root 26: 27: /* Print subsidiary information on the compiler version in use. */ 28: #define TARGET_VERSION 29: 30: /* Pass -w to assembler. */ 31: #define ASM_SPEC "-w" 32: 33: /* Run-time compilation parameters selecting different hardware subsets. */ 34: 35: extern int target_flags; 36: 37: /* Macro to define tables used to set the flags. 38: This is a list in braces of pairs in braces, 39: each pair being { "NAME", VALUE } 40: where VALUE is the bits to set or minus the bits to clear. 41: An empty string NAME is used to identify the default VALUE. */ 42: 43: /* This means that the DW bit will be enabled, to allow direct loads 44: of bytes. */ 45: 46: #define TARGET_DW_ENABLE (target_flags & 1) 47: 48: /* This means that the external hardware does supports byte writes. */ 49: 50: #define TARGET_BYTE_WRITES (target_flags & 2) 51: 52: /* This means that a "small memory model" has been selected where all 53: function addresses are known to be within 256K. This allows CALL to be 54: used. */ 55: 56: #define TARGET_SMALL_MEMORY (target_flags & 4) 57: 1.1.1.2 root 58: /* This means that we must always used on indirect call, even when 59: calling a function in the same file, since the file might be > 256KB. */ 60: 61: #define TARGET_LARGE_MEMORY (target_flags & 8) 62: 1.1 root 63: /* This means that we are compiling for a 29050. */ 64: 1.1.1.2 root 65: #define TARGET_29050 (target_flags & 16) 1.1 root 66: 67: /* This means that we are compiling for the kernel which means that we use 68: gr64-gr95 instead of gr96-126. */ 69: 1.1.1.2 root 70: #define TARGET_KERNEL_REGISTERS (target_flags & 32) 1.1 root 71: 72: /* This means that a call to "__msp_check" should be inserted after each stack 73: adjustment to check for stack overflow. */ 74: 1.1.1.2 root 75: #define TARGET_STACK_CHECK (target_flags & 64) 1.1 root 76: 77: /* This handles 29k processors which cannot handle the separation 78: of a mtsrim insns and a storem insn (most 29000 chips to date, but 79: not the 29050. */ 80: 1.1.1.2 root 81: #define TARGET_NO_STOREM_BUG (target_flags & 128) 1.1 root 82: 83: /* This forces the compiler not to use incoming argument registers except 84: for copying out arguments. It helps detect problems when a function is 85: called with fewer arguments than it is declared with. */ 86: 1.1.1.2 root 87: #define TARGET_NO_REUSE_ARGS (target_flags & 256) 1.1 root 88: 1.1.1.3 root 89: /* This means that neither builtin nor emulated float operations are 90: available, and that GCC should generate libcalls instead. */ 91: 92: #define TARGET_SOFT_FLOAT (target_flags & 512) 93: 1.1.1.4 ! root 94: /* This means that we should not emit the multm or mutmu instructions ! 95: that some embedded systems' trap handlers don't support. */ ! 96: ! 97: #define TARGET_MULTM ((target_flags & 1024) == 0) ! 98: 1.1 root 99: #define TARGET_SWITCHES \ 100: { {"dw", 1}, \ 101: {"ndw", -1}, \ 102: {"bw", 2}, \ 103: {"nbw", - (1|2)}, \ 104: {"small", 4}, \ 1.1.1.2 root 105: {"normal", - (4|8)}, \ 106: {"large", 8}, \ 107: {"29050", 16+128}, \ 108: {"29000", -16}, \ 109: {"kernel-registers", 32}, \ 110: {"user-registers", -32}, \ 111: {"stack-check", 64}, \ 112: {"no-stack-check", - 74}, \ 113: {"storem-bug", -128}, \ 114: {"no-storem-bug", 128}, \ 115: {"reuse-arg-regs", -256}, \ 116: {"no-reuse-arg-regs", 256}, \ 1.1.1.3 root 117: {"soft-float", 512}, \ 1.1.1.4 ! root 118: {"no-multm", 1024}, \ 1.1 root 119: {"", TARGET_DEFAULT}} 120: 121: #define TARGET_DEFAULT 3 122: 1.1.1.3 root 123: /* Show we can debug even without a frame pointer. */ 124: #define CAN_DEBUG_WITHOUT_FP 1.1 root 125: 126: /* target machine storage layout */ 127: 128: /* Define the types for size_t, ptrdiff_t, and wchar_t. These are the 129: same as those used by EPI. The type for wchar_t does not make much 130: sense, but is what is used. */ 131: 132: #define SIZE_TYPE "unsigned int" 133: #define PTRDIFF_TYPE "int" 134: #define WCHAR_TYPE "char" 135: #define WCHAR_TYPE_SIZE BITS_PER_UNIT 136: 137: /* Define this macro if it is advisable to hold scalars in registers 138: in a wider mode than that declared by the program. In such cases, 139: the value is constrained to be within the bounds of the declared 140: type, but kept valid in the wider mode. The signedness of the 141: extension may differ from that of the type. */ 142: 143: #define PROMOTE_MODE(MODE,UNSIGNEDP,TYPE) \ 144: if (GET_MODE_CLASS (MODE) == MODE_INT \ 145: && GET_MODE_SIZE (MODE) < 4) \ 146: (MODE) = SImode; 147: 148: /* Define this if most significant bit is lowest numbered 149: in instructions that operate on numbered bit-fields. 150: This is arbitrary on the 29k since it has no actual bit-field insns. 151: It is better to define this as TRUE because BYTES_BIG_ENDIAN is TRUE 152: and we want to be able to convert BP position to bit position with 153: just a shift. */ 154: #define BITS_BIG_ENDIAN 1 155: 156: /* Define this if most significant byte of a word is the lowest numbered. 157: This is true on 29k. */ 158: #define BYTES_BIG_ENDIAN 1 159: 160: /* Define this if most significant word of a multiword number is lowest 161: numbered. 162: 163: For 29k we can decide arbitrarily since there are no machine instructions 164: for them. Might as well be consistent with bytes. */ 165: #define WORDS_BIG_ENDIAN 1 166: 167: /* number of bits in an addressable storage unit */ 168: #define BITS_PER_UNIT 8 169: 170: /* Width in bits of a "word", which is the contents of a machine register. 171: Note that this is not necessarily the width of data type `int'; 172: if using 16-bit ints on a 68000, this would still be 32. 173: But on a machine with 16-bit registers, this would be 16. */ 174: #define BITS_PER_WORD 32 175: 176: /* Width of a word, in units (bytes). */ 177: #define UNITS_PER_WORD 4 178: 179: /* Width in bits of a pointer. 180: See also the macro `Pmode' defined below. */ 181: #define POINTER_SIZE 32 182: 183: /* Allocation boundary (in *bits*) for storing arguments in argument list. */ 184: #define PARM_BOUNDARY 32 185: 186: /* Boundary (in *bits*) on which stack pointer should be aligned. */ 187: #define STACK_BOUNDARY 64 188: 189: /* Allocation boundary (in *bits*) for the code of a function. */ 190: #define FUNCTION_BOUNDARY 32 191: 192: /* Alignment of field after `int : 0' in a structure. */ 193: #define EMPTY_FIELD_BOUNDARY 32 194: 195: /* Every structure's size must be a multiple of this. */ 196: #define STRUCTURE_SIZE_BOUNDARY 8 197: 198: /* A bitfield declared as `int' forces `int' alignment for the struct. */ 199: #define PCC_BITFIELD_TYPE_MATTERS 1 200: 201: /* No data type wants to be aligned rounder than this. */ 202: #define BIGGEST_ALIGNMENT 32 203: 204: /* Make strings word-aligned so strcpy from constants will be faster. */ 205: #define CONSTANT_ALIGNMENT(EXP, ALIGN) \ 206: (TREE_CODE (EXP) == STRING_CST \ 207: && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN)) 208: 209: /* Make arrays of chars word-aligned for the same reasons. */ 210: #define DATA_ALIGNMENT(TYPE, ALIGN) \ 211: (TREE_CODE (TYPE) == ARRAY_TYPE \ 212: && TYPE_MODE (TREE_TYPE (TYPE)) == QImode \ 213: && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN)) 214: 215: /* Set this non-zero if move instructions will actually fail to work 216: when given unaligned data. */ 217: #define STRICT_ALIGNMENT 0 218: 219: /* Set this non-zero if unaligned move instructions are extremely slow. 220: 221: On the 29k, they trap. */ 222: #define SLOW_UNALIGNED_ACCESS 1 223: 224: /* Standard register usage. */ 225: 226: /* Number of actual hardware registers. 227: The hardware registers are assigned numbers for the compiler 228: from 0 to just below FIRST_PSEUDO_REGISTER. 229: All registers that the compiler knows about must be given numbers, 230: even those that are not normally considered general registers. 231: 232: 29k has 256 registers, of which 62 are not defined. gr0 and gr1 are 233: not produced in generated RTL so we can start at gr96, and call it 234: register zero. 235: 236: So 0-31 are gr96-gr127, lr0-lr127 are 32-159. To represent the input 237: arguments, whose register numbers we won't know until we are done, 238: use register 160-175. They cannot be modified. Similarly, 176 is used 239: for the frame pointer. It is assigned the last local register number 240: once the number of registers used is known. 241: 242: We use 177, 178, 179, and 180 for the special registers BP, FC, CR, and Q, 243: respectively. Registers 181 through 199 are used for the other special 244: registers that may be used by the programmer, but are never used by the 245: compiler. 246: 247: Registers 200-203 are the four floating-point accumulator register in 248: the 29050. 249: 1.1.1.2 root 250: Registers 204-235 are the 32 global registers for kernel mode when 251: -mkernel-registers is not specified, and the 32 global user registers 252: when it is. 253: 1.1 root 254: When -mkernel-registers is specified, we still use the same register 255: map but change the names so 0-31 print as gr64-gr95. */ 256: 1.1.1.2 root 257: #define FIRST_PSEUDO_REGISTER 236 1.1 root 258: 259: /* Because of the large number of registers on the 29k, we define macros 260: to refer to each group of registers and then define the number for some 261: registers used in the calling sequence. */ 262: 263: #define R_GR(N) ((N) - 96) /* gr96 is register number 0 */ 264: #define R_LR(N) ((N) + 32) /* lr0 is register number 32 */ 265: #define R_FP 176 /* frame pointer is register 176 */ 266: #define R_AR(N) ((N) + 160) /* first incoming arg reg is 160 */ 1.1.1.2 root 267: #define R_KR(N) ((N) + 204) /* kernel registers (gr64 to gr95) */ 1.1 root 268: 269: /* Define the numbers of the special registers. */ 270: #define R_BP 177 271: #define R_FC 178 272: #define R_CR 179 273: #define R_Q 180 274: 275: /* These special registers are not used by the compiler, but may be referenced 276: by the programmer via asm declarations. */ 277: 278: #define R_VAB 181 279: #define R_OPS 182 280: #define R_CPS 183 281: #define R_CFG 184 282: #define R_CHA 185 283: #define R_CHD 186 284: #define R_CHC 187 285: #define R_RBP 188 286: #define R_TMC 189 287: #define R_TMR 190 288: #define R_PC0 191 289: #define R_PC1 192 290: #define R_PC2 193 291: #define R_MMU 194 292: #define R_LRU 195 293: #define R_FPE 196 294: #define R_INT 197 295: #define R_FPS 198 296: #define R_EXO 199 297: 298: /* Define the number for floating-point accumulator N. */ 1.1.1.3 root 299: #define R_ACU(N) ((N) + 200) 1.1 root 300: 301: /* Now define the registers used in the calling sequence. */ 302: #define R_TAV R_GR (121) 303: #define R_TPC R_GR (122) 304: #define R_LRP R_GR (123) 305: #define R_SLP R_GR (124) 306: #define R_MSP R_GR (125) 307: #define R_RAB R_GR (126) 308: #define R_RFB R_GR (127) 309: 310: /* 1 for registers that have pervasive standard uses 311: and are not available for the register allocator. */ 312: 313: #define FIXED_REGISTERS \ 314: {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ 315: 1, 1, 1, 1, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, \ 316: 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ 317: 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ 318: 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ 319: 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ 320: 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ 321: 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ 322: 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ 323: 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ 324: 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \ 325: 1, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \ 326: 1, 1, 1, 1, 1, 1, 1, 1, \ 1.1.1.2 root 327: 0, 0, 0, 0, \ 328: 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \ 329: 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 } 1.1 root 330: 331: /* 1 for registers not available across function calls. 332: These must include the FIXED_REGISTERS and also any 333: registers that can be used without being saved. 334: The latter must include the registers where values are returned 335: and the register where structure-value addresses are passed. 336: Aside from that, you can include as many other registers as you like. */ 337: #define CALL_USED_REGISTERS \ 338: {1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \ 339: 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \ 340: 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ 341: 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ 342: 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ 343: 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ 344: 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ 345: 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ 346: 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ 347: 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ 348: 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \ 349: 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \ 350: 1, 1, 1, 1, 1, 1, 1, 1, \ 1.1.1.2 root 351: 1, 1, 1, 1, \ 352: 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \ 353: 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 } 1.1 root 354: 355: /* List the order in which to allocate registers. Each register must be 356: listed once, even those in FIXED_REGISTERS. 357: 358: We allocate in the following order: 359: gr116-gr120 (not used for anything but temps) 360: gr96-gr111 (function return values, reverse order) 361: argument registers (160-175) 362: lr0-lr127 (locals, saved) 363: acc3-0 (acc0 special) 364: everything else */ 365: 366: #define REG_ALLOC_ORDER \ 367: {R_GR (116), R_GR (117), R_GR (118), R_GR (119), R_GR (120), \ 368: R_GR (111), R_GR (110), R_GR (109), R_GR (108), R_GR (107), \ 369: R_GR (106), R_GR (105), R_GR (104), R_GR (103), R_GR (102), \ 370: R_GR (101), R_GR (100), R_GR (99), R_GR (98), R_GR (97), R_GR (96), \ 371: R_AR (0), R_AR (1), R_AR (2), R_AR (3), R_AR (4), R_AR (5), \ 372: R_AR (6), R_AR (7), R_AR (8), R_AR (9), R_AR (10), R_AR (11), \ 373: R_AR (12), R_AR (13), R_AR (14), R_AR (15), \ 374: R_LR (0), R_LR (1), R_LR (2), R_LR (3), R_LR (4), R_LR (5), \ 375: R_LR (6), R_LR (7), R_LR (8), R_LR (9), R_LR (10), R_LR (11), \ 376: R_LR (12), R_LR (13), R_LR (14), R_LR (15), R_LR (16), R_LR (17), \ 377: R_LR (18), R_LR (19), R_LR (20), R_LR (21), R_LR (22), R_LR (23), \ 378: R_LR (24), R_LR (25), R_LR (26), R_LR (27), R_LR (28), R_LR (29), \ 379: R_LR (30), R_LR (31), R_LR (32), R_LR (33), R_LR (34), R_LR (35), \ 380: R_LR (36), R_LR (37), R_LR (38), R_LR (39), R_LR (40), R_LR (41), \ 381: R_LR (42), R_LR (43), R_LR (44), R_LR (45), R_LR (46), R_LR (47), \ 382: R_LR (48), R_LR (49), R_LR (50), R_LR (51), R_LR (52), R_LR (53), \ 383: R_LR (54), R_LR (55), R_LR (56), R_LR (57), R_LR (58), R_LR (59), \ 384: R_LR (60), R_LR (61), R_LR (62), R_LR (63), R_LR (64), R_LR (65), \ 385: R_LR (66), R_LR (67), R_LR (68), R_LR (69), R_LR (70), R_LR (71), \ 386: R_LR (72), R_LR (73), R_LR (74), R_LR (75), R_LR (76), R_LR (77), \ 387: R_LR (78), R_LR (79), R_LR (80), R_LR (81), R_LR (82), R_LR (83), \ 388: R_LR (84), R_LR (85), R_LR (86), R_LR (87), R_LR (88), R_LR (89), \ 389: R_LR (90), R_LR (91), R_LR (92), R_LR (93), R_LR (94), R_LR (95), \ 390: R_LR (96), R_LR (97), R_LR (98), R_LR (99), R_LR (100), R_LR (101), \ 391: R_LR (102), R_LR (103), R_LR (104), R_LR (105), R_LR (106), \ 392: R_LR (107), R_LR (108), R_LR (109), R_LR (110), R_LR (111), \ 393: R_LR (112), R_LR (113), R_LR (114), R_LR (115), R_LR (116), \ 394: R_LR (117), R_LR (118), R_LR (119), R_LR (120), R_LR (121), \ 395: R_LR (122), R_LR (123), R_LR (124), R_LR (124), R_LR (126), \ 396: R_LR (127), \ 1.1.1.3 root 397: R_ACU (3), R_ACU (2), R_ACU (1), R_ACU (0), \ 1.1 root 398: R_GR (112), R_GR (113), R_GR (114), R_GR (115), R_GR (121), \ 399: R_GR (122), R_GR (123), R_GR (124), R_GR (125), R_GR (126), \ 400: R_GR (127), \ 401: R_FP, R_BP, R_FC, R_CR, R_Q, \ 402: R_VAB, R_OPS, R_CPS, R_CFG, R_CHA, R_CHD, R_CHC, R_RBP, R_TMC, \ 403: R_TMR, R_PC0, R_PC1, R_PC2, R_MMU, R_LRU, R_FPE, R_INT, R_FPS, \ 1.1.1.2 root 404: R_EXO, \ 405: R_KR (0), R_KR (1), R_KR (2), R_KR (3), R_KR (4), R_KR (5), \ 406: R_KR (6), R_KR (7), R_KR (8), R_KR (9), R_KR (10), R_KR (11), \ 407: R_KR (12), R_KR (13), R_KR (14), R_KR (15), R_KR (16), R_KR (17), \ 408: R_KR (18), R_KR (19), R_KR (20), R_KR (21), R_KR (22), R_KR (23), \ 409: R_KR (24), R_KR (25), R_KR (26), R_KR (27), R_KR (28), R_KR (29), \ 410: R_KR (30), R_KR (31) } 1.1 root 411: 412: /* Return number of consecutive hard regs needed starting at reg REGNO 413: to hold something of mode MODE. 414: This is ordinarily the length in words of a value of mode MODE 415: but can be less for certain modes in special long registers. */ 416: 417: #define HARD_REGNO_NREGS(REGNO, MODE) \ 1.1.1.3 root 418: ((REGNO) >= R_ACU (0) && (REGNO) <= R_ACU (3)? 1 \ 1.1 root 419: : (GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD) 420: 421: /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE. 422: On 29k, the cpu registers can hold any mode. But a double-precision 423: floating-point value should start at an even register. The special 424: registers cannot hold floating-point values, BP, CR, and FC cannot 425: hold integer or floating-point values, and the accumulators cannot 426: hold integer values. 427: 428: DImode and larger values should start at an even register just like 429: DFmode values, even though the instruction set doesn't require it, in order 430: to prevent reload from aborting due to a modes_equiv_for_class_p failure. 431: 432: (I'd like to use the "?:" syntax to make this more readable, but Sun's 433: compiler doesn't seem to accept it.) */ 434: #define HARD_REGNO_MODE_OK(REGNO, MODE) \ 1.1.1.3 root 435: (((REGNO) >= R_ACU (0) && (REGNO) <= R_ACU (3) \ 1.1 root 436: && (GET_MODE_CLASS (MODE) == MODE_FLOAT \ 437: || GET_MODE_CLASS (MODE) == MODE_COMPLEX_FLOAT)) \ 438: || ((REGNO) >= R_BP && (REGNO) <= R_CR \ 439: && GET_MODE_CLASS (MODE) == MODE_PARTIAL_INT) \ 1.1.1.3 root 440: || ((REGNO) >= R_Q && (REGNO) < R_ACU (0) \ 1.1 root 441: && GET_MODE_CLASS (MODE) != MODE_FLOAT \ 442: && GET_MODE_CLASS (MODE) != MODE_COMPLEX_FLOAT) \ 1.1.1.2 root 443: || (((REGNO) < R_BP || (REGNO) >= R_KR (0)) \ 1.1 root 444: && ((((REGNO) & 1) == 0) \ 445: || GET_MODE_UNIT_SIZE (MODE) <= UNITS_PER_WORD))) 446: 447: /* Value is 1 if it is a good idea to tie two pseudo registers 448: when one has mode MODE1 and one has mode MODE2. 449: If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2, 450: for any hard reg, then this must be 0 for correct output. 451: 452: On the 29k, normally we'd just have problems with DFmode because of the 453: even alignment. However, we also have to be a bit concerned about 454: the special register's restriction to non-floating and the floating-point 455: accumulator's restriction to only floating. This probably won't 456: cause any great inefficiencies in practice. */ 457: 458: #define MODES_TIEABLE_P(MODE1, MODE2) \ 459: ((MODE1) == (MODE2) \ 460: || (GET_MODE_CLASS (MODE1) == MODE_INT \ 461: && GET_MODE_CLASS (MODE2) == MODE_INT)) 462: 463: /* Specify the registers used for certain standard purposes. 464: The values of these macros are register numbers. */ 465: 466: /* 29k pc isn't overloaded on a register that the compiler knows about. */ 467: /* #define PC_REGNUM */ 468: 469: /* Register to use for pushing function arguments. */ 470: #define STACK_POINTER_REGNUM R_GR (125) 471: 472: /* Base register for access to local variables of the function. */ 473: #define FRAME_POINTER_REGNUM R_FP 474: 475: /* Value should be nonzero if functions must have frame pointers. 476: Zero means the frame pointer need not be set up (and parms 477: may be accessed via the stack pointer) in functions that seem suitable. 478: This is computed in `reload', in reload1.c. */ 479: #define FRAME_POINTER_REQUIRED 0 480: 481: /* Base register for access to arguments of the function. */ 482: #define ARG_POINTER_REGNUM R_FP 483: 484: /* Register in which static-chain is passed to a function. */ 485: #define STATIC_CHAIN_REGNUM R_SLP 486: 487: /* Register in which address to store a structure value 488: is passed to a function. */ 489: #define STRUCT_VALUE_REGNUM R_LRP 490: 491: /* Define the classes of registers for register constraints in the 492: machine description. Also define ranges of constants. 493: 494: One of the classes must always be named ALL_REGS and include all hard regs. 495: If there is more than one class, another class must be named NO_REGS 496: and contain no registers. 497: 498: The name GENERAL_REGS must be the name of a class (or an alias for 499: another name such as ALL_REGS). This is the class of registers 500: that is allowed by "g" or "r" in a register constraint. 501: Also, registers outside this class are allocated only when 502: instructions express preferences for them. 503: 504: The classes must be numbered in nondecreasing order; that is, 505: a larger-numbered class must never be contained completely 506: in a smaller-numbered class. 507: 508: For any two classes, it is very desirable that there be another 509: class that represents their union. 510: 511: The 29k has nine registers classes: LR0_REGS, GENERAL_REGS, SPECIAL_REGS, 512: BP_REGS, FC_REGS, CR_REGS, Q_REGS, ACCUM_REGS, and ACCUM0_REGS. 513: LR0_REGS, BP_REGS, FC_REGS, CR_REGS, and Q_REGS contain just the single 514: register. The latter two classes are used to represent the floating-point 515: accumulator registers in the 29050. We also define the union class 516: FLOAT_REGS to represent any register that can be used to hold a 517: floating-point value. The union of SPECIAL_REGS and ACCUM_REGS isn't 518: useful as the former cannot contain floating-point and the latter can only 519: contain floating-point. */ 520: 521: enum reg_class { NO_REGS, LR0_REGS, GENERAL_REGS, BP_REGS, FC_REGS, CR_REGS, 522: Q_REGS, SPECIAL_REGS, ACCUM0_REGS, ACCUM_REGS, FLOAT_REGS, 523: ALL_REGS, LIM_REG_CLASSES }; 524: 525: #define N_REG_CLASSES (int) LIM_REG_CLASSES 526: 527: /* Give names of register classes as strings for dump file. */ 528: 529: #define REG_CLASS_NAMES \ 530: {"NO_REGS", "LR0_REGS", "GENERAL_REGS", "BP_REGS", "FC_REGS", "CR_REGS", \ 531: "Q_REGS", "SPECIAL_REGS", "ACCUM0_REGS", "ACCUM_REGS", "FLOAT_REGS", \ 532: "ALL_REGS" } 533: 534: /* Define which registers fit in which classes. 535: This is an initializer for a vector of HARD_REG_SET 536: of length N_REG_CLASSES. */ 537: 538: #define REG_CLASS_CONTENTS \ 1.1.1.2 root 539: { {0, 0, 0, 0, 0, 0, 0, 0}, \ 540: {0, 1, 0, 0, 0, 0, 0, 0}, \ 1.1.1.3 root 541: {~0, ~0, ~0, ~0, ~0, ~ 0xfffe0000, ~ 0xfff, 0xfff}, \ 1.1.1.2 root 542: {0, 0, 0, 0, 0, 0x20000, 0, 0}, \ 543: {0, 0, 0, 0, 0, 0x40000, 0, 0}, \ 544: {0, 0, 0, 0, 0, 0x80000, 0, 0}, \ 545: {0, 0, 0, 0, 0, 0x100000, 0, 0}, \ 546: {0, 0, 0, 0, 0, 0xfffe0000, 0xff, 0}, \ 547: {0, 0, 0, 0, 0, 0, 0x100, 0}, \ 548: {0, 0, 0, 0, 0, 0, 0xf00, 0}, \ 1.1.1.3 root 549: {~0, ~0, ~0, ~0, ~0, ~ 0xfffe0000, ~ 0xff, 0xfff}, \ 550: {~0, ~0, ~0, ~0, ~0, ~0, ~0, 0xfff} } 1.1 root 551: 552: /* The same information, inverted: 553: Return the class number of the smallest class containing 554: reg number REGNO. This could be a conditional expression 555: or could index an array. */ 556: 557: #define REGNO_REG_CLASS(REGNO) \ 558: ((REGNO) == R_BP ? BP_REGS \ 559: : (REGNO) == R_FC ? FC_REGS \ 560: : (REGNO) == R_CR ? CR_REGS \ 561: : (REGNO) == R_Q ? Q_REGS \ 562: : (REGNO) > R_BP && (REGNO) <= R_EXO ? SPECIAL_REGS \ 1.1.1.3 root 563: : (REGNO) == R_ACU (0) ? ACCUM0_REGS \ 1.1.1.2 root 564: : (REGNO) >= R_KR (0) ? GENERAL_REGS \ 1.1.1.3 root 565: : (REGNO) > R_ACU (0) ? ACCUM_REGS \ 1.1 root 566: : (REGNO) == R_LR (0) ? LR0_REGS \ 567: : GENERAL_REGS) 568: 569: /* The class value for index registers, and the one for base regs. */ 570: #define INDEX_REG_CLASS NO_REGS 571: #define BASE_REG_CLASS GENERAL_REGS 572: 573: /* Get reg_class from a letter such as appears in the machine description. */ 574: 575: #define REG_CLASS_FROM_LETTER(C) \ 576: ((C) == 'r' ? GENERAL_REGS \ 577: : (C) == 'l' ? LR0_REGS \ 578: : (C) == 'b' ? BP_REGS \ 579: : (C) == 'f' ? FC_REGS \ 580: : (C) == 'c' ? CR_REGS \ 581: : (C) == 'q' ? Q_REGS \ 582: : (C) == 'h' ? SPECIAL_REGS \ 583: : (C) == 'a' ? ACCUM_REGS \ 584: : (C) == 'A' ? ACCUM0_REGS \ 585: : (C) == 'f' ? FLOAT_REGS \ 586: : NO_REGS) 587: 588: /* Define this macro to change register usage conditional on target flags. 589: 590: On the 29k, we use this to change the register names for kernel mapping. */ 591: 1.1.1.2 root 592: #define CONDITIONAL_REGISTER_USAGE \ 593: { \ 594: char *p; \ 595: int i; \ 596: \ 597: if (TARGET_KERNEL_REGISTERS) \ 598: for (i = 0; i < 32; i++) \ 599: { \ 600: p = reg_names[i]; \ 601: reg_names[i] = reg_names[R_KR (i)]; \ 602: reg_names[R_KR (i)] = p; \ 603: } \ 1.1 root 604: } 605: 606: /* The letters I, J, K, L, M, N, O, and P in a register constraint string 607: can be used to stand for particular ranges of immediate operands. 608: This macro defines what the ranges are. 609: C is the letter, and VALUE is a constant value. 610: Return 1 if VALUE is in the range specified by C. 611: 612: For 29k: 613: `I' is used for the range of constants most insns can contain. 614: `J' is for the few 16-bit insns. 615: `K' is a constant whose high-order 24 bits are all one 616: `L' is a HImode constant whose high-order 8 bits are all one 617: `M' is a 32-bit constant whose high-order 16 bits are all one (for CONSTN) 618: `N' is a 32-bit constant whose negative is 8 bits 619: `O' is the 32-bit constant 0x80000000, any constant with low-order 620: 16 bits zero for 29050. 621: `P' is a HImode constant whose negative is 8 bits */ 622: 623: #define CONST_OK_FOR_LETTER_P(VALUE, C) \ 624: ((C) == 'I' ? (unsigned) (VALUE) < 0x100 \ 625: : (C) == 'J' ? (unsigned) (VALUE) < 0x10000 \ 626: : (C) == 'K' ? ((VALUE) & 0xffffff00) == 0xffffff00 \ 627: : (C) == 'L' ? ((VALUE) & 0xff00) == 0xff00 \ 628: : (C) == 'M' ? ((VALUE) & 0xffff0000) == 0xffff0000 \ 629: : (C) == 'N' ? ((VALUE) < 0 && (VALUE) > -256) \ 630: : (C) == 'O' ? ((VALUE) == 0x80000000 \ 631: || (TARGET_29050 && ((VALUE) & 0xffff) == 0)) \ 632: : (C) == 'P' ? (((VALUE) | 0xffff0000) < 0 \ 633: && ((VALUE) | 0xffff0000) > -256) \ 634: : 0) 635: 636: /* Similar, but for floating constants, and defining letters G and H. 637: Here VALUE is the CONST_DOUBLE rtx itself. 638: All floating-point constants are valid on 29k. */ 639: 640: #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) 1 641: 642: /* Given an rtx X being reloaded into a reg required to be 643: in class CLASS, return the class of reg to actually use. 644: In general this is just CLASS; but on some machines 645: in some cases it is preferable to use a more restrictive class. */ 646: 647: #define PREFERRED_RELOAD_CLASS(X,CLASS) CLASS 648: 649: /* Return the register class of a scratch register needed to copy IN into 650: or out of a register in CLASS in MODE. If it can be done directly, 651: NO_REGS is returned. */ 652: 653: #define SECONDARY_RELOAD_CLASS(CLASS,MODE,IN) \ 654: secondary_reload_class (CLASS, MODE, IN) 655: 656: /* This function is used to get the address of an object. */ 657: 658: extern struct rtx_def *a29k_get_reloaded_address (); 659: 660: /* Return the maximum number of consecutive registers 661: needed to represent mode MODE in a register of class CLASS. 662: 663: On 29k, this is the size of MODE in words except that the floating-point 664: accumulators only require one word for anything they can hold. */ 665: 666: #define CLASS_MAX_NREGS(CLASS, MODE) \ 667: (((CLASS) == ACCUM_REGS || (CLASS) == ACCUM0_REGS) ? 1 \ 668: : (GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD) 669: 670: /* Define the cost of moving between registers of various classes. Everything 671: involving a general register is cheap, but moving between the other types 672: (even within a class) is two insns. */ 673: 674: #define REGISTER_MOVE_COST(CLASS1, CLASS2) \ 675: ((CLASS1) == GENERAL_REGS || (CLASS2) == GENERAL_REGS ? 2 : 4) 676: 1.1.1.3 root 677: /* A C expressions returning the cost of moving data of MODE from a register to 678: or from memory. 679: 680: It takes extra insns on the 29k to form addresses, so we want to make 681: this higher. In addition, we need to keep it more expensive than the 682: most expensive register-register copy. */ 683: 684: #define MEMORY_MOVE_COST(MODE) 6 685: 1.1 root 686: /* A C statement (sans semicolon) to update the integer variable COST 687: based on the relationship between INSN that is dependent on 688: DEP_INSN through the dependence LINK. The default is to make no 689: adjustment to COST. On the a29k, ignore the cost of anti- and 690: output-dependencies. */ 691: #define ADJUST_COST(INSN,LINK,DEP_INSN,COST) \ 692: if (REG_NOTE_KIND (LINK) != 0) \ 693: (COST) = 0; /* Anti or output dependence. */ 694: 695: /* Stack layout; function entry, exit and calling. */ 696: 697: /* Define this if pushing a word on the stack 698: makes the stack pointer a smaller address. */ 699: #define STACK_GROWS_DOWNWARD 700: 701: /* Define this if the nominal address of the stack frame 702: is at the high-address end of the local variables; 703: that is, each additional local variable allocated 704: goes at a more negative offset in the frame. */ 705: #define FRAME_GROWS_DOWNWARD 706: 707: /* Offset within stack frame to start allocating local variables at. 708: If FRAME_GROWS_DOWNWARD, this is the offset to the END of the 709: first local allocated. Otherwise, it is the offset to the BEGINNING 710: of the first local allocated. */ 711: 712: #define STARTING_FRAME_OFFSET (- current_function_pretend_args_size) 713: 714: /* If we generate an insn to push BYTES bytes, 715: this says how many the stack pointer really advances by. 716: On 29k, don't define this because there are no push insns. */ 717: /* #define PUSH_ROUNDING(BYTES) */ 718: 719: /* Define this if the maximum size of all the outgoing args is to be 720: accumulated and pushed during the prologue. The amount can be 721: found in the variable current_function_outgoing_args_size. */ 722: #define ACCUMULATE_OUTGOING_ARGS 723: 724: /* Offset of first parameter from the argument pointer register value. */ 725: 726: #define FIRST_PARM_OFFSET(FNDECL) (- current_function_pretend_args_size) 727: 728: /* Define this if stack space is still allocated for a parameter passed 729: in a register. */ 730: /* #define REG_PARM_STACK_SPACE */ 731: 732: /* Value is the number of bytes of arguments automatically 733: popped when returning from a subroutine call. 1.1.1.4 ! root 734: FUNDECL is the declaration node of the function (as a tree), 1.1 root 735: FUNTYPE is the data type of the function (as a tree), 736: or for a library call it is an identifier node for the subroutine name. 737: SIZE is the number of bytes of arguments passed on the stack. */ 738: 1.1.1.4 ! root 739: #define RETURN_POPS_ARGS(FUNDECL,FUNTYPE,SIZE) 0 1.1 root 740: 741: /* Define how to find the value returned by a function. 742: VALTYPE is the data type of the value (as a tree). 743: If the precise function being called is known, FUNC is its FUNCTION_DECL; 744: otherwise, FUNC is 0. 745: 746: On 29k the value is found in gr96. */ 747: 748: #define FUNCTION_VALUE(VALTYPE, FUNC) \ 749: gen_rtx (REG, TYPE_MODE (VALTYPE), R_GR (96)) 750: 751: /* Define how to find the value returned by a library function 752: assuming the value has mode MODE. */ 753: 754: #define LIBCALL_VALUE(MODE) gen_rtx (REG, MODE, R_GR (96)) 755: 756: /* 1 if N is a possible register number for a function value 757: as seen by the caller. 758: On 29k, gr96-gr111 are used. */ 759: 760: #define FUNCTION_VALUE_REGNO_P(N) ((N) == R_GR (96)) 761: 762: /* 1 if N is a possible register number for function argument passing. 763: On 29k, these are lr2-lr17. */ 764: 765: #define FUNCTION_ARG_REGNO_P(N) ((N) <= R_LR (17) && (N) >= R_LR (2)) 766: 767: /* Define a data type for recording info about an argument list 768: during the scan of that argument list. This data type should 769: hold all necessary information about the function itself 770: and about the args processed so far, enough to enable macros 771: such as FUNCTION_ARG to determine where the next arg should go. 772: 773: On 29k, this is a single integer, which is a number of words 774: of arguments scanned so far. 775: Thus 16 or more means all following args should go on the stack. */ 776: 777: #define CUMULATIVE_ARGS int 778: 779: /* Initialize a variable CUM of type CUMULATIVE_ARGS 780: for a call to a function whose data type is FNTYPE. 781: For a library call, FNTYPE is 0. */ 782: 783: #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME) (CUM) = 0 784: 785: /* Same, but called for incoming args. 786: 787: On the 29k, we use this to set all argument registers to fixed and 1.1.1.4 ! root 788: set the last 16 local regs, less two, (lr110-lr125) to available. Some ! 789: will later be changed to call-saved by FUNCTION_INCOMING_ARG. ! 790: lr126,lr127 are always fixed, they are place holders for the caller's ! 791: lr0,lr1. */ 1.1 root 792: 1.1.1.4 ! root 793: #define INIT_CUMULATIVE_INCOMING_ARGS(CUM,FNTYPE,IGNORE) \ 1.1 root 794: { int i; \ 1.1.1.4 ! root 795: for (i = R_AR (0) - 2; i < R_AR (16); i++) \ 1.1 root 796: { \ 797: fixed_regs[i] = call_used_regs[i] = call_fixed_regs[i] = 1; \ 798: SET_HARD_REG_BIT (fixed_reg_set, i); \ 799: SET_HARD_REG_BIT (call_used_reg_set, i); \ 800: SET_HARD_REG_BIT (call_fixed_reg_set, i); \ 801: } \ 1.1.1.4 ! root 802: for (i = R_LR (110); i < R_LR (126); i++) \ 1.1 root 803: { \ 804: fixed_regs[i] = call_used_regs[i] = call_fixed_regs[i] = 0; \ 805: CLEAR_HARD_REG_BIT (fixed_reg_set, i); \ 806: CLEAR_HARD_REG_BIT (call_used_reg_set, i); \ 807: CLEAR_HARD_REG_BIT (call_fixed_reg_set, i); \ 808: } \ 809: (CUM) = 0; \ 810: } 811: 812: /* Define intermediate macro to compute the size (in registers) of an argument 813: for the 29k. */ 814: 815: #define A29K_ARG_SIZE(MODE, TYPE, NAMED) \ 816: (! (NAMED) ? 0 \ 817: : (MODE) != BLKmode \ 818: ? (GET_MODE_SIZE (MODE) + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD \ 819: : (int_size_in_bytes (TYPE) + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD) 820: 821: /* Update the data in CUM to advance over an argument 822: of mode MODE and data type TYPE. 823: (TYPE is null for libcalls where that information may not be available.) */ 824: 825: #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \ 826: if (MUST_PASS_IN_STACK (MODE, TYPE)) \ 827: (CUM) = 16; \ 828: else \ 829: (CUM) += A29K_ARG_SIZE (MODE, TYPE, NAMED) 830: 831: /* Determine where to put an argument to a function. 832: Value is zero to push the argument on the stack, 833: or a hard register in which to store the argument. 834: 835: MODE is the argument's machine mode. 836: TYPE is the data type of the argument (as a tree). 837: This is null for libcalls where that information may 838: not be available. 839: CUM is a variable of type CUMULATIVE_ARGS which gives info about 840: the preceding args and about the function being called. 841: NAMED is nonzero if this argument is a named parameter 842: (otherwise it is an extra parameter matching an ellipsis). 843: 844: On 29k the first 16 words of args are normally in registers 845: and the rest are pushed. */ 846: 847: #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \ 848: ((CUM) < 16 && (NAMED) && ! MUST_PASS_IN_STACK (MODE, TYPE) \ 849: ? gen_rtx(REG, (MODE), R_LR (2) + (CUM)) : 0) 850: 851: /* Define where a function finds its arguments. 852: This is different from FUNCTION_ARG because of register windows. 853: 854: On the 29k, we hack this to call a function that sets the used registers 855: as non-fixed and not used by calls. */ 856: 857: #define FUNCTION_INCOMING_ARG(CUM, MODE, TYPE, NAMED) \ 858: ((CUM) < 16 && (NAMED) && ! MUST_PASS_IN_STACK (MODE, TYPE) \ 859: ? gen_rtx (REG, MODE, \ 860: incoming_reg (CUM, A29K_ARG_SIZE (MODE, TYPE, NAMED))) \ 861: : 0) 862: 863: /* This indicates that an argument is to be passed with an invisible reference 864: (i.e., a pointer to the object is passed). 865: 866: On the 29k, we do this if it must be passed on the stack. */ 867: 868: #define FUNCTION_ARG_PASS_BY_REFERENCE(CUM, MODE, TYPE, NAMED) \ 869: (MUST_PASS_IN_STACK (MODE, TYPE)) 870: 871: /* Specify the padding direction of arguments. 872: 873: On the 29k, we must pad upwards in order to be able to pass args in 874: registers. */ 875: 876: #define FUNCTION_ARG_PADDING(MODE, TYPE) upward 877: 878: /* For an arg passed partly in registers and partly in memory, 879: this is the number of registers used. 880: For args passed entirely in registers or entirely in memory, zero. */ 881: 882: #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) \ 883: ((CUM) < 16 && 16 < (CUM) + A29K_ARG_SIZE (MODE, TYPE, NAMED) && (NAMED) \ 884: ? 16 - (CUM) : 0) 885: 886: /* Perform any needed actions needed for a function that is receiving a 887: variable number of arguments. 888: 889: CUM is as above. 890: 891: MODE and TYPE are the mode and type of the current parameter. 892: 893: PRETEND_SIZE is a variable that should be set to the amount of stack 894: that must be pushed by the prolog to pretend that our caller pushed 895: it. 896: 897: Normally, this macro will push all remaining incoming registers on the 898: stack and set PRETEND_SIZE to the length of the registers pushed. */ 899: 900: #define SETUP_INCOMING_VARARGS(CUM,MODE,TYPE,PRETEND_SIZE,NO_RTL) \ 901: { if ((CUM) < 16) \ 902: { \ 903: int first_reg_offset = (CUM); \ 904: \ 905: if (MUST_PASS_IN_STACK (MODE, TYPE)) \ 906: first_reg_offset += A29K_ARG_SIZE (TYPE_MODE (TYPE), TYPE, 1); \ 907: \ 908: if (first_reg_offset > 16) \ 909: first_reg_offset = 16; \ 910: \ 911: if (! (NO_RTL) && first_reg_offset != 16) \ 912: move_block_from_reg \ 913: (R_AR (0) + first_reg_offset, \ 914: gen_rtx (MEM, BLKmode, virtual_incoming_args_rtx), \ 1.1.1.2 root 915: 16 - first_reg_offset, (16 - first_reg_offset) * UNITS_PER_WORD); \ 1.1 root 916: PRETEND_SIZE = (16 - first_reg_offset) * UNITS_PER_WORD; \ 917: } \ 918: } 919: 920: /* Define the information needed to generate branch and scc insns. This is 921: stored from the compare operation. Note that we can't use "rtx" here 922: since it hasn't been defined! */ 923: 924: extern struct rtx_def *a29k_compare_op0, *a29k_compare_op1; 925: extern int a29k_compare_fp_p; 926: 927: /* This macro produces the initial definition of a function name. 928: 929: For the 29k, we need the prolog to contain one or two words prior to 930: the declaration of the function name. So just store away the name and 931: write it as part of the prolog. */ 932: 933: extern char *a29k_function_name; 934: 935: #define ASM_DECLARE_FUNCTION_NAME(FILE,NAME,DECL) \ 936: a29k_function_name = NAME; 937: 938: /* This macro generates the assembly code for function entry. 939: FILE is a stdio stream to output the code to. 940: SIZE is an int: how many units of temporary storage to allocate. 941: Refer to the array `regs_ever_live' to determine which registers 942: to save; `regs_ever_live[I]' is nonzero if register number I 943: is ever used in the function. This macro is responsible for 944: knowing which registers should not be saved even if used. */ 945: 946: #define FUNCTION_PROLOGUE(FILE, SIZE) output_prolog (FILE, SIZE) 947: 948: /* Output assembler code to FILE to increment profiler label # LABELNO 949: for profiling a function entry. */ 950: 951: #define FUNCTION_PROFILER(FILE, LABELNO) 952: 953: /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function, 954: the stack pointer does not matter. The value is tested only in 955: functions that have frame pointers. 956: No definition is equivalent to always zero. */ 957: 958: #define EXIT_IGNORE_STACK 1 959: 960: /* This macro generates the assembly code for function exit, 961: on machines that need it. If FUNCTION_EPILOGUE is not defined 962: then individual return instructions are generated for each 963: return statement. Args are same as for FUNCTION_PROLOGUE. 964: 965: The function epilogue should not depend on the current stack pointer! 966: It should use the frame pointer only. This is mandatory because 967: of alloca; we also take advantage of it to omit stack adjustments 968: before returning. */ 969: 970: #define FUNCTION_EPILOGUE(FILE, SIZE) output_epilog (FILE, SIZE) 971: 972: /* Define the number of delay slots needed for the function epilogue. 973: 974: On the 29k, we need a slot except when we have a register stack adjustment, 975: have a memory stack adjustment, and have no frame pointer. */ 976: 977: #define DELAY_SLOTS_FOR_EPILOGUE \ 978: (! (needs_regstack_p () \ 979: && (get_frame_size () + current_function_pretend_args_size \ 980: + current_function_outgoing_args_size) != 0 \ 981: && ! frame_pointer_needed)) 982: 983: /* Define whether INSN can be placed in delay slot N for the epilogue. 984: 985: On the 29k, we must be able to place it in a delay slot, it must 986: not use sp if the frame pointer cannot be eliminated, and it cannot 987: use local regs if we need to push the register stack. */ 988: 989: #define ELIGIBLE_FOR_EPILOGUE_DELAY(INSN,N) \ 990: (get_attr_in_delay_slot (INSN) == IN_DELAY_SLOT_YES \ 991: && ! (frame_pointer_needed \ 992: && reg_mentioned_p (stack_pointer_rtx, PATTERN (INSN))) \ 993: && ! (needs_regstack_p () && uses_local_reg_p (PATTERN (INSN)))) 994: 995: /* Output assembler code for a block containing the constant parts 996: of a trampoline, leaving space for the variable parts. 997: 998: The trampoline should set the static chain pointer to value placed 999: into the trampoline and should branch to the specified routine. We 1000: use gr121 (tav) as a temporary. */ 1001: 1002: #define TRAMPOLINE_TEMPLATE(FILE) \ 1003: { \ 1004: fprintf (FILE, "\tconst %s,0\n", reg_names[R_TAV]); \ 1005: fprintf (FILE, "\tconsth %s,0\n", reg_names[R_TAV]); \ 1006: fprintf (FILE, "\tconst %s,0\n", reg_names[R_SLP]); \ 1007: fprintf (FILE, "\tjmpi %s\n", reg_names[R_TAV]); \ 1008: fprintf (FILE, "\tconsth %s,0\n", reg_names[R_SLP]); \ 1009: } 1010: 1011: /* Length in units of the trampoline for entering a nested function. */ 1012: 1013: #define TRAMPOLINE_SIZE 20 1014: 1015: /* Emit RTL insns to initialize the variable parts of a trampoline. 1016: FNADDR is an RTX for the address of the function's pure code. 1017: CXT is an RTX for the static chain value for the function. 1018: 1019: We do this on the 29k by writing the bytes of the addresses into the 1020: trampoline one byte at a time. */ 1021: 1022: #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \ 1023: { \ 1024: INITIALIZE_TRAMPOLINE_VALUE (TRAMP, FNADDR, 0, 4); \ 1025: INITIALIZE_TRAMPOLINE_VALUE (TRAMP, CXT, 8, 16); \ 1026: } 1027: 1028: /* Define a sub-macro to initialize one value into the trampoline. 1029: We specify the offsets of the CONST and CONSTH instructions, respectively 1030: and copy the value a byte at a time into these instructions. */ 1031: 1032: #define INITIALIZE_TRAMPOLINE_VALUE(TRAMP, VALUE, CONST, CONSTH) \ 1033: { \ 1034: rtx _addr, _temp; \ 1035: rtx _val = force_reg (SImode, VALUE); \ 1036: \ 1037: _addr = memory_address (QImode, plus_constant (TRAMP, (CONST) + 3)); \ 1038: emit_move_insn (gen_rtx (MEM, QImode, _addr), \ 1039: gen_lowpart (QImode, _val)); \ 1040: \ 1041: _temp = expand_shift (RSHIFT_EXPR, SImode, _val, \ 1042: build_int_2 (8, 0), 0, 1); \ 1043: _addr = memory_address (QImode, plus_constant (TRAMP, (CONST) + 1)); \ 1044: emit_move_insn (gen_rtx (MEM, QImode, _addr), \ 1045: gen_lowpart (QImode, _temp)); \ 1046: \ 1047: _temp = expand_shift (RSHIFT_EXPR, SImode, _temp, \ 1048: build_int_2 (8, 0), _temp, 1); \ 1049: _addr = memory_address (QImode, plus_constant (TRAMP, (CONSTH) + 3)); \ 1050: emit_move_insn (gen_rtx (MEM, QImode, _addr), \ 1051: gen_lowpart (QImode, _temp)); \ 1052: \ 1053: _temp = expand_shift (RSHIFT_EXPR, SImode, _temp, \ 1054: build_int_2 (8, 0), _temp, 1); \ 1055: _addr = memory_address (QImode, plus_constant (TRAMP, (CONSTH) + 1)); \ 1056: emit_move_insn (gen_rtx (MEM, QImode, _addr), \ 1057: gen_lowpart (QImode, _temp)); \ 1058: } 1059: 1060: /* Addressing modes, and classification of registers for them. */ 1061: 1062: /* #define HAVE_POST_INCREMENT */ 1063: /* #define HAVE_POST_DECREMENT */ 1064: 1065: /* #define HAVE_PRE_DECREMENT */ 1066: /* #define HAVE_PRE_INCREMENT */ 1067: 1068: /* Macros to check register numbers against specific register classes. */ 1069: 1070: /* These assume that REGNO is a hard or pseudo reg number. 1071: They give nonzero only if REGNO is a hard reg of the suitable class 1072: or a pseudo reg currently allocated to a suitable hard reg. 1073: Since they use reg_renumber, they are safe only once reg_renumber 1074: has been allocated, which happens in local-alloc.c. */ 1075: 1076: #define REGNO_OK_FOR_INDEX_P(REGNO) 0 1077: #define REGNO_OK_FOR_BASE_P(REGNO) 1 1078: 1079: /* Given the value returned from get_frame_size, compute the actual size 1080: of the frame we will allocate. We include the pretend and outgoing 1081: arg sizes and round to a doubleword. */ 1082: 1083: #define ACTUAL_FRAME_SIZE(SIZE) \ 1084: (((SIZE) + current_function_pretend_args_size \ 1085: + current_function_outgoing_args_size + 7) & ~7) 1086: 1087: /* Define the initial offset between the frame and stack pointer. */ 1088: 1089: #define INITIAL_FRAME_POINTER_OFFSET(DEPTH) \ 1090: (DEPTH) = ACTUAL_FRAME_SIZE (get_frame_size ()) 1091: 1092: /* Maximum number of registers that can appear in a valid memory address. */ 1093: #define MAX_REGS_PER_ADDRESS 1 1094: 1.1.1.4 ! root 1095: /* Recognize any constant value that is a valid address. */ 1.1 root 1096: 1.1.1.4 ! root 1097: #define CONSTANT_ADDRESS_P(X) \ ! 1098: (GET_CODE (X) == CONST_INT && (unsigned) INTVAL (X) < 0x100) 1.1 root 1099: 1100: /* Include all constant integers and constant doubles */ 1101: #define LEGITIMATE_CONSTANT_P(X) 1 1102: 1103: /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx 1104: and check its validity for a certain class. 1105: We have two alternate definitions for each of them. 1106: The usual definition accepts all pseudo regs; the other rejects 1107: them unless they have been allocated suitable hard regs. 1108: The symbol REG_OK_STRICT causes the latter definition to be used. 1109: 1110: Most source files want to accept pseudo regs in the hope that 1111: they will get allocated to the class that the insn wants them to be in. 1112: Source files for reload pass need to be strict. 1113: After reload, it makes no difference, since pseudo regs have 1114: been eliminated by then. */ 1115: 1116: #ifndef REG_OK_STRICT 1117: 1118: /* Nonzero if X is a hard reg that can be used as an index 1119: or if it is a pseudo reg. */ 1120: #define REG_OK_FOR_INDEX_P(X) 0 1121: /* Nonzero if X is a hard reg that can be used as a base reg 1122: or if it is a pseudo reg. */ 1123: #define REG_OK_FOR_BASE_P(X) 1 1124: 1125: #else 1126: 1127: /* Nonzero if X is a hard reg that can be used as an index. */ 1128: #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X)) 1129: /* Nonzero if X is a hard reg that can be used as a base reg. */ 1130: #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X)) 1131: 1132: #endif 1133: 1134: /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression 1135: that is a valid memory address for an instruction. 1136: The MODE argument is the machine mode for the MEM expression 1137: that wants to use this address. 1138: 1139: On the 29k, a legitimate address is a register and so is a 1140: constant of less than 256. */ 1141: 1142: #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \ 1143: { if (REG_P (X) && REG_OK_FOR_BASE_P (X)) \ 1144: goto ADDR; \ 1145: if (GET_CODE (X) == CONST_INT \ 1146: && (unsigned) INTVAL (X) < 0x100) \ 1147: goto ADDR; \ 1148: } 1149: 1150: /* Try machine-dependent ways of modifying an illegitimate address 1151: to be legitimate. If we find one, return the new, valid address. 1152: This macro is used in only one place: `memory_address' in explow.c. 1153: 1154: OLDX is the address as it was before break_out_memory_refs was called. 1155: In some cases it is useful to look at this to decide what needs to be done. 1156: 1157: MODE and WIN are passed so that this macro can use 1158: GO_IF_LEGITIMATE_ADDRESS. 1159: 1160: It is always safe for this macro to do nothing. It exists to recognize 1161: opportunities to optimize the output. 1162: 1163: For the 29k, we need not do anything. However, if we don't, 1164: `memory_address' will try lots of things to get a valid address, most of 1165: which will result in dead code and extra pseudos. So we make the address 1166: valid here. 1167: 1168: This is easy: The only valid addresses are an offset from a register 1169: and we know the address isn't valid. So just call either `force_operand' 1170: or `force_reg' unless this is a (plus (reg ...) (const_int 0)). */ 1171: 1172: #define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) \ 1173: { if (GET_CODE (X) == PLUS && XEXP (X, 1) == const0_rtx) \ 1174: X = XEXP (x, 0); \ 1175: if (GET_CODE (X) == MULT || GET_CODE (X) == PLUS) \ 1176: X = force_operand (X, 0); \ 1177: else \ 1178: X = force_reg (Pmode, X); \ 1179: goto WIN; \ 1180: } 1181: 1182: /* Go to LABEL if ADDR (a legitimate address expression) 1183: has an effect that depends on the machine mode it is used for. 1184: On the 29k this is never true. */ 1185: 1186: #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) 1187: 1188: /* Compute the cost of an address. For the 29k, all valid addresses are 1189: the same cost. */ 1190: 1191: #define ADDRESS_COST(X) 0 1192: 1193: /* Define this if some processing needs to be done immediately before 1194: emitting code for an insn. */ 1195: 1196: /* #define FINAL_PRESCAN_INSN(INSN,OPERANDS,NOPERANDS) */ 1197: 1198: /* Specify the machine mode that this machine uses 1199: for the index in the tablejump instruction. */ 1200: #define CASE_VECTOR_MODE SImode 1201: 1202: /* Define this if the tablejump instruction expects the table 1203: to contain offsets from the address of the table. 1204: Do not define this if the table should contain absolute addresses. */ 1205: /* #define CASE_VECTOR_PC_RELATIVE */ 1206: 1207: /* Specify the tree operation to be used to convert reals to integers. */ 1208: #define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR 1209: 1210: /* This is the kind of divide that is easiest to do in the general case. */ 1211: #define EASY_DIV_EXPR TRUNC_DIV_EXPR 1212: 1213: /* Define this as 1 if `char' should by default be signed; else as 0. */ 1214: #define DEFAULT_SIGNED_CHAR 0 1215: 1216: /* This flag, if defined, says the same insns that convert to a signed fixnum 1217: also convert validly to an unsigned one. 1218: 1219: We actually lie a bit here as overflow conditions are different. But 1220: they aren't being checked anyway. */ 1221: 1222: #define FIXUNS_TRUNC_LIKE_FIX_TRUNC 1223: 1224: /* Max number of bytes we can move to of from memory 1225: in one reasonably fast instruction. 1226: 1227: For the 29k, we will define movti, so put this at 4 words. */ 1228: #define MOVE_MAX 16 1229: 1230: /* Largest number of bytes of an object that can be placed in a register. 1231: On the 29k we have plenty of registers, so use TImode. */ 1232: #define MAX_FIXED_MODE_SIZE GET_MODE_BITSIZE (TImode) 1233: 1234: /* Nonzero if access to memory by bytes is no faster than for words. 1235: Also non-zero if doing byte operations (specifically shifts) in registers 1236: is undesirable. 1237: 1238: On the 29k, large masks are expensive, so we want to use bytes to 1239: manipulate fields. */ 1240: #define SLOW_BYTE_ACCESS 0 1241: 1.1.1.2 root 1242: /* Define if operations between registers always perform the operation 1243: on the full register even if a narrower mode is specified. */ 1244: #define WORD_REGISTER_OPERATIONS 1245: 1246: /* Define if loading in MODE, an integral mode narrower than BITS_PER_WORD 1247: will either zero-extend or sign-extend. The value of this macro should 1248: be the code that says which one of the two operations is implicitly 1249: done, NIL if none. */ 1250: #define LOAD_EXTEND_OP(MODE) ZERO_EXTEND 1.1 root 1251: 1252: /* Define if the object format being used is COFF or a superset. */ 1253: #define OBJECT_FORMAT_COFF 1254: 1255: /* This uses COFF, so it wants SDB format. */ 1256: #define SDB_DEBUGGING_INFO 1257: 1258: /* Define this to be the delimiter between SDB sub-sections. The default 1259: is ";". */ 1260: #define SDB_DELIM "\n" 1261: 1262: /* Do not break .stabs pseudos into continuations. */ 1263: #define DBX_CONTIN_LENGTH 0 1264: 1265: /* Don't try to use the `x' type-cross-reference character in DBX data. 1266: Also has the consequence of putting each struct, union or enum 1267: into a separate .stabs, containing only cross-refs to the others. */ 1268: #define DBX_NO_XREFS 1269: 1270: /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits 1271: is done just by pretending it is already truncated. */ 1272: #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1 1273: 1274: /* We assume that the store-condition-codes instructions store 0 for false 1275: and some other value for true. This is the value stored for true. */ 1276: 1277: #define STORE_FLAG_VALUE 0x80000000 1278: 1279: /* Specify the machine mode that pointers have. 1280: After generation of rtl, the compiler makes no further distinction 1281: between pointers and any other objects of this machine mode. */ 1282: #define Pmode SImode 1283: 1284: /* Mode of a function address in a call instruction (for indexing purposes). 1285: 1286: Doesn't matter on 29k. */ 1287: #define FUNCTION_MODE SImode 1288: 1289: /* Define this if addresses of constant functions 1290: shouldn't be put through pseudo regs where they can be cse'd. 1291: Desirable on machines where ordinary constants are expensive 1292: but a CALL with constant address is cheap. */ 1293: #define NO_FUNCTION_CSE 1294: 1.1.1.2 root 1295: /* Define this to be nonzero if shift instructions ignore all but the low-order 1.1 root 1296: few bits. */ 1.1.1.2 root 1297: #define SHIFT_COUNT_TRUNCATED 1 1.1 root 1298: 1299: /* Compute the cost of computing a constant rtl expression RTX 1300: whose rtx-code is CODE. The body of this macro is a portion 1301: of a switch statement. If the code is computed here, 1302: return it with a return statement. Otherwise, break from the switch. 1303: 1304: We only care about the cost if it is valid in an insn. The only 1305: constants that cause an insn to generate more than one machine 1306: instruction are those involving floating-point or address. So 1307: only these need be expensive. */ 1308: 1309: #define CONST_COSTS(RTX,CODE,OUTER_CODE) \ 1310: case CONST_INT: \ 1311: return 0; \ 1312: case CONST: \ 1313: case LABEL_REF: \ 1314: case SYMBOL_REF: \ 1315: return 6; \ 1316: case CONST_DOUBLE: \ 1317: return GET_MODE (RTX) == SFmode ? 6 : 8; 1318: 1319: /* Provide the costs of a rtl expression. This is in the body of a 1320: switch on CODE. 1321: 1322: All MEMs cost the same if they are valid. This is used to ensure 1323: that (mem (symbol_ref ...)) is placed into a CALL when valid. 1324: 1325: The multiply cost depends on whether this is a 29050 or not. */ 1326: 1327: #define RTX_COSTS(X,CODE,OUTER_CODE) \ 1328: case MULT: \ 1329: return TARGET_29050 ? COSTS_N_INSNS (2) : COSTS_N_INSNS (40); \ 1330: case DIV: \ 1331: case UDIV: \ 1332: case MOD: \ 1333: case UMOD: \ 1334: return COSTS_N_INSNS (50); \ 1335: case MEM: \ 1336: return COSTS_N_INSNS (2); 1337: 1338: /* Control the assembler format that we output. */ 1339: 1340: /* Output at beginning of assembler file. */ 1341: 1342: #define ASM_FILE_START(FILE) \ 1343: { char *p, *after_dir = main_input_filename; \ 1344: if (TARGET_29050) \ 1345: fprintf (FILE, "\t.cputype 29050\n"); \ 1346: for (p = main_input_filename; *p; p++) \ 1347: if (*p == '/') \ 1348: after_dir = p + 1; \ 1.1.1.2 root 1349: fprintf (FILE, "\t.file "); \ 1350: output_quoted_string (FILE, after_dir); \ 1351: fprintf (FILE, "\n"); \ 1.1 root 1352: fprintf (FILE, "\t.sect .lit,lit\n"); } 1353: 1354: /* Output to assembler file text saying following lines 1355: may contain character constants, extra white space, comments, etc. */ 1356: 1357: #define ASM_APP_ON "" 1358: 1359: /* Output to assembler file text saying following lines 1360: no longer contain unusual constructs. */ 1361: 1362: #define ASM_APP_OFF "" 1363: 1364: /* The next few macros don't have tabs on most machines, but 1365: at least one 29K assembler wants them. */ 1366: 1367: /* Output before instructions. */ 1368: 1369: #define TEXT_SECTION_ASM_OP "\t.text" 1370: 1371: /* Output before read-only data. */ 1372: 1373: #define READONLY_DATA_SECTION_ASM_OP "\t.use .lit" 1374: 1375: /* Output before writable data. */ 1376: 1377: #define DATA_SECTION_ASM_OP "\t.data" 1378: 1379: /* Define an extra section for read-only data, a routine to enter it, and 1380: indicate that it is for read-only data. */ 1381: 1382: #define EXTRA_SECTIONS readonly_data 1383: 1384: #define EXTRA_SECTION_FUNCTIONS \ 1385: void \ 1386: literal_section () \ 1387: { \ 1388: if (in_section != readonly_data) \ 1389: { \ 1390: fprintf (asm_out_file, "%s\n", READONLY_DATA_SECTION_ASM_OP); \ 1391: in_section = readonly_data; \ 1392: } \ 1393: } \ 1394: 1395: #define READONLY_DATA_SECTION literal_section 1396: 1.1.1.2 root 1397: /* If we are referencing a function that is static or is known to be 1398: in this file, make the SYMBOL_REF special. We can use this to indicate 1399: that we can branch to this function without emitting a no-op after the 1400: call. */ 1401: 1402: #define ENCODE_SECTION_INFO(DECL) \ 1403: if (TREE_CODE (DECL) == FUNCTION_DECL \ 1404: && (TREE_ASM_WRITTEN (DECL) || ! TREE_PUBLIC (DECL))) \ 1405: SYMBOL_REF_FLAG (XEXP (DECL_RTL (DECL), 0)) = 1; 1406: 1.1 root 1407: /* How to refer to registers in assembler output. 1408: This sequence is indexed by compiler's hard-register-number (see above). */ 1409: 1410: #define REGISTER_NAMES \ 1411: {"gr96", "gr97", "gr98", "gr99", "gr100", "gr101", "gr102", "gr103", "gr104", \ 1412: "gr105", "gr106", "gr107", "gr108", "gr109", "gr110", "gr111", "gr112", \ 1413: "gr113", "gr114", "gr115", "gr116", "gr117", "gr118", "gr119", "gr120", \ 1414: "gr121", "gr122", "gr123", "gr124", "gr125", "gr126", "gr127", \ 1415: "lr0", "lr1", "lr2", "lr3", "lr4", "lr5", "lr6", "lr7", "lr8", "lr9", \ 1416: "lr10", "lr11", "lr12", "lr13", "lr14", "lr15", "lr16", "lr17", "lr18", \ 1417: "lr19", "lr20", "lr21", "lr22", "lr23", "lr24", "lr25", "lr26", "lr27", \ 1418: "lr28", "lr29", "lr30", "lr31", "lr32", "lr33", "lr34", "lr35", "lr36", \ 1419: "lr37", "lr38", "lr39", "lr40", "lr41", "lr42", "lr43", "lr44", "lr45", \ 1420: "lr46", "lr47", "lr48", "lr49", "lr50", "lr51", "lr52", "lr53", "lr54", \ 1421: "lr55", "lr56", "lr57", "lr58", "lr59", "lr60", "lr61", "lr62", "lr63", \ 1422: "lr64", "lr65", "lr66", "lr67", "lr68", "lr69", "lr70", "lr71", "lr72", \ 1423: "lr73", "lr74", "lr75", "lr76", "lr77", "lr78", "lr79", "lr80", "lr81", \ 1424: "lr82", "lr83", "lr84", "lr85", "lr86", "lr87", "lr88", "lr89", "lr90", \ 1425: "lr91", "lr92", "lr93", "lr94", "lr95", "lr96", "lr97", "lr98", "lr99", \ 1426: "lr100", "lr101", "lr102", "lr103", "lr104", "lr105", "lr106", "lr107", \ 1427: "lr108", "lr109", "lr110", "lr111", "lr112", "lr113", "lr114", "lr115", \ 1428: "lr116", "lr117", "lr118", "lr119", "lr120", "lr121", "lr122", "lr123", \ 1429: "lr124", "lr125", "lr126", "lr127", \ 1430: "AI0", "AI1", "AI2", "AI3", "AI4", "AI5", "AI6", "AI7", "AI8", "AI9", \ 1431: "AI10", "AI11", "AI12", "AI13", "AI14", "AI15", "FP", \ 1432: "bp", "fc", "cr", "q", \ 1433: "vab", "ops", "cps", "cfg", "cha", "chd", "chc", "rbp", "tmc", "tmr", \ 1434: "pc0", "pc1", "pc2", "mmu", "lru", "fpe", "int", "fps", "exo", \ 1.1.1.2 root 1435: "0", "1", "2", "3", \ 1436: "gr64", "gr65", "gr66", "gr67", "gr68", "gr69", "gr70", "gr71", \ 1437: "gr72", "gr73", "gr74", "gr75", "gr76", "gr77", "gr78", "gr79", \ 1438: "gr80", "gr81", "gr82", "gr83", "gr84", "gr85", "gr86", "gr87", \ 1439: "gr88", "gr89", "gr90", "gr91", "gr92", "gr93", "gr94", "gr95" } 1.1 root 1440: 1441: /* How to renumber registers for dbx and gdb. */ 1442: 1443: extern int a29k_debug_reg_map[]; 1444: #define DBX_REGISTER_NUMBER(REGNO) a29k_debug_reg_map[REGNO] 1445: 1.1.1.4 ! root 1446: /* This how to write an assembler directive to FILE to switch to ! 1447: section NAME for DECL. */ ! 1448: ! 1449: #define ASM_OUTPUT_SECTION_NAME(FILE, DECL, NAME) \ ! 1450: fprintf (FILE, "\t.sect %s, bss\n\t.use %s\n", NAME, NAME) ! 1451: 1.1 root 1452: /* This is how to output the definition of a user-level label named NAME, 1453: such as the label on a static function or variable NAME. */ 1454: 1455: #define ASM_OUTPUT_LABEL(FILE,NAME) \ 1456: do { assemble_name (FILE, NAME); fputs (":\n", FILE); } while (0) 1457: 1458: /* This is how to output a command to make the user-level label named NAME 1459: defined for reference from other files. */ 1460: 1461: #define ASM_GLOBALIZE_LABEL(FILE,NAME) \ 1462: do { fputs ("\t.global ", FILE); assemble_name (FILE, NAME); fputs ("\n", FILE);} while (0) 1463: 1464: /* This is how to output a reference to a user-level label named NAME. 1465: `assemble_name' uses this. */ 1466: 1467: #define ASM_OUTPUT_LABELREF(FILE,NAME) \ 1468: fprintf (FILE, "_%s", NAME) 1469: 1470: /* This is how to output an internal numbered label where 1471: PREFIX is the class of label and NUM is the number within the class. */ 1472: 1473: #define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \ 1474: fprintf (FILE, "%s%d:\n", PREFIX, NUM) 1475: 1476: /* This is how to output a label for a jump table. Arguments are the same as 1477: for ASM_OUTPUT_INTERNAL_LABEL, except the insn for the jump table is 1478: passed. */ 1479: 1480: #define ASM_OUTPUT_CASE_LABEL(FILE,PREFIX,NUM,TABLEINSN) \ 1481: { ASM_OUTPUT_ALIGN (FILE, 2); ASM_OUTPUT_INTERNAL_LABEL (FILE, PREFIX, NUM); } 1482: 1483: /* This is how to store into the string LABEL 1484: the symbol_ref name of an internal numbered label where 1485: PREFIX is the class of label and NUM is the number within the class. 1486: This is suitable for output with `assemble_name'. */ 1487: 1488: #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \ 1489: sprintf (LABEL, "*%s%d", PREFIX, NUM) 1490: 1491: /* This is how to output an assembler line defining a `double' constant. */ 1492: 1493: #define ASM_OUTPUT_DOUBLE(FILE,VALUE) \ 1494: fprintf (FILE, "\t.double %.20e\n", (VALUE)) 1495: 1496: /* This is how to output an assembler line defining a `float' constant. */ 1497: 1498: #define ASM_OUTPUT_FLOAT(FILE,VALUE) \ 1499: fprintf (FILE, "\t.float %.20e\n", (VALUE)) 1500: 1501: /* This is how to output an assembler line defining an `int' constant. */ 1502: 1503: #define ASM_OUTPUT_INT(FILE,VALUE) \ 1504: ( fprintf (FILE, "\t.word "), \ 1505: output_addr_const (FILE, (VALUE)), \ 1506: fprintf (FILE, "\n")) 1507: 1508: /* Likewise for `char' and `short' constants. */ 1509: 1510: #define ASM_OUTPUT_SHORT(FILE,VALUE) \ 1511: ( fprintf (FILE, "\t.hword "), \ 1512: output_addr_const (FILE, (VALUE)), \ 1513: fprintf (FILE, "\n")) 1514: 1515: #define ASM_OUTPUT_CHAR(FILE,VALUE) \ 1516: ( fprintf (FILE, "\t.byte "), \ 1517: output_addr_const (FILE, (VALUE)), \ 1518: fprintf (FILE, "\n")) 1519: 1520: /* This is how to output an insn to push a register on the stack. 1521: It need not be very fast code. */ 1522: 1523: #define ASM_OUTPUT_REG_PUSH(FILE,REGNO) \ 1524: fprintf (FILE, "\tsub %s,%s,4\n\tstore 0,0,%s,%s\n", \ 1525: reg_names[R_MSP], reg_names[R_MSP], reg_names[REGNO], \ 1526: reg_names[R_MSP]); 1527: 1528: /* This is how to output an insn to pop a register from the stack. 1529: It need not be very fast code. */ 1530: 1531: #define ASM_OUTPUT_REG_POP(FILE,REGNO) \ 1532: fprintf (FILE, "\tload 0,0,%s,%s\n\tadd %s,%s,4\n", \ 1533: reg_names[REGNO], reg_names[R_MSP], reg_names[R_MSP], \ 1534: reg_names[R_MSP]); 1535: 1536: /* This is how to output an assembler line for a numeric constant byte. */ 1537: 1538: #define ASM_OUTPUT_BYTE(FILE,VALUE) \ 1539: fprintf (FILE, "\t.byte 0x%x\n", (VALUE)) 1540: 1541: /* This is how to output an element of a case-vector that is absolute. */ 1542: 1543: #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \ 1544: fprintf (FILE, "\t.word L%d\n", VALUE) 1545: 1546: /* This is how to output an element of a case-vector that is relative. 1547: (29k does not use such vectors, 1548: but we must define this macro anyway.) */ 1549: 1550: #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, VALUE, REL) abort () 1551: 1552: /* This is how to output an assembler line 1553: that says to advance the location counter 1554: to a multiple of 2**LOG bytes. */ 1555: 1556: #define ASM_OUTPUT_ALIGN(FILE,LOG) \ 1557: if ((LOG) != 0) \ 1558: fprintf (FILE, "\t.align %d\n", 1 << (LOG)) 1559: 1560: #define ASM_OUTPUT_SKIP(FILE,SIZE) \ 1561: fprintf (FILE, "\t.block %d\n", (SIZE)) 1562: 1563: /* This says how to output an assembler line 1564: to define a global common symbol. */ 1565: 1566: #define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \ 1567: ( fputs ("\t.comm ", (FILE)), \ 1568: assemble_name ((FILE), (NAME)), \ 1569: fprintf ((FILE), ",%d\n", (SIZE))) 1570: 1571: /* This says how to output an assembler line 1572: to define a local common symbol. */ 1573: 1574: #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE,ROUNDED) \ 1575: ( fputs ("\t.lcomm ", (FILE)), \ 1576: assemble_name ((FILE), (NAME)), \ 1577: fprintf ((FILE), ",%d\n", (SIZE))) 1578: 1579: /* Store in OUTPUT a string (made with alloca) containing 1580: an assembler-name for a local static variable named NAME. 1581: LABELNO is an integer which is different for each call. */ 1582: 1583: #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \ 1584: ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \ 1585: sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO))) 1586: 1587: /* Define the parentheses used to group arithmetic operations 1588: in assembler code. */ 1589: 1590: #define ASM_OPEN_PAREN "(" 1591: #define ASM_CLOSE_PAREN ")" 1592: 1593: /* Define results of standard character escape sequences. */ 1594: #define TARGET_BELL 007 1595: #define TARGET_BS 010 1596: #define TARGET_TAB 011 1597: #define TARGET_NEWLINE 012 1598: #define TARGET_VT 013 1599: #define TARGET_FF 014 1600: #define TARGET_CR 015 1601: 1602: /* Print operand X (an rtx) in assembler syntax to file FILE. 1603: CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified. 1604: For `%' followed by punctuation, CODE is the punctuation and X is null. */ 1605: 1606: #define PRINT_OPERAND(FILE, X, CODE) print_operand (FILE, X, CODE) 1607: 1608: /* Determine which codes are valid without a following integer. These must 1609: not be alphabetic. 1610: 1611: We support `#' which is null if a delay slot exists, otherwise 1612: "\n\tnop" and `*' which prints the register name for TPC (gr122). */ 1613: 1614: #define PRINT_OPERAND_PUNCT_VALID_P(CODE) ((CODE) == '#' || (CODE) == '*') 1615: 1616: /* Print a memory address as an operand to reference that memory location. */ 1617: 1618: #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \ 1619: { register rtx addr = ADDR; \ 1620: if (!REG_P (addr) \ 1621: && ! (GET_CODE (addr) == CONST_INT \ 1622: && INTVAL (addr) >= 0 && INTVAL (addr) < 256)) \ 1623: abort (); \ 1624: output_operand (addr, 0); \ 1625: } 1626: /* Define the codes that are matched by predicates in a29k.c. */ 1627: 1628: #define PREDICATE_CODES \ 1629: {"cint_8_operand", {CONST_INT}}, \ 1630: {"cint_16_operand", {CONST_INT}}, \ 1631: {"long_const_operand", {CONST_INT, CONST, CONST_DOUBLE, \ 1632: LABEL_REF, SYMBOL_REF}}, \ 1633: {"shift_constant_operand", {CONST_INT, ASHIFT}}, \ 1.1.1.2 root 1634: {"const_0_operand", {CONST_INT, ASHIFT}}, \ 1635: {"const_8_operand", {CONST_INT, ASHIFT}}, \ 1636: {"const_16_operand", {CONST_INT, ASHIFT}}, \ 1637: {"const_24_operand", {CONST_INT, ASHIFT}}, \ 1.1 root 1638: {"float_const_operand", {CONST_DOUBLE}}, \ 1639: {"gpc_reg_operand", {SUBREG, REG}}, \ 1640: {"gpc_reg_or_float_constant_operand", {SUBREG, REG, CONST_DOUBLE}}, \ 1641: {"gpc_reg_or_integer_constant_operand", {SUBREG, REG, \ 1642: CONST_INT, CONST_DOUBLE}}, \ 1.1.1.2 root 1643: {"gpc_reg_or_immediate_operand", {SUBREG, REG, CONST_INT, \ 1644: CONST_DOUBLE, CONST, \ 1645: SYMBOL_REF, LABEL_REF}}, \ 1.1 root 1646: {"spec_reg_operand", {REG}}, \ 1647: {"accum_reg_operand", {REG}}, \ 1648: {"srcb_operand", {SUBREG, REG, CONST_INT}}, \ 1.1.1.3 root 1649: {"cmplsrcb_operand", {SUBREG, REG, CONST_INT}}, \ 1.1 root 1650: {"reg_or_immediate_operand", {SUBREG, REG, CONST_INT, CONST, \ 1651: CONST_DOUBLE, CONST, SYMBOL_REF, LABEL_REF}}, \ 1652: {"reg_or_u_short_operand", {SUBREG, REG, CONST_INT}}, \ 1653: {"and_operand", {SUBREG, REG, CONST_INT}}, \ 1654: {"add_operand", {SUBREG, REG, CONST_INT}}, \ 1655: {"call_operand", {SYMBOL_REF, CONST_INT}}, \ 1656: {"in_operand", {SUBREG, MEM, REG, CONST_INT, CONST, SYMBOL_REF, \ 1657: LABEL_REF, CONST_DOUBLE}}, \ 1658: {"out_operand", {SUBREG, REG, MEM}}, \ 1659: {"reload_memory_operand", {SUBREG, REG, MEM}}, \ 1660: {"fp_comparison_operator", {EQ, GT, GE}}, \ 1661: {"branch_operator", {GE, LT}}, \ 1.1.1.2 root 1662: {"load_multiple_operation", {PARALLEL}}, \ 1663: {"store_multiple_operation", {PARALLEL}}, \ 1.1 root 1664: {"epilogue_operand", {CODE_LABEL}},
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