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1.1 ! root 1: /* Definitions of target machine for GNU compiler, for DEC Alpha. ! 2: Copyright (C) 1992 Free Software Foundation, Inc. ! 3: Contributed by Richard Kenner ([email protected]) ! 4: ! 5: This file is part of GNU CC. ! 6: ! 7: GNU CC is free software; you can redistribute it and/or modify ! 8: it under the terms of the GNU General Public License as published by ! 9: the Free Software Foundation; either version 2, or (at your option) ! 10: any later version. ! 11: ! 12: GNU CC is distributed in the hope that it will be useful, ! 13: but WITHOUT ANY WARRANTY; without even the implied warranty of ! 14: MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ! 15: GNU General Public License for more details. ! 16: ! 17: You should have received a copy of the GNU General Public License ! 18: along with GNU CC; see the file COPYING. If not, write to ! 19: the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */ ! 20: ! 21: ! 22: /* Names to predefine in the preprocessor for this target machine. */ ! 23: ! 24: #define CPP_PREDEFINES "\ ! 25: -Dunix -D__osf__ -D__alpha -D__alpha__ -D_LONGLONG -DSYSTYPE_BSD \ ! 26: -D_SYSTYPE_BSD" ! 27: ! 28: /* Write out the correct language type definition for the header files. */ ! 29: #define CPP_SPEC "\ ! 30: %{.c: -D__LANGUAGE_C__ -D__LANGUAGE_C %{!ansi:-DLANGUAGE_C}} \ ! 31: %{.h: -D__LANGUAGE_C__ -D__LANGUAGE_C %{!ansi:-DLANGUAGE_C}} \ ! 32: %{.S: -D__LANGUAGE_ASSEMBLY__ -D__LANGUAGE_ASSEMBLY %{!ansi:-DLANGUAGE_ASSEMBLY}} \ ! 33: %{.cc: -D__LANGUAGE_C_PLUS_PLUS__ -D__LANGUAGE_C_PLUS_PLUS} \ ! 34: %{.cxx: -D__LANGUAGE_C_PLUS_PLUS__ -D__LANGUAGE_C_PLUS_PLUS} \ ! 35: %{.C: -D__LANGUAGE_C_PLUS_PLUS__ -D__LANGUAGE_C_PLUS_PLUS} \ ! 36: %{.m: -D__LANGUAGE_OBJECTIVE_C__ -D__LANGUAGE_OBJECTIVE_C}" ! 37: ! 38: /* Set the spec to use for signed char. The default tests the above macro ! 39: but DEC's compiler can't handle the conditional in a "constant" ! 40: operand. */ ! 41: ! 42: #define SIGNED_CHAR_SPEC "%{funsigned-char:-D__CHAR_UNSIGNED__}" ! 43: ! 44: /* No point in running CPP on our assembler output. */ ! 45: #define ASM_SPEC "-nocpp" ! 46: ! 47: /* Right now Alpha OSF/1 doesn't seem to have debugging or profiled ! 48: libraries. */ ! 49: ! 50: #define LIB_SPEC "-lc" ! 51: ! 52: /* Print subsidiary information on the compiler version in use. */ ! 53: #define TARGET_VERSION ! 54: ! 55: /* Define the location for the startup file on OSF/1 for Alpha. */ ! 56: ! 57: #define MD_STARTFILE_PREFIX "/usr/lib/cmplrs/cc/" ! 58: ! 59: /* Run-time compilation parameters selecting different hardware subsets. */ ! 60: ! 61: extern int target_flags; ! 62: ! 63: /* This means that floating-point support exists in the target implementation ! 64: of the Alpha architecture. This is usually the default. */ ! 65: ! 66: #define TARGET_FP (target_flags & 1) ! 67: ! 68: /* This means that floating-point registers are allowed to be used. Note ! 69: that Alpha implementations without FP operations are required to ! 70: provide the FP registers. */ ! 71: ! 72: #define TARGET_FPREGS (target_flags & 2) ! 73: ! 74: /* Macro to define tables used to set the flags. ! 75: This is a list in braces of pairs in braces, ! 76: each pair being { "NAME", VALUE } ! 77: where VALUE is the bits to set or minus the bits to clear. ! 78: An empty string NAME is used to identify the default VALUE. */ ! 79: ! 80: #define TARGET_SWITCHES \ ! 81: { {"no-soft-float", 1}, \ ! 82: {"soft-float", -1}, \ ! 83: {"fp-regs", 2}, \ ! 84: {"no-fp-regs", -3}, \ ! 85: {"", TARGET_DEFAULT} } ! 86: ! 87: #define TARGET_DEFAULT 3 ! 88: ! 89: /* Define this macro to change register usage conditional on target flags. ! 90: ! 91: On the Alpha, we use this to disable the floating-point registers when ! 92: they don't exist. */ ! 93: ! 94: #define CONDITIONAL_REGISTER_USAGE \ ! 95: if (! TARGET_FPREGS) \ ! 96: for (i = 32; i < 64; i++) \ ! 97: fixed_regs[i] = call_used_regs[i] = 1; ! 98: ! 99: /* Define this to change the optimizations performed by default. */ ! 100: ! 101: #define OPTIMIZATION_OPTIONS(LEVEL) \ ! 102: { \ ! 103: if ((LEVEL) > 0) \ ! 104: { \ ! 105: flag_force_addr = 1; \ ! 106: flag_force_mem = 1; \ ! 107: flag_omit_frame_pointer = 1; \ ! 108: } \ ! 109: } ! 110: ! 111: /* target machine storage layout */ ! 112: ! 113: /* Define the size of `int'. The default is the same as the word size. */ ! 114: #define INT_TYPE_SIZE 32 ! 115: ! 116: /* Define the size of `long long'. The default is the twice the word size. */ ! 117: #define LONG_LONG_TYPE_SIZE 64 ! 118: ! 119: /* The two floating-point formats we support are S-floating, which is ! 120: 4 bytes, and T-floating, which is 8 bytes. `float' is S and `double' ! 121: and `long double' are T. */ ! 122: ! 123: #define FLOAT_TYPE_SIZE 32 ! 124: #define DOUBLE_TYPE_SIZE 64 ! 125: #define LONG_DOUBLE_TYPE_SIZE 64 ! 126: ! 127: #define WCHAR_TYPE "short unsigned int" ! 128: #define WCHAR_TYPE_SIZE 16 ! 129: ! 130: /* Define this macro if it is advisible to hold scalars in registers ! 131: in a wider mode than that declared by the program. In such cases, ! 132: the value is constrained to be within the bounds of the declared ! 133: type, but kept valid in the wider mode. The signedness of the ! 134: extension may differ from that of the type. ! 135: ! 136: For Alpha, we always store objects in a full register. 32-bit objects ! 137: are always sign-extended, but smaller objects retain their signedness. */ ! 138: ! 139: #define PROMOTE_MODE(MODE,UNSIGNEDP,TYPE) \ ! 140: if (GET_MODE_CLASS (MODE) == MODE_INT \ ! 141: && GET_MODE_SIZE (MODE) < UNITS_PER_WORD) \ ! 142: { \ ! 143: if ((MODE) == SImode) \ ! 144: (UNSIGNEDP) = 0; \ ! 145: (MODE) = DImode; \ ! 146: } ! 147: ! 148: /* Define this if function arguments should also be promoted using the above ! 149: procedure. */ ! 150: ! 151: #define PROMOTE_FUNCTION_ARGS ! 152: ! 153: /* Likewise, if the function return value is promoted. */ ! 154: ! 155: #define PROMOTE_FUNCTION_RETURN ! 156: ! 157: /* Define this if most significant bit is lowest numbered ! 158: in instructions that operate on numbered bit-fields. ! 159: ! 160: There are no such instructions on the Alpha, but the documentation ! 161: is little endian. */ ! 162: #define BITS_BIG_ENDIAN 0 ! 163: ! 164: /* Define this if most significant byte of a word is the lowest numbered. ! 165: This is false on the Alpha. */ ! 166: #define BYTES_BIG_ENDIAN 0 ! 167: ! 168: /* Define this if most significant word of a multiword number is lowest ! 169: numbered. ! 170: ! 171: For Alpha we can decide arbitrarily since there are no machine instructions ! 172: for them. Might as well be consistent with bytes. */ ! 173: #define WORDS_BIG_ENDIAN 0 ! 174: ! 175: /* number of bits in an addressable storage unit */ ! 176: #define BITS_PER_UNIT 8 ! 177: ! 178: /* Width in bits of a "word", which is the contents of a machine register. ! 179: Note that this is not necessarily the width of data type `int'; ! 180: if using 16-bit ints on a 68000, this would still be 32. ! 181: But on a machine with 16-bit registers, this would be 16. */ ! 182: #define BITS_PER_WORD 64 ! 183: ! 184: /* Width of a word, in units (bytes). */ ! 185: #define UNITS_PER_WORD 8 ! 186: ! 187: /* Width in bits of a pointer. ! 188: See also the macro `Pmode' defined below. */ ! 189: #define POINTER_SIZE 64 ! 190: ! 191: /* Allocation boundary (in *bits*) for storing arguments in argument list. */ ! 192: #define PARM_BOUNDARY 64 ! 193: ! 194: /* Boundary (in *bits*) on which stack pointer should be aligned. */ ! 195: #define STACK_BOUNDARY 64 ! 196: ! 197: /* Allocation boundary (in *bits*) for the code of a function. */ ! 198: #define FUNCTION_BOUNDARY 64 ! 199: ! 200: /* Alignment of field after `int : 0' in a structure. */ ! 201: #define EMPTY_FIELD_BOUNDARY 64 ! 202: ! 203: /* Every structure's size must be a multiple of this. */ ! 204: #define STRUCTURE_SIZE_BOUNDARY 8 ! 205: ! 206: /* A bitfield declared as `int' forces `int' alignment for the struct. */ ! 207: #define PCC_BITFIELD_TYPE_MATTERS 1 ! 208: ! 209: /* Align loop starts for optimal branching. ! 210: ! 211: Don't do this until they fix the assembler. */ ! 212: ! 213: /* #define ASM_OUTPUT_LOOP_ALIGN(FILE) \ ! 214: ASM_OUTPUT_ALIGN (FILE, 5) */ ! 215: ! 216: /* This is how to align an instruction for optimal branching. ! 217: On Alpha we'll get better performance by aligning on a quadword ! 218: boundary. */ ! 219: #define ASM_OUTPUT_ALIGN_CODE(FILE) \ ! 220: ASM_OUTPUT_ALIGN ((FILE), 4) ! 221: ! 222: /* No data type wants to be aligned rounder than this. */ ! 223: #define BIGGEST_ALIGNMENT 64 ! 224: ! 225: /* Make strings word-aligned so strcpy from constants will be faster. */ ! 226: #define CONSTANT_ALIGNMENT(EXP, ALIGN) \ ! 227: (TREE_CODE (EXP) == STRING_CST \ ! 228: && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN)) ! 229: ! 230: /* Make arrays of chars word-aligned for the same reasons. */ ! 231: #define DATA_ALIGNMENT(TYPE, ALIGN) \ ! 232: (TREE_CODE (TYPE) == ARRAY_TYPE \ ! 233: && TYPE_MODE (TREE_TYPE (TYPE)) == QImode \ ! 234: && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN)) ! 235: ! 236: /* Set this non-zero if move instructions will actually fail to work ! 237: when given unaligned data. ! 238: ! 239: Since we get an error message when we do one, call them invalid. */ ! 240: ! 241: #define STRICT_ALIGNMENT 1 ! 242: ! 243: /* Set this non-zero if unaligned move instructions are extremely slow. ! 244: ! 245: On the Alpha, they trap. */ ! 246: /* #define SLOW_UNALIGNED_ACCESS 1 */ ! 247: ! 248: /* Standard register usage. */ ! 249: ! 250: /* Number of actual hardware registers. ! 251: The hardware registers are assigned numbers for the compiler ! 252: from 0 to just below FIRST_PSEUDO_REGISTER. ! 253: All registers that the compiler knows about must be given numbers, ! 254: even those that are not normally considered general registers. ! 255: ! 256: We define all 32 integer registers, even though $31 is always zero, ! 257: and all 32 floating-point registers, even though $f31 is also ! 258: always zero. We do not bother defining the FP status register and ! 259: there are no other registers. */ ! 260: ! 261: #define FIRST_PSEUDO_REGISTER 64 ! 262: ! 263: /* 1 for registers that have pervasive standard uses ! 264: and are not available for the register allocator. */ ! 265: ! 266: #define FIXED_REGISTERS \ ! 267: {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ ! 268: 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, \ ! 269: 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ ! 270: 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1 } ! 271: ! 272: /* 1 for registers not available across function calls. ! 273: These must include the FIXED_REGISTERS and also any ! 274: registers that can be used without being saved. ! 275: The latter must include the registers where values are returned ! 276: and the register where structure-value addresses are passed. ! 277: Aside from that, you can include as many other registers as you like. */ ! 278: #define CALL_USED_REGISTERS \ ! 279: {1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, \ ! 280: 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 1, 1, 1, 1, 1, \ ! 281: 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, \ ! 282: 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 } ! 283: ! 284: /* List the order in which to allocate registers. Each register must be ! 285: listed once, even those in FIXED_REGISTERS. ! 286: ! 287: We allocate in the following order: ! 288: $f1 (nonsaved floating-point register) ! 289: $f10-$f15 (likewise) ! 290: $f22-$f30 (likewise) ! 291: $f21-$f16 (likewise, but input args) ! 292: $f0 (nonsaved, but return value) ! 293: $f2-$f9 (saved floating-point registers) ! 294: $1-$8 (nonsaved integer registers) ! 295: $22-$25 (likewise) ! 296: $28 (likewise) ! 297: $0 (likewise, but return value) ! 298: $21-$16 (likewise, but input args) ! 299: $27 (procedure value) ! 300: $9-$14 (saved integer registers) ! 301: $26 (return PC) ! 302: $15 (frame pointer) ! 303: $29 (global pointer) ! 304: $30, $31, $f31 (stack pointer and always zero) */ ! 305: ! 306: #define REG_ALLOC_ORDER \ ! 307: {33, \ ! 308: 42, 43, 44, 45, \ ! 309: 54, 55, 56, 57, 58, 59, 60, 61, 62, \ ! 310: 53, 52, 51, 50, 49, 48, \ ! 311: 32, \ ! 312: 34, 35, 36, 37, 38, 39, 40, 41, \ ! 313: 1, 2, 3, 4, 5, 6, 7, 8, \ ! 314: 22, 23, 24, 25, \ ! 315: 28, \ ! 316: 0, \ ! 317: 21, 20, 19, 18, 17, 16, \ ! 318: 27, \ ! 319: 9, 10, 11, 12, 13, 14, \ ! 320: 26, \ ! 321: 15, \ ! 322: 29, \ ! 323: 30, 31, 63 } ! 324: ! 325: /* Return number of consecutive hard regs needed starting at reg REGNO ! 326: to hold something of mode MODE. ! 327: This is ordinarily the length in words of a value of mode MODE ! 328: but can be less for certain modes in special long registers. */ ! 329: ! 330: #define HARD_REGNO_NREGS(REGNO, MODE) \ ! 331: ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD) ! 332: ! 333: /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE. ! 334: On Alpha, the integer registers can hold any mode. The floating-point ! 335: registers can hold 32-bit and 64-bit integers as well, but not 16-bit ! 336: or 8-bit values. If we only allowed the larger integers into FP registers, ! 337: we'd have to say that QImode and SImode aren't tiable, which is a ! 338: pain. So say all registers can hold everything and see how that works. */ ! 339: ! 340: #define HARD_REGNO_MODE_OK(REGNO, MODE) 1 ! 341: ! 342: /* Value is 1 if it is a good idea to tie two pseudo registers ! 343: when one has mode MODE1 and one has mode MODE2. ! 344: If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2, ! 345: for any hard reg, then this must be 0 for correct output. */ ! 346: ! 347: #define MODES_TIEABLE_P(MODE1, MODE2) 1 ! 348: ! 349: /* Specify the registers used for certain standard purposes. ! 350: The values of these macros are register numbers. */ ! 351: ! 352: /* Alpha pc isn't overloaded on a register that the compiler knows about. */ ! 353: /* #define PC_REGNUM */ ! 354: ! 355: /* Register to use for pushing function arguments. */ ! 356: #define STACK_POINTER_REGNUM 30 ! 357: ! 358: /* Base register for access to local variables of the function. */ ! 359: #define FRAME_POINTER_REGNUM 15 ! 360: ! 361: /* Value should be nonzero if functions must have frame pointers. ! 362: Zero means the frame pointer need not be set up (and parms ! 363: may be accessed via the stack pointer) in functions that seem suitable. ! 364: This is computed in `reload', in reload1.c. */ ! 365: #define FRAME_POINTER_REQUIRED 0 ! 366: ! 367: /* Base register for access to arguments of the function. */ ! 368: #define ARG_POINTER_REGNUM 15 ! 369: ! 370: /* Register in which static-chain is passed to a function. ! 371: ! 372: For the Alpha, this is based on an example; the calling sequence ! 373: doesn't seem to specify this. */ ! 374: #define STATIC_CHAIN_REGNUM 1 ! 375: ! 376: /* Register in which address to store a structure value ! 377: arrives in the function. On the Alpha, the address is passed ! 378: as a hidden argument. */ ! 379: #define STRUCT_VALUE 0 ! 380: ! 381: /* Define the classes of registers for register constraints in the ! 382: machine description. Also define ranges of constants. ! 383: ! 384: One of the classes must always be named ALL_REGS and include all hard regs. ! 385: If there is more than one class, another class must be named NO_REGS ! 386: and contain no registers. ! 387: ! 388: The name GENERAL_REGS must be the name of a class (or an alias for ! 389: another name such as ALL_REGS). This is the class of registers ! 390: that is allowed by "g" or "r" in a register constraint. ! 391: Also, registers outside this class are allocated only when ! 392: instructions express preferences for them. ! 393: ! 394: The classes must be numbered in nondecreasing order; that is, ! 395: a larger-numbered class must never be contained completely ! 396: in a smaller-numbered class. ! 397: ! 398: For any two classes, it is very desirable that there be another ! 399: class that represents their union. */ ! 400: ! 401: enum reg_class { NO_REGS, GENERAL_REGS, FLOAT_REGS, ALL_REGS, ! 402: LIM_REG_CLASSES }; ! 403: ! 404: #define N_REG_CLASSES (int) LIM_REG_CLASSES ! 405: ! 406: /* Give names of register classes as strings for dump file. */ ! 407: ! 408: #define REG_CLASS_NAMES \ ! 409: {"NO_REGS", "GENERAL_REGS", "FLOAT_REGS", "ALL_REGS" } ! 410: ! 411: /* Define which registers fit in which classes. ! 412: This is an initializer for a vector of HARD_REG_SET ! 413: of length N_REG_CLASSES. */ ! 414: ! 415: #define REG_CLASS_CONTENTS \ ! 416: { {0, 0}, {~0, 0}, {0, ~0}, {~0, ~0} } ! 417: ! 418: /* The same information, inverted: ! 419: Return the class number of the smallest class containing ! 420: reg number REGNO. This could be a conditional expression ! 421: or could index an array. */ ! 422: ! 423: #define REGNO_REG_CLASS(REGNO) ((REGNO) >= 32 ? FLOAT_REGS : GENERAL_REGS) ! 424: ! 425: /* The class value for index registers, and the one for base regs. */ ! 426: #define INDEX_REG_CLASS NO_REGS ! 427: #define BASE_REG_CLASS GENERAL_REGS ! 428: ! 429: /* Get reg_class from a letter such as appears in the machine description. */ ! 430: ! 431: #define REG_CLASS_FROM_LETTER(C) \ ! 432: ((C) == 'f' ? FLOAT_REGS : NO_REGS) ! 433: ! 434: /* Define this macro to change register usage conditional on target flags. */ ! 435: /* #define CONDITIONAL_REGISTER_USAGE */ ! 436: ! 437: /* The letters I, J, K, L, M, N, O, and P in a register constraint string ! 438: can be used to stand for particular ranges of immediate operands. ! 439: This macro defines what the ranges are. ! 440: C is the letter, and VALUE is a constant value. ! 441: Return 1 if VALUE is in the range specified by C. ! 442: ! 443: For Alpha: ! 444: `I' is used for the range of constants most insns can contain. ! 445: `J' is the constant zero. ! 446: `K' is used for the constant in an LDA insn. ! 447: `L' is used for the constant in a LDAH insn. ! 448: `M' is used for the constants that can be AND'ed with using a ZAP insn. ! 449: `N' is used for complemented 8-bit constants. ! 450: `O' is used for negated 8-bit constants. ! 451: `P' is used for the constants 1, 2 and 3. */ ! 452: ! 453: #define CONST_OK_FOR_LETTER_P(VALUE, C) \ ! 454: ((C) == 'I' ? (unsigned HOST_WIDE_INT) (VALUE) < 0x100 \ ! 455: : (C) == 'J' ? (VALUE) == 0 \ ! 456: : (C) == 'K' ? (unsigned HOST_WIDE_INT) ((VALUE) + 0x8000) < 0x10000 \ ! 457: : (C) == 'L' ? (((VALUE) & 0xffff) == 0 \ ! 458: && (((VALUE)) >> 31 == -1 || (VALUE) >> 31 == 0)) \ ! 459: : (C) == 'M' ? zap_mask (VALUE) \ ! 460: : (C) == 'N' ? (unsigned HOST_WIDE_INT) (~ (VALUE)) < 0x100 \ ! 461: : (C) == 'O' ? (unsigned HOST_WIDE_INT) (- (VALUE)) < 0x100 \ ! 462: : (C) == 'P' ? (VALUE) == 1 || (VALUE) == 2 || (VALUE) == 3 \ ! 463: : 0) ! 464: ! 465: /* Similar, but for floating or large integer constants, and defining letters ! 466: G and H. Here VALUE is the CONST_DOUBLE rtx itself. ! 467: ! 468: For Alpha, `G' is the floating-point constant zero. `H' is a CONST_DOUBLE ! 469: that is the operand of a ZAP insn. */ ! 470: ! 471: #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \ ! 472: ((C) == 'G' ? (GET_MODE_CLASS (GET_MODE (VALUE)) == MODE_FLOAT \ ! 473: && (VALUE) == CONST0_RTX (GET_MODE (VALUE))) \ ! 474: : (C) == 'H' ? (GET_MODE (VALUE) == VOIDmode \ ! 475: && zap_mask (CONST_DOUBLE_LOW (VALUE)) \ ! 476: && zap_mask (CONST_DOUBLE_HIGH (VALUE))) \ ! 477: : 0) ! 478: ! 479: /* Given an rtx X being reloaded into a reg required to be ! 480: in class CLASS, return the class of reg to actually use. ! 481: In general this is just CLASS; but on some machines ! 482: in some cases it is preferable to use a more restrictive class. ! 483: ! 484: On the Alpha, all constants except zero go into a floating-point ! 485: register via memory. */ ! 486: ! 487: #define PREFERRED_RELOAD_CLASS(X, CLASS) \ ! 488: (CONSTANT_P (X) && (X) != const0_rtx && (X) != CONST0_RTX (GET_MODE (X)) \ ! 489: ? ((CLASS) == FLOAT_REGS ? NO_REGS : GENERAL_REGS) \ ! 490: : (CLASS)) ! 491: ! 492: /* Loading and storing HImode or QImode values to and from memory ! 493: usually requires a scratch register. The exceptions are loading ! 494: QImode and HImode from an aligned address to a general register. */ ! 495: ! 496: #define SECONDARY_INPUT_RELOAD_CLASS(CLASS,MODE,IN) \ ! 497: (((GET_CODE (IN) == MEM \ ! 498: || (GET_CODE (IN) == REG && REGNO (IN) >= FIRST_PSEUDO_REGISTER) \ ! 499: || (GET_CODE (IN) == SUBREG \ ! 500: && (GET_CODE (SUBREG_REG (IN)) == MEM \ ! 501: || (GET_CODE (SUBREG_REG (IN)) == REG \ ! 502: && REGNO (SUBREG_REG (IN)) >= FIRST_PSEUDO_REGISTER)))) \ ! 503: && (((CLASS) == FLOAT_REGS \ ! 504: && ((MODE) == SImode || (MODE) == HImode || (MODE) == QImode)) \ ! 505: || (((MODE) == QImode || (MODE) == HImode) \ ! 506: && unaligned_memory_operand (IN, MODE)))) \ ! 507: ? GENERAL_REGS : NO_REGS) ! 508: ! 509: #define SECONDARY_OUTPUT_RELOAD_CLASS(CLASS,MODE,OUT) \ ! 510: (((GET_CODE (OUT) == MEM \ ! 511: || (GET_CODE (OUT) == REG && REGNO (OUT) >= FIRST_PSEUDO_REGISTER) \ ! 512: || (GET_CODE (OUT) == SUBREG \ ! 513: && (GET_CODE (SUBREG_REG (OUT)) == MEM \ ! 514: || (GET_CODE (SUBREG_REG (OUT)) == REG \ ! 515: && REGNO (SUBREG_REG (OUT)) >= FIRST_PSEUDO_REGISTER)))) \ ! 516: && (((MODE) == HImode || (MODE) == QImode \ ! 517: || ((MODE) == SImode && (CLASS) == FLOAT_REGS)))) \ ! 518: ? GENERAL_REGS : NO_REGS) ! 519: ! 520: /* If we are copying between general and FP registers, we need a memory ! 521: location. */ ! 522: ! 523: #define SECONDARY_MEMORY_NEEDED(CLASS1,CLASS2,MODE) ((CLASS1) != (CLASS2)) ! 524: ! 525: /* Return the maximum number of consecutive registers ! 526: needed to represent mode MODE in a register of class CLASS. */ ! 527: ! 528: #define CLASS_MAX_NREGS(CLASS, MODE) \ ! 529: ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD) ! 530: ! 531: /* Define the cost of moving between registers of various classes. Moving ! 532: between FLOAT_REGS and anything else except float regs is expensive. ! 533: In fact, we make it quite expensive because we really don't want to ! 534: do these moves unless it is clearly worth it. Optimizations may ! 535: reduce the impact of not being able to allocate a pseudo to a ! 536: hard register. */ ! 537: ! 538: #define REGISTER_MOVE_COST(CLASS1, CLASS2) \ ! 539: (((CLASS1) == FLOAT_REGS) == ((CLASS2) == FLOAT_REGS) ? 2 : 20) ! 540: ! 541: /* A C expressions returning the cost of moving data of MODE from a register to ! 542: or from memory. ! 543: ! 544: On the Alpha, bump this up a bit. */ ! 545: ! 546: #define MEMORY_MOVE_COST(MODE) 6 ! 547: ! 548: /* Provide the cost of a branch. Exact meaning under development. */ ! 549: #define BRANCH_COST 5 ! 550: ! 551: /* Adjust the cost of dependencies. */ ! 552: ! 553: #define ADJUST_COST(INSN,LINK,DEP,COST) \ ! 554: (COST) = alpha_adjust_cost (INSN, LINK, DEP, COST) ! 555: ! 556: /* Stack layout; function entry, exit and calling. */ ! 557: ! 558: /* Define this if pushing a word on the stack ! 559: makes the stack pointer a smaller address. */ ! 560: #define STACK_GROWS_DOWNWARD ! 561: ! 562: /* Define this if the nominal address of the stack frame ! 563: is at the high-address end of the local variables; ! 564: that is, each additional local variable allocated ! 565: goes at a more negative offset in the frame. */ ! 566: #define FRAME_GROWS_DOWNWARD ! 567: ! 568: /* Offset within stack frame to start allocating local variables at. ! 569: If FRAME_GROWS_DOWNWARD, this is the offset to the END of the ! 570: first local allocated. Otherwise, it is the offset to the BEGINNING ! 571: of the first local allocated. */ ! 572: ! 573: #define STARTING_FRAME_OFFSET (- current_function_pretend_args_size) ! 574: ! 575: /* If we generate an insn to push BYTES bytes, ! 576: this says how many the stack pointer really advances by. ! 577: On Alpha, don't define this because there are no push insns. */ ! 578: /* #define PUSH_ROUNDING(BYTES) */ ! 579: ! 580: /* Define this if the maximum size of all the outgoing args is to be ! 581: accumulated and pushed during the prologue. The amount can be ! 582: found in the variable current_function_outgoing_args_size. */ ! 583: #define ACCUMULATE_OUTGOING_ARGS ! 584: ! 585: /* Offset of first parameter from the argument pointer register value. */ ! 586: ! 587: #define FIRST_PARM_OFFSET(FNDECL) (- current_function_pretend_args_size) ! 588: ! 589: /* Definitions for register eliminations. ! 590: ! 591: We have one register that can be eliminated on the Alpha. The ! 592: frame pointer register can often be eliminated in favor of the stack ! 593: pointer register. ! 594: ! 595: In addition, we use the elimination mechanism to see if gp (r29) is needed. ! 596: Initially we assume that it isn't. If it is, we spill it. This is done ! 597: by making it an eliminable register. It doesn't matter what we replace ! 598: it with, since it will never occur in the rtl at this point. */ ! 599: ! 600: /* This is an array of structures. Each structure initializes one pair ! 601: of eliminable registers. The "from" register number is given first, ! 602: followed by "to". Eliminations of the same "from" register are listed ! 603: in order of preference. */ ! 604: ! 605: #define ELIMINABLE_REGS \ ! 606: {{ FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}, \ ! 607: { 29, 0}} ! 608: ! 609: /* Given FROM and TO register numbers, say whether this elimination is allowed. ! 610: Frame pointer elimination is automatically handled. ! 611: ! 612: We need gp (r29) if we have calls or load symbols ! 613: (tested in alpha_need_gp). ! 614: ! 615: All other eliminations are valid since the cases where FP can't be ! 616: eliminated are already handled. */ ! 617: ! 618: #define CAN_ELIMINATE(FROM, TO) ((FROM) == 29 ? ! alpha_need_gp () : 1) ! 619: ! 620: /* Define the offset between two registers, one to be eliminated, and the other ! 621: its replacement, at the start of a routine. */ ! 622: #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \ ! 623: { if ((FROM) == FRAME_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM) \ ! 624: (OFFSET) = (get_frame_size () + current_function_outgoing_args_size \ ! 625: + current_function_pretend_args_size \ ! 626: + alpha_sa_size () + 15) & ~ 15; \ ! 627: } ! 628: ! 629: /* Define this if stack space is still allocated for a parameter passed ! 630: in a register. */ ! 631: /* #define REG_PARM_STACK_SPACE */ ! 632: ! 633: /* Value is the number of bytes of arguments automatically ! 634: popped when returning from a subroutine call. ! 635: FUNTYPE is the data type of the function (as a tree), ! 636: or for a library call it is an identifier node for the subroutine name. ! 637: SIZE is the number of bytes of arguments passed on the stack. */ ! 638: ! 639: #define RETURN_POPS_ARGS(FUNTYPE,SIZE) 0 ! 640: ! 641: /* Define how to find the value returned by a function. ! 642: VALTYPE is the data type of the value (as a tree). ! 643: If the precise function being called is known, FUNC is its FUNCTION_DECL; ! 644: otherwise, FUNC is 0. ! 645: ! 646: On Alpha the value is found in $0 for integer functions and ! 647: $f0 for floating-point functions. */ ! 648: ! 649: #define FUNCTION_VALUE(VALTYPE, FUNC) \ ! 650: gen_rtx (REG, \ ! 651: ((TREE_CODE (VALTYPE) == INTEGER_TYPE \ ! 652: || TREE_CODE (VALTYPE) == ENUMERAL_TYPE \ ! 653: || TREE_CODE (VALTYPE) == BOOLEAN_TYPE \ ! 654: || TREE_CODE (VALTYPE) == CHAR_TYPE \ ! 655: || TREE_CODE (VALTYPE) == POINTER_TYPE \ ! 656: || TREE_CODE (VALTYPE) == OFFSET_TYPE) \ ! 657: && TYPE_PRECISION (VALTYPE) < BITS_PER_WORD) \ ! 658: ? word_mode : TYPE_MODE (VALTYPE), \ ! 659: TARGET_FPREGS && TREE_CODE (VALTYPE) == REAL_TYPE ? 32 : 0) ! 660: ! 661: /* Define how to find the value returned by a library function ! 662: assuming the value has mode MODE. */ ! 663: ! 664: #define LIBCALL_VALUE(MODE) \ ! 665: gen_rtx (REG, MODE, \ ! 666: TARGET_FPREGS && GET_MODE_CLASS (MODE) == MODE_FLOAT ? 32 : 0) ! 667: ! 668: /* 1 if N is a possible register number for a function value ! 669: as seen by the caller. */ ! 670: ! 671: #define FUNCTION_VALUE_REGNO_P(N) ((N) == 0 || (N) == 32) ! 672: ! 673: /* 1 if N is a possible register number for function argument passing. ! 674: On Alpha, these are $16-$21 and $f16-$f21. */ ! 675: ! 676: #define FUNCTION_ARG_REGNO_P(N) \ ! 677: (((N) >= 16 && (N) <= 21) || ((N) >= 16 + 32 && (N) <= 21 + 32)) ! 678: ! 679: /* Define a data type for recording info about an argument list ! 680: during the scan of that argument list. This data type should ! 681: hold all necessary information about the function itself ! 682: and about the args processed so far, enough to enable macros ! 683: such as FUNCTION_ARG to determine where the next arg should go. ! 684: ! 685: On Alpha, this is a single integer, which is a number of words ! 686: of arguments scanned so far. ! 687: Thus 6 or more means all following args should go on the stack. */ ! 688: ! 689: #define CUMULATIVE_ARGS int ! 690: ! 691: /* Initialize a variable CUM of type CUMULATIVE_ARGS ! 692: for a call to a function whose data type is FNTYPE. ! 693: For a library call, FNTYPE is 0. */ ! 694: ! 695: #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME) (CUM) = 0 ! 696: ! 697: /* Define intermediate macro to compute the size (in registers) of an argument ! 698: for the Alpha. */ ! 699: ! 700: #define ALPHA_ARG_SIZE(MODE, TYPE, NAMED) \ ! 701: ((MODE) != BLKmode \ ! 702: ? (GET_MODE_SIZE (MODE) + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD \ ! 703: : (int_size_in_bytes (TYPE) + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD) ! 704: ! 705: /* Update the data in CUM to advance over an argument ! 706: of mode MODE and data type TYPE. ! 707: (TYPE is null for libcalls where that information may not be available.) */ ! 708: ! 709: #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \ ! 710: if (MUST_PASS_IN_STACK (MODE, TYPE)) \ ! 711: (CUM) = 6; \ ! 712: else \ ! 713: (CUM) += ALPHA_ARG_SIZE (MODE, TYPE, NAMED) ! 714: ! 715: /* Determine where to put an argument to a function. ! 716: Value is zero to push the argument on the stack, ! 717: or a hard register in which to store the argument. ! 718: ! 719: MODE is the argument's machine mode. ! 720: TYPE is the data type of the argument (as a tree). ! 721: This is null for libcalls where that information may ! 722: not be available. ! 723: CUM is a variable of type CUMULATIVE_ARGS which gives info about ! 724: the preceding args and about the function being called. ! 725: NAMED is nonzero if this argument is a named parameter ! 726: (otherwise it is an extra parameter matching an ellipsis). ! 727: ! 728: On Alpha the first 6 words of args are normally in registers ! 729: and the rest are pushed. */ ! 730: ! 731: #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \ ! 732: ((CUM) < 6 && ! MUST_PASS_IN_STACK (MODE, TYPE) \ ! 733: ? gen_rtx(REG, (MODE), \ ! 734: (CUM) + 16 + (TARGET_FPREGS \ ! 735: && GET_MODE_CLASS (MODE) == MODE_FLOAT) * 32) : 0) ! 736: ! 737: /* Specify the padding direction of arguments. ! 738: ! 739: On the Alpha, we must pad upwards in order to be able to pass args in ! 740: registers. */ ! 741: ! 742: #define FUNCTION_ARG_PADDING(MODE, TYPE) upward ! 743: ! 744: /* For an arg passed partly in registers and partly in memory, ! 745: this is the number of registers used. ! 746: For args passed entirely in registers or entirely in memory, zero. */ ! 747: ! 748: #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) \ ! 749: ((CUM) < 6 && 6 < (CUM) + ALPHA_ARG_SIZE (MODE, TYPE, NAMED) \ ! 750: ? 6 - (CUM) : 0) ! 751: ! 752: /* Generate necessary RTL for __builtin_saveregs(). ! 753: ARGLIST is the argument list; see expr.c. */ ! 754: extern struct rtx_def *alpha_builtin_saveregs (); ! 755: #define EXPAND_BUILTIN_SAVEREGS(ARGLIST) alpha_builtin_saveregs (ARGLIST) ! 756: ! 757: /* Define the information needed to generate branch and scc insns. This is ! 758: stored from the compare operation. Note that we can't use "rtx" here ! 759: since it hasn't been defined! */ ! 760: ! 761: extern struct rtx_def *alpha_compare_op0, *alpha_compare_op1; ! 762: extern int alpha_compare_fp_p; ! 763: ! 764: /* This macro produces the initial definition of a function name. On the ! 765: 29k, we need to save the function name for the epilogue. */ ! 766: ! 767: extern char *alpha_function_name; ! 768: ! 769: #define ASM_DECLARE_FUNCTION_NAME(FILE,NAME,DECL) \ ! 770: { fprintf (FILE, "\t.ent %s 2\n", NAME); \ ! 771: ASM_OUTPUT_LABEL (FILE, NAME); \ ! 772: alpha_function_name = NAME; \ ! 773: } ! 774: ! 775: /* This macro generates the assembly code for function entry. ! 776: FILE is a stdio stream to output the code to. ! 777: SIZE is an int: how many units of temporary storage to allocate. ! 778: Refer to the array `regs_ever_live' to determine which registers ! 779: to save; `regs_ever_live[I]' is nonzero if register number I ! 780: is ever used in the function. This macro is responsible for ! 781: knowing which registers should not be saved even if used. */ ! 782: ! 783: #define FUNCTION_PROLOGUE(FILE, SIZE) output_prolog (FILE, SIZE) ! 784: ! 785: /* Output assembler code to FILE to increment profiler label # LABELNO ! 786: for profiling a function entry. */ ! 787: ! 788: #define FUNCTION_PROFILER(FILE, LABELNO) ! 789: ! 790: /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function, ! 791: the stack pointer does not matter. The value is tested only in ! 792: functions that have frame pointers. ! 793: No definition is equivalent to always zero. */ ! 794: ! 795: #define EXIT_IGNORE_STACK 1 ! 796: ! 797: /* This macro generates the assembly code for function exit, ! 798: on machines that need it. If FUNCTION_EPILOGUE is not defined ! 799: then individual return instructions are generated for each ! 800: return statement. Args are same as for FUNCTION_PROLOGUE. ! 801: ! 802: The function epilogue should not depend on the current stack pointer! ! 803: It should use the frame pointer only. This is mandatory because ! 804: of alloca; we also take advantage of it to omit stack adjustments ! 805: before returning. */ ! 806: ! 807: #define FUNCTION_EPILOGUE(FILE, SIZE) output_epilog (FILE, SIZE) ! 808: ! 809: ! 810: /* Output assembler code for a block containing the constant parts ! 811: of a trampoline, leaving space for the variable parts. ! 812: ! 813: The trampoline should set the static chain pointer to value placed ! 814: into the trampoline and should branch to the specified routine. ! 815: Note that $27 has been set to the address of the trampoline, so we can ! 816: use it for addressability of the two data items. Trampolines are always ! 817: aligned to FUNCTION_BOUNDARY, which is 64 bits. */ ! 818: ! 819: #define TRAMPOLINE_TEMPLATE(FILE) \ ! 820: { \ ! 821: fprintf (FILE, "\tldq $1,24($27)\n"); \ ! 822: fprintf (FILE, "\tldq $27,16($27)\n"); \ ! 823: fprintf (FILE, "\tjmp $31,($27),0\n"); \ ! 824: fprintf (FILE, "\tnop\n"); \ ! 825: fprintf (FILE, "\t.quad 0,0\n"); \ ! 826: } ! 827: ! 828: /* Section in which to place the trampoline. On Alpha, instructions ! 829: may only be placed in a text segment. */ ! 830: ! 831: #define TRAMPOLINE_SECTION text_section ! 832: ! 833: /* Length in units of the trampoline for entering a nested function. */ ! 834: ! 835: #define TRAMPOLINE_SIZE 32 ! 836: ! 837: /* Emit RTL insns to initialize the variable parts of a trampoline. ! 838: FNADDR is an RTX for the address of the function's pure code. ! 839: CXT is an RTX for the static chain value for the function. We assume ! 840: here that a function will be called many more times than its address ! 841: is taken (e.g., it might be passed to qsort), so we take the trouble ! 842: to initialize the "hint" field in the JMP insn. Note that the hint ! 843: field is PC (new) + 4 * bits 13:0. */ ! 844: ! 845: #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \ ! 846: { \ ! 847: rtx _temp, _temp1, _addr; \ ! 848: \ ! 849: _addr = memory_address (Pmode, plus_constant ((TRAMP), 16)); \ ! 850: emit_move_insn (gen_rtx (MEM, Pmode, _addr), (FNADDR)); \ ! 851: _addr = memory_address (Pmode, plus_constant ((TRAMP), 24)); \ ! 852: emit_move_insn (gen_rtx (MEM, Pmode, _addr), (CXT)); \ ! 853: \ ! 854: _temp = force_operand (plus_constant ((TRAMP), 12), NULL_RTX); \ ! 855: _temp = expand_binop (DImode, sub_optab, (FNADDR), _temp, _temp, 1, \ ! 856: OPTAB_WIDEN); \ ! 857: _temp = expand_shift (RSHIFT_EXPR, Pmode, _temp, \ ! 858: build_int_2 (2, 0), NULL_RTX, 1); \ ! 859: _temp = expand_and (gen_lowpart (SImode, _temp), \ ! 860: GEN_INT (0x3fff), 0); \ ! 861: \ ! 862: _addr = memory_address (SImode, plus_constant ((TRAMP), 8)); \ ! 863: _temp1 = force_reg (SImode, gen_rtx (MEM, SImode, _addr)); \ ! 864: _temp1 = expand_and (_temp1, GEN_INT (0xffffc000), NULL_RTX); \ ! 865: _temp1 = expand_binop (SImode, ior_optab, _temp1, _temp, _temp1, 1, \ ! 866: OPTAB_WIDEN); \ ! 867: \ ! 868: emit_move_insn (gen_rtx (MEM, SImode, _addr), _temp1); \ ! 869: \ ! 870: emit_library_call (gen_rtx (SYMBOL_REF, Pmode, \ ! 871: "__enable_execute_stack"), \ ! 872: 0, VOIDmode, 1,_addr, Pmode); \ ! 873: \ ! 874: emit_insn (gen_rtx (UNSPEC_VOLATILE, VOIDmode, \ ! 875: gen_rtvec (1, const0_rtx), 0)); \ ! 876: } ! 877: ! 878: /* Attempt to turn on access permissions for the stack. */ ! 879: ! 880: #define TRANSFER_FROM_TRAMPOLINE \ ! 881: \ ! 882: void \ ! 883: __enable_execute_stack (addr) \ ! 884: void *addr; \ ! 885: { \ ! 886: long size = getpagesize (); \ ! 887: long mask = ~(size-1); \ ! 888: char *page = (char *) (((long) addr) & mask); \ ! 889: char *end = (char *) ((((long) (addr + TRAMPOLINE_SIZE)) & mask) + size); \ ! 890: \ ! 891: /* 7 is PROT_READ | PROT_WRITE | PROT_EXEC */ \ ! 892: if (mprotect (page, end - page, 7) < 0) \ ! 893: perror ("mprotect of trampoline code"); \ ! 894: } ! 895: ! 896: /* Addressing modes, and classification of registers for them. */ ! 897: ! 898: /* #define HAVE_POST_INCREMENT */ ! 899: /* #define HAVE_POST_DECREMENT */ ! 900: ! 901: /* #define HAVE_PRE_DECREMENT */ ! 902: /* #define HAVE_PRE_INCREMENT */ ! 903: ! 904: /* Macros to check register numbers against specific register classes. */ ! 905: ! 906: /* These assume that REGNO is a hard or pseudo reg number. ! 907: They give nonzero only if REGNO is a hard reg of the suitable class ! 908: or a pseudo reg currently allocated to a suitable hard reg. ! 909: Since they use reg_renumber, they are safe only once reg_renumber ! 910: has been allocated, which happens in local-alloc.c. */ ! 911: ! 912: #define REGNO_OK_FOR_INDEX_P(REGNO) 0 ! 913: #define REGNO_OK_FOR_BASE_P(REGNO) \ ! 914: (((REGNO) < 32 || (unsigned) reg_renumber[REGNO] < 32)) ! 915: ! 916: /* Maximum number of registers that can appear in a valid memory address. */ ! 917: #define MAX_REGS_PER_ADDRESS 1 ! 918: ! 919: /* Recognize any constant value that is a valid address. For the Alpha, ! 920: there are only constants none since we want to use LDA to load any ! 921: symbolic addresses into registers. */ ! 922: ! 923: #define CONSTANT_ADDRESS_P(X) \ ! 924: (GET_CODE (X) == CONST_INT \ ! 925: && (unsigned HOST_WIDE_INT) (INTVAL (X) + 0x8000) < 0x10000) ! 926: ! 927: /* Include all constant integers and constant doubles, but not ! 928: floating-point, except for floating-point zero. */ ! 929: ! 930: #define LEGITIMATE_CONSTANT_P(X) \ ! 931: (GET_MODE_CLASS (GET_MODE (X)) != MODE_FLOAT \ ! 932: || (X) == CONST0_RTX (GET_MODE (X))) ! 933: ! 934: /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx ! 935: and check its validity for a certain class. ! 936: We have two alternate definitions for each of them. ! 937: The usual definition accepts all pseudo regs; the other rejects ! 938: them unless they have been allocated suitable hard regs. ! 939: The symbol REG_OK_STRICT causes the latter definition to be used. ! 940: ! 941: Most source files want to accept pseudo regs in the hope that ! 942: they will get allocated to the class that the insn wants them to be in. ! 943: Source files for reload pass need to be strict. ! 944: After reload, it makes no difference, since pseudo regs have ! 945: been eliminated by then. */ ! 946: ! 947: #ifndef REG_OK_STRICT ! 948: ! 949: /* Nonzero if X is a hard reg that can be used as an index ! 950: or if it is a pseudo reg. */ ! 951: #define REG_OK_FOR_INDEX_P(X) 0 ! 952: /* Nonzero if X is a hard reg that can be used as a base reg ! 953: or if it is a pseudo reg. */ ! 954: #define REG_OK_FOR_BASE_P(X) \ ! 955: (REGNO (X) < 32 || REGNO (X) >= FIRST_PSEUDO_REGISTER) ! 956: ! 957: #else ! 958: ! 959: /* Nonzero if X is a hard reg that can be used as an index. */ ! 960: #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X)) ! 961: /* Nonzero if X is a hard reg that can be used as a base reg. */ ! 962: #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X)) ! 963: ! 964: #endif ! 965: ! 966: /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression ! 967: that is a valid memory address for an instruction. ! 968: The MODE argument is the machine mode for the MEM expression ! 969: that wants to use this address. ! 970: ! 971: For Alpha, we have either a constant address or the sum of a register ! 972: and a constant address, or just a register. For DImode, any of those ! 973: forms can be surrounded with an AND that clear the low-order three bits; ! 974: this is an "unaligned" access. ! 975: ! 976: We also allow a SYMBOL_REF that is the name of the current function as ! 977: valid address. This is for CALL_INSNs. It cannot be used in any other ! 978: context. ! 979: ! 980: First define the basic valid address. */ ! 981: ! 982: #define GO_IF_LEGITIMATE_SIMPLE_ADDRESS(MODE, X, ADDR) \ ! 983: { if (REG_P (X) && REG_OK_FOR_BASE_P (X)) \ ! 984: goto ADDR; \ ! 985: if (CONSTANT_ADDRESS_P (X)) \ ! 986: goto ADDR; \ ! 987: if (GET_CODE (X) == PLUS \ ! 988: && REG_P (XEXP (X, 0)) \ ! 989: && REG_OK_FOR_BASE_P (XEXP (X, 0)) \ ! 990: && CONSTANT_ADDRESS_P (XEXP (X, 1))) \ ! 991: goto ADDR; \ ! 992: } ! 993: ! 994: /* Now accept the simple address, or, for DImode only, an AND of a simple ! 995: address that turns off the low three bits. */ ! 996: ! 997: extern char *current_function_name; ! 998: ! 999: #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \ ! 1000: { GO_IF_LEGITIMATE_SIMPLE_ADDRESS (MODE, X, ADDR); \ ! 1001: if ((MODE) == DImode \ ! 1002: && GET_CODE (X) == AND \ ! 1003: && GET_CODE (XEXP (X, 1)) == CONST_INT \ ! 1004: && INTVAL (XEXP (X, 1)) == -8) \ ! 1005: GO_IF_LEGITIMATE_SIMPLE_ADDRESS (MODE, XEXP (X, 0), ADDR); \ ! 1006: if ((MODE) == Pmode && GET_CODE (X) == SYMBOL_REF \ ! 1007: && ! strcmp (XSTR (X, 0), current_function_name)) \ ! 1008: goto ADDR; \ ! 1009: } ! 1010: ! 1011: /* Try machine-dependent ways of modifying an illegitimate address ! 1012: to be legitimate. If we find one, return the new, valid address. ! 1013: This macro is used in only one place: `memory_address' in explow.c. ! 1014: ! 1015: OLDX is the address as it was before break_out_memory_refs was called. ! 1016: In some cases it is useful to look at this to decide what needs to be done. ! 1017: ! 1018: MODE and WIN are passed so that this macro can use ! 1019: GO_IF_LEGITIMATE_ADDRESS. ! 1020: ! 1021: It is always safe for this macro to do nothing. It exists to recognize ! 1022: opportunities to optimize the output. ! 1023: ! 1024: For the Alpha, there are three cases we handle: ! 1025: ! 1026: (1) If the address is (plus reg const_int) and the CONST_INT is not a ! 1027: valid offset, compute the high part of the constant and add it to the ! 1028: register. Then our address is (plus temp low-part-const). ! 1029: (2) If the address is (const (plus FOO const_int)), find the low-order ! 1030: part of the CONST_INT. Then load FOO plus any high-order part of the ! 1031: CONST_INT into a register. Our address is (plus reg low-part-const). ! 1032: This is done to reduce the number of GOT entries. ! 1033: (3) If we have a (plus reg const), emit the load as in (2), then add ! 1034: the two registers, and finally generate (plus reg low-part-const) as ! 1035: our address. */ ! 1036: ! 1037: #define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) \ ! 1038: { if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 0)) == REG \ ! 1039: && GET_CODE (XEXP (X, 1)) == CONST_INT \ ! 1040: && ! CONSTANT_ADDRESS_P (XEXP (X, 1))) \ ! 1041: { \ ! 1042: HOST_WIDE_INT val = INTVAL (XEXP (X, 1)); \ ! 1043: HOST_WIDE_INT lowpart = (val & 0xffff) - 2 * (val & 0x8000); \ ! 1044: HOST_WIDE_INT highpart = val - lowpart; \ ! 1045: rtx high = GEN_INT (highpart); \ ! 1046: rtx temp = expand_binop (Pmode, add_optab, XEXP (x, 0), \ ! 1047: high, 0, OPTAB_LIB_WIDEN); \ ! 1048: \ ! 1049: (X) = plus_constant (temp, lowpart); \ ! 1050: goto WIN; \ ! 1051: } \ ! 1052: else if (GET_CODE (X) == CONST \ ! 1053: && GET_CODE (XEXP (X, 0)) == PLUS \ ! 1054: && GET_CODE (XEXP (XEXP (X, 0), 1)) == CONST_INT) \ ! 1055: { \ ! 1056: HOST_WIDE_INT val = INTVAL (XEXP (XEXP (X, 0), 1)); \ ! 1057: HOST_WIDE_INT lowpart = (val & 0xffff) - 2 * (val & 0x8000); \ ! 1058: HOST_WIDE_INT highpart = val - lowpart; \ ! 1059: rtx high = XEXP (XEXP (X, 0), 0); \ ! 1060: \ ! 1061: if (highpart) \ ! 1062: high = plus_constant (high, highpart); \ ! 1063: \ ! 1064: (X) = plus_constant (force_reg (Pmode, high), lowpart); \ ! 1065: goto WIN; \ ! 1066: } \ ! 1067: else if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 0)) == REG \ ! 1068: && GET_CODE (XEXP (X, 1)) == CONST \ ! 1069: && GET_CODE (XEXP (XEXP (X, 1), 0)) == PLUS \ ! 1070: && GET_CODE (XEXP (XEXP (XEXP (X, 1), 0), 1)) == CONST_INT) \ ! 1071: { \ ! 1072: HOST_WIDE_INT val = INTVAL (XEXP (XEXP (XEXP (X, 1), 0), 1)); \ ! 1073: HOST_WIDE_INT lowpart = (val & 0xffff) - 2 * (val & 0x8000); \ ! 1074: HOST_WIDE_INT highpart = val - lowpart; \ ! 1075: rtx high = XEXP (XEXP (XEXP (X, 1), 0), 0); \ ! 1076: \ ! 1077: if (highpart) \ ! 1078: high = plus_constant (high, highpart); \ ! 1079: \ ! 1080: high = expand_binop (Pmode, add_optab, XEXP (X, 0), \ ! 1081: force_reg (Pmode, high), \ ! 1082: high, OPTAB_LIB_WIDEN); \ ! 1083: (X) = plus_constant (high, lowpart); \ ! 1084: goto WIN; \ ! 1085: } \ ! 1086: } ! 1087: ! 1088: /* Go to LABEL if ADDR (a legitimate address expression) ! 1089: has an effect that depends on the machine mode it is used for. ! 1090: On the Alpha this is true only for the unaligned modes. We can ! 1091: simplify this test since we know that the address must be valid. */ ! 1092: ! 1093: #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) \ ! 1094: { if (GET_CODE (ADDR) == AND) goto LABEL; } ! 1095: ! 1096: /* Compute the cost of an address. For the Alpha, all valid addresses are ! 1097: the same cost. */ ! 1098: ! 1099: #define ADDRESS_COST(X) 0 ! 1100: ! 1101: /* Define this if some processing needs to be done immediately before ! 1102: emitting code for an insn. */ ! 1103: ! 1104: /* #define FINAL_PRESCAN_INSN(INSN,OPERANDS,NOPERANDS) */ ! 1105: ! 1106: /* Specify the machine mode that this machine uses ! 1107: for the index in the tablejump instruction. */ ! 1108: #define CASE_VECTOR_MODE SImode ! 1109: ! 1110: /* Define this if the tablejump instruction expects the table ! 1111: to contain offsets from the address of the table. ! 1112: Do not define this if the table should contain absolute addresses. */ ! 1113: /* #define CASE_VECTOR_PC_RELATIVE */ ! 1114: ! 1115: /* Specify the tree operation to be used to convert reals to integers. */ ! 1116: #define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR ! 1117: ! 1118: /* This is the kind of divide that is easiest to do in the general case. */ ! 1119: #define EASY_DIV_EXPR TRUNC_DIV_EXPR ! 1120: ! 1121: /* Define this as 1 if `char' should by default be signed; else as 0. */ ! 1122: #define DEFAULT_SIGNED_CHAR 1 ! 1123: ! 1124: /* This flag, if defined, says the same insns that convert to a signed fixnum ! 1125: also convert validly to an unsigned one. ! 1126: ! 1127: We actually lie a bit here as overflow conditions are different. But ! 1128: they aren't being checked anyway. */ ! 1129: ! 1130: #define FIXUNS_TRUNC_LIKE_FIX_TRUNC ! 1131: ! 1132: /* Max number of bytes we can move to or from memory ! 1133: in one reasonably fast instruction. */ ! 1134: ! 1135: #define MOVE_MAX 8 ! 1136: ! 1137: /* Largest number of bytes of an object that can be placed in a register. ! 1138: On the Alpha we have plenty of registers, so use TImode. */ ! 1139: #define MAX_FIXED_MODE_SIZE GET_MODE_BITSIZE (TImode) ! 1140: ! 1141: /* Nonzero if access to memory by bytes is no faster than for words. ! 1142: Also non-zero if doing byte operations (specifically shifts) in registers ! 1143: is undesirable. ! 1144: ! 1145: On the Alpha, we want to not use the byte operation and instead use ! 1146: masking operations to access fields; these will save instructions. */ ! 1147: ! 1148: #define SLOW_BYTE_ACCESS 1 ! 1149: ! 1150: /* Define if normal loads of shorter-than-word items from memory clears ! 1151: the rest of the bits in the register. */ ! 1152: /* #define BYTE_LOADS_ZERO_EXTEND */ ! 1153: ! 1154: /* Define if normal loads of shorter-than-word items from memory sign-extends ! 1155: the rest of the bits in the register. */ ! 1156: #define BYTE_LOADS_SIGN_EXTEND ! 1157: ! 1158: /* We aren't doing ANYTHING about debugging for now. */ ! 1159: /* #define SDB_DEBUGGING_INFO */ ! 1160: ! 1161: /* Do not break .stabs pseudos into continuations. */ ! 1162: #define DBX_CONTIN_LENGTH 0 ! 1163: ! 1164: /* Don't try to use the `x' type-cross-reference character in DBX data. ! 1165: Also has the consequence of putting each struct, union or enum ! 1166: into a separate .stabs, containing only cross-refs to the others. */ ! 1167: #define DBX_NO_XREFS ! 1168: ! 1169: /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits ! 1170: is done just by pretending it is already truncated. */ ! 1171: #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1 ! 1172: ! 1173: /* We assume that the store-condition-codes instructions store 0 for false ! 1174: and some other value for true. This is the value stored for true. */ ! 1175: ! 1176: #define STORE_FLAG_VALUE 1 ! 1177: ! 1178: /* Define the value returned by a floating-point comparison instruction. */ ! 1179: ! 1180: #define FLOAT_STORE_FLAG_VALUE 0.5 ! 1181: ! 1182: /* Specify the machine mode that pointers have. ! 1183: After generation of rtl, the compiler makes no further distinction ! 1184: between pointers and any other objects of this machine mode. */ ! 1185: #define Pmode DImode ! 1186: ! 1187: /* Mode of a function address in a call instruction (for indexing purposes). */ ! 1188: ! 1189: #define FUNCTION_MODE Pmode ! 1190: ! 1191: /* Define this if addresses of constant functions ! 1192: shouldn't be put through pseudo regs where they can be cse'd. ! 1193: Desirable on machines where ordinary constants are expensive ! 1194: but a CALL with constant address is cheap. ! 1195: ! 1196: We define this on the Alpha so that gen_call and gen_call_value ! 1197: get to see the SYMBOL_REF (for the hint field of the jsr). It will ! 1198: then copy it into a register, thus actually letting the address be ! 1199: cse'ed. */ ! 1200: ! 1201: #define NO_FUNCTION_CSE ! 1202: ! 1203: /* Define this if shift instructions ignore all but the low-order ! 1204: few bits. */ ! 1205: #define SHIFT_COUNT_TRUNCATED ! 1206: ! 1207: /* Compute the cost of computing a constant rtl expression RTX ! 1208: whose rtx-code is CODE. The body of this macro is a portion ! 1209: of a switch statement. If the code is computed here, ! 1210: return it with a return statement. Otherwise, break from the switch. ! 1211: ! 1212: We only care about the cost if it is valid in an insn, so all constants ! 1213: are cheap. */ ! 1214: ! 1215: #define CONST_COSTS(RTX,CODE,OUTER_CODE) \ ! 1216: case CONST_INT: \ ! 1217: case CONST_DOUBLE: \ ! 1218: return 0; \ ! 1219: case CONST: \ ! 1220: case SYMBOL_REF: \ ! 1221: case LABEL_REF: \ ! 1222: return 6; \ ! 1223: ! 1224: /* Provide the costs of a rtl expression. This is in the body of a ! 1225: switch on CODE. */ ! 1226: ! 1227: #define RTX_COSTS(X,CODE,OUTER_CODE) \ ! 1228: case PLUS: \ ! 1229: case MINUS: \ ! 1230: if (GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT) \ ! 1231: return COSTS_N_INSNS (6); \ ! 1232: break; \ ! 1233: case MULT: \ ! 1234: if (GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT) \ ! 1235: return COSTS_N_INSNS (6); \ ! 1236: else \ ! 1237: return COSTS_N_INSNS (21); \ ! 1238: case DIV: \ ! 1239: case UDIV: \ ! 1240: case MOD: \ ! 1241: case UMOD: \ ! 1242: if (GET_MODE (X) == SFmode) \ ! 1243: return COSTS_N_INSNS (34); \ ! 1244: else if (GET_MODE (X) == DFmode) \ ! 1245: return COSTS_N_INSNS (63); \ ! 1246: else \ ! 1247: return COSTS_N_INSNS (70); \ ! 1248: case MEM: \ ! 1249: return COSTS_N_INSNS (3); ! 1250: ! 1251: /* Control the assembler format that we output. */ ! 1252: ! 1253: /* Output at beginning of assembler file. */ ! 1254: ! 1255: #define ASM_FILE_START(FILE) \ ! 1256: { extern char *version_string; \ ! 1257: char *p, *after_dir = main_input_filename; \ ! 1258: \ ! 1259: fprintf (FILE, "\t.verstamp 9 0 "); \ ! 1260: for (p = version_string; *p != ' ' && *p != 0; p++) \ ! 1261: fprintf (FILE, "%c", *p == '.' ? ' ' : *p); \ ! 1262: fprintf (FILE, "\n\t.set noreorder\n"); \ ! 1263: fprintf (FILE, "\t.set noat\n"); \ ! 1264: for (p = main_input_filename; *p; p++) \ ! 1265: if (*p == '/') \ ! 1266: after_dir = p + 1; \ ! 1267: fprintf (FILE, "\n\t.file 2 \"%s\"\n", after_dir); \ ! 1268: } ! 1269: ! 1270: /* Output to assembler file text saying following lines ! 1271: may contain character constants, extra white space, comments, etc. */ ! 1272: ! 1273: #define ASM_APP_ON "" ! 1274: ! 1275: /* Output to assembler file text saying following lines ! 1276: no longer contain unusual constructs. */ ! 1277: ! 1278: #define ASM_APP_OFF "" ! 1279: ! 1280: #define TEXT_SECTION_ASM_OP ".text" ! 1281: ! 1282: /* Output before read-only data. */ ! 1283: ! 1284: #define READONLY_DATA_SECTION_ASM_OP ".rdata" ! 1285: ! 1286: /* Output before writable data. */ ! 1287: ! 1288: #define DATA_SECTION_ASM_OP ".data" ! 1289: ! 1290: /* Define an extra section for read-only data, a routine to enter it, and ! 1291: indicate that it is for read-only data. */ ! 1292: ! 1293: #define EXTRA_SECTIONS readonly_data ! 1294: ! 1295: #define EXTRA_SECTION_FUNCTIONS \ ! 1296: void \ ! 1297: literal_section () \ ! 1298: { \ ! 1299: if (in_section != readonly_data) \ ! 1300: { \ ! 1301: fprintf (asm_out_file, "%s\n", READONLY_DATA_SECTION_ASM_OP); \ ! 1302: in_section = readonly_data; \ ! 1303: } \ ! 1304: } \ ! 1305: ! 1306: #define READONLY_DATA_SECTION literal_section ! 1307: ! 1308: /* How to refer to registers in assembler output. ! 1309: This sequence is indexed by compiler's hard-register-number (see above). */ ! 1310: ! 1311: #define REGISTER_NAMES \ ! 1312: {"$0", "$1", "$2", "$3", "$4", "$5", "$6", "$7", "$8", \ ! 1313: "$9", "$10", "$11", "$12", "$13", "$14", "$15", \ ! 1314: "$16", "$17", "$18", "$19", "$20", "$21", "$22", "$23", \ ! 1315: "$24", "$25", "$26", "$27", "$28", "$29", "$30", "$31", \ ! 1316: "$f0", "$f1", "$f2", "$f3", "$f4", "$f5", "$f6", "$f7", "$f8", \ ! 1317: "$f9", "$f10", "$f11", "$f12", "$f13", "$f14", "$f15", \ ! 1318: "$f16", "$f17", "$f18", "$f19", "$f20", "$f21", "$f22", "$f23",\ ! 1319: "$f24", "$f25", "$f26", "$f27", "$f28", "$f29", "$f30", "$f31"} ! 1320: ! 1321: /* How to renumber registers for dbx and gdb. */ ! 1322: ! 1323: #define DBX_REGISTER_NUMBER(REGNO) (REGNO) ! 1324: ! 1325: /* This is how to output the definition of a user-level label named NAME, ! 1326: such as the label on a static function or variable NAME. */ ! 1327: ! 1328: #define ASM_OUTPUT_LABEL(FILE,NAME) \ ! 1329: do { assemble_name (FILE, NAME); fputs (":\n", FILE); } while (0) ! 1330: ! 1331: /* This is how to output a command to make the user-level label named NAME ! 1332: defined for reference from other files. */ ! 1333: ! 1334: #define ASM_GLOBALIZE_LABEL(FILE,NAME) \ ! 1335: do { fputs ("\t.globl ", FILE); assemble_name (FILE, NAME); fputs ("\n", FILE);} while (0) ! 1336: ! 1337: /* This is how to output a reference to a user-level label named NAME. ! 1338: `assemble_name' uses this. */ ! 1339: ! 1340: #define ASM_OUTPUT_LABELREF(FILE,NAME) \ ! 1341: fprintf (FILE, "%s", NAME) ! 1342: ! 1343: /* This is how to output an internal numbered label where ! 1344: PREFIX is the class of label and NUM is the number within the class. */ ! 1345: ! 1346: #define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \ ! 1347: if ((PREFIX)[0] == 'L') \ ! 1348: fprintf (FILE, "$%s%d:\n", & (PREFIX)[1], NUM + 32); \ ! 1349: else \ ! 1350: fprintf (FILE, "%s%d:\n", PREFIX, NUM); ! 1351: ! 1352: /* This is how to output a label for a jump table. Arguments are the same as ! 1353: for ASM_OUTPUT_INTERNAL_LABEL, except the insn for the jump table is ! 1354: passed. */ ! 1355: ! 1356: #define ASM_OUTPUT_CASE_LABEL(FILE,PREFIX,NUM,TABLEINSN) \ ! 1357: { ASM_OUTPUT_ALIGN (FILE, 2); ASM_OUTPUT_INTERNAL_LABEL (FILE, PREFIX, NUM); } ! 1358: ! 1359: /* This is how to store into the string LABEL ! 1360: the symbol_ref name of an internal numbered label where ! 1361: PREFIX is the class of label and NUM is the number within the class. ! 1362: This is suitable for output with `assemble_name'. */ ! 1363: ! 1364: #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \ ! 1365: if ((PREFIX)[0] == 'L') \ ! 1366: sprintf (LABEL, "*$%s%d", & (PREFIX)[1], NUM + 32); \ ! 1367: else \ ! 1368: sprintf (LABEL, "*%s%d", PREFIX, NUM) ! 1369: ! 1370: /* This is how to output an assembler line defining a `double' constant. */ ! 1371: ! 1372: #define ASM_OUTPUT_DOUBLE(FILE,VALUE) \ ! 1373: fprintf (FILE, "\t.t_floating %.20e\n", (VALUE)) ! 1374: ! 1375: /* This is how to output an assembler line defining a `float' constant. */ ! 1376: ! 1377: #define ASM_OUTPUT_FLOAT(FILE,VALUE) \ ! 1378: fprintf (FILE, "\t.s_floating %.20e\n", (VALUE)) ! 1379: ! 1380: /* This is how to output an assembler line defining an `int' constant. */ ! 1381: ! 1382: #define ASM_OUTPUT_INT(FILE,VALUE) \ ! 1383: ( fprintf (FILE, "\t.long "), \ ! 1384: output_addr_const (FILE, (VALUE)), \ ! 1385: fprintf (FILE, "\n")) ! 1386: ! 1387: /* This is how to output an assembler line defining a `long' constant. */ ! 1388: ! 1389: #define ASM_OUTPUT_DOUBLE_INT(FILE,VALUE) \ ! 1390: ( fprintf (FILE, "\t.quad "), \ ! 1391: output_addr_const (FILE, (VALUE)), \ ! 1392: fprintf (FILE, "\n")) ! 1393: ! 1394: /* Likewise for `char' and `short' constants. */ ! 1395: ! 1396: #define ASM_OUTPUT_SHORT(FILE,VALUE) \ ! 1397: ( fprintf (FILE, "\t.word "), \ ! 1398: output_addr_const (FILE, (VALUE)), \ ! 1399: fprintf (FILE, "\n")) ! 1400: ! 1401: #define ASM_OUTPUT_CHAR(FILE,VALUE) \ ! 1402: ( fprintf (FILE, "\t.byte "), \ ! 1403: output_addr_const (FILE, (VALUE)), \ ! 1404: fprintf (FILE, "\n")) ! 1405: ! 1406: /* We use the default ASCII-output routine, except that we don't write more ! 1407: than 50 characters since the assembler doesn't support very long lines. */ ! 1408: ! 1409: #define ASM_OUTPUT_ASCII(MYFILE, MYSTRING, MYLENGTH) \ ! 1410: do { \ ! 1411: FILE *_hide_asm_out_file = (MYFILE); \ ! 1412: unsigned char *_hide_p = (unsigned char *) (MYSTRING); \ ! 1413: int _hide_thissize = (MYLENGTH); \ ! 1414: int _size_so_far = 0; \ ! 1415: { \ ! 1416: FILE *asm_out_file = _hide_asm_out_file; \ ! 1417: unsigned char *p = _hide_p; \ ! 1418: int thissize = _hide_thissize; \ ! 1419: int i; \ ! 1420: fprintf (asm_out_file, "\t.ascii \""); \ ! 1421: \ ! 1422: for (i = 0; i < thissize; i++) \ ! 1423: { \ ! 1424: register int c = p[i]; \ ! 1425: \ ! 1426: if (_size_so_far ++ > 50 && i < thissize - 4) \ ! 1427: _size_so_far = 0, fprintf (asm_out_file, "\"\n\t.ascii \""); \ ! 1428: \ ! 1429: if (c == '\"' || c == '\\') \ ! 1430: putc ('\\', asm_out_file); \ ! 1431: if (c >= ' ' && c < 0177) \ ! 1432: putc (c, asm_out_file); \ ! 1433: else \ ! 1434: { \ ! 1435: fprintf (asm_out_file, "\\%o", c); \ ! 1436: /* After an octal-escape, if a digit follows, \ ! 1437: terminate one string constant and start another. \ ! 1438: The Vax assembler fails to stop reading the escape \ ! 1439: after three digits, so this is the only way we \ ! 1440: can get it to parse the data properly. */ \ ! 1441: if (i < thissize - 1 \ ! 1442: && p[i + 1] >= '0' && p[i + 1] <= '9') \ ! 1443: fprintf (asm_out_file, "\"\n\t.ascii \""); \ ! 1444: } \ ! 1445: } \ ! 1446: fprintf (asm_out_file, "\"\n"); \ ! 1447: } \ ! 1448: } \ ! 1449: while (0) ! 1450: /* This is how to output an insn to push a register on the stack. ! 1451: It need not be very fast code. */ ! 1452: ! 1453: #define ASM_OUTPUT_REG_PUSH(FILE,REGNO) \ ! 1454: fprintf (FILE, "\tsubq $30,8,$30\n\tst%s $%s%d,0($30)\n", \ ! 1455: (REGNO) > 32 ? "t" : "q", (REGNO) > 32 ? "f" : "", \ ! 1456: (REGNO) & 31); ! 1457: ! 1458: /* This is how to output an insn to pop a register from the stack. ! 1459: It need not be very fast code. */ ! 1460: ! 1461: #define ASM_OUTPUT_REG_POP(FILE,REGNO) \ ! 1462: fprintf (FILE, "\tld%s $%s%d,0($30)\n\taddq $30,8,$30\n", \ ! 1463: (REGNO) > 32 ? "t" : "q", (REGNO) > 32 ? "f" : "", \ ! 1464: (REGNO) & 31); ! 1465: ! 1466: /* This is how to output an assembler line for a numeric constant byte. */ ! 1467: ! 1468: #define ASM_OUTPUT_BYTE(FILE,VALUE) \ ! 1469: fprintf (FILE, "\t.byte 0x%x\n", (VALUE)) ! 1470: ! 1471: /* This is how to output an element of a case-vector that is absolute. */ ! 1472: ! 1473: #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \ ! 1474: fprintf (FILE, "\t.gprel32 $%d\n", (VALUE) + 32) ! 1475: ! 1476: /* This is how to output an element of a case-vector that is relative. ! 1477: (Alpha does not use such vectors, but we must define this macro anyway.) */ ! 1478: ! 1479: #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, VALUE, REL) abort () ! 1480: ! 1481: /* This is how to output an assembler line ! 1482: that says to advance the location counter ! 1483: to a multiple of 2**LOG bytes. */ ! 1484: ! 1485: #define ASM_OUTPUT_ALIGN(FILE,LOG) \ ! 1486: if ((LOG) != 0) \ ! 1487: fprintf (FILE, "\t.align %d\n", LOG); ! 1488: ! 1489: /* This is how to advance the location counter by SIZE bytes. */ ! 1490: ! 1491: #define ASM_OUTPUT_SKIP(FILE,SIZE) \ ! 1492: fprintf (FILE, "\t.space %d\n", (SIZE)) ! 1493: ! 1494: /* This says how to output an assembler line ! 1495: to define a global common symbol. */ ! 1496: ! 1497: #define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \ ! 1498: ( fputs ("\t.comm ", (FILE)), \ ! 1499: assemble_name ((FILE), (NAME)), \ ! 1500: fprintf ((FILE), ",%d\n", (SIZE))) ! 1501: ! 1502: /* This says how to output an assembler line ! 1503: to define a local common symbol. */ ! 1504: ! 1505: #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE,ROUNDED) \ ! 1506: ( fputs ("\t.lcomm ", (FILE)), \ ! 1507: assemble_name ((FILE), (NAME)), \ ! 1508: fprintf ((FILE), ",%d\n", (SIZE))) ! 1509: ! 1510: /* Store in OUTPUT a string (made with alloca) containing ! 1511: an assembler-name for a local static variable named NAME. ! 1512: LABELNO is an integer which is different for each call. */ ! 1513: ! 1514: #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \ ! 1515: ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \ ! 1516: sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO))) ! 1517: ! 1518: /* Define the parentheses used to group arithmetic operations ! 1519: in assembler code. */ ! 1520: ! 1521: #define ASM_OPEN_PAREN "(" ! 1522: #define ASM_CLOSE_PAREN ")" ! 1523: ! 1524: /* Define results of standard character escape sequences. */ ! 1525: #define TARGET_BELL 007 ! 1526: #define TARGET_BS 010 ! 1527: #define TARGET_TAB 011 ! 1528: #define TARGET_NEWLINE 012 ! 1529: #define TARGET_VT 013 ! 1530: #define TARGET_FF 014 ! 1531: #define TARGET_CR 015 ! 1532: ! 1533: /* Print operand X (an rtx) in assembler syntax to file FILE. ! 1534: CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified. ! 1535: For `%' followed by punctuation, CODE is the punctuation and X is null. */ ! 1536: ! 1537: #define PRINT_OPERAND(FILE, X, CODE) print_operand (FILE, X, CODE) ! 1538: ! 1539: /* Determine which codes are valid without a following integer. These must ! 1540: not be alphabetic. */ ! 1541: ! 1542: #define PRINT_OPERAND_PUNCT_VALID_P(CODE) 0 ! 1543: ! 1544: /* Print a memory address as an operand to reference that memory location. */ ! 1545: ! 1546: #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \ ! 1547: { rtx addr = (ADDR); \ ! 1548: int basereg = 31; \ ! 1549: HOST_WIDE_INT offset = 0; \ ! 1550: \ ! 1551: if (GET_CODE (addr) == AND) \ ! 1552: addr = XEXP (addr, 0); \ ! 1553: \ ! 1554: if (GET_CODE (addr) == REG) \ ! 1555: basereg = REGNO (addr); \ ! 1556: else if (GET_CODE (addr) == CONST_INT) \ ! 1557: offset = INTVAL (addr); \ ! 1558: else if (GET_CODE (addr) == PLUS \ ! 1559: && GET_CODE (XEXP (addr, 0)) == REG \ ! 1560: && GET_CODE (XEXP (addr, 1)) == CONST_INT) \ ! 1561: basereg = REGNO (XEXP (addr, 0)), offset = INTVAL (XEXP (addr, 1)); \ ! 1562: else \ ! 1563: abort (); \ ! 1564: \ ! 1565: fprintf (FILE, "%d($%d)", offset, basereg); \ ! 1566: } ! 1567: /* Define the codes that are matched by predicates in alpha.c. */ ! 1568: ! 1569: #define PREDICATE_CODES \ ! 1570: {"reg_or_0_operand", {SUBREG, REG, CONST_INT}}, \ ! 1571: {"reg_or_8bit_operand", {SUBREG, REG, CONST_INT}}, \ ! 1572: {"reg_or_cint_operand", {SUBREG, REG, CONST_INT}}, \ ! 1573: {"add_operand", {SUBREG, REG, CONST_INT}}, \ ! 1574: {"sext_add_operand", {SUBREG, REG, CONST_INT}}, \ ! 1575: {"const48_operand", {CONST_INT}}, \ ! 1576: {"and_operand", {SUBREG, REG, CONST_INT}}, \ ! 1577: {"mode_mask_operand", {CONST_INT}}, \ ! 1578: {"mul8_operand", {CONST_INT}}, \ ! 1579: {"mode_width_operand", {CONST_INT}}, \ ! 1580: {"reg_or_fp0_operand", {SUBREG, REG, CONST_DOUBLE}}, \ ! 1581: {"alpha_comparison_operator", {EQ, LE, LT, LEU, LTU}}, \ ! 1582: {"signed_comparison_operator", {EQ, NE, LE, LT, GE, GT}}, \ ! 1583: {"fp0_operand", {CONST_DOUBLE}}, \ ! 1584: {"input_operand", {SUBREG, REG, MEM, CONST_INT, CONST_DOUBLE, \ ! 1585: SYMBOL_REF, CONST, LABEL_REF}}, \ ! 1586: {"aligned_memory_operand", {MEM}}, \ ! 1587: {"unaligned_memory_operand", {MEM}}, \ ! 1588: {"any_memory_operand", {MEM}},
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