--- gcc/config/alpha/alpha.c 2018/04/24 18:16:15 1.1.1.2 +++ gcc/config/alpha/alpha.c 2018/04/24 18:30:10 1.1.1.4 @@ -1,6 +1,6 @@ /* Subroutines used for code generation on the DEC Alpha. - Copyright (C) 1992, 1993 Free Software Foundation, Inc. - Contributed by Richard Kenner (kenner@nyu.edu) + Copyright (C) 1992, 1993, 1994, 1995 Free Software Foundation, Inc. + Contributed by Richard Kenner (kenner@vlsi1.ultra.nyu.edu) This file is part of GNU CC. @@ -16,7 +16,8 @@ GNU General Public License for more deta You should have received a copy of the GNU General Public License along with GNU CC; see the file COPYING. If not, write to -the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */ +the Free Software Foundation, 59 Temple Place - Suite 330, +Boston, MA 02111-1307, USA. */ #include @@ -58,6 +59,11 @@ static int inside_function = FALSE; int alpha_function_needs_gp; extern char *version_string; +extern int rtx_equal_function_value_matters; + +/* Declarations of static functions. */ +static void alpha_set_memflags_1 PROTO((rtx, int, int, int)); +static void add_long_const PROTO((FILE *, HOST_WIDE_INT, int, int, int)); /* Returns 1 if VALUE is a mask that contains full bytes of zero or ones. */ @@ -112,6 +118,17 @@ reg_or_8bit_operand (op, mode) || register_operand (op, mode)); } +/* Return 1 if OP is an 8-bit constant. */ + +int +cint8_operand (op, mode) + register rtx op; + enum machine_mode mode; +{ + return (GET_CODE (op) == CONST_INT + && (unsigned HOST_WIDE_INT) INTVAL (op) < 0x100); +} + /* Return 1 if the operand is a valid second operand to an add insn. */ int @@ -120,10 +137,9 @@ add_operand (op, mode) enum machine_mode mode; { if (GET_CODE (op) == CONST_INT) - return ((unsigned HOST_WIDE_INT) (INTVAL (op) + 0x8000) < 0x10000 - || ((INTVAL (op) & 0xffff) == 0 - && (INTVAL (op) >> 31 == -1 - || INTVAL (op) >> 31 == 0))); + return (CONST_OK_FOR_LETTER_P (INTVAL (op), 'K') + || CONST_OK_FOR_LETTER_P (INTVAL (op), 'L') + || CONST_OK_FOR_LETTER_P (INTVAL (op), 'O')); return register_operand (op, mode); } @@ -173,6 +189,20 @@ and_operand (op, mode) return register_operand (op, mode); } +/* Return 1 if OP is a valid first operand to an IOR or XOR insn. */ + +int +or_operand (op, mode) + register rtx op; + enum machine_mode mode; +{ + if (GET_CODE (op) == CONST_INT) + return ((unsigned HOST_WIDE_INT) INTVAL (op) < 0x100 + || (unsigned HOST_WIDE_INT) ~ INTVAL (op) < 0x100); + + return register_operand (op, mode); +} + /* Return 1 if OP is a constant that is the width, in bits, of an integral mode smaller than DImode. */ @@ -198,13 +228,13 @@ mode_mask_operand (op, mode) return CONST_DOUBLE_HIGH (op) == 0 && CONST_DOUBLE_LOW (op) == -1; #endif - if (GET_CODE (op) == CONST_INT) - return (INTVAL (op) == 0xff - || INTVAL (op) == 0xffff + return (GET_CODE (op) == CONST_INT + && (INTVAL (op) == 0xff + || INTVAL (op) == 0xffff #if HOST_BITS_PER_WIDE_INT == 64 - || INTVAL (op) == 0xffffffff + || INTVAL (op) == 0xffffffff #endif - ); + )); } /* Return 1 if OP is a multiple of 8 less than 64. */ @@ -251,6 +281,30 @@ reg_or_cint_operand (op, mode) return GET_CODE (op) == CONST_INT || register_operand (op, mode); } +/* Return 1 if OP is something that can be reloaded into a register; + if it is a MEM, it need not be valid. */ + +int +some_operand (op, mode) + register rtx op; + enum machine_mode mode; +{ + if (mode != VOIDmode && GET_MODE (op) != VOIDmode && mode != GET_MODE (op)) + return 0; + + switch (GET_CODE (op)) + { + case REG: case MEM: case CONST_DOUBLE: + case CONST_INT: case LABEL_REF: case SYMBOL_REF: case CONST: + return 1; + + case SUBREG: + return some_operand (SUBREG_REG (op), VOIDmode); + } + + return 0; +} + /* Return 1 if OP is a valid operand for the source of a move insn. */ int @@ -269,7 +323,8 @@ input_operand (op, mode) case LABEL_REF: case SYMBOL_REF: case CONST: - return mode == DImode; + /* This handles both the Windows/NT and OSF cases. */ + return mode == ptr_mode || mode == DImode; case REG: return 1; @@ -300,10 +355,24 @@ current_file_function_operand (op, mode) enum machine_mode mode; { return (GET_CODE (op) == SYMBOL_REF + && ! profile_flag && ! profile_block_flag && (SYMBOL_REF_FLAG (op) || op == XEXP (DECL_RTL (current_function_decl), 0))); } +/* Return 1 if OP is a valid operand for the MEM of a CALL insn. */ + +int +call_operand (op, mode) + rtx op; + enum machine_mode mode; +{ + if (mode != Pmode) + return 0; + + return (GET_CODE (op) == SYMBOL_REF || GET_CODE (op) == REG); +} + /* Return 1 if OP is a valid Alpha comparison operator. Here we know which comparisons are valid in which insn. */ @@ -390,7 +459,8 @@ aligned_memory_operand (op, mode) op = XEXP (op, 0); return (GET_CODE (op) == REG - && (REGNO (op) == STACK_POINTER_REGNUM || op == frame_pointer_rtx + && (REGNO (op) == STACK_POINTER_REGNUM + || op == hard_frame_pointer_rtx || (REGNO (op) >= FIRST_VIRTUAL_REGISTER && REGNO (op) <= LAST_VIRTUAL_REGISTER))); } @@ -426,7 +496,8 @@ unaligned_memory_operand (op, mode) op = XEXP (op, 0); return (GET_CODE (op) != REG - || (REGNO (op) != STACK_POINTER_REGNUM && op != frame_pointer_rtx + || (REGNO (op) != STACK_POINTER_REGNUM + && op != hard_frame_pointer_rtx && (REGNO (op) < FIRST_VIRTUAL_REGISTER || REGNO (op) > LAST_VIRTUAL_REGISTER))); } @@ -586,34 +657,43 @@ alpha_set_memflags (insn, ref) } /* Try to output insns to set TARGET equal to the constant C if it can be - done in less than N insns. Returns 1 if it can be done and the - insns have been emitted. If it would take more than N insns, zero is - returned and no insns and emitted. */ + done in less than N insns. Do all computations in MODE. Returns the place + where the output has been placed if it can be done and the insns have been + emitted. If it would take more than N insns, zero is returned and no + insns and emitted. */ -int -alpha_emit_set_const (target, c, n) +rtx +alpha_emit_set_const (target, mode, c, n) rtx target; + enum machine_mode mode; HOST_WIDE_INT c; int n; { HOST_WIDE_INT new = c; int i, bits; + /* Use a pseudo if highly optimizing and still generating RTL. */ + rtx subtarget + = (flag_expensive_optimizations && rtx_equal_function_value_matters + ? 0 : target); + rtx temp; #if HOST_BITS_PER_WIDE_INT == 64 /* We are only called for SImode and DImode. If this is SImode, ensure that we are sign extended to a full word. This does not make any sense when cross-compiling on a narrow machine. */ - if (GET_MODE (target) == SImode) + if (mode == SImode) c = (c & 0xffffffff) - 2 * (c & 0x80000000); #endif /* If this is a sign-extended 32-bit constant, we can do this in at most three insns, so do it if we have enough insns left. We always have - a sign-extended 32-bit constant when compiling on a narrow machine. */ + a sign-extended 32-bit constant when compiling on a narrow machine. + Note that we cannot handle the constant 0x80000000. */ - if (HOST_BITS_PER_WIDE_INT != 64 - || c >> 31 == -1 || c >> 31 == 0) + if ((HOST_BITS_PER_WIDE_INT != 64 + || c >> 31 == -1 || c >> 31 == 0) + && c != 0x80000000U) { HOST_WIDE_INT low = (c & 0xffff) - 2 * (c & 0x8000); HOST_WIDE_INT tmp1 = c - low; @@ -632,30 +712,35 @@ alpha_emit_set_const (target, c, n) } if (c == low || (low == 0 && extra == 0)) + return copy_to_suggested_reg (GEN_INT (c), target, mode); + else if (n >= 2 + (extra != 0) + /* We can't do this when SImode if HIGH required adjustment. + This is because the code relies on an implicit overflow + which is invisible to the RTL. We can thus get incorrect + code if the two ldah instructions are combined. */ + && ! (mode == SImode && extra != 0)) { - emit_move_insn (target, GEN_INT (c)); - return 1; - } - else if (n >= 2 + (extra != 0)) - { - emit_move_insn (target, GEN_INT (low)); + temp = copy_to_suggested_reg (GEN_INT (low), subtarget, mode); + if (extra != 0) - emit_insn (gen_add2_insn (target, GEN_INT (extra << 16))); + temp = expand_binop (mode, add_optab, temp, GEN_INT (extra << 16), + subtarget, 0, OPTAB_WIDEN); - emit_insn (gen_add2_insn (target, GEN_INT (high << 16))); - return 1; + return expand_binop (mode, add_optab, temp, GEN_INT (high << 16), + target, 0, OPTAB_WIDEN); } } - /* If we couldn't do it that way, try some other methods (that depend on - being able to compute in the target's word size). But if we have no - instructions left, don't bother. Also, don't even try if this is - SImode (in which case we should have already done something, but - do a sanity check here). */ + /* If we couldn't do it that way, try some other methods. But if we have + no instructions left, don't bother. Likewise, if this is SImode and + we can't make pseudos, we can't do anything since the expand_binop + and expand_unop calls will widen and try to make pseudos. */ - if (n == 1 || HOST_BITS_PER_WIDE_INT < 64 || GET_MODE (target) != DImode) + if (n == 1 + || (mode == SImode && ! rtx_equal_function_value_matters)) return 0; +#if HOST_BITS_PER_WIDE_INT == 64 /* First, see if can load a value into the target that is the same as the constant except that all bytes that are 0 are changed to be 0xff. If we can, then we can do a ZAPNOT to obtain the desired constant. */ @@ -664,26 +749,29 @@ alpha_emit_set_const (target, c, n) if ((new & ((HOST_WIDE_INT) 0xff << i)) == 0) new |= (HOST_WIDE_INT) 0xff << i; - if (alpha_emit_set_const (target, new, n - 1)) - { - emit_insn (gen_anddi3 (target, target, GEN_INT (c | ~ new))); - return 1; - } + /* We are only called for SImode and DImode. If this is SImode, ensure that + we are sign extended to a full word. */ - /* Find, see if we can load a related constant and then shift and possibly + if (mode == SImode) + new = (new & 0xffffffff) - 2 * (new & 0x80000000); + + if (new != c + && (temp = alpha_emit_set_const (subtarget, mode, new, n - 1)) != 0) + return expand_binop (mode, and_optab, temp, GEN_INT (c | ~ new), + target, 0, OPTAB_WIDEN); +#endif + + /* Next, see if we can load a related constant and then shift and possibly negate it to get the constant we want. Try this once each increasing numbers of insns. */ for (i = 1; i < n; i++) { /* First try complementing. */ - if (alpha_emit_set_const (target, ~ c, i)) - { - emit_insn (gen_one_cmpldi2 (target, target)); - return 1; - } + if ((temp = alpha_emit_set_const (subtarget, mode, ~ c, i)) != 0) + return expand_unop (mode, one_cmpl_optab, temp, target, 0); - /* First try to form a constant and do a left shift. We can do this + /* Next try to form a constant and do a left shift. We can do this if some low-order bits are zero; the exact_log2 call below tells us that information. The bits we are shifting out could be any value, but here we'll just try the 0- and sign-extended forms of @@ -694,44 +782,49 @@ alpha_emit_set_const (target, c, n) if ((bits = exact_log2 (c & - c)) > 0) for (; bits > 0; bits--) - if (alpha_emit_set_const (target, c >> bits, i) - || alpha_emit_set_const (target, - ((unsigned HOST_WIDE_INT) c) >> bits, - i)) - { - emit_insn (gen_ashldi3 (target, target, GEN_INT (bits))); - return 1; - } + if ((temp = (alpha_emit_set_const + (subtarget, mode, + (unsigned HOST_WIDE_INT) c >> bits, i))) != 0 + || ((temp = (alpha_emit_set_const + (subtarget, mode, + ((unsigned HOST_WIDE_INT) c) >> bits, i))) + != 0)) + return expand_binop (mode, ashl_optab, temp, GEN_INT (bits), + target, 0, OPTAB_WIDEN); /* Now try high-order zero bits. Here we try the shifted-in bits as - all zero and all ones. */ + all zero and all ones. Be careful to avoid shifting outside the + mode and to avoid shifting outside the host wide int size. */ - if ((bits = HOST_BITS_PER_WIDE_INT - floor_log2 (c) - 1) > 0) + if ((bits = (MIN (HOST_BITS_PER_WIDE_INT, GET_MODE_SIZE (mode) * 8) + - floor_log2 (c) - 1)) > 0) for (; bits > 0; bits--) - if (alpha_emit_set_const (target, c << bits, i) - || alpha_emit_set_const (target, - ((c << bits) - | (((HOST_WIDE_INT) 1 << bits) - 1)), - i)) - { - emit_insn (gen_lshrdi3 (target, target, GEN_INT (bits))); - return 1; - } + if ((temp = alpha_emit_set_const (subtarget, mode, + c << bits, i)) != 0 + || ((temp = (alpha_emit_set_const + (subtarget, mode, + ((c << bits) | (((HOST_WIDE_INT) 1 << bits) - 1)), + i))) + != 0)) + return expand_binop (mode, lshr_optab, temp, GEN_INT (bits), + target, 1, OPTAB_WIDEN); /* Now try high-order 1 bits. We get that with a sign-extension. - But one bit isn't enough here. */ + But one bit isn't enough here. Be careful to avoid shifting outside + the mode and to avoid shifting outside the host wide int size. */ - if ((bits = HOST_BITS_PER_WIDE_INT - floor_log2 (~ c) - 2) > 0) + if ((bits = (MIN (HOST_BITS_PER_WIDE_INT, GET_MODE_SIZE (mode) * 8) + - floor_log2 (~ c) - 2)) > 0) for (; bits > 0; bits--) - if (alpha_emit_set_const (target, c << bits, i) - || alpha_emit_set_const (target, - ((c << bits) - | (((HOST_WIDE_INT) 1 << bits) - 1)), - i)) - { - emit_insn (gen_ashrdi3 (target, target, GEN_INT (bits))); - return 1; - } + if ((temp = alpha_emit_set_const (subtarget, mode, + c << bits, i)) != 0 + || ((temp = (alpha_emit_set_const + (subtarget, mode, + ((c << bits) | (((HOST_WIDE_INT) 1 << bits) - 1)), + i))) + != 0)) + return expand_binop (mode, ashr_optab, temp, GEN_INT (bits), + target, 0, OPTAB_WIDEN); } return 0; @@ -984,6 +1077,23 @@ print_operand (file, x, code) fprintf (file, "%s", GET_RTX_NAME (reverse_condition (GET_CODE (x)))); break; + case 'c': + /* Similar to `c', but swap. We can't get unsigned here either. */ + if (GET_RTX_CLASS (GET_CODE (x)) != '<') + output_operand_lossage ("invalid %%D value"); + + fprintf (file, "%s", GET_RTX_NAME (swap_condition (GET_CODE (x)))); + break; + + case 'd': + /* Similar, but reverse and swap. We can't get unsigned here either. */ + if (GET_RTX_CLASS (GET_CODE (x)) != '<') + output_operand_lossage ("invalid %%D value"); + + fprintf (file, "%s", + GET_RTX_NAME (swap_condition (reverse_condition ((GET_CODE (x)))))); + break; + case 'E': /* Write the divide or modulus operator. */ switch (GET_CODE (x)) @@ -1042,29 +1152,44 @@ alpha_builtin_saveregs (arglist) != void_type_node)); /* Compute the current position into the args, taking into account - both registers and memory. */ + both registers and memory. Both of these are already included in + current_function_args_info. */ + + argsize = GEN_INT (current_function_args_info * UNITS_PER_WORD); + + /* SETUP_INCOMING_VARARGS moves the starting address base up by 48, + storing fp arg registers in the first 48 bytes, and the integer arg + registers in the next 48 bytes. This is only done, however, if any + integer registers need to be stored. + + If no integer registers need be stored, then we must subtract 48 in + order to account for the integer arg registers which are counted in + argsize above, but which are not actually stored on the stack. */ - argsize = plus_constant (current_function_arg_offset_rtx, - current_function_args_info * UNITS_PER_WORD); + addr = (current_function_args_info <= 5 + stdarg + ? plus_constant (virtual_incoming_args_rtx, 6 * UNITS_PER_WORD) + : plus_constant (virtual_incoming_args_rtx, - (6 * UNITS_PER_WORD))); + + addr = force_operand (addr, NULL_RTX); /* Allocate the va_list constructor */ block = assign_stack_local (BLKmode, 2 * UNITS_PER_WORD, BITS_PER_WORD); RTX_UNCHANGING_P (block) = 1; RTX_UNCHANGING_P (XEXP (block, 0)) = 1; - /* Store the address of the first integer register in the - __va_base member. */ + /* Store the address of the first integer register in the __base member. */ + +#ifdef POINTERS_EXTEND_UNSIGNED + addr = convert_memory_address (ptr_mode, addr); +#endif - emit_move_insn (change_address (block, DImode, XEXP (block, 0)), - force_operand (plus_constant (virtual_incoming_args_rtx, - 6 * UNITS_PER_WORD), - NULL_RTX)); + emit_move_insn (change_address (block, ptr_mode, XEXP (block, 0)), addr); /* Store the argsize as the __va_offset member. */ - emit_move_insn (change_address (block, Pmode, + emit_move_insn (change_address (block, TYPE_MODE (integer_type_node), plus_constant (XEXP (block, 0), - UNITS_PER_WORD)), - force_operand (argsize, NULL_RTX)); + POINTER_SIZE/BITS_PER_UNIT)), + argsize); /* Return the address of the va_list constructor, but don't put it in a register. Doing so would fail when not optimizing and produce worse @@ -1092,6 +1217,10 @@ alpha_sa_size () if (size != 0 && ! regs_ever_live[26]) size++; + /* Our size must be even (multiple of 16 bytes). */ + if (size & 1) + size ++; + return size * 8; } @@ -1102,13 +1231,14 @@ direct_return () { return (reload_completed && alpha_sa_size () == 0 && get_frame_size () == 0 + && current_function_outgoing_args_size == 0 && current_function_pretend_args_size == 0); } /* Write a version stamp. Don't write anything if we are running as a cross-compiler. Otherwise, use the versions in /usr/include/stamp.h. */ -#ifndef CROSS_COMPILE +#if !defined(CROSS_COMPILE) && !defined(_WIN32) #include #endif @@ -1127,13 +1257,16 @@ alpha_write_verstamp (file) } /* Write code to add constant C to register number IN_REG (possibly 31) - and put the result into OUT_REG. Write the code to FILE. */ + and put the result into OUT_REG. Use TEMP_REG as a scratch register; + usually this will be OUT_REG, but should not be if OUT_REG is + STACK_POINTER_REGNUM, since it must be updated in a single instruction. + Write the code to FILE. */ static void -add_long_const (file, c, in_reg, out_reg) - HOST_WIDE_INT c; - int in_reg, out_reg; +add_long_const (file, c, in_reg, out_reg, temp_reg) FILE *file; + HOST_WIDE_INT c; + int in_reg, out_reg, temp_reg; { HOST_WIDE_INT low = (c & 0xffff) - 2 * (c & 0x8000); HOST_WIDE_INT tmp1 = c - low; @@ -1159,17 +1292,22 @@ add_long_const (file, c, in_reg, out_reg if (low != 0) { + int result_reg = (extra == 0 && high == 0) ? out_reg : temp_reg; + if (low >= 0 && low < 255) - fprintf (file, "\taddq $%d,%d,$%d\n", in_reg, low, out_reg); + fprintf (file, "\taddq $%d,%d,$%d\n", in_reg, low, result_reg); else - fprintf (file, "\tlda $%d,%d($%d)\n", out_reg, low, in_reg); - in_reg = out_reg; + fprintf (file, "\tlda $%d,%d($%d)\n", result_reg, low, in_reg); + + in_reg = result_reg; } if (extra) { - fprintf (file, "\tldah $%d,%d($%d)\n", out_reg, extra, in_reg); - in_reg = out_reg; + int result_reg = (high == 0) ? out_reg : temp_reg; + + fprintf (file, "\tldah $%d,%d($%d)\n", result_reg, extra, in_reg); + in_reg = result_reg; } if (high) @@ -1183,31 +1321,35 @@ output_prolog (file, size) FILE *file; int size; { - HOST_WIDE_INT frame_size = ((size + current_function_outgoing_args_size - + current_function_pretend_args_size - + alpha_sa_size () + 15) & ~15); - HOST_WIDE_INT reg_offset = size + current_function_outgoing_args_size; + HOST_WIDE_INT out_args_size + = ALPHA_ROUND (current_function_outgoing_args_size); + HOST_WIDE_INT sa_size = alpha_sa_size (); + HOST_WIDE_INT frame_size + = (out_args_size + sa_size + + ALPHA_ROUND (size + current_function_pretend_args_size)); + HOST_WIDE_INT reg_offset = out_args_size; HOST_WIDE_INT start_reg_offset = reg_offset; HOST_WIDE_INT actual_start_reg_offset = start_reg_offset; + int int_reg_save_area_size = 0; rtx insn; - int reg_offset_base_reg = 30; unsigned reg_mask = 0; int i; - /* Ecoff can handle multiple .file directives, put out file and lineno. + /* Ecoff can handle multiple .file directives, so put out file and lineno. We have to do that before the .ent directive as we cannot switch files within procedures with native ecoff because line numbers are linked to procedure descriptors. Outputting the lineno helps debugging of one line functions as they would otherwise get no line number at all. Please note that we would - like to put out last_linenum from final.c, but it is not accesible. */ + like to put out last_linenum from final.c, but it is not accessible. */ if (write_symbols == SDB_DEBUG) { ASM_OUTPUT_SOURCE_FILENAME (file, DECL_SOURCE_FILE (current_function_decl)); if (debug_info_level != DINFO_LEVEL_TERSE) - ASM_OUTPUT_SOURCE_LINE (file, DECL_SOURCE_LINE (current_function_decl)); + ASM_OUTPUT_SOURCE_LINE (file, + DECL_SOURCE_LINE (current_function_decl)); } /* The assembly language programmer's guide states that the second argument @@ -1227,7 +1369,9 @@ output_prolog (file, size) /* If we need a GP (we have a LDSYM insn or a CALL_INSN), load it first. Even if we are a static function, we still need to do this in case - our address is taken and passed to something like qsort. */ + our address is taken and passed to something like qsort. + + We never need a GP for Windows/NT. */ alpha_function_needs_gp = 0; for (insn = get_insns (); insn; insn = NEXT_INSN (insn)) @@ -1242,12 +1386,15 @@ output_prolog (file, size) break; } - if (alpha_function_needs_gp) - fprintf (file, "\tldgp $29,0($27)\n"); + if (WINDOWS_NT == 0) + { + if (alpha_function_needs_gp) + fprintf (file, "\tldgp $29,0($27)\n"); - /* Put a label after the GP load so we can enter the function at it. */ - assemble_name (file, alpha_function_name); - fprintf (file, "..ng:\n"); + /* Put a label after the GP load so we can enter the function at it. */ + assemble_name (file, alpha_function_name); + fprintf (file, "..ng:\n"); + } /* Adjust the stack by the frame size. If the frame size is > 4096 bytes, we need to be sure we probe somewhere in the first and last @@ -1263,18 +1410,15 @@ output_prolog (file, size) if (frame_size > 4096) { int probed = 4096; - int regnum = 2; - fprintf (file, "\tldq $%d,-%d($30)\n", regnum++, probed); + fprintf (file, "\tstq $31,-%d($30)\n", probed); while (probed + 8192 < frame_size) - fprintf (file, "\tldq $%d,-%d($30)\n", regnum++, probed += 8192); - - if (probed + 4096 < frame_size) - fprintf (file, "\tldq $%d,-%d($30)\n", regnum++, probed += 4096); + fprintf (file, "\tstq $31,-%d($30)\n", probed += 8192); - if (regnum > 9) - abort (); + /* We only have to do this probe if we aren't saving registers. */ + if (sa_size == 0 && probed + 4096 < frame_size) + fprintf (file, "\tstq $31,-%d($30)\n", frame_size); } if (frame_size != 0) @@ -1285,54 +1429,46 @@ output_prolog (file, size) /* Here we generate code to set R4 to SP + 4096 and set R5 to the number of 8192 byte blocks to probe. We then probe each block in the loop and then set SP to the proper location. If the - amount remaining is > 4096, we have to do one more probe. */ + amount remaining is > 4096, we have to do one more probe if we + are not saving any registers. */ HOST_WIDE_INT blocks = (frame_size + 4096) / 8192; HOST_WIDE_INT leftover = frame_size + 4096 - blocks * 8192; - add_long_const (file, blocks, 31, 5); + add_long_const (file, blocks, 31, 5, 5); fprintf (file, "\tlda $4,4096($30)\n"); assemble_name (file, alpha_function_name); fprintf (file, "..sc:\n"); - fprintf (file, "\tldq $6,-8192($4)\n"); + fprintf (file, "\tstq $31,-8192($4)\n"); fprintf (file, "\tsubq $5,1,$5\n"); fprintf (file, "\tlda $4,-8192($4)\n"); - fprintf (file, "\tbne $5"); + fprintf (file, "\tbne $5,"); assemble_name (file, alpha_function_name); - fprintf (file, "%s..sc\n"); + fprintf (file, "..sc\n"); - fprintf (file, "\tlda $30,-%d($4)\n", leftover); + if (leftover > 4096 && sa_size == 0) + fprintf (file, "\tstq $31,-%d($4)\n", leftover); - if (leftover > 4096) - fprintf (file, "\tldq $2,%d($30)\n", leftover - 4096); + fprintf (file, "\tlda $30,-%d($4)\n", leftover); } /* Describe our frame. */ fprintf (file, "\t.frame $%d,%d,$26,%d\n", - frame_pointer_needed ? FRAME_POINTER_REGNUM : STACK_POINTER_REGNUM, + (frame_pointer_needed + ? HARD_FRAME_POINTER_REGNUM : STACK_POINTER_REGNUM), frame_size, current_function_pretend_args_size); - /* If reg_offset is "close enough" to 2**15 that one of the offsets would - overflow a store instruction, compute the base of the register save - area into $28. */ - if (reg_offset >= 32768 - alpha_sa_size () && alpha_sa_size () != 0) - { - add_long_const (file, reg_offset, 30, 28); - reg_offset_base_reg = 28; - reg_offset = start_reg_offset = 0; - } - - /* Save register 26 if it is used or if any other register needs to - be saved. */ - if (regs_ever_live[26] || alpha_sa_size () != 0) + /* Save register 26 if any other register needs to be saved. */ + if (sa_size != 0) { reg_mask |= 1 << 26; - fprintf (file, "\tstq $26,%d($%d)\n", reg_offset, reg_offset_base_reg); + fprintf (file, "\tstq $26,%d($30)\n", reg_offset); reg_offset += 8; + int_reg_save_area_size += 8; } /* Now save any other used integer registers required to be saved. */ @@ -1340,9 +1476,9 @@ output_prolog (file, size) if (! fixed_regs[i] && ! call_used_regs[i] && regs_ever_live[i] && i != 26) { reg_mask |= 1 << i; - fprintf (file, "\tstq $%d,%d($%d)\n", - i, reg_offset, reg_offset_base_reg); + fprintf (file, "\tstq $%d,%d($30)\n", i, reg_offset); reg_offset += 8; + int_reg_save_area_size += 8; } /* Print the register mask and do floating-point saves. */ @@ -1358,14 +1494,14 @@ output_prolog (file, size) && regs_ever_live[i + 32]) { reg_mask |= 1 << i; - fprintf (file, "\tstt $f%d,%d($%d)\n", - i, reg_offset, reg_offset_base_reg); + fprintf (file, "\tstt $f%d,%d($30)\n", i, reg_offset); reg_offset += 8; } /* Print the floating-point mask, if we've saved any fp register. */ if (reg_mask) - fprintf (file, "\t.fmask 0x%x,%d\n", reg_mask, actual_start_reg_offset); + fprintf (file, "\t.fmask 0x%x,%d\n", reg_mask, + actual_start_reg_offset - frame_size + int_reg_save_area_size); /* If we need a frame pointer, set it from the stack pointer. Note that this must always be the last instruction in the prologue. */ @@ -1384,12 +1520,16 @@ output_epilog (file, size) int size; { rtx insn = get_last_insn (); - HOST_WIDE_INT frame_size = ((size + current_function_outgoing_args_size - + current_function_pretend_args_size - + alpha_sa_size () + 15) & ~15); - HOST_WIDE_INT reg_offset = size + current_function_outgoing_args_size; + HOST_WIDE_INT out_args_size + = ALPHA_ROUND (current_function_outgoing_args_size); + HOST_WIDE_INT sa_size = alpha_sa_size (); + HOST_WIDE_INT frame_size + = (out_args_size + sa_size + + ALPHA_ROUND (size + current_function_pretend_args_size)); + HOST_WIDE_INT reg_offset = out_args_size; HOST_WIDE_INT frame_size_from_reg_save = frame_size - reg_offset; - int reg_offset_base_reg = 30; + int restore_fp + = frame_pointer_needed && regs_ever_live[HARD_FRAME_POINTER_REGNUM]; int i; /* If the last insn was a BARRIER, we don't have to write anything except @@ -1398,27 +1538,17 @@ output_epilog (file, size) insn = prev_nonnote_insn (insn); if (insn == 0 || GET_CODE (insn) != BARRIER) { - int fp_offset; + int fp_offset = 0; /* If we have a frame pointer, restore SP from it. */ if (frame_pointer_needed) fprintf (file, "\tbis $15,$15,$30\n"); - /* If the register save area is out of range, put its address into - $28. */ - if (reg_offset >= 32768 - alpha_sa_size () && alpha_sa_size () != 0) - { - add_long_const (file, reg_offset, 30, 28); - reg_offset_base_reg = 28; - reg_offset = 0; - } - /* Restore all the registers, starting with the return address register. */ - if (regs_ever_live[26] || alpha_sa_size () != 0) + if (sa_size != 0) { - fprintf (file, "\tldq $26,%d($%d)\n", - reg_offset, reg_offset_base_reg); + fprintf (file, "\tldq $26,%d($30)\n", reg_offset); reg_offset += 8; } @@ -1430,11 +1560,10 @@ output_epilog (file, size) if (! fixed_regs[i] && ! call_used_regs[i] && regs_ever_live[i] && i != 26) { - if (i == FRAME_POINTER_REGNUM && frame_pointer_needed) + if (i == HARD_FRAME_POINTER_REGNUM && frame_pointer_needed) fp_offset = reg_offset; else - fprintf (file, "\tldq $%d,%d($%d)\n", - i, reg_offset, reg_offset_base_reg); + fprintf (file, "\tldq $%d,%d($30)\n", i, reg_offset); reg_offset += 8; } @@ -1442,47 +1571,32 @@ output_epilog (file, size) if (! fixed_regs[i + 32] && ! call_used_regs[i + 32] && regs_ever_live[i + 32]) { - fprintf (file, "\tldt $f%d,%d($%d)\n", - i, reg_offset, reg_offset_base_reg); + fprintf (file, "\tldt $f%d,%d($30)\n", i, reg_offset); reg_offset += 8; } - /* If the stack size is large, compute the size of the stack into - a register because the old FP restore, stack pointer adjust, - and return are required to be consecutive instructions. - However, if the new stack pointer can be computed by adding the - a constant to the start of the register save area, we can do - it that way. */ - if (frame_size > 32767 - && ! (reg_offset_base_reg != 30 - && frame_size_from_reg_save < 32768)) - add_long_const (file, frame_size, 31, 1); + /* If the stack size is large and we have a frame pointer, compute the + size of the stack into a register because the old FP restore, stack + pointer adjust, and return are required to be consecutive + instructions. */ + if (frame_size > 32767 && restore_fp) + add_long_const (file, frame_size, 31, 1, 1); /* If we needed a frame pointer and we have to restore it, do it now. This must be done in one instruction immediately before the SP update. */ - if (frame_pointer_needed && regs_ever_live[FRAME_POINTER_REGNUM]) - fprintf (file, "\tldq $15,%d($%d)\n", fp_offset, reg_offset_base_reg); + if (restore_fp && fp_offset) + fprintf (file, "\tldq $15,%d($30)\n", fp_offset); - /* Now update the stack pointer, if needed. This must be done in - one, stylized, instruction. */ - if (frame_size > 32768) - { - if (reg_offset_base_reg != 30 - && frame_size_from_reg_save < 32768) - { - if (frame_size_from_reg_save < 255) - fprintf (file, "\taddq $%d,%d,$30\n", - reg_offset_base_reg, frame_size_from_reg_save); - else - fprintf (file, "\tlda %30,%d($%d)\n", - frame_size_from_reg_save, reg_offset_base_reg); - } - else - fprintf (file, "\taddq $1,$30,$30\n"); - } - else if (frame_size != 0) - fprintf (file, "\tlda $30,%d($30)\n", frame_size); + /* Now update the stack pointer, if needed. Only one instruction must + modify the stack pointer. It must be the last instruction in the + sequence and must be an ADDQ or LDA instruction. If the frame + pointer was loaded above, we may only put one instruction here. */ + + if (frame_size > 32768 && restore_fp) + fprintf (file, "\taddq $1,$30,$30\n"); + else + add_long_const (file, frame_size, 30, 30, 1); /* Finally return to the caller. */ fprintf (file, "\tret $31,($26),1\n");