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1.1 root 1: /* Definitions of target machine for GNU compiler, for DEC Alpha. 1.1.1.3 ! root 2: Copyright (C) 1992, 1993, 1994 Free Software Foundation, Inc. ! 3: Contributed by Richard Kenner ([email protected]) 1.1 root 4: 5: This file is part of GNU CC. 6: 7: GNU CC is free software; you can redistribute it and/or modify 8: it under the terms of the GNU General Public License as published by 9: the Free Software Foundation; either version 2, or (at your option) 10: any later version. 11: 12: GNU CC is distributed in the hope that it will be useful, 13: but WITHOUT ANY WARRANTY; without even the implied warranty of 14: MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15: GNU General Public License for more details. 16: 17: You should have received a copy of the GNU General Public License 18: along with GNU CC; see the file COPYING. If not, write to 19: the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */ 20: 21: 22: /* Names to predefine in the preprocessor for this target machine. */ 23: 24: #define CPP_PREDEFINES "\ 25: -Dunix -D__osf__ -D__alpha -D__alpha__ -D_LONGLONG -DSYSTYPE_BSD \ 1.1.1.2 root 26: -D_SYSTYPE_BSD -Asystem(unix) -Asystem(xpg4) -Acpu(alpha) -Amachine(alpha)" 1.1 root 27: 1.1.1.2 root 28: /* Write out the correct language type definition for the header files. 29: Unless we have assembler language, write out the symbols for C. */ 1.1 root 30: #define CPP_SPEC "\ 1.1.1.2 root 31: %{!.S: -D__LANGUAGE_C__ -D__LANGUAGE_C %{!ansi:-DLANGUAGE_C}} \ 1.1 root 32: %{.S: -D__LANGUAGE_ASSEMBLY__ -D__LANGUAGE_ASSEMBLY %{!ansi:-DLANGUAGE_ASSEMBLY}} \ 1.1.1.2 root 33: %{.cc: -D__LANGUAGE_C_PLUS_PLUS__ -D__LANGUAGE_C_PLUS_PLUS -D__cplusplus} \ 34: %{.cxx: -D__LANGUAGE_C_PLUS_PLUS__ -D__LANGUAGE_C_PLUS_PLUS -D__cplusplus} \ 35: %{.C: -D__LANGUAGE_C_PLUS_PLUS__ -D__LANGUAGE_C_PLUS_PLUS -D__cplusplus} \ 1.1 root 36: %{.m: -D__LANGUAGE_OBJECTIVE_C__ -D__LANGUAGE_OBJECTIVE_C}" 37: 38: /* Set the spec to use for signed char. The default tests the above macro 39: but DEC's compiler can't handle the conditional in a "constant" 40: operand. */ 41: 42: #define SIGNED_CHAR_SPEC "%{funsigned-char:-D__CHAR_UNSIGNED__}" 43: 44: /* No point in running CPP on our assembler output. */ 45: #define ASM_SPEC "-nocpp" 46: 1.1.1.3 ! root 47: /* Under OSF/1, -p and -pg require -lprof1. */ 1.1 root 48: 1.1.1.3 ! root 49: #define LIB_SPEC "%{p:-lprof1} %{pg:-lprof1} %{a:-lprof2} -lc" 1.1 root 50: 1.1.1.3 ! root 51: /* Pass "-G 8" to ld because Alpha's CC does. Pass -O3 if we are ! 52: optimizing, -O1 if we are not. Pass -shared, -non_shared or ! 53: -call_shared as appropriate. Also pass -pg. */ 1.1 root 54: #define LINK_SPEC \ 1.1.1.3 ! root 55: "-G 8 %{O*:-O3} %{!O*:-O1} %{!shared:-init __main} %{static:-non_shared} \ ! 56: %{!static:%{shared:-shared} %{!shared:-call_shared}} %{pg}" ! 57: ! 58: #define STARTFILE_SPEC \ ! 59: "%{!shared:%{pg:gcrt0.o%s}%{!pg:%{p:mcrt0.o%s}%{!p:crt0.o%s}}}" 1.1 root 60: 61: /* Print subsidiary information on the compiler version in use. */ 62: #define TARGET_VERSION 63: 64: /* Define the location for the startup file on OSF/1 for Alpha. */ 65: 66: #define MD_STARTFILE_PREFIX "/usr/lib/cmplrs/cc/" 67: 68: /* Run-time compilation parameters selecting different hardware subsets. */ 69: 70: extern int target_flags; 71: 72: /* This means that floating-point support exists in the target implementation 73: of the Alpha architecture. This is usually the default. */ 74: 75: #define TARGET_FP (target_flags & 1) 76: 77: /* This means that floating-point registers are allowed to be used. Note 78: that Alpha implementations without FP operations are required to 79: provide the FP registers. */ 80: 1.1.1.2 root 81: #define TARGET_FPREGS (target_flags & 2) 82: 83: /* This means that gas is used to process the assembler file. */ 84: 85: #define MASK_GAS 4 86: #define TARGET_GAS (target_flags & MASK_GAS) 1.1 root 87: 88: /* Macro to define tables used to set the flags. 89: This is a list in braces of pairs in braces, 90: each pair being { "NAME", VALUE } 91: where VALUE is the bits to set or minus the bits to clear. 92: An empty string NAME is used to identify the default VALUE. */ 93: 94: #define TARGET_SWITCHES \ 95: { {"no-soft-float", 1}, \ 96: {"soft-float", -1}, \ 97: {"fp-regs", 2}, \ 98: {"no-fp-regs", -3}, \ 1.1.1.2 root 99: {"alpha-as", -MASK_GAS}, \ 100: {"gas", MASK_GAS}, \ 1.1.1.3 ! root 101: {"", TARGET_DEFAULT | TARGET_CPU_DEFAULT} } 1.1 root 102: 103: #define TARGET_DEFAULT 3 104: 1.1.1.3 ! root 105: #ifndef TARGET_CPU_DEFAULT ! 106: #define TARGET_CPU_DEFAULT 0 ! 107: #endif ! 108: 1.1 root 109: /* Define this macro to change register usage conditional on target flags. 110: 111: On the Alpha, we use this to disable the floating-point registers when 112: they don't exist. */ 113: 114: #define CONDITIONAL_REGISTER_USAGE \ 115: if (! TARGET_FPREGS) \ 1.1.1.3 ! root 116: for (i = 32; i < 63; i++) \ 1.1 root 117: fixed_regs[i] = call_used_regs[i] = 1; 118: 1.1.1.3 ! root 119: /* Show we can debug even without a frame pointer. */ ! 120: #define CAN_DEBUG_WITHOUT_FP 1.1 root 121: 122: /* target machine storage layout */ 123: 124: /* Define to enable software floating point emulation. */ 125: #define REAL_ARITHMETIC 126: 127: /* Define the size of `int'. The default is the same as the word size. */ 128: #define INT_TYPE_SIZE 32 129: 130: /* Define the size of `long long'. The default is the twice the word size. */ 131: #define LONG_LONG_TYPE_SIZE 64 132: 133: /* The two floating-point formats we support are S-floating, which is 134: 4 bytes, and T-floating, which is 8 bytes. `float' is S and `double' 135: and `long double' are T. */ 136: 137: #define FLOAT_TYPE_SIZE 32 138: #define DOUBLE_TYPE_SIZE 64 139: #define LONG_DOUBLE_TYPE_SIZE 64 140: 141: #define WCHAR_TYPE "short unsigned int" 142: #define WCHAR_TYPE_SIZE 16 143: 144: /* Define this macro if it is advisable to hold scalars in registers 145: in a wider mode than that declared by the program. In such cases, 146: the value is constrained to be within the bounds of the declared 147: type, but kept valid in the wider mode. The signedness of the 148: extension may differ from that of the type. 149: 150: For Alpha, we always store objects in a full register. 32-bit objects 151: are always sign-extended, but smaller objects retain their signedness. */ 152: 153: #define PROMOTE_MODE(MODE,UNSIGNEDP,TYPE) \ 154: if (GET_MODE_CLASS (MODE) == MODE_INT \ 155: && GET_MODE_SIZE (MODE) < UNITS_PER_WORD) \ 156: { \ 157: if ((MODE) == SImode) \ 158: (UNSIGNEDP) = 0; \ 159: (MODE) = DImode; \ 160: } 161: 162: /* Define this if function arguments should also be promoted using the above 163: procedure. */ 164: 165: #define PROMOTE_FUNCTION_ARGS 166: 167: /* Likewise, if the function return value is promoted. */ 168: 169: #define PROMOTE_FUNCTION_RETURN 170: 171: /* Define this if most significant bit is lowest numbered 172: in instructions that operate on numbered bit-fields. 173: 174: There are no such instructions on the Alpha, but the documentation 175: is little endian. */ 176: #define BITS_BIG_ENDIAN 0 177: 178: /* Define this if most significant byte of a word is the lowest numbered. 179: This is false on the Alpha. */ 180: #define BYTES_BIG_ENDIAN 0 181: 182: /* Define this if most significant word of a multiword number is lowest 183: numbered. 184: 185: For Alpha we can decide arbitrarily since there are no machine instructions 186: for them. Might as well be consistent with bytes. */ 187: #define WORDS_BIG_ENDIAN 0 188: 189: /* number of bits in an addressable storage unit */ 190: #define BITS_PER_UNIT 8 191: 192: /* Width in bits of a "word", which is the contents of a machine register. 193: Note that this is not necessarily the width of data type `int'; 194: if using 16-bit ints on a 68000, this would still be 32. 195: But on a machine with 16-bit registers, this would be 16. */ 196: #define BITS_PER_WORD 64 197: 198: /* Width of a word, in units (bytes). */ 199: #define UNITS_PER_WORD 8 200: 201: /* Width in bits of a pointer. 202: See also the macro `Pmode' defined below. */ 203: #define POINTER_SIZE 64 204: 205: /* Allocation boundary (in *bits*) for storing arguments in argument list. */ 206: #define PARM_BOUNDARY 64 207: 208: /* Boundary (in *bits*) on which stack pointer should be aligned. */ 209: #define STACK_BOUNDARY 64 210: 211: /* Allocation boundary (in *bits*) for the code of a function. */ 212: #define FUNCTION_BOUNDARY 64 213: 214: /* Alignment of field after `int : 0' in a structure. */ 215: #define EMPTY_FIELD_BOUNDARY 64 216: 217: /* Every structure's size must be a multiple of this. */ 218: #define STRUCTURE_SIZE_BOUNDARY 8 219: 220: /* A bitfield declared as `int' forces `int' alignment for the struct. */ 221: #define PCC_BITFIELD_TYPE_MATTERS 1 222: 1.1.1.2 root 223: /* Align loop starts for optimal branching. 224: 225: ??? Kludge this and the next macro for the moment by not doing anything if 226: we don't optimize and also if we are writing ECOFF symbols to work around 227: a bug in DEC's assembler. */ 1.1 root 228: 229: #define ASM_OUTPUT_LOOP_ALIGN(FILE) \ 1.1.1.2 root 230: if (optimize > 0 && write_symbols != SDB_DEBUG) \ 231: ASM_OUTPUT_ALIGN (FILE, 5) 1.1 root 232: 233: /* This is how to align an instruction for optimal branching. 234: On Alpha we'll get better performance by aligning on a quadword 235: boundary. */ 236: 237: #define ASM_OUTPUT_ALIGN_CODE(FILE) \ 1.1.1.2 root 238: if (optimize > 0 && write_symbols != SDB_DEBUG) \ 239: ASM_OUTPUT_ALIGN ((FILE), 4) 1.1 root 240: 241: /* No data type wants to be aligned rounder than this. */ 242: #define BIGGEST_ALIGNMENT 64 243: 244: /* Make strings word-aligned so strcpy from constants will be faster. */ 245: #define CONSTANT_ALIGNMENT(EXP, ALIGN) \ 246: (TREE_CODE (EXP) == STRING_CST \ 247: && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN)) 248: 249: /* Make arrays of chars word-aligned for the same reasons. */ 250: #define DATA_ALIGNMENT(TYPE, ALIGN) \ 251: (TREE_CODE (TYPE) == ARRAY_TYPE \ 252: && TYPE_MODE (TREE_TYPE (TYPE)) == QImode \ 253: && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN)) 254: 255: /* Set this non-zero if move instructions will actually fail to work 256: when given unaligned data. 257: 258: Since we get an error message when we do one, call them invalid. */ 259: 260: #define STRICT_ALIGNMENT 1 261: 262: /* Set this non-zero if unaligned move instructions are extremely slow. 263: 264: On the Alpha, they trap. */ 265: 266: #define SLOW_UNALIGNED_ACCESS 1 267: 268: /* Standard register usage. */ 269: 270: /* Number of actual hardware registers. 271: The hardware registers are assigned numbers for the compiler 272: from 0 to just below FIRST_PSEUDO_REGISTER. 273: All registers that the compiler knows about must be given numbers, 274: even those that are not normally considered general registers. 275: 276: We define all 32 integer registers, even though $31 is always zero, 277: and all 32 floating-point registers, even though $f31 is also 278: always zero. We do not bother defining the FP status register and 279: there are no other registers. 280: 281: Since $31 is always zero, we will use register number 31 as the 282: argument pointer. It will never appear in the generated code 283: because we will always be eliminating it in favor of the stack 1.1.1.3 ! root 284: pointer or hardware frame pointer. ! 285: ! 286: Likewise, we use $f31 for the frame pointer, which will always ! 287: be eliminated in favor of the hardware frame pointer or the ! 288: stack pointer. */ 1.1 root 289: 290: #define FIRST_PSEUDO_REGISTER 64 291: 292: /* 1 for registers that have pervasive standard uses 293: and are not available for the register allocator. */ 294: 295: #define FIXED_REGISTERS \ 296: {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ 297: 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, \ 298: 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ 299: 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1 } 300: 301: /* 1 for registers not available across function calls. 302: These must include the FIXED_REGISTERS and also any 303: registers that can be used without being saved. 304: The latter must include the registers where values are returned 305: and the register where structure-value addresses are passed. 306: Aside from that, you can include as many other registers as you like. */ 307: #define CALL_USED_REGISTERS \ 308: {1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, \ 309: 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 1, 1, 1, 1, 1, \ 310: 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, \ 311: 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 } 312: 313: /* List the order in which to allocate registers. Each register must be 314: listed once, even those in FIXED_REGISTERS. 315: 316: We allocate in the following order: 317: $f1 (nonsaved floating-point register) 318: $f10-$f15 (likewise) 319: $f22-$f30 (likewise) 320: $f21-$f16 (likewise, but input args) 321: $f0 (nonsaved, but return value) 322: $f2-$f9 (saved floating-point registers) 323: $1-$8 (nonsaved integer registers) 324: $22-$25 (likewise) 325: $28 (likewise) 326: $0 (likewise, but return value) 327: $21-$16 (likewise, but input args) 328: $27 (procedure value) 329: $9-$14 (saved integer registers) 330: $26 (return PC) 331: $15 (frame pointer) 332: $29 (global pointer) 1.1.1.3 ! root 333: $30, $31, $f31 (stack pointer and always zero/ap & fp) */ 1.1 root 334: 335: #define REG_ALLOC_ORDER \ 336: {33, \ 1.1.1.2 root 337: 42, 43, 44, 45, 46, 47, \ 1.1 root 338: 54, 55, 56, 57, 58, 59, 60, 61, 62, \ 339: 53, 52, 51, 50, 49, 48, \ 340: 32, \ 341: 34, 35, 36, 37, 38, 39, 40, 41, \ 342: 1, 2, 3, 4, 5, 6, 7, 8, \ 343: 22, 23, 24, 25, \ 344: 28, \ 345: 0, \ 346: 21, 20, 19, 18, 17, 16, \ 347: 27, \ 348: 9, 10, 11, 12, 13, 14, \ 349: 26, \ 350: 15, \ 351: 29, \ 352: 30, 31, 63 } 353: 354: /* Return number of consecutive hard regs needed starting at reg REGNO 355: to hold something of mode MODE. 356: This is ordinarily the length in words of a value of mode MODE 357: but can be less for certain modes in special long registers. */ 358: 359: #define HARD_REGNO_NREGS(REGNO, MODE) \ 360: ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD) 361: 362: /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE. 363: On Alpha, the integer registers can hold any mode. The floating-point 364: registers can hold 32-bit and 64-bit integers as well, but not 16-bit 365: or 8-bit values. If we only allowed the larger integers into FP registers, 366: we'd have to say that QImode and SImode aren't tiable, which is a 367: pain. So say all registers can hold everything and see how that works. */ 368: 369: #define HARD_REGNO_MODE_OK(REGNO, MODE) 1 370: 371: /* Value is 1 if it is a good idea to tie two pseudo registers 372: when one has mode MODE1 and one has mode MODE2. 373: If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2, 374: for any hard reg, then this must be 0 for correct output. */ 375: 376: #define MODES_TIEABLE_P(MODE1, MODE2) 1 377: 378: /* Specify the registers used for certain standard purposes. 379: The values of these macros are register numbers. */ 380: 381: /* Alpha pc isn't overloaded on a register that the compiler knows about. */ 382: /* #define PC_REGNUM */ 383: 384: /* Register to use for pushing function arguments. */ 385: #define STACK_POINTER_REGNUM 30 386: 387: /* Base register for access to local variables of the function. */ 1.1.1.3 ! root 388: #define HARD_FRAME_POINTER_REGNUM 15 1.1 root 389: 390: /* Value should be nonzero if functions must have frame pointers. 391: Zero means the frame pointer need not be set up (and parms 392: may be accessed via the stack pointer) in functions that seem suitable. 393: This is computed in `reload', in reload1.c. */ 394: #define FRAME_POINTER_REQUIRED 0 395: 396: /* Base register for access to arguments of the function. */ 397: #define ARG_POINTER_REGNUM 31 398: 1.1.1.3 ! root 399: /* Base register for access to local variables of function. */ ! 400: #define FRAME_POINTER_REGNUM 63 ! 401: 1.1 root 402: /* Register in which static-chain is passed to a function. 403: 404: For the Alpha, this is based on an example; the calling sequence 405: doesn't seem to specify this. */ 406: #define STATIC_CHAIN_REGNUM 1 407: 408: /* Register in which address to store a structure value 409: arrives in the function. On the Alpha, the address is passed 410: as a hidden argument. */ 411: #define STRUCT_VALUE 0 412: 413: /* Define the classes of registers for register constraints in the 414: machine description. Also define ranges of constants. 415: 416: One of the classes must always be named ALL_REGS and include all hard regs. 417: If there is more than one class, another class must be named NO_REGS 418: and contain no registers. 419: 420: The name GENERAL_REGS must be the name of a class (or an alias for 421: another name such as ALL_REGS). This is the class of registers 422: that is allowed by "g" or "r" in a register constraint. 423: Also, registers outside this class are allocated only when 424: instructions express preferences for them. 425: 426: The classes must be numbered in nondecreasing order; that is, 427: a larger-numbered class must never be contained completely 428: in a smaller-numbered class. 429: 430: For any two classes, it is very desirable that there be another 431: class that represents their union. */ 432: 433: enum reg_class { NO_REGS, GENERAL_REGS, FLOAT_REGS, ALL_REGS, 434: LIM_REG_CLASSES }; 435: 436: #define N_REG_CLASSES (int) LIM_REG_CLASSES 437: 438: /* Give names of register classes as strings for dump file. */ 439: 440: #define REG_CLASS_NAMES \ 441: {"NO_REGS", "GENERAL_REGS", "FLOAT_REGS", "ALL_REGS" } 442: 443: /* Define which registers fit in which classes. 444: This is an initializer for a vector of HARD_REG_SET 445: of length N_REG_CLASSES. */ 446: 447: #define REG_CLASS_CONTENTS \ 1.1.1.3 ! root 448: { {0, 0}, {~0, 0x80000000}, {0, 0x7fffffff}, {~0, ~0} } 1.1 root 449: 450: /* The same information, inverted: 451: Return the class number of the smallest class containing 452: reg number REGNO. This could be a conditional expression 453: or could index an array. */ 454: 1.1.1.3 ! root 455: #define REGNO_REG_CLASS(REGNO) \ ! 456: ((REGNO) >= 32 && (REGNO) <= 62 ? FLOAT_REGS : GENERAL_REGS) 1.1 root 457: 458: /* The class value for index registers, and the one for base regs. */ 459: #define INDEX_REG_CLASS NO_REGS 460: #define BASE_REG_CLASS GENERAL_REGS 461: 462: /* Get reg_class from a letter such as appears in the machine description. */ 463: 464: #define REG_CLASS_FROM_LETTER(C) \ 465: ((C) == 'f' ? FLOAT_REGS : NO_REGS) 466: 467: /* Define this macro to change register usage conditional on target flags. */ 468: /* #define CONDITIONAL_REGISTER_USAGE */ 469: 470: /* The letters I, J, K, L, M, N, O, and P in a register constraint string 471: can be used to stand for particular ranges of immediate operands. 472: This macro defines what the ranges are. 473: C is the letter, and VALUE is a constant value. 474: Return 1 if VALUE is in the range specified by C. 475: 476: For Alpha: 477: `I' is used for the range of constants most insns can contain. 478: `J' is the constant zero. 479: `K' is used for the constant in an LDA insn. 480: `L' is used for the constant in a LDAH insn. 481: `M' is used for the constants that can be AND'ed with using a ZAP insn. 482: `N' is used for complemented 8-bit constants. 483: `O' is used for negated 8-bit constants. 484: `P' is used for the constants 1, 2 and 3. */ 485: 486: #define CONST_OK_FOR_LETTER_P(VALUE, C) \ 487: ((C) == 'I' ? (unsigned HOST_WIDE_INT) (VALUE) < 0x100 \ 488: : (C) == 'J' ? (VALUE) == 0 \ 489: : (C) == 'K' ? (unsigned HOST_WIDE_INT) ((VALUE) + 0x8000) < 0x10000 \ 490: : (C) == 'L' ? (((VALUE) & 0xffff) == 0 \ 491: && (((VALUE)) >> 31 == -1 || (VALUE) >> 31 == 0)) \ 492: : (C) == 'M' ? zap_mask (VALUE) \ 493: : (C) == 'N' ? (unsigned HOST_WIDE_INT) (~ (VALUE)) < 0x100 \ 494: : (C) == 'O' ? (unsigned HOST_WIDE_INT) (- (VALUE)) < 0x100 \ 495: : (C) == 'P' ? (VALUE) == 1 || (VALUE) == 2 || (VALUE) == 3 \ 496: : 0) 497: 498: /* Similar, but for floating or large integer constants, and defining letters 499: G and H. Here VALUE is the CONST_DOUBLE rtx itself. 500: 501: For Alpha, `G' is the floating-point constant zero. `H' is a CONST_DOUBLE 502: that is the operand of a ZAP insn. */ 503: 504: #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \ 505: ((C) == 'G' ? (GET_MODE_CLASS (GET_MODE (VALUE)) == MODE_FLOAT \ 506: && (VALUE) == CONST0_RTX (GET_MODE (VALUE))) \ 507: : (C) == 'H' ? (GET_MODE (VALUE) == VOIDmode \ 508: && zap_mask (CONST_DOUBLE_LOW (VALUE)) \ 509: && zap_mask (CONST_DOUBLE_HIGH (VALUE))) \ 510: : 0) 511: 1.1.1.2 root 512: /* Optional extra constraints for this machine. 513: 514: For the Alpha, `Q' means that this is a memory operand but not a 1.1.1.3 ! root 515: reference to an unaligned location. ! 516: `R' is a SYMBOL_REF that has SYMBOL_REF_FLAG set or is the current ! 517: function. */ 1.1.1.2 root 518: 519: #define EXTRA_CONSTRAINT(OP, C) \ 520: ((C) == 'Q' ? GET_CODE (OP) == MEM && GET_CODE (XEXP (OP, 0)) != AND \ 1.1.1.3 ! root 521: : (C) == 'R' ? current_file_function_operand (OP, Pmode) \ 1.1.1.2 root 522: : 0) 523: 1.1 root 524: /* Given an rtx X being reloaded into a reg required to be 525: in class CLASS, return the class of reg to actually use. 526: In general this is just CLASS; but on some machines 527: in some cases it is preferable to use a more restrictive class. 528: 529: On the Alpha, all constants except zero go into a floating-point 530: register via memory. */ 531: 532: #define PREFERRED_RELOAD_CLASS(X, CLASS) \ 533: (CONSTANT_P (X) && (X) != const0_rtx && (X) != CONST0_RTX (GET_MODE (X)) \ 534: ? ((CLASS) == FLOAT_REGS ? NO_REGS : GENERAL_REGS) \ 535: : (CLASS)) 536: 537: /* Loading and storing HImode or QImode values to and from memory 538: usually requires a scratch register. The exceptions are loading 1.1.1.2 root 539: QImode and HImode from an aligned address to a general register. 540: We also cannot load an unaligned address into an FP register. */ 1.1 root 541: 542: #define SECONDARY_INPUT_RELOAD_CLASS(CLASS,MODE,IN) \ 543: (((GET_CODE (IN) == MEM \ 544: || (GET_CODE (IN) == REG && REGNO (IN) >= FIRST_PSEUDO_REGISTER) \ 545: || (GET_CODE (IN) == SUBREG \ 546: && (GET_CODE (SUBREG_REG (IN)) == MEM \ 547: || (GET_CODE (SUBREG_REG (IN)) == REG \ 548: && REGNO (SUBREG_REG (IN)) >= FIRST_PSEUDO_REGISTER)))) \ 549: && (((CLASS) == FLOAT_REGS \ 550: && ((MODE) == SImode || (MODE) == HImode || (MODE) == QImode)) \ 551: || (((MODE) == QImode || (MODE) == HImode) \ 552: && unaligned_memory_operand (IN, MODE)))) \ 1.1.1.2 root 553: ? GENERAL_REGS \ 554: : ((CLASS) == FLOAT_REGS && GET_CODE (IN) == MEM \ 555: && GET_CODE (XEXP (IN, 0)) == AND) ? GENERAL_REGS \ 556: : NO_REGS) 1.1 root 557: 558: #define SECONDARY_OUTPUT_RELOAD_CLASS(CLASS,MODE,OUT) \ 559: (((GET_CODE (OUT) == MEM \ 560: || (GET_CODE (OUT) == REG && REGNO (OUT) >= FIRST_PSEUDO_REGISTER) \ 561: || (GET_CODE (OUT) == SUBREG \ 562: && (GET_CODE (SUBREG_REG (OUT)) == MEM \ 563: || (GET_CODE (SUBREG_REG (OUT)) == REG \ 564: && REGNO (SUBREG_REG (OUT)) >= FIRST_PSEUDO_REGISTER)))) \ 565: && (((MODE) == HImode || (MODE) == QImode \ 566: || ((MODE) == SImode && (CLASS) == FLOAT_REGS)))) \ 1.1.1.2 root 567: ? GENERAL_REGS \ 568: : ((CLASS) == FLOAT_REGS && GET_CODE (OUT) == MEM \ 569: && GET_CODE (XEXP (OUT, 0)) == AND) ? GENERAL_REGS \ 570: : NO_REGS) 1.1 root 571: 572: /* If we are copying between general and FP registers, we need a memory 573: location. */ 574: 575: #define SECONDARY_MEMORY_NEEDED(CLASS1,CLASS2,MODE) ((CLASS1) != (CLASS2)) 576: 1.1.1.3 ! root 577: /* Specify the mode to be used for memory when a secondary memory ! 578: location is needed. If MODE is floating-point, use it. Otherwise, ! 579: widen to a word like the default. This is needed because we always ! 580: store integers in FP registers in quadword format. This whole ! 581: area is very tricky! */ ! 582: #define SECONDARY_MEMORY_NEEDED_MODE(MODE) \ ! 583: (GET_MODE_CLASS (MODE) == MODE_FLOAT ? (MODE) \ ! 584: : mode_for_size (BITS_PER_WORD, GET_MODE_CLASS (MODE), 0)) ! 585: 1.1 root 586: /* Return the maximum number of consecutive registers 587: needed to represent mode MODE in a register of class CLASS. */ 588: 589: #define CLASS_MAX_NREGS(CLASS, MODE) \ 590: ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD) 591: 1.1.1.3 ! root 592: /* If defined, gives a class of registers that cannot be used as the ! 593: operand of a SUBREG that changes the size of the object. */ ! 594: ! 595: #define CLASS_CANNOT_CHANGE_SIZE FLOAT_REGS ! 596: 1.1 root 597: /* Define the cost of moving between registers of various classes. Moving 598: between FLOAT_REGS and anything else except float regs is expensive. 599: In fact, we make it quite expensive because we really don't want to 600: do these moves unless it is clearly worth it. Optimizations may 601: reduce the impact of not being able to allocate a pseudo to a 602: hard register. */ 603: 604: #define REGISTER_MOVE_COST(CLASS1, CLASS2) \ 605: (((CLASS1) == FLOAT_REGS) == ((CLASS2) == FLOAT_REGS) ? 2 : 20) 606: 607: /* A C expressions returning the cost of moving data of MODE from a register to 608: or from memory. 609: 610: On the Alpha, bump this up a bit. */ 611: 612: #define MEMORY_MOVE_COST(MODE) 6 613: 614: /* Provide the cost of a branch. Exact meaning under development. */ 615: #define BRANCH_COST 5 616: 617: /* Adjust the cost of dependencies. */ 618: 619: #define ADJUST_COST(INSN,LINK,DEP,COST) \ 620: (COST) = alpha_adjust_cost (INSN, LINK, DEP, COST) 621: 622: /* Stack layout; function entry, exit and calling. */ 623: 624: /* Define this if pushing a word on the stack 625: makes the stack pointer a smaller address. */ 626: #define STACK_GROWS_DOWNWARD 627: 628: /* Define this if the nominal address of the stack frame 629: is at the high-address end of the local variables; 630: that is, each additional local variable allocated 631: goes at a more negative offset in the frame. */ 632: /* #define FRAME_GROWS_DOWNWARD */ 633: 634: /* Offset within stack frame to start allocating local variables at. 635: If FRAME_GROWS_DOWNWARD, this is the offset to the END of the 636: first local allocated. Otherwise, it is the offset to the BEGINNING 637: of the first local allocated. */ 638: 1.1.1.3 ! root 639: #define STARTING_FRAME_OFFSET 0 1.1 root 640: 641: /* If we generate an insn to push BYTES bytes, 642: this says how many the stack pointer really advances by. 643: On Alpha, don't define this because there are no push insns. */ 644: /* #define PUSH_ROUNDING(BYTES) */ 645: 646: /* Define this if the maximum size of all the outgoing args is to be 647: accumulated and pushed during the prologue. The amount can be 648: found in the variable current_function_outgoing_args_size. */ 649: #define ACCUMULATE_OUTGOING_ARGS 650: 651: /* Offset of first parameter from the argument pointer register value. */ 652: 653: #define FIRST_PARM_OFFSET(FNDECL) 0 654: 655: /* Definitions for register eliminations. 656: 657: We have two registers that can be eliminated on the Alpha. First, the 658: frame pointer register can often be eliminated in favor of the stack 659: pointer register. Secondly, the argument pointer register can always be 660: eliminated; it is replaced with either the stack or frame pointer. */ 661: 662: /* This is an array of structures. Each structure initializes one pair 663: of eliminable registers. The "from" register number is given first, 664: followed by "to". Eliminations of the same "from" register are listed 665: in order of preference. */ 666: 1.1.1.3 ! root 667: #define ELIMINABLE_REGS \ ! 668: {{ ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \ ! 669: { ARG_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}, \ ! 670: { FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}, \ ! 671: { FRAME_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}} 1.1 root 672: 673: /* Given FROM and TO register numbers, say whether this elimination is allowed. 674: Frame pointer elimination is automatically handled. 675: 676: All eliminations are valid since the cases where FP can't be 677: eliminated are already handled. */ 678: 679: #define CAN_ELIMINATE(FROM, TO) 1 680: 1.1.1.3 ! root 681: /* Round up to a multiple of 16 bytes. */ ! 682: #define ALPHA_ROUND(X) (((X) + 15) & ~ 15) ! 683: 1.1 root 684: /* Define the offset between two registers, one to be eliminated, and the other 685: its replacement, at the start of a routine. */ 686: #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \ 1.1.1.3 ! root 687: { if ((FROM) == FRAME_POINTER_REGNUM) \ ! 688: (OFFSET) = (ALPHA_ROUND (current_function_outgoing_args_size) \ ! 689: + alpha_sa_size ()); \ ! 690: else if ((FROM) == ARG_POINTER_REGNUM) \ ! 691: (OFFSET) = (ALPHA_ROUND (current_function_outgoing_args_size) \ ! 692: + alpha_sa_size () \ ! 693: + (ALPHA_ROUND (get_frame_size () \ ! 694: + current_function_pretend_args_size) \ ! 695: - current_function_pretend_args_size)); \ 1.1 root 696: } 697: 698: /* Define this if stack space is still allocated for a parameter passed 699: in a register. */ 700: /* #define REG_PARM_STACK_SPACE */ 701: 702: /* Value is the number of bytes of arguments automatically 703: popped when returning from a subroutine call. 704: FUNTYPE is the data type of the function (as a tree), 705: or for a library call it is an identifier node for the subroutine name. 706: SIZE is the number of bytes of arguments passed on the stack. */ 707: 708: #define RETURN_POPS_ARGS(FUNTYPE,SIZE) 0 709: 710: /* Define how to find the value returned by a function. 711: VALTYPE is the data type of the value (as a tree). 712: If the precise function being called is known, FUNC is its FUNCTION_DECL; 713: otherwise, FUNC is 0. 714: 715: On Alpha the value is found in $0 for integer functions and 716: $f0 for floating-point functions. */ 717: 718: #define FUNCTION_VALUE(VALTYPE, FUNC) \ 719: gen_rtx (REG, \ 720: ((TREE_CODE (VALTYPE) == INTEGER_TYPE \ 721: || TREE_CODE (VALTYPE) == ENUMERAL_TYPE \ 722: || TREE_CODE (VALTYPE) == BOOLEAN_TYPE \ 723: || TREE_CODE (VALTYPE) == CHAR_TYPE \ 724: || TREE_CODE (VALTYPE) == POINTER_TYPE \ 725: || TREE_CODE (VALTYPE) == OFFSET_TYPE) \ 726: && TYPE_PRECISION (VALTYPE) < BITS_PER_WORD) \ 727: ? word_mode : TYPE_MODE (VALTYPE), \ 728: TARGET_FPREGS && TREE_CODE (VALTYPE) == REAL_TYPE ? 32 : 0) 729: 730: /* Define how to find the value returned by a library function 731: assuming the value has mode MODE. */ 732: 733: #define LIBCALL_VALUE(MODE) \ 734: gen_rtx (REG, MODE, \ 735: TARGET_FPREGS && GET_MODE_CLASS (MODE) == MODE_FLOAT ? 32 : 0) 736: 737: /* The definition of this macro implies that there are cases where 738: a scalar value cannot be returned in registers. 739: 740: For the Alpha, any structure or union type is returned in memory, as 741: are integers whose size is larger than 64 bits. */ 742: 743: #define RETURN_IN_MEMORY(TYPE) \ 744: (TYPE_MODE (TYPE) == BLKmode \ 745: || (TREE_CODE (TYPE) == INTEGER_TYPE && TYPE_PRECISION (TYPE) > 64)) 746: 747: /* 1 if N is a possible register number for a function value 748: as seen by the caller. */ 749: 750: #define FUNCTION_VALUE_REGNO_P(N) ((N) == 0 || (N) == 32) 751: 752: /* 1 if N is a possible register number for function argument passing. 753: On Alpha, these are $16-$21 and $f16-$f21. */ 754: 755: #define FUNCTION_ARG_REGNO_P(N) \ 756: (((N) >= 16 && (N) <= 21) || ((N) >= 16 + 32 && (N) <= 21 + 32)) 757: 758: /* Define a data type for recording info about an argument list 759: during the scan of that argument list. This data type should 760: hold all necessary information about the function itself 761: and about the args processed so far, enough to enable macros 762: such as FUNCTION_ARG to determine where the next arg should go. 763: 764: On Alpha, this is a single integer, which is a number of words 765: of arguments scanned so far. 766: Thus 6 or more means all following args should go on the stack. */ 767: 768: #define CUMULATIVE_ARGS int 769: 770: /* Initialize a variable CUM of type CUMULATIVE_ARGS 771: for a call to a function whose data type is FNTYPE. 772: For a library call, FNTYPE is 0. */ 773: 774: #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME) (CUM) = 0 775: 776: /* Define intermediate macro to compute the size (in registers) of an argument 777: for the Alpha. */ 778: 779: #define ALPHA_ARG_SIZE(MODE, TYPE, NAMED) \ 780: ((MODE) != BLKmode \ 781: ? (GET_MODE_SIZE (MODE) + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD \ 782: : (int_size_in_bytes (TYPE) + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD) 783: 784: /* Update the data in CUM to advance over an argument 785: of mode MODE and data type TYPE. 786: (TYPE is null for libcalls where that information may not be available.) */ 787: 788: #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \ 789: if (MUST_PASS_IN_STACK (MODE, TYPE)) \ 790: (CUM) = 6; \ 791: else \ 792: (CUM) += ALPHA_ARG_SIZE (MODE, TYPE, NAMED) 793: 794: /* Determine where to put an argument to a function. 795: Value is zero to push the argument on the stack, 796: or a hard register in which to store the argument. 797: 798: MODE is the argument's machine mode. 799: TYPE is the data type of the argument (as a tree). 800: This is null for libcalls where that information may 801: not be available. 802: CUM is a variable of type CUMULATIVE_ARGS which gives info about 803: the preceding args and about the function being called. 804: NAMED is nonzero if this argument is a named parameter 805: (otherwise it is an extra parameter matching an ellipsis). 806: 807: On Alpha the first 6 words of args are normally in registers 808: and the rest are pushed. */ 809: 810: #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \ 811: ((CUM) < 6 && ! MUST_PASS_IN_STACK (MODE, TYPE) \ 812: ? gen_rtx(REG, (MODE), \ 1.1.1.3 ! root 813: (CUM) + 16 + ((TARGET_FPREGS \ ! 814: && (GET_MODE_CLASS (MODE) == MODE_COMPLEX_FLOAT \ ! 815: || GET_MODE_CLASS (MODE) == MODE_FLOAT)) \ ! 816: * 32)) \ ! 817: : 0) 1.1 root 818: 819: /* Specify the padding direction of arguments. 820: 821: On the Alpha, we must pad upwards in order to be able to pass args in 822: registers. */ 823: 824: #define FUNCTION_ARG_PADDING(MODE, TYPE) upward 825: 826: /* For an arg passed partly in registers and partly in memory, 827: this is the number of registers used. 828: For args passed entirely in registers or entirely in memory, zero. */ 829: 830: #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) \ 831: ((CUM) < 6 && 6 < (CUM) + ALPHA_ARG_SIZE (MODE, TYPE, NAMED) \ 832: ? 6 - (CUM) : 0) 833: 834: /* Perform any needed actions needed for a function that is receiving a 835: variable number of arguments. 836: 837: CUM is as above. 838: 839: MODE and TYPE are the mode and type of the current parameter. 840: 841: PRETEND_SIZE is a variable that should be set to the amount of stack 842: that must be pushed by the prolog to pretend that our caller pushed 843: it. 844: 845: Normally, this macro will push all remaining incoming registers on the 846: stack and set PRETEND_SIZE to the length of the registers pushed. 847: 848: On the Alpha, we allocate space for all 12 arg registers, but only 849: push those that are remaining. 850: 851: However, if NO registers need to be saved, don't allocate any space. 852: This is not only because we won't need the space, but because AP includes 853: the current_pretend_args_size and we don't want to mess up any 1.1.1.2 root 854: ap-relative addresses already made. 855: 856: If we are not to use the floating-point registers, save the integer 857: registers where we would put the floating-point registers. This is 858: not the most efficient way to implement varargs with just one register 859: class, but it isn't worth doing anything more efficient in this rare 860: case. */ 861: 1.1 root 862: 863: #define SETUP_INCOMING_VARARGS(CUM,MODE,TYPE,PRETEND_SIZE,NO_RTL) \ 864: { if ((CUM) < 6) \ 865: { \ 866: if (! (NO_RTL)) \ 867: { \ 868: move_block_from_reg \ 869: (16 + CUM, \ 870: gen_rtx (MEM, BLKmode, \ 871: plus_constant (virtual_incoming_args_rtx, \ 872: ((CUM) + 6)* UNITS_PER_WORD)), \ 1.1.1.2 root 873: 6 - (CUM), (6 - (CUM)) * UNITS_PER_WORD); \ 1.1 root 874: move_block_from_reg \ 1.1.1.2 root 875: (16 + (TARGET_FPREGS ? 32 : 0) + CUM, \ 1.1 root 876: gen_rtx (MEM, BLKmode, \ 877: plus_constant (virtual_incoming_args_rtx, \ 878: (CUM) * UNITS_PER_WORD)), \ 1.1.1.2 root 879: 6 - (CUM), (6 - (CUM)) * UNITS_PER_WORD); \ 1.1 root 880: } \ 881: PRETEND_SIZE = 12 * UNITS_PER_WORD; \ 882: } \ 883: } 884: 885: /* Generate necessary RTL for __builtin_saveregs(). 886: ARGLIST is the argument list; see expr.c. */ 887: extern struct rtx_def *alpha_builtin_saveregs (); 888: #define EXPAND_BUILTIN_SAVEREGS(ARGLIST) alpha_builtin_saveregs (ARGLIST) 889: 890: /* Define the information needed to generate branch and scc insns. This is 891: stored from the compare operation. Note that we can't use "rtx" here 892: since it hasn't been defined! */ 893: 894: extern struct rtx_def *alpha_compare_op0, *alpha_compare_op1; 895: extern int alpha_compare_fp_p; 896: 897: /* This macro produces the initial definition of a function name. On the 1.1.1.2 root 898: Alpha, we need to save the function name for the prologue and epilogue. */ 1.1 root 899: 900: extern char *alpha_function_name; 901: 902: #define ASM_DECLARE_FUNCTION_NAME(FILE,NAME,DECL) \ 1.1.1.2 root 903: { \ 1.1 root 904: alpha_function_name = NAME; \ 905: } 906: 907: /* This macro generates the assembly code for function entry. 908: FILE is a stdio stream to output the code to. 909: SIZE is an int: how many units of temporary storage to allocate. 910: Refer to the array `regs_ever_live' to determine which registers 911: to save; `regs_ever_live[I]' is nonzero if register number I 912: is ever used in the function. This macro is responsible for 913: knowing which registers should not be saved even if used. */ 914: 915: #define FUNCTION_PROLOGUE(FILE, SIZE) output_prolog (FILE, SIZE) 916: 917: /* Output assembler code to FILE to increment profiler label # LABELNO 1.1.1.3 ! root 918: for profiling a function entry. Profiling for gprof does not ! 919: require LABELNO so we don't reference it at all. This does, ! 920: however, mean that -p won't work. But OSF/1 doesn't support the ! 921: traditional prof anyways, so there is no good reason to be ! 922: backwards compatible. */ ! 923: ! 924: #define FUNCTION_PROFILER(FILE, LABELNO) \ ! 925: do { \ ! 926: fputs ("\tlda $28,_mcount\n", (FILE)); \ ! 927: fputs ("\tjsr $28,($28),_mcount\n", (FILE)); \ ! 928: fputs ("\tldgp $29,0($27)\n", (FILE)); \ ! 929: } while (0); ! 930: ! 931: ! 932: /* Output assembler code to FILE to initialize this source file's ! 933: basic block profiling info, if that has not already been done. ! 934: This assumes that __bb_init_func doesn't garble a1-a5. */ ! 935: ! 936: #define FUNCTION_BLOCK_PROFILER(FILE, LABELNO) \ ! 937: do { \ ! 938: ASM_OUTPUT_REG_PUSH (FILE, 16); \ ! 939: fputs ("\tlda $16,$PBX32\n", (FILE)); \ ! 940: fputs ("\tldq $26,0($16)\n", (FILE)); \ ! 941: fputs ("\tbne $26,1f\n", (FILE)); \ ! 942: fputs ("\tlda $27,__bb_init_func\n", (FILE)); \ ! 943: fputs ("\tjsr $26,($27),__bb_init_func\n", (FILE)); \ ! 944: fputs ("\tldgp $29,0($26)\n", (FILE)); \ ! 945: fputs ("1:\n", (FILE)); \ ! 946: ASM_OUTPUT_REG_POP (FILE, 16); \ ! 947: } while (0); ! 948: ! 949: /* Output assembler code to FILE to increment the entry-count for ! 950: the BLOCKNO'th basic block in this source file. */ ! 951: ! 952: #define BLOCK_PROFILER(FILE, BLOCKNO) \ ! 953: do { \ ! 954: int blockn = (BLOCKNO); \ ! 955: fputs ("\tsubq $30,16,$30\n", (FILE)); \ ! 956: fputs ("\tstq $26,0($30)\n", (FILE)); \ ! 957: fputs ("\tstq $27,8($30)\n", (FILE)); \ ! 958: fputs ("\tlda $26,$PBX34\n", (FILE)); \ ! 959: fprintf ((FILE), "\tldq $27,%d($26)\n", 8*blockn); \ ! 960: fputs ("\taddq $27,1,$27\n", (FILE)); \ ! 961: fprintf ((FILE), "\tstq $27,%d($26)\n", 8*blockn); \ ! 962: fputs ("\tldq $26,0($30)\n", (FILE)); \ ! 963: fputs ("\tldq $27,8($30)\n", (FILE)); \ ! 964: fputs ("\taddq $30,16,$30\n", (FILE)); \ ! 965: } while (0) 1.1 root 966: 967: 968: /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function, 969: the stack pointer does not matter. The value is tested only in 970: functions that have frame pointers. 971: No definition is equivalent to always zero. */ 972: 973: #define EXIT_IGNORE_STACK 1 974: 975: /* This macro generates the assembly code for function exit, 976: on machines that need it. If FUNCTION_EPILOGUE is not defined 977: then individual return instructions are generated for each 978: return statement. Args are same as for FUNCTION_PROLOGUE. 979: 980: The function epilogue should not depend on the current stack pointer! 981: It should use the frame pointer only. This is mandatory because 982: of alloca; we also take advantage of it to omit stack adjustments 983: before returning. */ 984: 985: #define FUNCTION_EPILOGUE(FILE, SIZE) output_epilog (FILE, SIZE) 986: 987: 988: /* Output assembler code for a block containing the constant parts 989: of a trampoline, leaving space for the variable parts. 990: 991: The trampoline should set the static chain pointer to value placed 992: into the trampoline and should branch to the specified routine. 993: Note that $27 has been set to the address of the trampoline, so we can 994: use it for addressability of the two data items. Trampolines are always 995: aligned to FUNCTION_BOUNDARY, which is 64 bits. */ 996: 997: #define TRAMPOLINE_TEMPLATE(FILE) \ 998: { \ 999: fprintf (FILE, "\tldq $1,24($27)\n"); \ 1000: fprintf (FILE, "\tldq $27,16($27)\n"); \ 1001: fprintf (FILE, "\tjmp $31,($27),0\n"); \ 1002: fprintf (FILE, "\tnop\n"); \ 1003: fprintf (FILE, "\t.quad 0,0\n"); \ 1004: } 1005: 1006: /* Section in which to place the trampoline. On Alpha, instructions 1007: may only be placed in a text segment. */ 1008: 1009: #define TRAMPOLINE_SECTION text_section 1010: 1011: /* Length in units of the trampoline for entering a nested function. */ 1012: 1013: #define TRAMPOLINE_SIZE 32 1014: 1015: /* Emit RTL insns to initialize the variable parts of a trampoline. 1016: FNADDR is an RTX for the address of the function's pure code. 1017: CXT is an RTX for the static chain value for the function. We assume 1018: here that a function will be called many more times than its address 1019: is taken (e.g., it might be passed to qsort), so we take the trouble 1020: to initialize the "hint" field in the JMP insn. Note that the hint 1021: field is PC (new) + 4 * bits 13:0. */ 1022: 1023: #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \ 1024: { \ 1025: rtx _temp, _temp1, _addr; \ 1026: \ 1027: _addr = memory_address (Pmode, plus_constant ((TRAMP), 16)); \ 1028: emit_move_insn (gen_rtx (MEM, Pmode, _addr), (FNADDR)); \ 1029: _addr = memory_address (Pmode, plus_constant ((TRAMP), 24)); \ 1030: emit_move_insn (gen_rtx (MEM, Pmode, _addr), (CXT)); \ 1031: \ 1032: _temp = force_operand (plus_constant ((TRAMP), 12), NULL_RTX); \ 1033: _temp = expand_binop (DImode, sub_optab, (FNADDR), _temp, _temp, 1, \ 1034: OPTAB_WIDEN); \ 1035: _temp = expand_shift (RSHIFT_EXPR, Pmode, _temp, \ 1036: build_int_2 (2, 0), NULL_RTX, 1); \ 1037: _temp = expand_and (gen_lowpart (SImode, _temp), \ 1038: GEN_INT (0x3fff), 0); \ 1039: \ 1040: _addr = memory_address (SImode, plus_constant ((TRAMP), 8)); \ 1041: _temp1 = force_reg (SImode, gen_rtx (MEM, SImode, _addr)); \ 1042: _temp1 = expand_and (_temp1, GEN_INT (0xffffc000), NULL_RTX); \ 1043: _temp1 = expand_binop (SImode, ior_optab, _temp1, _temp, _temp1, 1, \ 1044: OPTAB_WIDEN); \ 1045: \ 1046: emit_move_insn (gen_rtx (MEM, SImode, _addr), _temp1); \ 1047: \ 1048: emit_library_call (gen_rtx (SYMBOL_REF, Pmode, \ 1049: "__enable_execute_stack"), \ 1050: 0, VOIDmode, 1,_addr, Pmode); \ 1051: \ 1052: emit_insn (gen_rtx (UNSPEC_VOLATILE, VOIDmode, \ 1053: gen_rtvec (1, const0_rtx), 0)); \ 1054: } 1055: 1056: /* Attempt to turn on access permissions for the stack. */ 1057: 1058: #define TRANSFER_FROM_TRAMPOLINE \ 1059: \ 1060: void \ 1061: __enable_execute_stack (addr) \ 1062: void *addr; \ 1063: { \ 1064: long size = getpagesize (); \ 1065: long mask = ~(size-1); \ 1066: char *page = (char *) (((long) addr) & mask); \ 1067: char *end = (char *) ((((long) (addr + TRAMPOLINE_SIZE)) & mask) + size); \ 1068: \ 1069: /* 7 is PROT_READ | PROT_WRITE | PROT_EXEC */ \ 1070: if (mprotect (page, end - page, 7) < 0) \ 1071: perror ("mprotect of trampoline code"); \ 1072: } 1073: 1074: /* Addressing modes, and classification of registers for them. */ 1075: 1076: /* #define HAVE_POST_INCREMENT */ 1077: /* #define HAVE_POST_DECREMENT */ 1078: 1079: /* #define HAVE_PRE_DECREMENT */ 1080: /* #define HAVE_PRE_INCREMENT */ 1081: 1082: /* Macros to check register numbers against specific register classes. */ 1083: 1084: /* These assume that REGNO is a hard or pseudo reg number. 1085: They give nonzero only if REGNO is a hard reg of the suitable class 1086: or a pseudo reg currently allocated to a suitable hard reg. 1087: Since they use reg_renumber, they are safe only once reg_renumber 1088: has been allocated, which happens in local-alloc.c. */ 1089: 1090: #define REGNO_OK_FOR_INDEX_P(REGNO) 0 1091: #define REGNO_OK_FOR_BASE_P(REGNO) \ 1.1.1.3 ! root 1092: ((REGNO) < 32 || (unsigned) reg_renumber[REGNO] < 32 \ ! 1093: || (REGNO) == 63 || reg_renumber[REGNO] == 63) 1.1 root 1094: 1095: /* Maximum number of registers that can appear in a valid memory address. */ 1096: #define MAX_REGS_PER_ADDRESS 1 1097: 1098: /* Recognize any constant value that is a valid address. For the Alpha, 1099: there are only constants none since we want to use LDA to load any 1100: symbolic addresses into registers. */ 1101: 1102: #define CONSTANT_ADDRESS_P(X) \ 1103: (GET_CODE (X) == CONST_INT \ 1104: && (unsigned HOST_WIDE_INT) (INTVAL (X) + 0x8000) < 0x10000) 1105: 1106: /* Include all constant integers and constant doubles, but not 1107: floating-point, except for floating-point zero. */ 1108: 1109: #define LEGITIMATE_CONSTANT_P(X) \ 1110: (GET_MODE_CLASS (GET_MODE (X)) != MODE_FLOAT \ 1111: || (X) == CONST0_RTX (GET_MODE (X))) 1112: 1113: /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx 1114: and check its validity for a certain class. 1115: We have two alternate definitions for each of them. 1116: The usual definition accepts all pseudo regs; the other rejects 1117: them unless they have been allocated suitable hard regs. 1118: The symbol REG_OK_STRICT causes the latter definition to be used. 1119: 1120: Most source files want to accept pseudo regs in the hope that 1121: they will get allocated to the class that the insn wants them to be in. 1122: Source files for reload pass need to be strict. 1123: After reload, it makes no difference, since pseudo regs have 1124: been eliminated by then. */ 1125: 1126: #ifndef REG_OK_STRICT 1127: 1128: /* Nonzero if X is a hard reg that can be used as an index 1129: or if it is a pseudo reg. */ 1130: #define REG_OK_FOR_INDEX_P(X) 0 1131: /* Nonzero if X is a hard reg that can be used as a base reg 1132: or if it is a pseudo reg. */ 1133: #define REG_OK_FOR_BASE_P(X) \ 1.1.1.3 ! root 1134: (REGNO (X) < 32 || REGNO (X) == 63 || REGNO (X) >= FIRST_PSEUDO_REGISTER) 1.1 root 1135: 1136: #else 1137: 1138: /* Nonzero if X is a hard reg that can be used as an index. */ 1139: #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X)) 1140: /* Nonzero if X is a hard reg that can be used as a base reg. */ 1141: #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X)) 1142: 1143: #endif 1144: 1145: /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression 1146: that is a valid memory address for an instruction. 1147: The MODE argument is the machine mode for the MEM expression 1148: that wants to use this address. 1149: 1150: For Alpha, we have either a constant address or the sum of a register 1151: and a constant address, or just a register. For DImode, any of those 1152: forms can be surrounded with an AND that clear the low-order three bits; 1153: this is an "unaligned" access. 1154: 1155: We also allow a SYMBOL_REF that is the name of the current function as 1156: valid address. This is for CALL_INSNs. It cannot be used in any other 1157: context. 1158: 1159: First define the basic valid address. */ 1160: 1161: #define GO_IF_LEGITIMATE_SIMPLE_ADDRESS(MODE, X, ADDR) \ 1162: { if (REG_P (X) && REG_OK_FOR_BASE_P (X)) \ 1163: goto ADDR; \ 1164: if (CONSTANT_ADDRESS_P (X)) \ 1165: goto ADDR; \ 1166: if (GET_CODE (X) == PLUS \ 1167: && REG_P (XEXP (X, 0)) \ 1168: && REG_OK_FOR_BASE_P (XEXP (X, 0)) \ 1169: && CONSTANT_ADDRESS_P (XEXP (X, 1))) \ 1170: goto ADDR; \ 1171: } 1172: 1173: /* Now accept the simple address, or, for DImode only, an AND of a simple 1174: address that turns off the low three bits. */ 1175: 1176: extern char *current_function_name; 1177: 1178: #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \ 1179: { GO_IF_LEGITIMATE_SIMPLE_ADDRESS (MODE, X, ADDR); \ 1180: if ((MODE) == DImode \ 1181: && GET_CODE (X) == AND \ 1182: && GET_CODE (XEXP (X, 1)) == CONST_INT \ 1183: && INTVAL (XEXP (X, 1)) == -8) \ 1184: GO_IF_LEGITIMATE_SIMPLE_ADDRESS (MODE, XEXP (X, 0), ADDR); \ 1185: if ((MODE) == Pmode && GET_CODE (X) == SYMBOL_REF \ 1186: && ! strcmp (XSTR (X, 0), current_function_name)) \ 1187: goto ADDR; \ 1188: } 1189: 1190: /* Try machine-dependent ways of modifying an illegitimate address 1191: to be legitimate. If we find one, return the new, valid address. 1192: This macro is used in only one place: `memory_address' in explow.c. 1193: 1194: OLDX is the address as it was before break_out_memory_refs was called. 1195: In some cases it is useful to look at this to decide what needs to be done. 1196: 1197: MODE and WIN are passed so that this macro can use 1198: GO_IF_LEGITIMATE_ADDRESS. 1199: 1200: It is always safe for this macro to do nothing. It exists to recognize 1201: opportunities to optimize the output. 1202: 1203: For the Alpha, there are three cases we handle: 1204: 1205: (1) If the address is (plus reg const_int) and the CONST_INT is not a 1206: valid offset, compute the high part of the constant and add it to the 1207: register. Then our address is (plus temp low-part-const). 1208: (2) If the address is (const (plus FOO const_int)), find the low-order 1209: part of the CONST_INT. Then load FOO plus any high-order part of the 1210: CONST_INT into a register. Our address is (plus reg low-part-const). 1211: This is done to reduce the number of GOT entries. 1212: (3) If we have a (plus reg const), emit the load as in (2), then add 1213: the two registers, and finally generate (plus reg low-part-const) as 1214: our address. */ 1215: 1216: #define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) \ 1217: { if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 0)) == REG \ 1218: && GET_CODE (XEXP (X, 1)) == CONST_INT \ 1219: && ! CONSTANT_ADDRESS_P (XEXP (X, 1))) \ 1220: { \ 1221: HOST_WIDE_INT val = INTVAL (XEXP (X, 1)); \ 1222: HOST_WIDE_INT lowpart = (val & 0xffff) - 2 * (val & 0x8000); \ 1223: HOST_WIDE_INT highpart = val - lowpart; \ 1224: rtx high = GEN_INT (highpart); \ 1225: rtx temp = expand_binop (Pmode, add_optab, XEXP (x, 0), \ 1226: high, NULL_RTX, 1, OPTAB_LIB_WIDEN); \ 1227: \ 1228: (X) = plus_constant (temp, lowpart); \ 1229: goto WIN; \ 1230: } \ 1231: else if (GET_CODE (X) == CONST \ 1232: && GET_CODE (XEXP (X, 0)) == PLUS \ 1233: && GET_CODE (XEXP (XEXP (X, 0), 1)) == CONST_INT) \ 1234: { \ 1235: HOST_WIDE_INT val = INTVAL (XEXP (XEXP (X, 0), 1)); \ 1236: HOST_WIDE_INT lowpart = (val & 0xffff) - 2 * (val & 0x8000); \ 1237: HOST_WIDE_INT highpart = val - lowpart; \ 1238: rtx high = XEXP (XEXP (X, 0), 0); \ 1239: \ 1240: if (highpart) \ 1241: high = plus_constant (high, highpart); \ 1242: \ 1243: (X) = plus_constant (force_reg (Pmode, high), lowpart); \ 1244: goto WIN; \ 1245: } \ 1246: else if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 0)) == REG \ 1247: && GET_CODE (XEXP (X, 1)) == CONST \ 1248: && GET_CODE (XEXP (XEXP (X, 1), 0)) == PLUS \ 1249: && GET_CODE (XEXP (XEXP (XEXP (X, 1), 0), 1)) == CONST_INT) \ 1250: { \ 1251: HOST_WIDE_INT val = INTVAL (XEXP (XEXP (XEXP (X, 1), 0), 1)); \ 1252: HOST_WIDE_INT lowpart = (val & 0xffff) - 2 * (val & 0x8000); \ 1253: HOST_WIDE_INT highpart = val - lowpart; \ 1254: rtx high = XEXP (XEXP (XEXP (X, 1), 0), 0); \ 1255: \ 1256: if (highpart) \ 1257: high = plus_constant (high, highpart); \ 1258: \ 1259: high = expand_binop (Pmode, add_optab, XEXP (X, 0), \ 1260: force_reg (Pmode, high), \ 1261: high, 1, OPTAB_LIB_WIDEN); \ 1262: (X) = plus_constant (high, lowpart); \ 1263: goto WIN; \ 1264: } \ 1265: } 1266: 1267: /* Go to LABEL if ADDR (a legitimate address expression) 1268: has an effect that depends on the machine mode it is used for. 1269: On the Alpha this is true only for the unaligned modes. We can 1270: simplify this test since we know that the address must be valid. */ 1271: 1272: #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) \ 1273: { if (GET_CODE (ADDR) == AND) goto LABEL; } 1274: 1275: /* Compute the cost of an address. For the Alpha, all valid addresses are 1276: the same cost. */ 1277: 1278: #define ADDRESS_COST(X) 0 1279: 1280: /* Define this if some processing needs to be done immediately before 1281: emitting code for an insn. */ 1282: 1283: /* #define FINAL_PRESCAN_INSN(INSN,OPERANDS,NOPERANDS) */ 1284: 1285: /* Specify the machine mode that this machine uses 1286: for the index in the tablejump instruction. */ 1287: #define CASE_VECTOR_MODE SImode 1288: 1289: /* Define this if the tablejump instruction expects the table 1290: to contain offsets from the address of the table. 1.1.1.3 ! root 1291: Do not define this if the table should contain absolute addresses. ! 1292: On the Alpha, the table is really GP-relative, not relative to the PC ! 1293: of the table, but we pretend that it is PC-relative; this should be OK, ! 1294: but we hsould try to find some better way sometime. */ ! 1295: #define CASE_VECTOR_PC_RELATIVE 1.1 root 1296: 1297: /* Specify the tree operation to be used to convert reals to integers. */ 1298: #define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR 1299: 1300: /* This is the kind of divide that is easiest to do in the general case. */ 1301: #define EASY_DIV_EXPR TRUNC_DIV_EXPR 1302: 1303: /* Define this as 1 if `char' should by default be signed; else as 0. */ 1304: #define DEFAULT_SIGNED_CHAR 1 1305: 1306: /* This flag, if defined, says the same insns that convert to a signed fixnum 1307: also convert validly to an unsigned one. 1308: 1309: We actually lie a bit here as overflow conditions are different. But 1310: they aren't being checked anyway. */ 1311: 1312: #define FIXUNS_TRUNC_LIKE_FIX_TRUNC 1313: 1314: /* Max number of bytes we can move to or from memory 1315: in one reasonably fast instruction. */ 1316: 1317: #define MOVE_MAX 8 1318: 1319: /* Largest number of bytes of an object that can be placed in a register. 1320: On the Alpha we have plenty of registers, so use TImode. */ 1321: #define MAX_FIXED_MODE_SIZE GET_MODE_BITSIZE (TImode) 1322: 1323: /* Nonzero if access to memory by bytes is no faster than for words. 1324: Also non-zero if doing byte operations (specifically shifts) in registers 1325: is undesirable. 1326: 1327: On the Alpha, we want to not use the byte operation and instead use 1328: masking operations to access fields; these will save instructions. */ 1329: 1330: #define SLOW_BYTE_ACCESS 1 1331: 1.1.1.2 root 1332: /* Define if operations between registers always perform the operation 1333: on the full register even if a narrower mode is specified. */ 1334: #define WORD_REGISTER_OPERATIONS 1335: 1336: /* Define if loading in MODE, an integral mode narrower than BITS_PER_WORD 1337: will either zero-extend or sign-extend. The value of this macro should 1338: be the code that says which one of the two operations is implicitly 1339: done, NIL if none. */ 1340: #define LOAD_EXTEND_OP(MODE) SIGN_EXTEND 1.1 root 1341: 1342: /* Define if loading short immediate values into registers sign extends. */ 1343: #define SHORT_IMMEDIATES_SIGN_EXTEND 1344: 1345: /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits 1346: is done just by pretending it is already truncated. */ 1347: #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1 1348: 1349: /* We assume that the store-condition-codes instructions store 0 for false 1350: and some other value for true. This is the value stored for true. */ 1351: 1352: #define STORE_FLAG_VALUE 1 1353: 1354: /* Define the value returned by a floating-point comparison instruction. */ 1355: 1356: #define FLOAT_STORE_FLAG_VALUE 0.5 1357: 1.1.1.3 ! root 1358: /* Canonicalize a comparison from one we don't have to one we do have. */ ! 1359: ! 1360: #define CANONICALIZE_COMPARISON(CODE,OP0,OP1) \ ! 1361: do { \ ! 1362: if (((CODE) == GE || (CODE) == GT || (CODE) == GEU || (CODE) == GTU) \ ! 1363: && (GET_CODE (OP1) == REG || (OP1) == const0_rtx)) \ ! 1364: { \ ! 1365: rtx tem = (OP0); \ ! 1366: (OP0) = (OP1); \ ! 1367: (OP1) = tem; \ ! 1368: (CODE) = swap_condition (CODE); \ ! 1369: } \ ! 1370: if (((CODE) == LT || (CODE) == LTU) \ ! 1371: && GET_CODE (OP1) == CONST_INT && INTVAL (OP1) == 256) \ ! 1372: { \ ! 1373: (CODE) = (CODE) == LT ? LE : LEU; \ ! 1374: (OP1) = GEN_INT (255); \ ! 1375: } \ ! 1376: } while (0) ! 1377: 1.1 root 1378: /* Specify the machine mode that pointers have. 1379: After generation of rtl, the compiler makes no further distinction 1380: between pointers and any other objects of this machine mode. */ 1381: #define Pmode DImode 1382: 1383: /* Mode of a function address in a call instruction (for indexing purposes). */ 1384: 1385: #define FUNCTION_MODE Pmode 1386: 1387: /* Define this if addresses of constant functions 1388: shouldn't be put through pseudo regs where they can be cse'd. 1389: Desirable on machines where ordinary constants are expensive 1390: but a CALL with constant address is cheap. 1391: 1392: We define this on the Alpha so that gen_call and gen_call_value 1393: get to see the SYMBOL_REF (for the hint field of the jsr). It will 1394: then copy it into a register, thus actually letting the address be 1395: cse'ed. */ 1396: 1397: #define NO_FUNCTION_CSE 1398: 1.1.1.2 root 1399: /* Define this to be nonzero if shift instructions ignore all but the low-order 1.1 root 1400: few bits. */ 1.1.1.2 root 1401: #define SHIFT_COUNT_TRUNCATED 1 1402: 1403: /* Use atexit for static constructors/destructors, instead of defining 1404: our own exit function. */ 1405: #define HAVE_ATEXIT 1.1 root 1406: 1407: /* Compute the cost of computing a constant rtl expression RTX 1408: whose rtx-code is CODE. The body of this macro is a portion 1409: of a switch statement. If the code is computed here, 1410: return it with a return statement. Otherwise, break from the switch. 1411: 1.1.1.3 ! root 1412: If this is an 8-bit constant, return zero since it can be used ! 1413: nearly anywhere with no cost. If it is a valid operand for an ! 1414: ADD or AND, likewise return 0 if we know it will be used in that ! 1415: context. Otherwise, return 2 since it might be used there later. ! 1416: All other constants take at least two insns. */ 1.1 root 1417: 1418: #define CONST_COSTS(RTX,CODE,OUTER_CODE) \ 1419: case CONST_INT: \ 1.1.1.3 ! root 1420: if (INTVAL (RTX) >= 0 && INTVAL (RTX) < 256) \ ! 1421: return 0; \ 1.1 root 1422: case CONST_DOUBLE: \ 1.1.1.3 ! root 1423: if (((OUTER_CODE) == PLUS && add_operand (RTX, VOIDmode)) \ ! 1424: || ((OUTER_CODE) == AND && and_operand (RTX, VOIDmode))) \ ! 1425: return 0; \ ! 1426: else if (add_operand (RTX, VOIDmode) || and_operand (RTX, VOIDmode)) \ ! 1427: return 2; \ ! 1428: else \ ! 1429: return COSTS_N_INSNS (2); \ 1.1 root 1430: case CONST: \ 1431: case SYMBOL_REF: \ 1432: case LABEL_REF: \ 1.1.1.3 ! root 1433: return COSTS_N_INSNS (3); 1.1 root 1434: 1435: /* Provide the costs of a rtl expression. This is in the body of a 1436: switch on CODE. */ 1437: 1438: #define RTX_COSTS(X,CODE,OUTER_CODE) \ 1439: case PLUS: \ 1440: case MINUS: \ 1441: if (GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT) \ 1442: return COSTS_N_INSNS (6); \ 1443: else if (GET_CODE (XEXP (X, 0)) == MULT \ 1444: && const48_operand (XEXP (XEXP (X, 0), 1), VOIDmode)) \ 1.1.1.2 root 1445: return (2 + rtx_cost (XEXP (XEXP (X, 0), 0), OUTER_CODE) \ 1446: + rtx_cost (XEXP (X, 1), OUTER_CODE)); \ 1.1 root 1447: break; \ 1448: case MULT: \ 1449: if (GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT) \ 1450: return COSTS_N_INSNS (6); \ 1.1.1.3 ! root 1451: return COSTS_N_INSNS (23); \ 1.1 root 1452: case ASHIFT: \ 1453: if (GET_CODE (XEXP (X, 1)) == CONST_INT \ 1454: && INTVAL (XEXP (X, 1)) <= 3) \ 1455: break; \ 1456: /* ... fall through ... */ \ 1457: case ASHIFTRT: case LSHIFTRT: case IF_THEN_ELSE: \ 1458: return COSTS_N_INSNS (2); \ 1459: case DIV: \ 1460: case UDIV: \ 1461: case MOD: \ 1462: case UMOD: \ 1463: if (GET_MODE (X) == SFmode) \ 1464: return COSTS_N_INSNS (34); \ 1465: else if (GET_MODE (X) == DFmode) \ 1466: return COSTS_N_INSNS (63); \ 1467: else \ 1468: return COSTS_N_INSNS (70); \ 1469: case MEM: \ 1470: return COSTS_N_INSNS (3); 1471: 1472: /* Control the assembler format that we output. */ 1473: 1474: /* Output at beginning of assembler file. */ 1475: 1476: #define ASM_FILE_START(FILE) \ 1.1.1.2 root 1477: { \ 1.1 root 1478: alpha_write_verstamp (FILE); \ 1479: fprintf (FILE, "\t.set noreorder\n"); \ 1.1.1.3 ! root 1480: fprintf (FILE, "\t.set volatile\n"); \ 1.1 root 1481: fprintf (FILE, "\t.set noat\n"); \ 1.1.1.2 root 1482: ASM_OUTPUT_SOURCE_FILENAME (FILE, main_input_filename); \ 1.1 root 1483: } 1484: 1485: /* Output to assembler file text saying following lines 1486: may contain character constants, extra white space, comments, etc. */ 1487: 1488: #define ASM_APP_ON "" 1489: 1490: /* Output to assembler file text saying following lines 1491: no longer contain unusual constructs. */ 1492: 1493: #define ASM_APP_OFF "" 1494: 1495: #define TEXT_SECTION_ASM_OP ".text" 1496: 1497: /* Output before read-only data. */ 1498: 1499: #define READONLY_DATA_SECTION_ASM_OP ".rdata" 1500: 1501: /* Output before writable data. */ 1502: 1503: #define DATA_SECTION_ASM_OP ".data" 1504: 1505: /* Define an extra section for read-only data, a routine to enter it, and 1506: indicate that it is for read-only data. */ 1507: 1508: #define EXTRA_SECTIONS readonly_data 1509: 1510: #define EXTRA_SECTION_FUNCTIONS \ 1511: void \ 1512: literal_section () \ 1513: { \ 1514: if (in_section != readonly_data) \ 1515: { \ 1516: fprintf (asm_out_file, "%s\n", READONLY_DATA_SECTION_ASM_OP); \ 1517: in_section = readonly_data; \ 1518: } \ 1519: } \ 1520: 1521: #define READONLY_DATA_SECTION literal_section 1522: 1.1.1.3 ! root 1523: /* If we are referencing a function that is static, make the SYMBOL_REF ! 1524: special. We use this to see indicate we can branch to this function ! 1525: without setting PV or restoring GP. */ ! 1526: /* For 2.6, don't do this if we're compiling C++. */ 1.1 root 1527: 1528: #define ENCODE_SECTION_INFO(DECL) \ 1.1.1.3 ! root 1529: if (TREE_CODE (DECL) == FUNCTION_DECL && ! TREE_PUBLIC (DECL) \ ! 1530: && strcmp (lang_identify (), "cplusplus") != 0) \ 1.1 root 1531: SYMBOL_REF_FLAG (XEXP (DECL_RTL (DECL), 0)) = 1; 1532: 1533: /* How to refer to registers in assembler output. 1534: This sequence is indexed by compiler's hard-register-number (see above). */ 1535: 1536: #define REGISTER_NAMES \ 1537: {"$0", "$1", "$2", "$3", "$4", "$5", "$6", "$7", "$8", \ 1538: "$9", "$10", "$11", "$12", "$13", "$14", "$15", \ 1539: "$16", "$17", "$18", "$19", "$20", "$21", "$22", "$23", \ 1540: "$24", "$25", "$26", "$27", "$28", "$29", "$30", "AP", \ 1541: "$f0", "$f1", "$f2", "$f3", "$f4", "$f5", "$f6", "$f7", "$f8", \ 1542: "$f9", "$f10", "$f11", "$f12", "$f13", "$f14", "$f15", \ 1543: "$f16", "$f17", "$f18", "$f19", "$f20", "$f21", "$f22", "$f23",\ 1.1.1.3 ! root 1544: "$f24", "$f25", "$f26", "$f27", "$f28", "$f29", "$f30", "FP"} 1.1 root 1545: 1546: /* How to renumber registers for dbx and gdb. */ 1547: 1548: #define DBX_REGISTER_NUMBER(REGNO) (REGNO) 1549: 1550: /* This is how to output the definition of a user-level label named NAME, 1551: such as the label on a static function or variable NAME. */ 1552: 1553: #define ASM_OUTPUT_LABEL(FILE,NAME) \ 1554: do { assemble_name (FILE, NAME); fputs (":\n", FILE); } while (0) 1555: 1556: /* This is how to output a command to make the user-level label named NAME 1557: defined for reference from other files. */ 1558: 1559: #define ASM_GLOBALIZE_LABEL(FILE,NAME) \ 1560: do { fputs ("\t.globl ", FILE); assemble_name (FILE, NAME); fputs ("\n", FILE);} while (0) 1561: 1562: /* This is how to output a reference to a user-level label named NAME. 1563: `assemble_name' uses this. */ 1564: 1565: #define ASM_OUTPUT_LABELREF(FILE,NAME) \ 1566: fprintf (FILE, "%s", NAME) 1567: 1568: /* This is how to output an internal numbered label where 1569: PREFIX is the class of label and NUM is the number within the class. */ 1570: 1571: #define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \ 1572: if ((PREFIX)[0] == 'L') \ 1573: fprintf (FILE, "$%s%d:\n", & (PREFIX)[1], NUM + 32); \ 1574: else \ 1575: fprintf (FILE, "%s%d:\n", PREFIX, NUM); 1576: 1577: /* This is how to output a label for a jump table. Arguments are the same as 1578: for ASM_OUTPUT_INTERNAL_LABEL, except the insn for the jump table is 1579: passed. */ 1580: 1581: #define ASM_OUTPUT_CASE_LABEL(FILE,PREFIX,NUM,TABLEINSN) \ 1582: { ASM_OUTPUT_ALIGN (FILE, 2); ASM_OUTPUT_INTERNAL_LABEL (FILE, PREFIX, NUM); } 1583: 1584: /* This is how to store into the string LABEL 1585: the symbol_ref name of an internal numbered label where 1586: PREFIX is the class of label and NUM is the number within the class. 1587: This is suitable for output with `assemble_name'. */ 1588: 1589: #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \ 1590: if ((PREFIX)[0] == 'L') \ 1591: sprintf (LABEL, "*$%s%d", & (PREFIX)[1], NUM + 32); \ 1592: else \ 1593: sprintf (LABEL, "*%s%d", PREFIX, NUM) 1594: 1595: /* This is how to output an assembler line defining a `double' constant. */ 1596: 1597: #define ASM_OUTPUT_DOUBLE(FILE,VALUE) \ 1598: { \ 1599: if (REAL_VALUE_ISINF (VALUE) \ 1600: || REAL_VALUE_ISNAN (VALUE) \ 1601: || REAL_VALUE_MINUS_ZERO (VALUE)) \ 1602: { \ 1603: long t[2]; \ 1604: REAL_VALUE_TO_TARGET_DOUBLE ((VALUE), t); \ 1605: fprintf (FILE, "\t.quad 0x%lx%08lx\n", \ 1606: t[1] & 0xffffffff, t[0] & 0xffffffff); \ 1607: } \ 1608: else \ 1609: { \ 1610: char str[30]; \ 1611: REAL_VALUE_TO_DECIMAL (VALUE, "%.20e", str); \ 1612: fprintf (FILE, "\t.t_floating %s\n", str); \ 1613: } \ 1614: } 1615: 1616: /* This is how to output an assembler line defining a `float' constant. */ 1617: 1618: #define ASM_OUTPUT_FLOAT(FILE,VALUE) \ 1619: { \ 1620: if (REAL_VALUE_ISINF (VALUE) \ 1621: || REAL_VALUE_ISNAN (VALUE) \ 1622: || REAL_VALUE_MINUS_ZERO (VALUE)) \ 1623: { \ 1624: long t; \ 1625: REAL_VALUE_TO_TARGET_SINGLE ((VALUE), t); \ 1626: fprintf (FILE, "\t.long 0x%lx\n", t & 0xffffffff); \ 1627: } \ 1628: else \ 1629: { \ 1630: char str[30]; \ 1631: REAL_VALUE_TO_DECIMAL ((VALUE), "%.20e", str); \ 1632: fprintf (FILE, "\t.s_floating %s\n", str); \ 1633: } \ 1634: } 1635: 1636: /* This is how to output an assembler line defining an `int' constant. */ 1637: 1638: #define ASM_OUTPUT_INT(FILE,VALUE) \ 1639: fprintf (FILE, "\t.long %d\n", \ 1640: (GET_CODE (VALUE) == CONST_INT \ 1641: ? INTVAL (VALUE) & 0xffffffff : (abort (), 0))) 1642: 1643: /* This is how to output an assembler line defining a `long' constant. */ 1644: 1645: #define ASM_OUTPUT_DOUBLE_INT(FILE,VALUE) \ 1646: ( fprintf (FILE, "\t.quad "), \ 1647: output_addr_const (FILE, (VALUE)), \ 1648: fprintf (FILE, "\n")) 1649: 1650: /* Likewise for `char' and `short' constants. */ 1651: 1652: #define ASM_OUTPUT_SHORT(FILE,VALUE) \ 1653: fprintf (FILE, "\t.word %d\n", \ 1654: (GET_CODE (VALUE) == CONST_INT \ 1655: ? INTVAL (VALUE) & 0xffff : (abort (), 0))) 1656: 1657: #define ASM_OUTPUT_CHAR(FILE,VALUE) \ 1658: fprintf (FILE, "\t.byte %d\n", \ 1659: (GET_CODE (VALUE) == CONST_INT \ 1660: ? INTVAL (VALUE) & 0xff : (abort (), 0))) 1661: 1662: /* We use the default ASCII-output routine, except that we don't write more 1663: than 50 characters since the assembler doesn't support very long lines. */ 1664: 1665: #define ASM_OUTPUT_ASCII(MYFILE, MYSTRING, MYLENGTH) \ 1666: do { \ 1667: FILE *_hide_asm_out_file = (MYFILE); \ 1668: unsigned char *_hide_p = (unsigned char *) (MYSTRING); \ 1669: int _hide_thissize = (MYLENGTH); \ 1670: int _size_so_far = 0; \ 1671: { \ 1672: FILE *asm_out_file = _hide_asm_out_file; \ 1673: unsigned char *p = _hide_p; \ 1674: int thissize = _hide_thissize; \ 1675: int i; \ 1676: fprintf (asm_out_file, "\t.ascii \""); \ 1677: \ 1678: for (i = 0; i < thissize; i++) \ 1679: { \ 1680: register int c = p[i]; \ 1681: \ 1682: if (_size_so_far ++ > 50 && i < thissize - 4) \ 1683: _size_so_far = 0, fprintf (asm_out_file, "\"\n\t.ascii \""); \ 1684: \ 1685: if (c == '\"' || c == '\\') \ 1686: putc ('\\', asm_out_file); \ 1687: if (c >= ' ' && c < 0177) \ 1688: putc (c, asm_out_file); \ 1689: else \ 1690: { \ 1691: fprintf (asm_out_file, "\\%o", c); \ 1692: /* After an octal-escape, if a digit follows, \ 1693: terminate one string constant and start another. \ 1694: The Vax assembler fails to stop reading the escape \ 1695: after three digits, so this is the only way we \ 1696: can get it to parse the data properly. */ \ 1697: if (i < thissize - 1 \ 1698: && p[i + 1] >= '0' && p[i + 1] <= '9') \ 1699: fprintf (asm_out_file, "\"\n\t.ascii \""); \ 1700: } \ 1701: } \ 1702: fprintf (asm_out_file, "\"\n"); \ 1703: } \ 1704: } \ 1705: while (0) 1.1.1.3 ! root 1706: 1.1 root 1707: /* This is how to output an insn to push a register on the stack. 1708: It need not be very fast code. */ 1709: 1710: #define ASM_OUTPUT_REG_PUSH(FILE,REGNO) \ 1711: fprintf (FILE, "\tsubq $30,8,$30\n\tst%s $%s%d,0($30)\n", \ 1712: (REGNO) > 32 ? "t" : "q", (REGNO) > 32 ? "f" : "", \ 1713: (REGNO) & 31); 1714: 1715: /* This is how to output an insn to pop a register from the stack. 1716: It need not be very fast code. */ 1717: 1718: #define ASM_OUTPUT_REG_POP(FILE,REGNO) \ 1719: fprintf (FILE, "\tld%s $%s%d,0($30)\n\taddq $30,8,$30\n", \ 1720: (REGNO) > 32 ? "t" : "q", (REGNO) > 32 ? "f" : "", \ 1721: (REGNO) & 31); 1722: 1723: /* This is how to output an assembler line for a numeric constant byte. */ 1724: 1725: #define ASM_OUTPUT_BYTE(FILE,VALUE) \ 1726: fprintf (FILE, "\t.byte 0x%x\n", (VALUE) & 0xff) 1727: 1.1.1.3 ! root 1728: /* This is how to output an element of a case-vector that is absolute. ! 1729: (Alpha does not use such vectors, but we must define this macro anyway.) */ 1.1 root 1730: 1.1.1.3 ! root 1731: #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) abort () 1.1 root 1732: 1.1.1.3 ! root 1733: /* This is how to output an element of a case-vector that is relative. */ 1.1 root 1734: 1.1.1.3 ! root 1735: #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, VALUE, REL) \ ! 1736: fprintf (FILE, "\t.gprel32 $%d\n", (VALUE) + 32) 1.1 root 1737: 1738: /* This is how to output an assembler line 1739: that says to advance the location counter 1740: to a multiple of 2**LOG bytes. */ 1741: 1742: #define ASM_OUTPUT_ALIGN(FILE,LOG) \ 1743: if ((LOG) != 0) \ 1744: fprintf (FILE, "\t.align %d\n", LOG); 1745: 1746: /* This is how to advance the location counter by SIZE bytes. */ 1747: 1748: #define ASM_OUTPUT_SKIP(FILE,SIZE) \ 1749: fprintf (FILE, "\t.space %d\n", (SIZE)) 1750: 1751: /* This says how to output an assembler line 1752: to define a global common symbol. */ 1753: 1754: #define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \ 1755: ( fputs ("\t.comm ", (FILE)), \ 1756: assemble_name ((FILE), (NAME)), \ 1757: fprintf ((FILE), ",%d\n", (SIZE))) 1758: 1759: /* This says how to output an assembler line 1760: to define a local common symbol. */ 1761: 1762: #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE,ROUNDED) \ 1763: ( fputs ("\t.lcomm ", (FILE)), \ 1764: assemble_name ((FILE), (NAME)), \ 1765: fprintf ((FILE), ",%d\n", (SIZE))) 1766: 1767: /* Store in OUTPUT a string (made with alloca) containing 1768: an assembler-name for a local static variable named NAME. 1769: LABELNO is an integer which is different for each call. */ 1770: 1771: #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \ 1772: ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \ 1773: sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO))) 1774: 1775: /* Define the parentheses used to group arithmetic operations 1776: in assembler code. */ 1777: 1778: #define ASM_OPEN_PAREN "(" 1779: #define ASM_CLOSE_PAREN ")" 1780: 1781: /* Define results of standard character escape sequences. */ 1782: #define TARGET_BELL 007 1783: #define TARGET_BS 010 1784: #define TARGET_TAB 011 1785: #define TARGET_NEWLINE 012 1786: #define TARGET_VT 013 1787: #define TARGET_FF 014 1788: #define TARGET_CR 015 1789: 1790: /* Print operand X (an rtx) in assembler syntax to file FILE. 1791: CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified. 1792: For `%' followed by punctuation, CODE is the punctuation and X is null. */ 1793: 1794: #define PRINT_OPERAND(FILE, X, CODE) print_operand (FILE, X, CODE) 1795: 1796: /* Determine which codes are valid without a following integer. These must 1797: not be alphabetic. */ 1798: 1799: #define PRINT_OPERAND_PUNCT_VALID_P(CODE) 0 1800: 1801: /* Print a memory address as an operand to reference that memory location. */ 1802: 1803: #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \ 1804: { rtx addr = (ADDR); \ 1805: int basereg = 31; \ 1806: HOST_WIDE_INT offset = 0; \ 1807: \ 1808: if (GET_CODE (addr) == AND) \ 1809: addr = XEXP (addr, 0); \ 1810: \ 1811: if (GET_CODE (addr) == REG) \ 1812: basereg = REGNO (addr); \ 1813: else if (GET_CODE (addr) == CONST_INT) \ 1814: offset = INTVAL (addr); \ 1815: else if (GET_CODE (addr) == PLUS \ 1816: && GET_CODE (XEXP (addr, 0)) == REG \ 1817: && GET_CODE (XEXP (addr, 1)) == CONST_INT) \ 1818: basereg = REGNO (XEXP (addr, 0)), offset = INTVAL (XEXP (addr, 1)); \ 1819: else \ 1820: abort (); \ 1821: \ 1822: fprintf (FILE, "%d($%d)", offset, basereg); \ 1823: } 1824: /* Define the codes that are matched by predicates in alpha.c. */ 1825: 1826: #define PREDICATE_CODES \ 1827: {"reg_or_0_operand", {SUBREG, REG, CONST_INT}}, \ 1.1.1.2 root 1828: {"reg_or_6bit_operand", {SUBREG, REG, CONST_INT}}, \ 1.1 root 1829: {"reg_or_8bit_operand", {SUBREG, REG, CONST_INT}}, \ 1.1.1.3 ! root 1830: {"cint8_operand", {CONST_INT}}, \ 1.1 root 1831: {"reg_or_cint_operand", {SUBREG, REG, CONST_INT}}, \ 1832: {"add_operand", {SUBREG, REG, CONST_INT}}, \ 1833: {"sext_add_operand", {SUBREG, REG, CONST_INT}}, \ 1834: {"const48_operand", {CONST_INT}}, \ 1835: {"and_operand", {SUBREG, REG, CONST_INT}}, \ 1.1.1.3 ! root 1836: {"or_operand", {SUBREG, REG, CONST_INT}}, \ 1.1 root 1837: {"mode_mask_operand", {CONST_INT}}, \ 1838: {"mul8_operand", {CONST_INT}}, \ 1839: {"mode_width_operand", {CONST_INT}}, \ 1840: {"reg_or_fp0_operand", {SUBREG, REG, CONST_DOUBLE}}, \ 1841: {"alpha_comparison_operator", {EQ, LE, LT, LEU, LTU}}, \ 1842: {"signed_comparison_operator", {EQ, NE, LE, LT, GE, GT}}, \ 1.1.1.2 root 1843: {"divmod_operator", {DIV, MOD, UDIV, UMOD}}, \ 1.1 root 1844: {"fp0_operand", {CONST_DOUBLE}}, \ 1.1.1.2 root 1845: {"current_file_function_operand", {SYMBOL_REF}}, \ 1.1.1.3 ! root 1846: {"call_operand", {REG, SYMBOL_REF}}, \ 1.1 root 1847: {"input_operand", {SUBREG, REG, MEM, CONST_INT, CONST_DOUBLE, \ 1848: SYMBOL_REF, CONST, LABEL_REF}}, \ 1.1.1.3 ! root 1849: {"some_operand", {SUBREG, REG, MEM, CONST_INT, CONST_DOUBLE, \ ! 1850: SYMBOL_REF, CONST, LABEL_REF}}, \ 1.1 root 1851: {"aligned_memory_operand", {MEM}}, \ 1852: {"unaligned_memory_operand", {MEM}}, \ 1853: {"any_memory_operand", {MEM}}, 1.1.1.2 root 1854: 1.1.1.3 ! root 1855: /* Tell collect that the object format is ECOFF. */ ! 1856: #define OBJECT_FORMAT_COFF ! 1857: #define EXTENDED_COFF ! 1858: ! 1859: /* If we use NM, pass -g to it so it only lists globals. */ ! 1860: #define NM_FLAGS "-pg" ! 1861: 1.1.1.2 root 1862: /* Definitions for debugging. */ 1863: 1864: #define SDB_DEBUGGING_INFO /* generate info for mips-tfile */ 1865: #define DBX_DEBUGGING_INFO /* generate embedded stabs */ 1866: #define MIPS_DEBUGGING_INFO /* MIPS specific debugging info */ 1867: 1868: #ifndef PREFERRED_DEBUGGING_TYPE /* assume SDB_DEBUGGING_INFO */ 1.1.1.3 ! root 1869: #define PREFERRED_DEBUGGING_TYPE \ ! 1870: ((len > 1 && !strncmp (str, "ggdb", len)) ? DBX_DEBUG : SDB_DEBUG) 1.1.1.2 root 1871: #endif 1872: 1873: 1874: /* Correct the offset of automatic variables and arguments. Note that 1875: the Alpha debug format wants all automatic variables and arguments 1876: to be in terms of two different offsets from the virtual frame pointer, 1877: which is the stack pointer before any adjustment in the function. 1878: The offset for the argument pointer is fixed for the native compiler, 1879: it is either zero (for the no arguments case) or large enough to hold 1880: all argument registers. 1881: The offset for the auto pointer is the fourth argument to the .frame 1882: directive (local_offset). 1883: To stay compatible with the native tools we use the same offsets 1884: from the virtual frame pointer and adjust the debugger arg/auto offsets 1885: accordingly. These debugger offsets are set up in output_prolog. */ 1886: 1887: long alpha_arg_offset; 1888: long alpha_auto_offset; 1889: #define DEBUGGER_AUTO_OFFSET(X) \ 1890: ((GET_CODE (X) == PLUS ? INTVAL (XEXP (X, 1)) : 0) + alpha_auto_offset) 1891: #define DEBUGGER_ARG_OFFSET(OFFSET, X) (OFFSET + alpha_arg_offset) 1892: 1893: 1894: #define ASM_OUTPUT_SOURCE_LINE(STREAM, LINE) \ 1895: alpha_output_lineno (STREAM, LINE) 1896: extern void alpha_output_lineno (); 1897: 1898: #define ASM_OUTPUT_SOURCE_FILENAME(STREAM, NAME) \ 1899: alpha_output_filename (STREAM, NAME) 1900: extern void alpha_output_filename (); 1901: 1902: 1903: /* mips-tfile.c limits us to strings of one page. */ 1904: #define DBX_CONTIN_LENGTH 4000 1905: 1906: /* By default, turn on GDB extensions. */ 1907: #define DEFAULT_GDB_EXTENSIONS 1 1908: 1909: /* If we are smuggling stabs through the ALPHA ECOFF object 1910: format, put a comment in front of the .stab<x> operation so 1911: that the ALPHA assembler does not choke. The mips-tfile program 1912: will correctly put the stab into the object file. */ 1913: 1914: #define ASM_STABS_OP ((TARGET_GAS) ? ".stabs" : " #.stabs") 1915: #define ASM_STABN_OP ((TARGET_GAS) ? ".stabn" : " #.stabn") 1916: #define ASM_STABD_OP ((TARGET_GAS) ? ".stabd" : " #.stabd") 1917: 1918: /* Forward references to tags are allowed. */ 1919: #define SDB_ALLOW_FORWARD_REFERENCES 1920: 1921: /* Unknown tags are also allowed. */ 1922: #define SDB_ALLOW_UNKNOWN_REFERENCES 1923: 1924: #define PUT_SDB_DEF(a) \ 1925: do { \ 1926: fprintf (asm_out_file, "\t%s.def\t", \ 1927: (TARGET_GAS) ? "" : "#"); \ 1928: ASM_OUTPUT_LABELREF (asm_out_file, a); \ 1929: fputc (';', asm_out_file); \ 1930: } while (0) 1931: 1932: #define PUT_SDB_PLAIN_DEF(a) \ 1933: do { \ 1934: fprintf (asm_out_file, "\t%s.def\t.%s;", \ 1935: (TARGET_GAS) ? "" : "#", (a)); \ 1936: } while (0) 1937: 1938: #define PUT_SDB_TYPE(a) \ 1939: do { \ 1940: fprintf (asm_out_file, "\t.type\t0x%x;", (a)); \ 1941: } while (0) 1942: 1943: /* For block start and end, we create labels, so that 1944: later we can figure out where the correct offset is. 1945: The normal .ent/.end serve well enough for functions, 1946: so those are just commented out. */ 1947: 1948: extern int sdb_label_count; /* block start/end next label # */ 1949: 1950: #define PUT_SDB_BLOCK_START(LINE) \ 1951: do { \ 1952: fprintf (asm_out_file, \ 1953: "$Lb%d:\n\t%s.begin\t$Lb%d\t%d\n", \ 1954: sdb_label_count, \ 1955: (TARGET_GAS) ? "" : "#", \ 1956: sdb_label_count, \ 1957: (LINE)); \ 1958: sdb_label_count++; \ 1959: } while (0) 1960: 1961: #define PUT_SDB_BLOCK_END(LINE) \ 1962: do { \ 1963: fprintf (asm_out_file, \ 1964: "$Le%d:\n\t%s.bend\t$Le%d\t%d\n", \ 1965: sdb_label_count, \ 1966: (TARGET_GAS) ? "" : "#", \ 1967: sdb_label_count, \ 1968: (LINE)); \ 1969: sdb_label_count++; \ 1970: } while (0) 1971: 1972: #define PUT_SDB_FUNCTION_START(LINE) 1973: 1974: #define PUT_SDB_FUNCTION_END(LINE) 1975: 1976: #define PUT_SDB_EPILOGUE_END(NAME) 1977: 1978: /* Specify to run a post-processor, mips-tfile after the assembler 1979: has run to stuff the ecoff debug information into the object file. 1980: This is needed because the Alpha assembler provides no way 1981: of specifying such information in the assembly file. */ 1982: 1.1.1.3 ! root 1983: #if ((TARGET_DEFAULT | TARGET_CPU_DEFAULT) & MASK_GAS) != 0 1.1.1.2 root 1984: 1985: #define ASM_FINAL_SPEC "\ 1986: %{malpha-as: %{!mno-mips-tfile: \ 1987: \n mips-tfile %{v*: -v} \ 1988: %{K: -I %b.o~} \ 1989: %{!K: %{save-temps: -I %b.o~}} \ 1990: %{c:%W{o*}%{!o*:-o %b.o}}%{!c:-o %U.o} \ 1991: %{.s:%i} %{!.s:%g.s}}}" 1992: 1993: #else 1994: #define ASM_FINAL_SPEC "\ 1995: %{!mgas: %{!mno-mips-tfile: \ 1996: \n mips-tfile %{v*: -v} \ 1997: %{K: -I %b.o~} \ 1998: %{!K: %{save-temps: -I %b.o~}} \ 1999: %{c:%W{o*}%{!o*:-o %b.o}}%{!c:-o %U.o} \ 2000: %{.s:%i} %{!.s:%g.s}}}" 2001: 2002: #endif 2003: 2004: /* Macros for mips-tfile.c to encapsulate stabs in ECOFF, and for 2005: mips-tdump.c to print them out. 2006: 2007: These must match the corresponding definitions in gdb/mipsread.c. 2008: Unfortunately, gcc and gdb do not currently share any directories. */ 2009: 2010: #define CODE_MASK 0x8F300 2011: #define MIPS_IS_STAB(sym) (((sym)->index & 0xFFF00) == CODE_MASK) 2012: #define MIPS_MARK_STAB(code) ((code)+CODE_MASK) 2013: #define MIPS_UNMARK_STAB(code) ((code)-CODE_MASK) 2014: 2015: /* Override some mips-tfile definitions. */ 2016: 2017: #define SHASH_SIZE 511 2018: #define THASH_SIZE 55 1.1.1.3 ! root 2019: ! 2020: /* Align ecoff symbol tables to avoid OSF1/1.3 nm complaints. */ ! 2021: ! 2022: #define ALIGN_SYMTABLE_OFFSET(OFFSET) (((OFFSET) + 7) & ~7) ! 2023: ! 2024: /* The system headers under OSF/1 are C++-aware. */ ! 2025: #define NO_IMPLICIT_EXTERN_C ! 2026: ! 2027: /* The linker will stick __main into the .init section. */ ! 2028: #define HAS_INIT_SECTION ! 2029: #define INIT_NAME_FORMAT "__init_%s" ! 2030: #define FINI_NAME_FORMAT "__fini_%s"
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