--- gcc/config/clipper/clipper.md 2018/04/24 18:10:23 1.1.1.1 +++ gcc/config/clipper/clipper.md 2018/04/24 18:14:06 1.1.1.2 @@ -1,5 +1,5 @@ ;;- Machine description for GNU compiler, Clipper Version -;; Copyright (C) 1987, 1988, 1991 Free Software Foundation, Inc. +;; Copyright (C) 1987, 1988, 1991, 1993 Free Software Foundation, Inc. ;; Contributed by Holger Teutsch (holger@hotbso.rhein-main.de) @@ -148,8 +148,8 @@ ;; to recombine a mem -> mem move ;; (define_insn "" - [(set (match_operand:DF 0 "register_operand" "=rf") - (match_operand:DF 1 "nonimmediate_operand" "rfo"))] + [(set (match_operand:DF 0 "register_operand" "=*rf") + (match_operand:DF 1 "nonimmediate_operand" "*rfo"))] "" "* { @@ -203,22 +203,21 @@ (define_insn "" [(set (match_operand:DF 0 "memory_operand" "=o,m") - (match_operand:DF 1 "register_operand" "r,f"))] + (match_operand:DF 1 "register_operand" "*rf,f"))] "" "* { - if (which_alternative == 0) /* r -> o */ - { - rtx xops[4]; - xops[0] = operands[0]; - xops[1] = adj_offsettable_operand (operands[0], 4); - xops[2] = operands[1]; - xops[3] = gen_rtx (REG, SImode, REGNO (operands[1]) + 1); - output_asm_insn (\"storw %2,%0\;storw %3,%1\", xops); - return \"\"; - } + rtx xops[4]; + + if (REGNO (operands[1]) >= 16) /* f -> m */ + return \"stord %1,%0\"; - return \"stord %1,%0\"; /* f-> m */ + xops[0] = operands[0]; /* r -> o */ + xops[1] = adj_offsettable_operand (operands[0], 4); + xops[2] = operands[1]; + xops[3] = gen_rtx (REG, SImode, REGNO (operands[1]) + 1); + output_asm_insn (\"storw %2,%0\;storw %3,%1\", xops); + return \"\"; }" [(set_attr "type" "store,store") (set_attr "cc" "clobber,unchanged")]) @@ -248,8 +247,8 @@ ;; to recombine a mem -> mem move ;; (define_insn "" - [(set (match_operand:SF 0 "register_operand" "=rf") - (match_operand:SF 1 "nonimmediate_operand" "rfm"))] + [(set (match_operand:SF 0 "register_operand" "=*rf") + (match_operand:SF 1 "nonimmediate_operand" "*rfm"))] "" "* { @@ -285,7 +284,7 @@ (define_insn "" [(set (match_operand:SF 0 "memory_operand" "=m") - (match_operand:SF 1 "register_operand" "rf"))] + (match_operand:SF 1 "register_operand" "*rf"))] "" "* { @@ -307,8 +306,11 @@ operands[1] = force_reg (DImode, operands[1]); }") +;; If an operand is a MEM but not offsetable, we can't load it into +;; a register, so we must force the third alternative to be the one +;; reloaded. Hence we show the first as more expensive. (define_insn "" - [(set (match_operand:DI 0 "register_operand" "=r,r,r") + [(set (match_operand:DI 0 "register_operand" "=?r,r,r") (match_operand:DI 1 "general_operand" "r,n,o"))] "" "*