--- gcc/config/clipper/clipper.md	2018/04/24 18:14:06	1.1.1.2
+++ gcc/config/clipper/clipper.md	2018/04/24 18:20:41	1.1.1.3
@@ -1,6 +1,5 @@
 ;;- Machine description for GNU compiler, Clipper Version
-;;   Copyright (C) 1987, 1988, 1991, 1993 Free Software Foundation, Inc.
-
+;;   Copyright (C) 1987, 1988, 1991, 1993, 1994 Free Software Foundation, Inc.
 ;; Contributed by Holger Teutsch (holger@hotbso.rhein-main.de)
 
 ;; This file is part of GNU CC.
@@ -386,14 +385,19 @@
     operands[1] = force_reg (SImode, operands[1]);
 }")
 
-;; provide 2 patterns with different predicates as 'general_operand' in both
-;; positions results in a 'mem -> mem' move from combine that must be reloaded 
-;;
-
-(define_insn ""
-  [(set (match_operand:SI 0 "register_operand" "=r,r,r,r")
-	(match_operand:SI 1 "general_operand"   "r,m,n,i"))]
-  ""
+;; Reject both args with `general_operand' if not reloading because a
+;; mem -> mem move that was split by 'movsi' can be recombined to
+;; mem -> mem by the combiner.
+;;
+;; As a pseudo register can end up in a stack slot during reloading we must
+;; allow a r->m move for the next pattern. 
+;; The first predicate must be `general_operand' because a predicate must
+;; be true for each constraint.
+;;  
+(define_insn ""
+  [(set (match_operand:SI 0 "general_operand" "=r,r,r,r,m")
+	(match_operand:SI 1 "general_operand"  "r,m,n,i,r"))]
+  "reload_in_progress || register_operand (operands[0], SImode)"
   "*
 {
   int val;
@@ -419,9 +423,11 @@
 
   if (which_alternative == 3)		/* unknown const */
     return \"loada  %a1,%0\";
+
+  return \"storw  %1,%0\";
 }"
-[(set_attr "type" "arith,load,arith,load")
- (set_attr "cc" "set2,change0,set1,change0")])
+[(set_attr "type" "arith,load,arith,load,store")
+ (set_attr "cc" "set2,change0,set1,change0,unchanged")])
 
 
 (define_insn ""
@@ -754,7 +760,7 @@
 
 (define_insn "subdi3"
   [(set (match_operand:DI 0 "int_reg_operand" "=r")
-	(minus:DI (match_operand:DI 1 "int_reg_operand" "%0")
+	(minus:DI (match_operand:DI 1 "int_reg_operand" "0")
 		  (match_operand:DI 2 "int_reg_operand" "r")))]
   ""
   "*
@@ -1129,25 +1135,6 @@
   "shlw   %2,%0"
  [(set_attr "type" "arith")])
 
-(define_insn "lshldi3"
-  [(set (match_operand:DI 0 "int_reg_operand" "=r,r")
-	(lshift:DI (match_operand:DI 1 "int_reg_operand" "0,0")
-		   (match_operand:SI 2 "nonmemory_operand" "r,n")))]
-  ""
-  "@
-   shll   %2,%0
-   shlli  %2,%0"
- [(set_attr "type" "arith")])
-
-(define_insn "lshlsi3"
-  [(set (match_operand:SI 0 "int_reg_operand" "=r,r")
-	(lshift:SI (match_operand:SI 1 "int_reg_operand" "0,0")
-		   (match_operand:SI 2 "nonmemory_operand" "r,n")))]
-  ""
-  "@
-   shlw   %2,%0
-   shli   %2,%0"
- [(set_attr "type" "arith")])
 
 ;;
 ;; rotate insn