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1.1 root 1: /* Definitions of target machine for GNU compiler. Convex version.
2: Copyright (C) 1992 Free Software Foundation, Inc.
3:
4: This file is part of GNU CC.
5:
6: GNU CC is free software; you can redistribute it and/or modify
7: it under the terms of the GNU General Public License as published by
8: the Free Software Foundation; either version 2, or (at your option)
9: any later version.
10:
11: GNU CC is distributed in the hope that it will be useful,
12: but WITHOUT ANY WARRANTY; without even the implied warranty of
13: MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14: GNU General Public License for more details.
15:
16: You should have received a copy of the GNU General Public License
17: along with GNU CC; see the file COPYING. If not, write to
18: the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
19:
20:
21: /* Standard GCC variables that we reference. */
22:
23: extern int target_flags;
24:
25: /* Interface to convex.c. */
26:
27: extern int current_section_is_text;
28: extern int const_double_low_int ();
29: extern int const_double_high_int ();
30: extern char *set_cmp (), *gen_cmp ();
31: extern char *output_call ();
32:
33: /* Use the proper incantation to search Posix-compliant libraries. */
34:
35: #define LINK_SPEC \
36: "%{!traditional:-Eposix}%{traditional:-Enoposix}\
37: -A__iob=___ap$iob\
38: -A_use_libc_sema=___ap$use_libc_sema\
39: -L /usr/lib"
40:
41: /* Use the matching startup files. */
42:
43: #define STARTFILE_SPEC \
44: "%{pg:/usr/lib/crt/gcrt0.o}\
45: %{!pg:%{p:/usr/lib/crt/mcrt0.o}\
46: %{!p:/usr/lib/crt/crt0.o}}"
47:
48: /* Names to predefine in the preprocessor for this target machine. */
49:
50: #define CPP_PREDEFINES "-Dconvex -Dunix"
51:
52: /* Print subsidiary information on the compiler version in use. */
53:
54: #define TARGET_VERSION fprintf (stderr, " (convex)");
55:
56: /* Macros used in the machine description to test the flags. */
57:
58: /*
59: -mc1 C1 target (avoid C2-only instructions)
60: -mc2 C2 target
61: -mc32 vitesse
62: -mc34 javelin
63: -mc38 neptune
64: -margcount use standard calling sequence, with arg count word
65: -mnoargcount don't push arg count, depend on symbol table
66: */
67:
68: #define TARGET_C1 (target_flags & 1)
69: #define TARGET_C2 (target_flags & 2)
70: #define TARGET_C34 (target_flags & 4)
71: #define TARGET_C38 (target_flags & 010)
72: #define TARGET_INDIRECTS (target_flags & 020)
73: #define TARGET_ARGCOUNT (target_flags & 040)
74:
75: /* Macro to define tables used to set the flags.
76: This is a list in braces of pairs in braces,
77: each pair being { "NAME", VALUE }
78: where VALUE is the bits to set or minus the bits to clear.
79: An empty string NAME is used to identify the default VALUE. */
80:
81: #define TARGET_SWITCHES \
82: { { "c1", 021 }, \
83: { "c2", 022 }, \
84: { "c32", 022 }, \
85: { "c34", 006 }, \
86: { "c38", 012 }, \
87: { "noc1", -001 }, \
88: { "noc2", -022 }, \
89: { "argcount", 040 }, \
90: { "noargcount", -040 }, \
91: { "", TARGET_DEFAULT }}
92:
93: /* Default target_flags if no switches specified. */
94:
95: #ifndef TARGET_DEFAULT
96: #define TARGET_DEFAULT 0
97: #endif
98:
99: /* Allow $ in identifiers. */
100:
101: #define DOLLARS_IN_IDENTIFIERS 2
102:
103: /* Target machine storage layout */
104:
105: /* Define this if most significant bit is lowest numbered
106: in instructions that operate on numbered bit-fields. */
107: #define BITS_BIG_ENDIAN 1
108:
109: /* Define this if most significant byte of a word is the lowest numbered. */
110: #define BYTES_BIG_ENDIAN 1
111:
112: /* Define this if most significant word of a multiword number is numbered. */
113: #define WORDS_BIG_ENDIAN 1
114:
115: /* Number of bits in an addressible storage unit */
116: #define BITS_PER_UNIT 8
117:
118: /* Width in bits of a "word", which is the contents of a machine register.
119: Note that this is not necessarily the width of data type `int';
120: if using 16-bit ints on a 68000, this would still be 32.
121: But on a machine with 16-bit registers, this would be 16. */
122: #define BITS_PER_WORD 64
123:
124: /* Width of a word, in units (bytes). */
125: #define UNITS_PER_WORD 8
126:
127: /* Width in bits of a pointer.
128: See also the macro `Pmode' defined below. */
129: #define POINTER_SIZE 32
130:
131: /* Allocation boundary (in *bits*) for storing arguments in argument list. */
132: #define PARM_BOUNDARY 32
133:
134: /* Boundary (in *bits*) on which stack pointer should be aligned. */
135: #define STACK_BOUNDARY 32
136:
137: /* Allocation boundary (in *bits*) for the code of a function. */
138: #define FUNCTION_BOUNDARY 16
139:
140: /* Alignment of field after `int : 0' in a structure. */
141: #define EMPTY_FIELD_BOUNDARY 32
142:
143: /* Every structure's size must be a multiple of this. */
144: #define STRUCTURE_SIZE_BOUNDARY 8
145:
146: /* A bitfield declared as `int' forces `int' alignment for the struct. */
147: #define PCC_BITFIELD_TYPE_MATTERS 1
148:
149: /* No data type wants to be aligned rounder than this. */
150: /* beware of doubles in structs -- 64 is incompatible with pcc */
151: #define BIGGEST_ALIGNMENT 32
152:
153: /* Define this if move instructions will actually fail to work
154: when given unaligned data. */
155: /* #define STRICT_ALIGNMENT */
156:
157: /* Define sizes of basic C types to conform to ordinary usage -- these
158: types depend on BITS_PER_WORD otherwise. */
159: #define CHAR_TYPE_SIZE 8
160: #define SHORT_TYPE_SIZE 16
161: #define INT_TYPE_SIZE 32
162: #define LONG_TYPE_SIZE 32
163: #define LONG_LONG_TYPE_SIZE 64
164: #define FLOAT_TYPE_SIZE 32
165: #define DOUBLE_TYPE_SIZE 64
166: #define LONG_DOUBLE_TYPE_SIZE 64
167:
168: /* Declare the standard types used by builtins to match convex stddef.h --
169: with int rather than long. */
170:
171: #define SIZE_TYPE "unsigned int"
172: #define PTRDIFF_TYPE "int"
173:
174: /* Standard register usage. */
175:
176: /* Number of actual hardware registers.
177: The hardware registers are assigned numbers for the compiler
178: from 0 to just below FIRST_PSEUDO_REGISTER.
179: All registers that the compiler knows about must be given numbers,
180: even those that are not normally considered general registers. */
181: #define FIRST_PSEUDO_REGISTER 16
182:
183: /* 1 for registers that have pervasive standard uses
184: and are not available for the register allocator.
185: For Convex, these are AP, FP, and SP. */
186: #define FIXED_REGISTERS {0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 1}
187:
188: /* 1 for registers not available across function calls.
189: These must include the FIXED_REGISTERS and also any
190: registers that can be used without being saved.
191: The latter must include the registers where values are returned
192: and the register where structure-value addresses are passed.
193: Aside from that, you can include as many other registers as you like. */
194: #define CALL_USED_REGISTERS {1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1}
195:
196: /* Return number of consecutive hard regs needed starting at reg REGNO
197: to hold something of mode MODE.
198: This is ordinarily the length in words of a value of mode MODE
199: but can be less for certain modes in special long registers. */
200: #define HARD_REGNO_NREGS(REGNO, MODE) \
201: ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
202:
203: /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE.
204: On Convex, S registers can hold any type, A registers any nonfloat. */
205: #define HARD_REGNO_MODE_OK(REGNO, MODE) \
206: ((REGNO) < 8 || (GET_MODE_CLASS (MODE) != MODE_FLOAT && \
207: GET_MODE_CLASS (MODE) != MODE_COMPLEX_FLOAT && \
208: (MODE) != DImode))
209:
210: /* Value is 1 if it is a good idea to tie two pseudo registers
211: when one has mode MODE1 and one has mode MODE2.
212: If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
213: for any hard reg, then this must be 0 for correct output. */
214: #define MODES_TIEABLE_P(MODE1, MODE2) \
215: ((GET_MODE_CLASS (MODE1) == MODE_FLOAT \
216: || GET_MODE_CLASS (MODE1) == MODE_COMPLEX_FLOAT \
217: || (MODE1) == DImode) \
218: == (GET_MODE_CLASS (MODE2) == MODE_FLOAT \
219: || GET_MODE_CLASS (MODE2) == MODE_COMPLEX_FLOAT \
220: || (MODE2) == DImode))
221:
222: /* Specify the registers used for certain standard purposes.
223: The values of these macros are register numbers. */
224:
225: /* Register to use for pushing function arguments. */
226: #define STACK_POINTER_REGNUM 8
227:
228: /* Base register for access to local variables of the function. */
229: #define FRAME_POINTER_REGNUM 15
230:
231: /* Value should be nonzero if functions must have frame pointers.
232: Zero means the frame pointer need not be set up (and parms
233: may be accessed via the stack pointer) in functions that seem suitable.
234: This is computed in `reload', in reload1.c. */
235: #define FRAME_POINTER_REQUIRED 1
236:
237: /* Base register for access to arguments of the function. */
238: #define ARG_POINTER_REGNUM 14
239:
240: /* Register in which static-chain is passed to a function.
241: Use S0, not an A reg, because this rare use would otherwise prevent
242: an A reg from being available to global-alloc across calls. */
243: #define STATIC_CHAIN_REGNUM 0
244:
245: /* Register in which address to store a structure value
246: is passed to a function. */
247: #define STRUCT_VALUE_REGNUM 9
248:
249: /* Define the classes of registers for register constraints in the
250: machine description. Also define ranges of constants.
251:
252: One of the classes must always be named ALL_REGS and include all hard regs.
253: If there is more than one class, another class must be named NO_REGS
254: and contain no registers.
255:
256: The name GENERAL_REGS must be the name of a class (or an alias for
257: another name such as ALL_REGS). This is the class of registers
258: that is allowed by "g" or "r" in a register constraint.
259: Also, registers outside this class are allocated only when
260: instructions express preferences for them.
261:
262: The classes must be numbered in nondecreasing order; that is,
263: a larger-numbered class must never be contained completely
264: in a smaller-numbered class.
265:
266: For any two classes, it is very desirable that there be another
267: class that represents their union. */
268:
269: /* Convex has classes A (address) and S (scalar).
270: A is further divided into SP_REGS (stack pointer) and INDEX_REGS.
271: Seems to work better to put S first, here and in the md. */
272:
273: enum reg_class {
274: NO_REGS, S_REGS, INDEX_REGS, SP_REGS, A_REGS, ALL_REGS, LIM_REG_CLASSES
275: };
276:
277: #define N_REG_CLASSES (int) LIM_REG_CLASSES
278:
279: /* Since GENERAL_REGS is the same class as ALL_REGS,
280: don't give it a different class number; just make it an alias. */
281:
282: #define GENERAL_REGS ALL_REGS
283:
284: /* Give names of register classes as strings for dump file. */
285:
286: #define REG_CLASS_NAMES \
287: {"NO_REGS", "S_REGS", "INDEX_REGS", "SP_REGS", "A_REGS", "ALL_REGS" }
288:
289: /* Define which registers fit in which classes.
290: This is an initializer for a vector of HARD_REG_SET
291: of length N_REG_CLASSES. */
292:
293: #define REG_CLASS_CONTENTS {0, 0x00ff, 0xfe00, 0x0100, 0xff00, 0xffff}
294:
295: /* The same information, inverted:
296: Return the class number of the smallest class containing
297: reg number REGNO. This could be a conditional expression
298: or could index an array. */
299:
300: #define REGNO_REG_CLASS(REGNO) \
301: (S_REGNO_P (REGNO) ? S_REGS : REGNO == 8 ? SP_REGS : INDEX_REGS)
302:
303: #define S_REGNO_P(REGNO) ((REGNO) < 8)
304: #define A_REGNO_P(REGNO) ((REGNO) >= 8)
305:
306: #define S_REG_P(X) (REG_P (X) && S_REGNO_P (REGNO (X)))
307: #define A_REG_P(X) (REG_P (X) && A_REGNO_P (REGNO (X)))
308:
309: /* The class value for index registers, and the one for base regs. */
310:
311: #define INDEX_REG_CLASS INDEX_REGS
312: #define BASE_REG_CLASS INDEX_REGS
313:
314: /* Get reg_class from a letter such as appears in the machine description. */
315: /* S regs use the letter 'd' because 's' is taken. */
316:
317: #define REG_CLASS_FROM_LETTER(C) \
318: ((C) == 'a' ? A_REGS : (C) == 'd' ? S_REGS : NO_REGS)
319:
320: /* The letters I, J, K, L and M in a register constraint string
321: can be used to stand for particular ranges of immediate operands.
322: This macro defines what the ranges are.
323: C is the letter, and VALUE is a constant value.
324: Return 1 if VALUE is in the range specified by C. */
325:
326: /* Convex uses only I:
327: 32-bit value with sign bit off, usable as immediate in DImode logical
328: instructions and, or, xor */
329:
330: #define CONST_OK_FOR_LETTER_P(VALUE, C) ((VALUE) >= 0)
331:
332: /* Similar, but for floating constants, and defining letters G and H.
333: Here VALUE is the CONST_DOUBLE rtx itself. */
334: /* Convex uses only G:
335: value usable in ld.d (low word 0) or ld.l (high word all sign) */
336:
337: #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
338: (LD_D_P (VALUE) || LD_L_P (VALUE))
339:
340: #define LD_D_P(X) (const_double_low_int (X) == 0)
341:
342: #define LD_L_P(X) (const_double_low_int (X) >= 0 \
343: ? const_double_high_int (X) == 0 \
344: : const_double_high_int (X) == -1)
345:
346: /* Given an rtx X being reloaded into a reg required to be
347: in class CLASS, return the class of reg to actually use.
348: In general this is just CLASS; but on some machines
349: in some cases it is preferable to use a more restrictive class. */
350:
351: /* CONST_DOUBLEs (constraint 'F') are passed by LEGITIMATE_CONSTANT_P
352: without regard to their value. Constraint 'G' is used by instructions
353: that need to reject non-immediate values. The rejected values are
354: dealt with by reload -- PREFERRED_RELOAD_CLASS returns NO_REGS for
355: nonimmediate values, causing reload to put them in memory. Every insn
356: that uses 'G' must have an alternative that accepts memory. */
357:
358: #define PREFERRED_RELOAD_CLASS(X,CLASS) \
359: (GET_CODE (X) != CONST_DOUBLE ? (CLASS) : \
360: (GET_MODE (X) != TFmode && (LD_L_P (X) || LD_D_P (X))) ? (CLASS) : NO_REGS)
361:
362: /* Return the maximum number of consecutive registers
363: needed to represent mode MODE in a register of class CLASS. */
364: #define CLASS_MAX_NREGS(CLASS, MODE) ((GET_MODE_SIZE (MODE) + 7) / 8)
365:
366: /* Stack layout; function entry, exit and calling. */
367:
368: /* Define this if pushing a word on the stack
369: makes the stack pointer a smaller address. */
370: #define STACK_GROWS_DOWNWARD
371:
372: /* Define this if the nominal address of the stack frame
373: is at the high-address end of the local variables;
374: that is, each additional local variable allocated
375: goes at a more negative offset in the frame. */
376: #define FRAME_GROWS_DOWNWARD
377:
378: /* Define this if should default to -fcaller-saves. */
379: #define DEFAULT_CALLER_SAVES
380:
381: /* Offset within stack frame to start allocating local variables at.
382: If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
383: first local allocated. Otherwise, it is the offset to the BEGINNING
384: of the first local allocated. */
385: #define STARTING_FRAME_OFFSET 0
386:
387: /* If we generate an insn to push BYTES bytes,
388: this says how many the stack pointer really advances by. */
389: #define PUSH_ROUNDING(BYTES) (((BYTES) + 3) & ~3)
390:
391: /* Offset of first parameter from the argument pointer register value. */
392: #define FIRST_PARM_OFFSET(FNDECL) 0
393:
394: /* Value is the number of bytes of arguments automatically
395: popped when returning from a subroutine call.
396: FUNTYPE is the data type of the function (as a tree),
397: or for a library call it is an identifier node for the subroutine name.
398: SIZE is the number of bytes of arguments passed on the stack. */
399: /* The standard Convex call, with arg count word, includes popping the
400: args as part of the call template. We optionally omit the arg count
401: word and let gcc combine the arg pops. */
402: #define RETURN_POPS_ARGS(FUNTYPE,SIZE) (TARGET_ARGCOUNT)
403:
404: /* Define how to find the value returned by a function.
405: VALTYPE is the data type of the value (as a tree).
406: If the precise function being called is known, FUNC is its FUNCTION_DECL;
407: otherwise, FUNC is 0. */
408:
409: /* On Convex the return value is in S0 regardless. */
410:
411: #define FUNCTION_VALUE(VALTYPE, FUNC) \
412: gen_rtx (REG, TYPE_MODE (VALTYPE), 0)
413:
414: /* Define how to find the value returned by a library function
415: assuming the value has mode MODE. */
416:
417: /* On Convex the return value is in S0 regardless. */
418:
419: #define LIBCALL_VALUE(MODE) gen_rtx (REG, MODE, 0)
420:
421: /* Define this if PCC uses the nonreentrant convention for returning
422: structure and union values. */
423:
424: #define PCC_STATIC_STRUCT_RETURN
425:
426: /* 1 if N is a possible register number for a function value.
427: On the Convex, S0 is the only register thus used. */
428:
429: #define FUNCTION_VALUE_REGNO_P(N) ((N) == 0)
430:
431: /* 1 if N is a possible register number for function argument passing. */
432:
433: #define FUNCTION_ARG_REGNO_P(N) 0
434:
435: /* Define a data type for recording info about an argument list
436: during the scan of that argument list. This data type should
437: hold all necessary information about the function itself
438: and about the args processed so far, enough to enable macros
439: such as FUNCTION_ARG to determine where the next arg should go.
440:
441: On convex, this is a single integer, which is a number of bytes
442: of arguments scanned so far. */
443:
444: #define CUMULATIVE_ARGS int
445:
446: /* Initialize a variable CUM of type CUMULATIVE_ARGS
447: for a call to a function whose data type is FNTYPE.
448: For a library call, FNTYPE is 0.
449:
450: On Convex, the offset starts at 0. */
451:
452: #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME) \
453: ((CUM) = 0)
454:
455: /* Update the data in CUM to advance over an argument
456: of mode MODE and data type TYPE.
457: (TYPE is null for libcalls where that information may not be available.) */
458:
459: #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
460: ((CUM) += ((MODE) != BLKmode \
461: ? (GET_MODE_SIZE (MODE) + 3) & ~3 \
462: : (int_size_in_bytes (TYPE) + 3) & ~3))
463:
464: /* Define where to put the arguments to a function.
465: Value is zero to push the argument on the stack,
466: or a hard register in which to store the argument.
467:
468: MODE is the argument's machine mode.
469: TYPE is the data type of the argument (as a tree).
470: This is null for libcalls where that information may
471: not be available.
472: CUM is a variable of type CUMULATIVE_ARGS which gives info about
473: the preceding args and about the function being called.
474: NAMED is nonzero if this argument is a named parameter
475: (otherwise it is an extra parameter matching an ellipsis). */
476:
477: /* On Convex, all args are pushed. */
478:
479: #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) 0
480:
481: /* This macro generates the assembly code for function entry.
482: FILE is a stdio stream to output the code to.
483: SIZE is an int: how many units of temporary storage to allocate.
484: Refer to the array `regs_ever_live' to determine which registers
485: to save; `regs_ever_live[I]' is nonzero if register number I
486: is ever used in the function. This macro is responsible for
487: knowing which registers should not be saved even if used. */
488:
489: #define FUNCTION_PROLOGUE(FILE, SIZE) \
490: { if ((SIZE) != 0) fprintf (FILE, "\tsub.w #%d,sp\n", ((SIZE) + 3) & -4);}
491:
492: /* Output assembler code for a block containing the constant parts
493: of a trampoline, leaving space for the variable parts. */
494:
495: /* On convex, the code for a trampoline is
496: ld.w #<link>,s0
497: jmp <func> */
498:
499: #define TRAMPOLINE_TEMPLATE(FILE) \
500: { \
501: ASM_OUTPUT_SHORT (FILE, gen_rtx (CONST_INT, VOIDmode, 0x11c8)); \
502: ASM_OUTPUT_SHORT (FILE, const0_rtx); \
503: ASM_OUTPUT_SHORT (FILE, const0_rtx); \
504: ASM_OUTPUT_SHORT (FILE, gen_rtx (CONST_INT, VOIDmode, 0x0140)); \
505: ASM_OUTPUT_SHORT (FILE, const0_rtx); \
506: ASM_OUTPUT_SHORT (FILE, const0_rtx); \
507: }
508:
509: /* Length in units of the trampoline for entering a nested function. */
510:
511: #define TRAMPOLINE_SIZE 12
512:
513: /* Emit RTL insns to initialize the variable parts of a trampoline.
514: FNADDR is an RTX for the address of the function's pure code.
515: CXT is an RTX for the static chain value for the function. */
516:
517: #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
518: { \
519: emit_move_insn (gen_rtx (MEM, Pmode, plus_constant (TRAMP, 2)), CXT); \
520: emit_move_insn (gen_rtx (MEM, Pmode, plus_constant (TRAMP, 8)), FNADDR); \
521: emit_call_insn (gen_call (gen_rtx (MEM, QImode, \
522: gen_rtx (SYMBOL_REF, Pmode, \
523: "__enable_execute_stack")), \
524: const0_rtx)); \
525: }
526:
527: /* Output assembler code to FILE to increment profiler label # LABELNO
528: for profiling a function entry. */
529:
530: #define FUNCTION_PROFILER(FILE, LABELNO) \
531: fprintf (FILE, "\tldea LP%d,a1\n\tcallq mcount\n", (LABELNO));
532:
533: /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
534: the stack pointer does not matter. The value is tested only in
535: functions that have frame pointers.
536: No definition is equivalent to always zero. */
537:
538: #define EXIT_IGNORE_STACK 1
539:
540: /* This macro generates the assembly code for function exit,
541: on machines that need it. If FUNCTION_EPILOGUE is not defined
542: then individual return instructions are generated for each
543: return statement. Args are same as for FUNCTION_PROLOGUE. */
544:
545: /* #define FUNCTION_EPILOGUE(FILE, SIZE) */
546:
547: /* Store in the variable DEPTH the initial difference between the
548: frame pointer reg contents and the stack pointer reg contents,
549: as of the start of the function body. This depends on the layout
550: of the fixed parts of the stack frame and on how registers are saved. */
551: #define INITIAL_FRAME_POINTER_OFFSET(DEPTH) \
552: { (DEPTH) = get_frame_size (); }
553:
554: /* Addressing modes, and classification of registers for them. */
555:
556: /* #define HAVE_POST_INCREMENT */
557: /* #define HAVE_POST_DECREMENT */
558:
559: /* #define HAVE_PRE_DECREMENT */
560: /* #define HAVE_PRE_INCREMENT */
561:
562: /* Macros to check register numbers against specific register classes. */
563:
564: /* These assume that REGNO is a hard or pseudo reg number.
565: They give nonzero only if REGNO is a hard reg of the suitable class
566: or a pseudo reg currently allocated to a suitable hard reg.
567: Since they use reg_renumber, they are safe only once reg_renumber
568: has been allocated, which happens in local-alloc.c. */
569:
570: #define REGNO_OK_FOR_INDEX_P(regno) \
571: ((((regno) ^ 010) < 8 || ((reg_renumber[regno] ^ 010) & -8) == 0) \
572: && regno != 8)
573:
574: #define REGNO_OK_FOR_BASE_P(regno) REGNO_OK_FOR_INDEX_P (regno)
575:
576: /* Maximum number of registers that can appear in a valid memory address. */
577:
578: #define MAX_REGS_PER_ADDRESS 1
579:
580: /* 1 if X is an rtx for a constant that is a valid address. */
581:
582: #define CONSTANT_ADDRESS_P(X) CONSTANT_P (X)
583:
584: /* Nonzero if the constant value X is a legitimate general operand.
585: It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE. */
586:
587: /* For convex, any single-word constant is ok; the only contexts
588: allowing general_operand of mode DI or DF are movdi and movdf. */
589:
590: #define LEGITIMATE_CONSTANT_P(X) \
591: (GET_CODE (X) != CONST_DOUBLE ? 1 : (LD_D_P (X) || LD_L_P (X)))
592:
593: /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
594: and check its validity for a certain class.
595: We have two alternate definitions for each of them.
596: The usual definition accepts all pseudo regs; the other rejects
597: them unless they have been allocated suitable hard regs.
598: The symbol REG_OK_STRICT causes the latter definition to be used.
599:
600: Most source files want to accept pseudo regs in the hope that
601: they will get allocated to the class that the insn wants them to be in.
602: Source files for reload pass need to be strict.
603: After reload, it makes no difference, since pseudo regs have
604: been eliminated by then. */
605:
606: #ifndef REG_OK_STRICT
607:
608: /* Nonzero if X is a hard reg that can be used as an index
609: or if it is a pseudo reg. */
610: #define REG_OK_FOR_INDEX_P(X) (REGNO (X) > 8)
611: /* Nonzero if X is a hard reg that can be used as a base reg
612: or if it is a pseudo reg. */
613: #define REG_OK_FOR_BASE_P(X) (REGNO (X) > 8)
614:
615: #else
616:
617: /* Nonzero if X is a hard reg that can be used as an index. */
618: #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
619: /* Nonzero if X is a hard reg that can be used as a base reg. */
620: #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
621:
622: #endif
623:
624: /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
625: that is a valid memory address for an instruction.
626: The MODE argument is the machine mode for the MEM expression
627: that wants to use this address.
628:
629: For Convex, valid addresses are
630: indirectable or (MEM indirectable)
631: where indirectable is
632: const, reg, (PLUS reg const)
633:
634: On C3-series processors, we avoid indirection since it's substantially
635: slower. */
636:
637: /* 1 if X is an address that we could indirect through. */
638: #define INDIRECTABLE_ADDRESS_P(X) \
639: (CONSTANT_ADDRESS_P (X) \
640: || (GET_CODE (X) == REG && REG_OK_FOR_BASE_P (X)) \
641: || (GET_CODE (X) == PLUS \
642: && GET_CODE (XEXP (X, 0)) == REG \
643: && REG_OK_FOR_BASE_P (XEXP (X, 0)) \
644: && CONSTANT_ADDRESS_P (XEXP (X, 1))) \
645: || (GET_CODE (X) == PLUS \
646: && GET_CODE (XEXP (X, 1)) == REG \
647: && REG_OK_FOR_BASE_P (XEXP (X, 1)) \
648: && CONSTANT_ADDRESS_P (XEXP (X, 0))))
649:
650: /* Go to ADDR if X is a valid address. */
651: #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
652: { register rtx xfoob = (X); \
653: if (INDIRECTABLE_ADDRESS_P (xfoob)) \
654: goto ADDR; \
655: xfoob = XEXP (X, 0); \
656: if (GET_CODE (X) == MEM \
657: && TARGET_INDIRECTS \
658: && INDIRECTABLE_ADDRESS_P (xfoob)) \
659: goto ADDR; \
660: if (GET_CODE (X) == PRE_DEC && REG_P (xfoob) \
661: && REGNO (xfoob) == STACK_POINTER_REGNUM) \
662: goto ADDR; }
663:
664: /* Try machine-dependent ways of modifying an illegitimate address
665: to be legitimate. If we find one, return the new, valid address.
666: This macro is used in only one place: `memory_address' in explow.c.
667:
668: OLDX is the address as it was before break_out_memory_refs was called.
669: In some cases it is useful to look at this to decide what needs to be done.
670:
671: MODE and WIN are passed so that this macro can use
672: GO_IF_LEGITIMATE_ADDRESS.
673:
674: It is always safe for this macro to do nothing. It exists to recognize
675: opportunities to optimize the output.
676:
677: For Convex, nothing needs to be done. */
678:
679: #define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) {}
680:
681: /* Go to LABEL if ADDR (a legitimate address expression)
682: has an effect that depends on the machine mode it is used for. */
683:
684: #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) {}
685:
686: /* Specify the machine mode that this machine uses
687: for the index in the tablejump instruction. */
688: #define CASE_VECTOR_MODE SImode
689:
690: /* Define this if the case instruction expects the table
691: to contain offsets from the address of the table.
692: Do not define this if the table should contain absolute addresses. */
693: /* #define CASE_VECTOR_PC_RELATIVE */
694:
695: /* Define this if the case instruction drops through after the table
696: when the index is out of range. Don't define it if the case insn
697: jumps to the default label instead. */
698: /* #define CASE_DROPS_THROUGH */
699:
700: /* Specify the tree operation to be used to convert reals to integers. */
701: #define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR
702:
703: /* This is the kind of divide that is easiest to do in the general case. */
704: #define EASY_DIV_EXPR TRUNC_DIV_EXPR
705:
706: /* Define this as 1 if `char' should by default be signed; else as 0. */
707: #define DEFAULT_SIGNED_CHAR 1
708:
709: /* This flag, if defined, says the same insns that convert to a signed fixnum
710: also convert validly to an unsigned one. */
711: #define FIXUNS_TRUNC_LIKE_FIX_TRUNC
712:
713: /* Max number of bytes we can move from memory to memory
714: in one reasonably fast instruction. */
715: #define MOVE_MAX 8
716:
717: /* Define this if zero-extension is slow (more than one real instruction). */
718: /* #define SLOW_ZERO_EXTEND */
719:
720: /* Nonzero if access to memory by bytes is slow and undesirable. */
721: #define SLOW_BYTE_ACCESS 0
722:
723: /* Define if shifts truncate the shift count
724: which implies one can omit a sign-extension or zero-extension
725: of a shift count. */
726: #define SHIFT_COUNT_TRUNCATED
727:
728: /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
729: is done just by pretending it is already truncated. */
730: #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
731:
732: /* On Convex, it is as good to call a constant function address as to
733: call an address kept in a register. */
734: #define NO_FUNCTION_CSE
735:
736: /* When a prototype says `char' or `short', really pass an `int'. */
737: #define PROMOTE_PROTOTYPES
738:
739: /* Specify the machine mode that pointers have.
740: After generation of rtl, the compiler makes no further distinction
741: between pointers and any other objects of this machine mode. */
742: #define Pmode SImode
743:
744: /* A function address in a call instruction
745: is a byte address (for indexing purposes)
746: so give the MEM rtx a byte's mode. */
747: #define FUNCTION_MODE QImode
748:
749: /* Compute the cost of computing a constant rtl expression RTX
750: whose rtx-code is CODE. The body of this macro is a portion
751: of a switch statement. If the code is computed here,
752: return it with a return statement. Otherwise, break from the switch. */
753:
754: #define CONST_COSTS(RTX,CODE) \
755: case CONST: \
756: case LABEL_REF: \
757: case SYMBOL_REF: \
758: case CONST_INT: \
759: return 0; \
760: case CONST_DOUBLE: \
761: return 2;
762:
763: /* Provide the costs of a rtl expression. This is in the body of a
764: switch on CODE.
765: On C1 and C2, multiply is faster than shift. */
766:
767: #define RTX_COSTS(RTX,CODE) \
768: case MULT: \
769: total = COSTS_N_INSNS (4); \
770: break; \
771: case LSHIFT: \
772: case ASHIFT: \
773: case LSHIFTRT: \
774: case ASHIFTRT: \
775: total = COSTS_N_INSNS (3); \
776: break;
777:
778: /* Compute the cost of an address. This is meant to approximate the size
779: and/or execution delay of an insn using that address. If the cost is
780: approximated by the RTL complexity, including CONST_COSTS above, as
781: is usually the case for CISC machines, this macro should not be defined.
782: For aggressively RISCy machines, only one insn format is allowed, so
783: this macro should be a constant. The value of this macro only matters
784: for valid addresses. */
785:
786: #define ADDRESS_COST(RTX) (GET_CODE (RTX) == MEM ? 3 : 1)
787:
788: /* Specify the cost of a branch insn; roughly the number of extra insns that
789: should be added to avoid a branch. */
790:
791: #define BRANCH_COST 0
792:
793: /* Check a `double' value for validity for a particular machine mode. */
794:
795: #define CHECK_FLOAT_VALUE(mode, d) \
796: if ((mode) == SFmode) \
797: { \
798: if ((d) > 1.7014117331926443e+38) \
799: { error ("magnitude of constant too large for `float'"); \
800: (d) = 1.7014117331926443e+38; } \
801: else if ((d) < -1.7014117331926443e+38) \
802: { error ("magnitude of constant too large for `float'"); \
803: (d) = -1.7014117331926443e+38; } \
804: else if (((d) > 0) && ((d) < 2.9387358770557188e-39)) \
805: { warning ("`float' constant truncated to zero"); \
806: (d) = 0.0; } \
807: else if (((d) < 0) && ((d) > -2.9387358770557188e-39)) \
808: { warning ("`float' constant truncated to zero"); \
809: (d) = 0.0; } \
810: }
811:
812: /* Tell final.c how to eliminate redundant test instructions. */
813:
814: /* Here we define machine-dependent flags and fields in cc_status
815: (see `conditions.h'). No extra ones are needed for convex. */
816:
817: /* Store in cc_status the expressions
818: that the condition codes will describe
819: after execution of an instruction whose pattern is EXP.
820: Do not alter them if the instruction would not alter the cc's. */
821:
822: #define NOTICE_UPDATE_CC(EXP,INSN) {}
823:
824: /* Control the assembler format that we output. */
825:
826: /* Output at beginning of assembler file. */
827:
828: #define ASM_FILE_START(FILE) fprintf (FILE, ";NO_APP\n")
829:
830: /* Output to assembler file text saying following lines
831: may contain character constants, extra white space, comments, etc. */
832:
833: #define ASM_APP_ON ";APP\n"
834:
835: /* Output to assembler file text saying following lines
836: no longer contain unusual constructs. */
837:
838: #define ASM_APP_OFF ";NO_APP\n"
839:
840: /* Alignment with Convex's assembler goes like this:
841: .text can be .aligned up to a halfword.
842: .data and .bss can be .aligned up to a longword.
843: .lcomm is not supported, explicit declarations in .bss must be used instead.
844: We get alignment for word and longword .text data by conventionally
845: using .text 2 for word-aligned data and .text 3 for longword-aligned
846: data. This requires that the data's size be a multiple of its alignment,
847: which seems to be always true. */
848:
849: /* Output before read-only data. */
850:
851: #define TEXT_SECTION_ASM_OP (current_section_is_text = 1, ".text")
852:
853: /* Output before writable data. */
854:
855: #define DATA_SECTION_ASM_OP (current_section_is_text = 0, ".data")
856:
857: /* Output before uninitialized data. */
858:
859: #define BSS_SECTION_ASM_OP (current_section_is_text = 0, ".bss")
860:
861: /* Define the .bss section for ASM_OUTPUT_LOCAL to use. */
862:
863: #define EXTRA_SECTIONS in_bss
864:
865: #define EXTRA_SECTION_FUNCTIONS \
866: void \
867: bss_section () \
868: { \
869: if (in_section != in_bss) \
870: { \
871: fprintf (asm_out_file, "%s\n", BSS_SECTION_ASM_OP); \
872: in_section = in_bss; \
873: } \
874: }
875:
876: /* This is how to output an assembler line
877: that says to advance the location counter
878: to a multiple of 2**LOG bytes. */
879:
880: #define ASM_OUTPUT_ALIGN(FILE,LOG) \
881: if (current_section_is_text && (LOG) > 1) \
882: fprintf (FILE, ".text %d\n", LOG); \
883: else if (current_section_is_text) \
884: fprintf (FILE, ".text\n.align %d\n", 1 << (LOG)); \
885: else \
886: fprintf (FILE, ".align %d\n", 1 << (LOG))
887:
888: /* How to refer to registers in assembler output.
889: This sequence is indexed by compiler's hard-register-number (see above). */
890:
891: #define REGISTER_NAMES \
892: {"s0", "s1", "s2", "s3", "s4", "s5", "s6", "s7", \
893: "sp", "a1", "a2", "a3", "a4", "a5", "ap", "fp"}
894:
895: /* This is BSD, so it wants DBX format. */
896:
897: #define DBX_DEBUGGING_INFO
898:
899: /* How to renumber registers for dbx and gdb. */
900:
901: #define DBX_REGISTER_NUMBER(REGNO) (REGNO)
902:
903: /* Do not break .stabs pseudos into continuations. */
904:
905: #define DBX_CONTIN_LENGTH 0
906:
907: /* This is the char to use for continuation (in case we need to turn
908: continuation back on). */
909:
910: #define DBX_CONTIN_CHAR '?'
911:
912: /* Don't use stab extensions until GDB v4 port is available for convex. */
913:
914: #define DEFAULT_GDB_EXTENSIONS 0
915: #define DBX_NO_XREFS
916:
917: /* This is how to output the definition of a user-level label named NAME,
918: such as the label on a static function or variable NAME. */
919:
920: #define ASM_OUTPUT_LABEL(FILE,NAME) \
921: do { assemble_name (FILE, NAME); fputs (":\n", FILE); } while (0)
922:
923: /* This is how to output a command to make the user-level label named NAME
924: defined for reference from other files. */
925:
926: #define ASM_GLOBALIZE_LABEL(FILE,NAME) \
927: do { fputs (".globl ", FILE); assemble_name (FILE, NAME); fputs ("\n", FILE);} while (0)
928:
929: /* This is how to output a reference to a user-level label named NAME. */
930:
931: #define ASM_OUTPUT_LABELREF(FILE,NAME) \
932: fprintf (FILE, "_%s", NAME)
933:
934: /* This is how to output an internal numbered label where
935: PREFIX is the class of label and NUM is the number within the class. */
936:
937: #define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \
938: fprintf (FILE, "%s%d:\n", PREFIX, NUM)
939:
940: /* Put case tables in .text 2, where they will be word-aligned */
941:
942: #define ASM_OUTPUT_CASE_LABEL(FILE,PREFIX,NUM,TABLE) \
943: ASM_OUTPUT_ALIGN (FILE, 2); \
944: ASM_OUTPUT_INTERNAL_LABEL (FILE, PREFIX, NUM)
945:
946: #define ASM_OUTPUT_CASE_END(FILE,NUM,TABLE) \
947: ASM_OUTPUT_ALIGN (FILE, 1)
948:
949: /* This is how to store into the string LABEL
950: the symbol_ref name of an internal numbered label where
951: PREFIX is the class of label and NUM is the number within the class.
952: This is suitable for output with `assemble_name'. */
953:
954: #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \
955: sprintf (LABEL, "*%s%d", PREFIX, NUM)
956:
957: /* This is how to output an assembler line defining a `double' constant. */
958:
959: #define ASM_OUTPUT_DOUBLE(FILE,VALUE) \
960: fprintf (FILE, "\tds.d %.17e\n", (VALUE))
961:
962: /* This is how to output an assembler line defining a `float' constant. */
963:
964: #define ASM_OUTPUT_FLOAT(FILE,VALUE) \
965: fprintf (FILE, "\tds.s %.9e\n", (VALUE))
966:
967: /* This is how to output an assembler line defining an `int' constant. */
968:
969: #define ASM_OUTPUT_INT(FILE,VALUE) \
970: ( fprintf (FILE, "\tds.w "), \
971: output_addr_const (FILE, (VALUE)), \
972: fprintf (FILE, "\n"))
973:
974: /* Likewise for a `long long int' constant. */
975:
976: #define ASM_OUTPUT_DOUBLE_INT(FILE,VALUE) \
977: { \
978: if (GET_CODE (VALUE) == CONST_DOUBLE) \
979: fprintf (FILE, "\tds.w %d,%d\n", \
980: const_double_high_int (VALUE), const_double_low_int (VALUE)); \
981: else if (GET_CODE (VALUE) == CONST_INT) \
982: { \
983: int val = INTVAL (VALUE); \
984: fprintf (FILE, "\tds.w %d,%d\n", val < 0 ? -1 : 0, val); \
985: } \
986: else \
987: abort (); \
988: }
989:
990: /* Likewise for `char' and `short' constants. */
991:
992: #define ASM_OUTPUT_SHORT(FILE,VALUE) \
993: ( fprintf (FILE, "\tds.h "), \
994: output_addr_const (FILE, (VALUE)), \
995: fprintf (FILE, "\n"))
996:
997: #define ASM_OUTPUT_CHAR(FILE,VALUE) \
998: ( fprintf (FILE, "\tds.b "), \
999: output_addr_const (FILE, (VALUE)), \
1000: fprintf (FILE, "\n"))
1001:
1002: /* This is how to output an assembler line for a numeric constant byte. */
1003:
1004: #define ASM_OUTPUT_BYTE(FILE,VALUE) \
1005: fprintf (FILE, "\tds.b %#x\n", (VALUE))
1006:
1007: /* This is how to output a string */
1008:
1009: #define ASM_OUTPUT_ASCII(FILE,STR,SIZE) do { \
1010: int i; \
1011: fprintf ((FILE), "\tds.b \""); \
1012: for (i = 0; i < (SIZE); i++) { \
1013: register int c = (STR)[i] & 0377; \
1014: if (c >= ' ' && c < 0177 && c != '\\' && c != '"') \
1015: putc (c, (FILE)); \
1016: else \
1017: fprintf ((FILE), "\\%03o", c);} \
1018: fprintf ((FILE), "\"\n");} while (0)
1019:
1020: /* This is how to output an insn to push a register on the stack.
1021: It need not be very fast code. */
1022:
1023: #define ASM_OUTPUT_REG_PUSH(FILE,REGNO) \
1024: fprintf (FILE, "\tpsh.%c %s\n", \
1025: S_REGNO_P (REGNO) ? 'l' : 'w', \
1026: reg_names[REGNO])
1027:
1028: /* This is how to output an insn to pop a register from the stack.
1029: It need not be very fast code. */
1030:
1031: #define ASM_OUTPUT_REG_POP(FILE,REGNO) \
1032: fprintf (FILE, "\tpop.%c %s\n", \
1033: S_REGNO_P (REGNO) ? 'l' : 'w', \
1034: reg_names[REGNO])
1035:
1036: /* This is how to output an element of a case-vector that is absolute. */
1037:
1038: #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
1039: fprintf (FILE, "\tds.w L%d\n", VALUE)
1040:
1041: /* This is how to output an element of a case-vector that is relative.
1042: (not used on Convex) */
1043:
1044: #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, VALUE, REL) \
1045: fprintf (FILE, "\tds.w L%d-L%d\n", VALUE, REL)
1046:
1047: /* This is how to output an assembler line
1048: that says to advance the location counter by SIZE bytes. */
1049:
1050: #define ASM_OUTPUT_SKIP(FILE,SIZE) \
1051: fprintf (FILE, "\tds.b %u(0)\n", (SIZE))
1052:
1053: /* This says how to output an assembler line
1054: to define a global common symbol. */
1055:
1056: #define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \
1057: ( fputs (".comm ", (FILE)), \
1058: assemble_name ((FILE), (NAME)), \
1059: fprintf ((FILE), ",%u\n", (ROUNDED)))
1060:
1061: /* This says how to output an assembler line
1062: to define a local common symbol. */
1063:
1064: #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE, ROUNDED) \
1065: ( bss_section (), \
1066: assemble_name ((FILE), (NAME)), \
1067: fprintf ((FILE), ":\tbs.b %u\n", (ROUNDED)))
1068:
1069: /* Store in OUTPUT a string (made with alloca) containing
1070: an assembler-name for a local static variable named NAME.
1071: LABELNO is an integer which is different for each call. */
1072:
1073: #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \
1074: ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \
1075: sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO)))
1076:
1077: /* Define the parentheses used to group arithmetic operations
1078: in assembler code. */
1079:
1080: #define ASM_OPEN_PAREN "("
1081: #define ASM_CLOSE_PAREN ")"
1082:
1083: /* Define results of standard character escape sequences. */
1084: #define TARGET_BELL 007
1085: #define TARGET_BS 010
1086: #define TARGET_TAB 011
1087: #define TARGET_NEWLINE 012
1088: #define TARGET_VT 013
1089: #define TARGET_FF 014
1090: #define TARGET_CR 015
1091:
1092: /* Print an instruction operand X on file FILE.
1093: CODE is the code from the %-spec that requested printing this operand;
1094: if `%z3' was used to print operand 3, then CODE is 'z'. */
1095:
1096: #define PRINT_OPERAND(FILE, X, CODE) \
1097: { if (GET_CODE (X) == REG) \
1098: fprintf (FILE, "%s", reg_names[REGNO (X)]); \
1099: else if (GET_CODE (X) == MEM) \
1100: output_address (XEXP (X, 0)); \
1101: else if (GET_CODE (X) == CONST_DOUBLE \
1102: && GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT) \
1103: { union { double d; int i[2]; } u; \
1104: u.i[0] = CONST_DOUBLE_LOW (X); u.i[1] = CONST_DOUBLE_HIGH (X); \
1105: fprintf (FILE, "#%.9e", u.d); } \
1106: else { putc ('#', FILE); output_addr_const (FILE, X); }}
1107:
1108: /* Print a memory operand whose address is X, on file FILE. */
1109:
1110: #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \
1111: { \
1112: register rtx addr = ADDR; \
1113: register rtx index = 0; \
1114: register rtx offset = 0; \
1115: \
1116: if (GET_CODE (addr) == MEM) \
1117: { \
1118: fprintf (FILE, "@"); \
1119: addr = XEXP (addr, 0); \
1120: } \
1121: \
1122: switch (GET_CODE (addr)) \
1123: { \
1124: case REG: \
1125: index = addr; \
1126: break; \
1127: \
1128: case PLUS: \
1129: index = XEXP (addr, 0); \
1130: if (REG_P (index)) \
1131: offset = XEXP (addr, 1); \
1132: else \
1133: { \
1134: offset = XEXP (addr, 0); \
1135: index = XEXP (addr, 1); \
1136: if (! REG_P (index)) abort (); \
1137: } \
1138: break; \
1139: \
1140: default: \
1141: offset = addr; \
1142: break; \
1143: } \
1144: \
1145: if (offset) \
1146: output_addr_const (FILE, offset); \
1147: \
1148: if (index) \
1149: fprintf (FILE, "(%s)", reg_names[REGNO (index)]); \
1150: }
1151:
1152: /* Definitions for g++. */
1153:
1154: /* Do not put out GNU stabs for constructors and destructors.
1155: ld bounces them. */
1156:
1157: #define FASCIST_ASSEMBLER
1158:
1159: /* Convex user addresses are negative, so use positive numbers
1160: to mean `vtable index'. */
1161:
1162: #define VTABLE_USES_MASK
1163: #define VINDEX_MAX ((unsigned) 0x80000000)
1164: #define SET_DECL_VINDEX(DECL, INDEX) \
1165: (DECL_VINDEX (DECL) = (INDEX))
1166:
1167: /* Defs for compiling collect2.c in -pcc mode during bootstrap. */
1168:
1169: #ifdef COLLECT
1170:
1171: #ifdef __STDC__
1172:
1173: #define HAVE_STRERROR
1174:
1175: #else
1176:
1177: #define vfprintf(file,fmt,args) _doprnt (fmt, args, file)
1178: #define WTERMSIG(x) (((union wait *) &(x))->w_termsig)
1179: #define WEXITSTATUS(x) (((union wait *) &(x))->w_retcode)
1180:
1181: #endif
1182:
1183: #endif /* COLLECT */
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