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1.1 root 1: /* Definitions of target machine for GNU compiler. Convex version. 1.1.1.3 ! root 2: Copyright (C) 1988, 1994 Free Software Foundation, Inc. 1.1 root 3: 4: This file is part of GNU CC. 5: 6: GNU CC is free software; you can redistribute it and/or modify 7: it under the terms of the GNU General Public License as published by 8: the Free Software Foundation; either version 2, or (at your option) 9: any later version. 10: 11: GNU CC is distributed in the hope that it will be useful, 12: but WITHOUT ANY WARRANTY; without even the implied warranty of 13: MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14: GNU General Public License for more details. 15: 16: You should have received a copy of the GNU General Public License 17: along with GNU CC; see the file COPYING. If not, write to 18: the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */ 19: 20: 21: /* Standard GCC variables that we reference. */ 22: 23: extern int target_flags; 24: 25: /* Convex machine-specific flags 26: -mc1 target instruction set, libraries, scheduling 27: -mc2 28: -mc32 29: -mc34 30: -mc38 31: -margcount use standard calling sequence, with arg count word 32: -mno-argcount don't push arg count, depend on symbol table 33: -margcount-nop place arg count in a nop instruction (faster than push) 34: -mvolatile-cache use data cache for volatile mem refs (default) 35: -mvolatile-nocache bypass data cache for volatile mem refs 36: -mlong32 cc- and libc-compatible 32-bit longs 37: -mlong64 64-bit longs 38: */ 39: 40: /* Macro to define tables used to set -mXXX flags. 41: This is a list in braces of pairs in braces, 42: each pair being { "NAME", VALUE } 43: where VALUE is the bits to set or minus the bits to clear. 44: An empty string NAME is used to identify the default VALUE. */ 45: 46: #ifndef TARGET_DEFAULT 47: #error Use one of convex1.h, convex2.h, etc. 48: #endif 49: 50: #define TARGET_SWITCHES \ 51: { { "c1", 001 }, \ 52: { "c2", 002 }, \ 53: { "c32", 004 }, \ 54: { "c34", 010 }, \ 55: { "c38", 020 }, \ 56: { "argcount", 0100 }, \ 57: { "argcount-nop", 0200 }, \ 58: { "no-argcount", -0300 }, \ 59: { "volatile-cache", -0400 }, \ 60: { "no-volatile-cache", 0400 }, \ 61: { "volatile-nocache", 0400 }, \ 62: { "long64", 01000 }, \ 63: { "long32", -01000 }, \ 64: { "", TARGET_DEFAULT }} 65: 66: /* Macros used in the machine description to test the flags. */ 67: 68: #define TARGET_C1 (target_cpu == 0) 69: #define TARGET_C2 (target_cpu == 1) 70: #define TARGET_C34 (target_cpu == 2) 71: #define TARGET_C38 (target_cpu == 3) 72: #define TARGET_ARGCOUNT (target_flags & 0100) 73: #define TARGET_ARGCOUNT_NOP (target_flags & 0200) 74: #define TARGET_LONG64 (target_flags & 01000) 75: #define TARGET_VOLATILE_NOCACHE (target_flags & 0400) 76: 77: #define OVERRIDE_OPTIONS \ 78: { \ 79: extern int dollars_in_ident; \ 80: init_convex (); \ 81: /* To compile system header files, allow $ in identifiers even if -ansi */ \ 82: dollars_in_ident = 1; \ 83: if ((target_flags & 077) != (TARGET_DEFAULT & 077)) \ 84: target_flags &= ~TARGET_DEFAULT; \ 85: if (target_flags & 001) \ 86: target_cpu = 0; \ 87: else if (target_flags & 006) \ 88: target_cpu = 1; \ 89: else if (target_flags & 010) \ 90: target_cpu = 2; \ 91: else if (target_flags & 020) \ 92: target_cpu = 3; \ 93: } 94: 95: /* Names to predefine in the preprocessor for this target machine. */ 96: 1.1.1.2 root 97: #define CPP_PREDEFINES "-Dconvex -Dunix -Asystem(unix) -Acpu(convex) -Amachine(convex)" 1.1 root 98: 99: /* Print subsidiary information on the compiler version in use. */ 100: 101: #define TARGET_VERSION fprintf (stderr, " (convex)"); 102: 103: /* Target-dependent specs. 104: Some libraries come in c1 and c2+ versions; use the appropriate ones. 105: Make a target-dependent __convex_cxx__ define to relay the target cpu 106: to the program being compiled. */ 107: 108: #if TARGET_DEFAULT & 1 109: 110: /* C1 default */ 111: 112: #if _IEEE_FLOAT_ 113: 114: #define CPP_SPEC \ 115: "%{!mc2:%{!mc32:%{!mc34:%{!mc38:-D__convex_c1__}}}} \ 116: %{mc2:-D__convex_c2__} \ 117: %{mc32:-D__convex_c32__} \ 118: %{mc34:-D__convex_c34__} \ 119: %{mc38:-D__convex_c38__} \ 120: %{fno-builtin:-D__NO_INLINE} \ 121: -D__NO_INLINE_MATH -D__NO_INLINE_STDLIB \ 122: -D_IEEE_FLOAT_ \ 123: %{.S:-P} \ 124: %{!traditional:-D__stdc__} \ 125: %{!traditional:-D_LONGLONG} \ 126: %{!traditional:-Ds64_t=long\\ long -Du64_t=unsigned\\ long\\ long} \ 127: %{!ansi:-D_POSIX_SOURCE} \ 128: %{!ansi:-D_CONVEX_SOURCE}" 129: 130: #else 131: 132: #define CPP_SPEC \ 133: "%{!mc2:%{!mc32:%{!mc34:%{!mc38:-D__convex_c1__}}}} \ 134: %{mc2:-D__convex_c2__} \ 135: %{mc32:-D__convex_c32__} \ 136: %{mc34:-D__convex_c34__} \ 137: %{mc38:-D__convex_c38__} \ 138: %{fno-builtin:-D__NO_INLINE} \ 139: -D__NO_INLINE_MATH -D__NO_INLINE_STDLIB \ 140: -D_CONVEX_FLOAT_ \ 141: %{.S:-P} \ 142: %{!traditional:-D__stdc__} \ 143: %{!traditional:-D_LONGLONG} \ 144: %{!traditional:-Ds64_t=long\\ long -Du64_t=unsigned\\ long\\ long} \ 145: %{!ansi:-D_POSIX_SOURCE} \ 146: %{!ansi:-D_CONVEX_SOURCE}" 147: 148: #endif 149: 150: #define LIB_SPEC \ 151: "%{!mc2:%{!mc32:%{!mc34:%{!mc38:-lC1%{traditional:_old}%{p:_p}%{pg:_p}}}}} \ 152: %{mc2:-lC2%{traditional:_old}%{p:_p}%{pg:_p}} \ 153: %{mc32:-lC2%{traditional:_old}%{p:_p}%{pg:_p}} \ 154: %{mc34:-lC2%{traditional:_old}%{p:_p}%{pg:_p}} \ 155: %{mc38:-lC2%{traditional:_old}%{p:_p}%{pg:_p}} \ 156: -lc%{traditional:_old}%{p:_p}%{pg:_p}" 157: 158: #endif 159: 160: #if TARGET_DEFAULT & 2 161: 162: /* C2 default */ 163: 164: #if _IEEE_FLOAT_ 165: 166: #define CPP_SPEC \ 167: "%{mc1:-D__convex_c1__} \ 168: %{!mc1:%{!mc32:%{!mc34:%{!mc38:-D__convex_c2__}}}} \ 169: %{mc32:-D__convex_c32__} \ 170: %{mc34:-D__convex_c34__} \ 171: %{mc38:-D__convex_c38__} \ 172: %{fno-builtin:-D__NO_INLINE} \ 173: -D__NO_INLINE_MATH -D__NO_INLINE_STDLIB \ 174: -D_IEEE_FLOAT_ \ 175: %{.S:-P} \ 176: %{!traditional:-D__stdc__} \ 177: %{!traditional:-D_LONGLONG} \ 178: %{!traditional:-Ds64_t=long\\ long -Du64_t=unsigned\\ long\\ long} \ 179: %{!ansi:-D_POSIX_SOURCE} \ 180: %{!ansi:-D_CONVEX_SOURCE}" 181: 182: #else 183: 184: #define CPP_SPEC \ 185: "%{mc1:-D__convex_c1__} \ 186: %{!mc1:%{!mc32:%{!mc34:%{!mc38:-D__convex_c2__}}}} \ 187: %{mc32:-D__convex_c32__} \ 188: %{mc34:-D__convex_c34__} \ 189: %{mc38:-D__convex_c38__} \ 190: %{fno-builtin:-D__NO_INLINE} \ 191: -D__NO_INLINE_MATH -D__NO_INLINE_STDLIB \ 192: -D_CONVEX_FLOAT_ \ 193: %{.S:-P} \ 194: %{!traditional:-D__stdc__} \ 195: %{!traditional:-D_LONGLONG} \ 196: %{!traditional:-Ds64_t=long\\ long -Du64_t=unsigned\\ long\\ long} \ 197: %{!ansi:-D_POSIX_SOURCE} \ 198: %{!ansi:-D_CONVEX_SOURCE}" 199: 200: #endif 201: 202: #define LIB_SPEC \ 203: "%{mc1:-lC1%{traditional:_old}%{p:_p}%{pg:_p}} \ 204: %{!mc1:%{!mc32:%{!mc34:%{!mc38:-lC2%{traditional:_old}%{p:_p}%{pg:_p}}}}} \ 205: %{mc32:-lC2%{traditional:_old}%{p:_p}%{pg:_p}} \ 206: %{mc34:-lC2%{traditional:_old}%{p:_p}%{pg:_p}} \ 207: %{mc38:-lC2%{traditional:_old}%{p:_p}%{pg:_p}} \ 208: -lc%{traditional:_old}%{p:_p}%{pg:_p}" 209: 210: #endif 211: 212: #if TARGET_DEFAULT & 4 213: 214: /* C32 default */ 215: 216: #if _IEEE_FLOAT_ 217: 218: #define CPP_SPEC \ 219: "%{mc1:-D__convex_c1__} \ 220: %{mc2:-D__convex_c2__} \ 221: %{!mc1:%{!mc2:%{!mc34:%{!mc38:-D__convex_c32__}}}} \ 222: %{mc34:-D__convex_c34__} \ 223: %{mc38:-D__convex_c38__} \ 224: %{fno-builtin:-D__NO_INLINE} \ 225: -D__NO_INLINE_MATH -D__NO_INLINE_STDLIB \ 226: -D_IEEE_FLOAT_ \ 227: %{.S:-P} \ 228: %{!traditional:-D__stdc__} \ 229: %{!traditional:-D_LONGLONG} \ 230: %{!traditional:-Ds64_t=long\\ long -Du64_t=unsigned\\ long\\ long} \ 231: %{!ansi:-D_POSIX_SOURCE} \ 232: %{!ansi:-D_CONVEX_SOURCE}" 233: 234: #else 235: 236: #define CPP_SPEC \ 237: "%{mc1:-D__convex_c1__} \ 238: %{mc2:-D__convex_c2__} \ 239: %{!mc1:%{!mc2:%{!mc34:%{!mc38:-D__convex_c32__}}}} \ 240: %{mc34:-D__convex_c34__} \ 241: %{mc38:-D__convex_c38__} \ 242: %{fno-builtin:-D__NO_INLINE} \ 243: -D__NO_INLINE_MATH -D__NO_INLINE_STDLIB \ 244: -D_CONVEX_FLOAT_ \ 245: %{.S:-P} \ 246: %{!traditional:-D__stdc__} \ 247: %{!traditional:-D_LONGLONG} \ 248: %{!traditional:-Ds64_t=long\\ long -Du64_t=unsigned\\ long\\ long} \ 249: %{!ansi:-D_POSIX_SOURCE} \ 250: %{!ansi:-D_CONVEX_SOURCE}" 251: 252: #endif 253: 254: #define LIB_SPEC \ 255: "%{mc1:-lC1%{traditional:_old}%{p:_p}%{pg:_p}} \ 256: %{mc2:-lC2%{traditional:_old}%{p:_p}%{pg:_p}} \ 257: %{!mc1:%{!mc2:%{!mc34:%{!mc38:-lC2%{traditional:_old}%{p:_p}%{pg:_p}}}}} \ 258: %{mc34:-lC2%{traditional:_old}%{p:_p}%{pg:_p}} \ 259: %{mc38:-lC2%{traditional:_old}%{p:_p}%{pg:_p}} \ 260: -lc%{traditional:_old}%{p:_p}%{pg:_p}" 261: 262: #endif 263: 264: #if TARGET_DEFAULT & 010 265: 266: /* C34 default */ 267: 268: #if _IEEE_FLOAT_ 269: 270: #define CPP_SPEC \ 271: "%{mc1:-D__convex_c1__} \ 272: %{mc2:-D__convex_c2__} \ 273: %{mc32:-D__convex_c32__} \ 274: %{!mc1:%{!mc2:%{!mc32:%{!mc38:-D__convex_c34__}}}} \ 275: %{mc38:-D__convex_c38__} \ 276: %{fno-builtin:-D__NO_INLINE} \ 277: -D__NO_INLINE_MATH -D__NO_INLINE_STDLIB \ 278: -D_IEEE_FLOAT_ \ 279: %{.S:-P} \ 280: %{!traditional:-D__stdc__} \ 281: %{!traditional:-D_LONGLONG} \ 282: %{!traditional:-Ds64_t=long\\ long -Du64_t=unsigned\\ long\\ long} \ 283: %{!ansi:-D_POSIX_SOURCE} \ 284: %{!ansi:-D_CONVEX_SOURCE}" 285: 286: #else 287: 288: #define CPP_SPEC \ 289: "%{mc1:-D__convex_c1__} \ 290: %{mc2:-D__convex_c2__} \ 291: %{mc32:-D__convex_c32__} \ 292: %{!mc1:%{!mc2:%{!mc32:%{!mc38:-D__convex_c34__}}}} \ 293: %{mc38:-D__convex_c38__} \ 294: %{fno-builtin:-D__NO_INLINE} \ 295: -D__NO_INLINE_MATH -D__NO_INLINE_STDLIB \ 296: -D_CONVEX_FLOAT_ \ 297: %{.S:-P} \ 298: %{!traditional:-D__stdc__} \ 299: %{!traditional:-D_LONGLONG} \ 300: %{!traditional:-Ds64_t=long\\ long -Du64_t=unsigned\\ long\\ long} \ 301: %{!ansi:-D_POSIX_SOURCE} \ 302: %{!ansi:-D_CONVEX_SOURCE}" 303: 304: #endif 305: 306: #define LIB_SPEC \ 307: "%{mc1:-lC1%{traditional:_old}%{p:_p}%{pg:_p}} \ 308: %{mc2:-lC2%{traditional:_old}%{p:_p}%{pg:_p}} \ 309: %{mc32:-lC2%{traditional:_old}%{p:_p}%{pg:_p}} \ 310: %{!mc1:%{!mc2:%{!mc32:%{!mc38:-lC2%{traditional:_old}%{p:_p}%{pg:_p}}}}} \ 311: %{mc38:-lC2%{traditional:_old}%{p:_p}%{pg:_p}} \ 312: -lc%{traditional:_old}%{p:_p}%{pg:_p}" 313: 314: #endif 315: 316: #if TARGET_DEFAULT & 020 317: 318: /* C38 default */ 319: 320: #if _IEEE_FLOAT_ 321: 322: #define CPP_SPEC \ 323: "%{mc1:-D__convex_c1__} \ 324: %{mc2:-D__convex_c2__} \ 325: %{mc32:-D__convex_c32__} \ 326: %{mc34:-D__convex_c34__} \ 327: %{fno-builtin:-D__NO_INLINE} \ 328: -D__NO_INLINE_MATH -D__NO_INLINE_STDLIB \ 329: -D_IEEE_FLOAT_ \ 330: %{!mc1:%{!mc2:%{!mc32:%{!mc34:-D__convex_c38__}}}} \ 331: %{.S:-P} \ 332: %{!traditional:-D__stdc__} \ 333: %{!traditional:-D_LONGLONG} \ 334: %{!traditional:-Ds64_t=long\\ long -Du64_t=unsigned\\ long\\ long} \ 335: %{!ansi:-D_POSIX_SOURCE} \ 336: %{!ansi:-D_CONVEX_SOURCE}" 337: 338: #else 339: 340: #define CPP_SPEC \ 341: "%{mc1:-D__convex_c1__} \ 342: %{mc2:-D__convex_c2__} \ 343: %{mc32:-D__convex_c32__} \ 344: %{mc34:-D__convex_c34__} \ 345: %{fno-builtin:-D__NO_INLINE} \ 346: -D__NO_INLINE_MATH -D__NO_INLINE_STDLIB \ 347: -D_CONVEX_FLOAT_ \ 348: %{!mc1:%{!mc2:%{!mc32:%{!mc34:-D__convex_c38__}}}} \ 349: %{.S:-P} \ 350: %{!traditional:-D__stdc__} \ 351: %{!traditional:-D_LONGLONG} \ 352: %{!traditional:-Ds64_t=long\\ long -Du64_t=unsigned\\ long\\ long} \ 353: %{!ansi:-D_POSIX_SOURCE} \ 354: %{!ansi:-D_CONVEX_SOURCE}" 355: 356: #endif 357: 358: #define LIB_SPEC \ 359: "%{mc1:-lC1%{traditional:_old}%{p:_p}%{pg:_p}} \ 360: %{mc2:-lC2%{traditional:_old}%{p:_p}%{pg:_p}} \ 361: %{mc32:-lC2%{traditional:_old}%{p:_p}%{pg:_p}} \ 362: %{mc34:-lC2%{traditional:_old}%{p:_p}%{pg:_p}} \ 363: %{!mc1:%{!mc2:%{!mc32:%{!mc34:-lC2%{traditional:_old}%{p:_p}%{pg:_p}}}}} \ 364: -lc%{traditional:_old}%{p:_p}%{pg:_p}" 365: 366: #endif 367: 368: #if _IEEE_FLOAT_ 369: 370: /* ieee default */ 371: 372: #define ASM_SPEC "-fi" 373: 374: #define LINK_SPEC \ 375: "-E%{traditional:no}posix \ 376: -X \ 377: %{F} %{M*} %{y*} \ 378: -fi \ 379: -A__iob=___ap$iob \ 380: -A_use_libc_sema=___ap$use_libc_sema \ 381: %{traditional:-A___gcc_cleanup=__cleanup} \ 382: %{!traditional:-A___gcc_cleanup=___ap$do_registered_functions} \ 383: -L/usr/lib" 384: 385: #define STARTFILE_SPEC \ 386: "%{!pg:%{!p:/usr/lib/crt/crt0.o}} \ 387: %{!pg:%{p:/usr/lib/crt/mcrt0.o}} \ 388: %{pg:/usr/lib/crt/gcrt0.o} \ 389: /usr/lib/crt/fpmode_i.o" 390: 391: #else 392: 393: /* native default */ 394: 395: #define ASM_SPEC "-fn" 396: 397: #define LINK_SPEC \ 398: "-E%{traditional:no}posix \ 399: -X \ 400: %{F} %{M*} %{y*} \ 401: -fn \ 402: -A__iob=___ap$iob \ 403: -A_use_libc_sema=___ap$use_libc_sema \ 404: %{traditional:-A___gcc_cleanup=__cleanup} \ 405: %{!traditional:-A___gcc_cleanup=___ap$do_registered_functions} \ 406: -L/usr/lib" 407: 408: #define STARTFILE_SPEC \ 409: "%{!pg:%{!p:/usr/lib/crt/crt0.o}} \ 410: %{!pg:%{p:/usr/lib/crt/mcrt0.o}} \ 411: %{pg:/usr/lib/crt/gcrt0.o}" 412: 413: #endif 414: 415: /* Use /path/libgcc.a instead of -lgcc, makes bootstrap work more smoothly. */ 416: 417: #define LINK_LIBGCC_SPECIAL_1 418: 419: /* Allow $ in identifiers. */ 420: 421: #define DOLLARS_IN_IDENTIFIERS 2 422: 423: /* Since IEEE support was added to gcc, most things seem to like it 424: better if we disable exceptions and check afterward for infinity. */ 425: 426: #if __convex__ 427: #if _IEEE_FLOAT_ 428: #define REAL_VALUE_ISNAN(x) 0 429: #define REAL_VALUE_ISINF(x) ((*(short *) &(x) & 0x7ff0) == 0x7ff0) 430: #else 431: #define REAL_VALUE_ISNAN(x) 0 432: #define REAL_VALUE_ISINF(x) ((*(short *) &(x) & 0xfff0) == 0x8000) 433: #endif 434: #endif 435: 436: /* Target machine storage layout */ 437: 438: /* Define this if most significant bit is lowest numbered 439: in instructions that operate on numbered bit-fields. */ 440: #define BITS_BIG_ENDIAN 1 441: 442: /* Define this if most significant byte of a word is the lowest numbered. */ 443: #define BYTES_BIG_ENDIAN 1 444: 445: /* Define this if most significant word of a multiword number is numbered. */ 446: #define WORDS_BIG_ENDIAN 1 447: 448: /* Number of bits in an addressable storage unit */ 449: #define BITS_PER_UNIT 8 450: 451: /* Width in bits of a "word", which is the contents of a machine register. 452: Note that this is not necessarily the width of data type `int'; 453: if using 16-bit ints on a 68000, this would still be 32. 454: But on a machine with 16-bit registers, this would be 16. */ 455: #define BITS_PER_WORD 64 456: 457: /* Width of a word, in units (bytes). */ 458: #define UNITS_PER_WORD 8 459: 460: /* Width in bits of a pointer. 461: See also the macro `Pmode' defined below. */ 462: #define POINTER_SIZE 32 463: 464: /* Allocation boundary (in *bits*) for storing arguments in argument list. */ 465: #define PARM_BOUNDARY 32 466: 467: /* Boundary (in *bits*) on which stack pointer should be aligned. */ 468: #define STACK_BOUNDARY 64 469: 470: /* Allocation boundary (in *bits*) for the code of a function. */ 471: #define FUNCTION_BOUNDARY 16 472: 473: /* Alignment of field after `int : 0' in a structure. */ 474: #define EMPTY_FIELD_BOUNDARY 32 475: 476: /* Every structure's size must be a multiple of this. */ 477: #define STRUCTURE_SIZE_BOUNDARY 8 478: 479: /* A bitfield declared as `int' forces `int' alignment for the struct. */ 480: #define PCC_BITFIELD_TYPE_MATTERS 1 481: 482: /* No data type wants to be aligned rounder than this. */ 483: /* beware of doubles in structs -- 64 is incompatible with cc */ 484: #define BIGGEST_ALIGNMENT 32 485: 486: /* Set this nonzero if move instructions will actually fail to work 487: when given unaligned data. */ 488: #define STRICT_ALIGNMENT 0 489: 490: /* Define sizes of basic C types to conform to ordinary usage -- these 491: types depend on BITS_PER_WORD otherwise. */ 492: #define CHAR_TYPE_SIZE 8 493: #define SHORT_TYPE_SIZE 16 494: #define INT_TYPE_SIZE 32 495: #define LONG_TYPE_SIZE (TARGET_LONG64 ? 64 : 32) 496: #define LONG_LONG_TYPE_SIZE 64 497: #define FLOAT_TYPE_SIZE 32 498: #define DOUBLE_TYPE_SIZE 64 499: #define LONG_DOUBLE_TYPE_SIZE 64 1.1.1.2 root 500: /* This prevents cexp.c from depending on LONG_TYPE_SIZE. */ 501: #define MAX_LONG_TYPE_SIZE 64 1.1 root 502: 503: /* Declare the standard types used by builtins to match convex stddef.h -- 504: with int rather than long. */ 505: 506: #define SIZE_TYPE "unsigned int" 507: #define PTRDIFF_TYPE "int" 508: 509: /* Standard register usage. */ 510: 511: /* Number of actual hardware registers. 512: The hardware registers are assigned numbers for the compiler 513: from 0 to just below FIRST_PSEUDO_REGISTER. 514: All registers that the compiler knows about must be given numbers, 515: even those that are not normally considered general registers. */ 516: #define FIRST_PSEUDO_REGISTER 16 517: 518: /* 1 for registers that have pervasive standard uses 519: and are not available for the register allocator. 520: For Convex, these are AP, FP, and SP. */ 521: #define FIXED_REGISTERS \ 522: { 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 1 } 523: 524: /* 1 for registers not available across function calls. 525: These must include the FIXED_REGISTERS and also any 526: registers that can be used without being saved. 527: The latter must include the registers where values are returned 528: and the register where structure-value addresses are passed. 529: Aside from that, you can include as many other registers as you like. */ 530: #define CALL_USED_REGISTERS \ 531: { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 } 532: 533: /* List the order in which to allocate registers. Each register must be 534: listed once, even those in FIXED_REGISTERS. 535: For Convex, put S0 (the return register) last. */ 536: #define REG_ALLOC_ORDER \ 537: { 1, 2, 3, 4, 5, 6, 7, 9, 10, 11, 12, 13, 0, 8, 14, 15 } 538: 539: /* Return number of consecutive hard regs needed starting at reg REGNO 540: to hold something of mode MODE. 541: This is ordinarily the length in words of a value of mode MODE 542: but can be less for certain modes in special long registers. */ 543: #define HARD_REGNO_NREGS(REGNO, MODE) \ 544: ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD) 545: 546: /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE. 547: On Convex, S registers can hold any type, A registers any nonfloat. */ 548: #define HARD_REGNO_MODE_OK(REGNO, MODE) \ 549: (S_REGNO_P (REGNO) \ 550: || (GET_MODE_SIZE (MODE) <= 4 && (MODE) != SFmode)) 551: 552: /* Value is 1 if it is a good idea to tie two pseudo registers 553: when one has mode MODE1 and one has mode MODE2. 554: If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2, 555: for any hard reg, then this must be 0 for correct output. */ 556: #define MODES_TIEABLE_P(MODE1, MODE2) \ 557: ((GET_MODE_SIZE (MODE1) <= 4 && (MODE1) != SFmode) \ 558: == (GET_MODE_SIZE (MODE2) <= 4 && (MODE2) != SFmode)) 559: 560: /* Specify the registers used for certain standard purposes. 561: The values of these macros are register numbers. */ 562: 563: #define S0_REGNUM 0 564: #define A0_REGNUM 8 565: 566: /* Register to use for pushing function arguments. */ 567: #define STACK_POINTER_REGNUM A0_REGNUM 568: 569: /* Base register for access to local variables of the function. */ 570: #define FRAME_POINTER_REGNUM (A0_REGNUM + 7) 571: 572: /* Value should be nonzero if functions must have frame pointers. 573: Zero means the frame pointer need not be set up (and parms 574: may be accessed via the stack pointer) in functions that seem suitable. 575: This is computed in `reload', in reload1.c. */ 576: #define FRAME_POINTER_REQUIRED 1 577: 578: /* Base register for access to arguments of the function. */ 579: #define ARG_POINTER_REGNUM (A0_REGNUM + 6) 580: 581: /* Register in which static-chain is passed to a function. 582: Use S0, not an A reg, because this rare use would otherwise prevent 583: an A reg from being available to global-alloc across calls. */ 584: #define STATIC_CHAIN_REGNUM S0_REGNUM 585: 586: /* Register in which address to store a structure value 587: is passed to a function. */ 588: #define STRUCT_VALUE_REGNUM (A0_REGNUM + 1) 589: 590: /* Define the classes of registers for register constraints in the 591: machine description. Also define ranges of constants. 592: 593: One of the classes must always be named ALL_REGS and include all hard regs. 594: If there is more than one class, another class must be named NO_REGS 595: and contain no registers. 596: 597: The name GENERAL_REGS must be the name of a class (or an alias for 598: another name such as ALL_REGS). This is the class of registers 599: that is allowed by "g" or "r" in a register constraint. 600: Also, registers outside this class are allocated only when 601: instructions express preferences for them. 602: 603: The classes must be numbered in nondecreasing order; that is, 604: a larger-numbered class must never be contained completely 605: in a smaller-numbered class. 606: 607: For any two classes, it is very desirable that there be another 608: class that represents their union. */ 609: 610: /* Convex has classes A (address) and S (scalar). 611: A is further divided into SP_REGS (stack pointer) and INDEX_REGS. 612: SI_REGS is S_REGS + INDEX_REGS -- all the regs except SP. */ 613: 614: enum reg_class { 615: NO_REGS, S_REGS, INDEX_REGS, SP_REGS, A_REGS, SI_REGS, 616: ALL_REGS, LIM_REG_CLASSES 617: }; 618: 619: #define N_REG_CLASSES (int) LIM_REG_CLASSES 620: 621: /* Since GENERAL_REGS is the same class as ALL_REGS, 622: don't give it a different class number; just make it an alias. */ 623: 624: #define GENERAL_REGS ALL_REGS 625: 626: /* Give names of register classes as strings for dump file. */ 627: 628: #define REG_CLASS_NAMES \ 629: {"NO_REGS", "S_REGS", "INDEX_REGS", "SP_REGS", "A_REGS", "SI_REGS", \ 630: "ALL_REGS" } 631: 632: /* Define which registers fit in which classes. 633: This is an initializer for a vector of HARD_REG_SET 634: of length N_REG_CLASSES. */ 635: 636: #define REG_CLASS_CONTENTS \ 637: { 0, 0x00ff, 0xfe00, 0x0100, 0xff00, 0xfeff, 0xffff } 638: 639: /* The same information, inverted: 640: Return the class number of the smallest class containing 641: reg number REGNO. This could be a conditional expression 642: or could index an array. */ 643: 644: #define REGNO_REG_CLASS(REGNO) (regno_reg_class[REGNO]) 645: 646: #define S_REGNO_P(REGNO) (((REGNO) - S0_REGNUM) < (unsigned) 8) 647: #define A_REGNO_P(REGNO) (((REGNO) - A0_REGNUM) < (unsigned) 8) 648: 649: #define S_REG_P(X) (REG_P (X) && S_REGNO_P (REGNO (X))) 650: #define A_REG_P(X) (REG_P (X) && A_REGNO_P (REGNO (X))) 651: 652: /* The class value for index registers, and the one for base regs. */ 653: 654: #define INDEX_REG_CLASS INDEX_REGS 655: #define BASE_REG_CLASS INDEX_REGS 656: 657: /* Get reg_class from a letter such as appears in the machine description. */ 658: /* a => A_REGS 659: d => S_REGS ('s' is taken) 660: A => INDEX_REGS (i.e., A_REGS except sp) */ 661: 662: #define REG_CLASS_FROM_LETTER(C) \ 663: reg_class_from_letter[(unsigned char) (C)] 664: 665: /* The letters I, J, K, L and M in a register constraint string 666: can be used to stand for particular ranges of immediate operands. 667: This macro defines what the ranges are. 668: C is the letter, and VALUE is a constant value. 669: Return 1 if VALUE is in the range specified by C. */ 670: /* 'I' is used to pass any CONST_INT and reject any CONST_DOUBLE. 671: CONST_DOUBLE integers are handled by G and H constraint chars. */ 672: 673: #define CONST_OK_FOR_LETTER_P(VALUE, C) 1 674: 675: /* Similar, but for floating constants, and defining letters G and H. 676: Here VALUE is the CONST_DOUBLE rtx itself. */ 677: /* Convex uses G, H: 678: value usable in ld.d (low word 0) or ld.l (high word all sign) */ 679: 680: #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \ 681: (((C) == 'G' && LD_D_P (VALUE)) || \ 682: ((C) == 'H' && LD_L_P (VALUE)) || \ 683: 0) 684: 685: #define LD_D_P(X) (const_double_low_int (X) == 0) 686: 687: #define LD_L_P(X) (const_double_low_int (X) >= 0 \ 688: ? const_double_high_int (X) == 0 \ 689: : const_double_high_int (X) == -1) 690: 691: /* Optional extra constraints for this machine. 692: For Convex, 'Q' means that OP is a volatile MEM. 693: For volatile scalars, we use instructions that bypass the data cache. */ 694: 695: #define EXTRA_CONSTRAINT(OP, C) \ 696: ((C) == 'Q' ? (GET_CODE (OP) == MEM && MEM_VOLATILE_P (OP) \ 697: && ! TARGET_C1 && TARGET_VOLATILE_NOCACHE) \ 698: : 0) 699: 700: /* Given an rtx X being reloaded into a reg required to be 701: in class CLASS, return the class of reg to actually use. 702: In general this is just CLASS; but on some machines 703: in some cases it is preferable to use a more restrictive class. */ 704: 705: /* Put 2-word constants that can't be immediate operands into memory. */ 706: 707: #define PREFERRED_RELOAD_CLASS(X,CLASS) \ 708: ((GET_CODE (X) != CONST_DOUBLE \ 709: || GET_MODE (X) == SFmode \ 710: || LD_L_P (X) || LD_D_P (X)) ? (CLASS) : NO_REGS) 711: 712: /* Return the maximum number of consecutive registers 713: needed to represent mode MODE in a register of class CLASS. */ 714: #define CLASS_MAX_NREGS(CLASS, MODE) ((GET_MODE_SIZE (MODE) + 7) / 8) 715: 716: /* Stack layout; function entry, exit and calling. */ 717: 718: /* Define this if pushing a word on the stack 719: makes the stack pointer a smaller address. */ 720: #define STACK_GROWS_DOWNWARD 721: 722: /* Define this if the nominal address of the stack frame 723: is at the high-address end of the local variables; 724: that is, each additional local variable allocated 725: goes at a more negative offset in the frame. */ 726: #define FRAME_GROWS_DOWNWARD 727: 728: /* Define this if should default to -fcaller-saves. */ 729: #define DEFAULT_CALLER_SAVES 730: 731: /* Offset within stack frame to start allocating local variables at. 732: If FRAME_GROWS_DOWNWARD, this is the offset to the END of the 733: first local allocated. Otherwise, it is the offset to the BEGINNING 734: of the first local allocated. */ 735: #define STARTING_FRAME_OFFSET 0 736: 737: /* If we generate an insn to push BYTES bytes, 738: this says how many the stack pointer really advances by. */ 739: #define PUSH_ROUNDING(BYTES) (((BYTES) + 3) & ~3) 740: 741: /* Offset of first parameter from the argument pointer register value. */ 742: #define FIRST_PARM_OFFSET(FNDECL) 0 743: 744: /* Value is the number of bytes of arguments automatically 745: popped when returning from a subroutine call. 746: FUNTYPE is the data type of the function (as a tree), 747: or for a library call it is an identifier node for the subroutine name. 748: SIZE is the number of bytes of arguments passed on the stack. */ 749: 750: #define RETURN_POPS_ARGS(FUNTYPE, SIZE) (SIZE) 751: 752: /* Define how to find the value returned by a function. 753: VALTYPE is the data type of the value (as a tree). 754: If the precise function being called is known, FUNC is its FUNCTION_DECL; 755: otherwise, FUNC is 0. */ 756: 757: #define FUNCTION_VALUE(VALTYPE, FUNC) \ 758: gen_rtx (REG, TYPE_MODE (VALTYPE), S0_REGNUM) 759: 760: /* Define how to find the value returned by a library function 761: assuming the value has mode MODE. */ 762: 763: #define LIBCALL_VALUE(MODE) gen_rtx (REG, MODE, S0_REGNUM) 764: 765: /* Define this if PCC uses the nonreentrant convention for returning 766: structure and union values. */ 767: 768: #define PCC_STATIC_STRUCT_RETURN 769: 770: /* 1 if N is a possible register number for a function value. 771: On the Convex, S0 is the only register thus used. */ 772: 773: #define FUNCTION_VALUE_REGNO_P(N) ((N) == S0_REGNUM) 774: 775: /* 1 if N is a possible register number for function argument passing. */ 776: 777: #define FUNCTION_ARG_REGNO_P(N) 0 778: 779: /* Define a data type for recording info about an argument list 780: during the scan of that argument list. This data type should 781: hold all necessary information about the function itself 782: and about the args processed so far, enough to enable macros 783: such as FUNCTION_ARG to determine where the next arg should go. */ 784: /* On convex, simply count the arguments in case TARGET_ARGCOUNT is set. */ 785: 786: #define CUMULATIVE_ARGS int 787: 788: /* Initialize a variable CUM of type CUMULATIVE_ARGS 789: for a call to a function whose data type is FNTYPE. 790: For a library call, FNTYPE is 0. */ 791: 792: #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME) \ 793: ((CUM) = 0) 794: 795: /* Update the data in CUM to advance over an argument 796: of mode MODE and data type TYPE. 797: (TYPE is null for libcalls where that information may not be available.) */ 798: 799: #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \ 800: ((CUM) += 1) 801: 802: /* Define where to put the arguments to a function. 803: Value is zero to push the argument on the stack, 804: or a hard register in which to store the argument. 805: 806: MODE is the argument's machine mode. 807: TYPE is the data type of the argument (as a tree). 808: This is null for libcalls where that information may 809: not be available. 810: CUM is a variable of type CUMULATIVE_ARGS which gives info about 811: the preceding args and about the function being called. 812: NAMED is nonzero if this argument is a named parameter 813: (otherwise it is an extra parameter matching an ellipsis). 814: 815: Convex: all args go on the stack. But return the arg count 816: as the "next arg register" to be passed to gen_call. */ 817: 818: #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \ 819: ((MODE) == VOIDmode ? gen_rtx (CONST_INT, VOIDmode, (CUM)) : 0) 820: 821: /* This macro generates the assembly code for function entry. 822: FILE is a stdio stream to output the code to. 823: SIZE is an int: how many units of temporary storage to allocate. 824: Refer to the array `regs_ever_live' to determine which registers 825: to save; `regs_ever_live[I]' is nonzero if register number I 826: is ever used in the function. This macro is responsible for 827: knowing which registers should not be saved even if used. */ 828: 829: #define FUNCTION_PROLOGUE(FILE, SIZE) \ 830: { \ 831: int size = ((SIZE) + 7) & -8; \ 832: if (size != 0) \ 833: fprintf (FILE, "\tsub.w #%d,sp\n", size); \ 834: } 835: 836: /* This macro generates the assembly code for function exit, 837: on machines that need it. If FUNCTION_EPILOGUE is not defined 838: then individual return instructions are generated for each 839: return statement. Args are same as for FUNCTION_PROLOGUE. */ 840: 841: #define FUNCTION_EPILOGUE(FILE, SIZE) \ 842: { \ 843: /* Follow function with a zero to stop c34 icache prefetching. */ \ 844: fprintf (FILE, "\tds.h 0\n"); \ 845: } 846: 847: /* Output assembler code for a block containing the constant parts 848: of a trampoline, leaving space for the variable parts. */ 849: 850: /* On convex, the code for a trampoline is 851: ld.w #<link>,s0 852: jmp <func> */ 853: 854: #define TRAMPOLINE_TEMPLATE(FILE) \ 855: { \ 856: fprintf (FILE, "\tld.w #69696969,s0\n"); \ 857: fprintf (FILE, "\tjmp 52525252\n"); \ 858: } 859: 860: /* Length in units of the trampoline for entering a nested function. */ 861: 862: #define TRAMPOLINE_SIZE 12 863: 864: /* Emit RTL insns to initialize the variable parts of a trampoline. 865: FNADDR is an RTX for the address of the function's pure code. 866: CXT is an RTX for the static chain value for the function. */ 867: 868: #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \ 869: { \ 870: emit_move_insn (gen_rtx (MEM, Pmode, plus_constant (TRAMP, 2)), CXT); \ 871: emit_move_insn (gen_rtx (MEM, Pmode, plus_constant (TRAMP, 8)), FNADDR); \ 872: emit_call_insn (gen_call_pop (gen_rtx (MEM, QImode, \ 873: gen_rtx (SYMBOL_REF, Pmode, \ 874: "__enable_execute_stack")), \ 875: const0_rtx, const0_rtx, const0_rtx)); \ 876: } 877: 878: /* Output assembler code to FILE to increment profiler label # LABELNO 879: for profiling a function entry. */ 880: 881: #define FUNCTION_PROFILER(FILE, LABELNO) \ 882: fprintf (FILE, "\tldea LP%d,a1\n\tcallq mcount\n", (LABELNO)); 883: 884: /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function, 885: the stack pointer does not matter. The value is tested only in 886: functions that have frame pointers. 887: No definition is equivalent to always zero. */ 888: 889: #define EXIT_IGNORE_STACK 1 890: 891: /* Store in the variable DEPTH the initial difference between the 892: frame pointer reg contents and the stack pointer reg contents, 893: as of the start of the function body. This depends on the layout 894: of the fixed parts of the stack frame and on how registers are saved. */ 895: #define INITIAL_FRAME_POINTER_OFFSET(DEPTH) \ 896: { (DEPTH) = (get_frame_size () + 7) & -8; } 897: 898: /* Addressing modes, and classification of registers for them. */ 899: 900: /* #define HAVE_POST_INCREMENT */ 901: /* #define HAVE_POST_DECREMENT */ 902: 903: /* #define HAVE_PRE_DECREMENT */ 904: /* #define HAVE_PRE_INCREMENT */ 905: 906: /* Macros to check register numbers against specific register classes. */ 907: 908: /* These assume that REGNO is a hard or pseudo reg number. 909: They give nonzero only if REGNO is a hard reg of the suitable class 910: or a pseudo reg currently allocated to a suitable hard reg. 911: Since they use reg_renumber, they are safe only once reg_renumber 912: has been allocated, which happens in local-alloc.c. */ 913: 914: #define REGNO_OK_FOR_INDEX_P(regno) \ 915: ((regno) <= LAST_VIRTUAL_REGISTER \ 916: ? regno_ok_for_index_p[regno] \ 917: : regno_ok_for_index_p[reg_renumber[regno]]) 918: 919: #define REGNO_OK_FOR_BASE_P(regno) REGNO_OK_FOR_INDEX_P (regno) 920: 921: /* Maximum number of registers that can appear in a valid memory address. */ 922: 923: #define MAX_REGS_PER_ADDRESS 1 924: 925: /* 1 if X is an rtx for a constant that is a valid address. */ 926: 927: #define CONSTANT_ADDRESS_P(X) \ 928: (GET_CODE (X) == LABEL_REF || GET_CODE (X) == SYMBOL_REF \ 929: || GET_CODE (X) == CONST_INT || GET_CODE (X) == CONST \ 930: || GET_CODE (X) == HIGH) 931: 932: /* Nonzero if the constant value X is a legitimate general operand. 933: It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE. */ 934: 935: /* For convex, bounce 2-word constants that can't be immediate operands. */ 936: 937: #define LEGITIMATE_CONSTANT_P(X) \ 938: (GET_CODE (X) != CONST_DOUBLE \ 939: || GET_MODE (X) == SFmode \ 940: || LD_L_P (X) || LD_D_P (X)) 941: 942: /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx 943: and check its validity for a certain class. 944: We have two alternate definitions for each of them. 945: The usual definition accepts all pseudo regs; the other rejects 946: them unless they have been allocated suitable hard regs. 947: The symbol REG_OK_STRICT causes the latter definition to be used. 948: 949: Most source files want to accept pseudo regs in the hope that 950: they will get allocated to the class that the insn wants them to be in. 951: Source files for reload pass need to be strict. 952: After reload, it makes no difference, since pseudo regs have 953: been eliminated by then. */ 954: 955: #ifndef REG_OK_STRICT 956: 957: /* Nonzero if X is a hard reg that can be used as an index 958: or if it is a pseudo reg. */ 959: #define REG_OK_FOR_INDEX_P(X) \ 960: (REGNO (X) > LAST_VIRTUAL_REGISTER || regno_ok_for_index_p[REGNO (X)]) 961: 962: /* Nonzero if X is a hard reg that can be used as a base reg 963: or if it is a pseudo reg. */ 964: #define REG_OK_FOR_BASE_P(X) REG_OK_FOR_INDEX_P (X) 965: 966: #else 967: 968: /* Nonzero if X is a hard reg that can be used as an index. */ 969: #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X)) 970: 971: /* Nonzero if X is a hard reg that can be used as a base reg. */ 972: #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X)) 973: 974: #endif 975: 976: /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression 977: that is a valid memory address for an instruction. 978: The MODE argument is the machine mode for the MEM expression 979: that wants to use this address. 980: 981: For Convex, valid addresses are 982: indirectable or (MEM indirectable) 983: where indirectable is 984: const, reg, (PLUS reg const) 985: 986: We don't use indirection since with insn scheduling, load + indexing 987: is better. */ 988: 989: /* 1 if X is an address that we could indirect through. */ 990: #define INDIRECTABLE_ADDRESS_P(X) \ 991: (CONSTANT_ADDRESS_P (X) \ 992: || (GET_CODE (X) == REG && REG_OK_FOR_BASE_P (X)) \ 993: || (GET_CODE (X) == PLUS \ 994: && GET_CODE (XEXP (X, 0)) == REG \ 995: && REG_OK_FOR_BASE_P (XEXP (X, 0)) \ 996: && CONSTANT_ADDRESS_P (XEXP (X, 1))) \ 997: || (GET_CODE (X) == PLUS \ 998: && GET_CODE (XEXP (X, 1)) == REG \ 999: && REG_OK_FOR_BASE_P (XEXP (X, 1)) \ 1000: && CONSTANT_ADDRESS_P (XEXP (X, 0)))) 1001: 1002: /* Go to ADDR if X is a valid address. */ 1003: #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \ 1004: { register rtx xfoob = (X); \ 1005: if (INDIRECTABLE_ADDRESS_P (xfoob)) \ 1006: goto ADDR; \ 1007: if (GET_CODE (xfoob) == PRE_DEC && XEXP (xfoob, 0) == stack_pointer_rtx) \ 1008: goto ADDR; \ 1009: } 1010: 1011: /* Try machine-dependent ways of modifying an illegitimate address 1012: to be legitimate. If we find one, return the new, valid address. 1013: This macro is used in only one place: `memory_address' in explow.c. 1014: 1015: OLDX is the address as it was before break_out_memory_refs was called. 1016: In some cases it is useful to look at this to decide what needs to be done. 1017: 1018: MODE and WIN are passed so that this macro can use 1019: GO_IF_LEGITIMATE_ADDRESS. 1020: 1021: It is always safe for this macro to do nothing. It exists to recognize 1022: opportunities to optimize the output. 1023: 1024: For Convex, nothing needs to be done. */ 1025: 1026: #define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) {} 1027: 1028: /* Go to LABEL if ADDR (a legitimate address expression) 1029: has an effect that depends on the machine mode it is used for. */ 1030: 1031: #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) {} 1032: 1033: /* Specify the machine mode that this machine uses 1034: for the index in the tablejump instruction. */ 1035: #define CASE_VECTOR_MODE SImode 1036: 1037: /* Define this if the case instruction expects the table 1038: to contain offsets from the address of the table. 1039: Do not define this if the table should contain absolute addresses. */ 1040: /* #define CASE_VECTOR_PC_RELATIVE */ 1041: 1042: /* Define this if the case instruction drops through after the table 1043: when the index is out of range. Don't define it if the case insn 1044: jumps to the default label instead. */ 1045: /* #define CASE_DROPS_THROUGH */ 1046: 1047: /* Specify the tree operation to be used to convert reals to integers. */ 1048: #define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR 1049: 1050: /* This is the kind of divide that is easiest to do in the general case. */ 1051: #define EASY_DIV_EXPR TRUNC_DIV_EXPR 1052: 1053: /* Define this as 1 if `char' should by default be signed; else as 0. */ 1054: #define DEFAULT_SIGNED_CHAR 1 1055: 1056: /* This flag, if defined, says the same insns that convert to a signed fixnum 1057: also convert validly to an unsigned one. */ 1058: #define FIXUNS_TRUNC_LIKE_FIX_TRUNC 1059: 1060: /* Max number of bytes we can move from memory to memory 1061: in one reasonably fast instruction. */ 1062: #define MOVE_MAX 8 1063: 1064: /* Define this if zero-extension is slow (more than one real instruction). */ 1065: /* #define SLOW_ZERO_EXTEND */ 1066: 1067: /* Nonzero if access to memory by bytes is slow and undesirable. */ 1068: #define SLOW_BYTE_ACCESS (! TARGET_C2) 1069: 1070: /* Define if shifts truncate the shift count 1071: which implies one can omit a sign-extension or zero-extension 1072: of a shift count. */ 1073: /* #define SHIFT_COUNT_TRUNCATED */ 1074: 1075: /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits 1076: is done just by pretending it is already truncated. */ 1077: #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1 1078: 1079: /* On Convex, it is as good to call a constant function address as to 1080: call an address kept in a register. */ 1081: #define NO_FUNCTION_CSE 1082: 1083: /* When a prototype says `char' or `short', really pass an `int'. */ 1084: #define PROMOTE_PROTOTYPES 1085: 1086: /* Specify the machine mode that pointers have. 1087: After generation of rtl, the compiler makes no further distinction 1088: between pointers and any other objects of this machine mode. */ 1089: #define Pmode SImode 1090: 1091: /* A function address in a call instruction 1092: is a byte address (for indexing purposes) 1093: so give the MEM rtx a byte's mode. */ 1094: #define FUNCTION_MODE QImode 1095: 1096: /* Compute the cost of computing a constant rtl expression RTX 1097: whose rtx-code is CODE. The body of this macro is a portion 1098: of a switch statement. If the code is computed here, 1099: return it with a return statement. Otherwise, break from the switch. */ 1100: 1101: #define CONST_COSTS(RTX,CODE,OUTER_CODE) \ 1102: case CONST: \ 1103: case LABEL_REF: \ 1104: case SYMBOL_REF: \ 1105: case CONST_INT: \ 1106: case CONST_DOUBLE: \ 1107: return 0; 1108: 1109: /* Provide the costs of a rtl expression. This is in the body of a 1110: switch on CODE. */ 1111: 1112: #define RTX_COSTS(RTX,CODE,OUTER_CODE) \ 1113: case PLUS: \ 1114: if (regno_pointer_flag != 0 \ 1115: && GET_CODE (XEXP (RTX, 0)) == REG \ 1116: && REGNO_POINTER_FLAG (REGNO (XEXP (RTX, 0))) \ 1117: && GET_CODE (XEXP (RTX, 1)) == CONST_INT) \ 1118: return 0; \ 1119: else break; \ 1120: case MULT: \ 1121: return 4 * (char) (0x03060403 >> target_cpu * 8); \ 1122: case ASHIFT: \ 1123: case LSHIFTRT: \ 1124: case ASHIFTRT: \ 1125: return 4 * (char) (0x03010403 >> target_cpu * 8); \ 1126: case MEM: \ 1127: return 5; 1128: 1129: /* Compute the cost of an address. This is meant to approximate the size 1130: and/or execution delay of an insn using that address. If the cost is 1131: approximated by the RTL complexity, including CONST_COSTS above, as 1132: is usually the case for CISC machines, this macro should not be defined. 1133: For aggressively RISCy machines, only one insn format is allowed, so 1134: this macro should be a constant. The value of this macro only matters 1135: for valid addresses. */ 1136: 1137: #define ADDRESS_COST(RTX) 0 1138: 1139: /* Specify the cost of a branch insn; roughly the number of extra insns that 1140: should be added to avoid a branch. */ 1141: 1142: #define BRANCH_COST 0 1143: 1144: /* Adjust the cost of dependences. */ 1145: 1146: #define ADJUST_COST(INSN,LINK,DEP,COST) \ 1147: { \ 1148: /* Antidependencies don't block issue. */ \ 1149: if (REG_NOTE_KIND (LINK) != 0) \ 1150: (COST) = 0; \ 1151: /* C38 situations where delay depends on context */ \ 1152: else if (TARGET_C38 \ 1153: && GET_CODE (PATTERN (INSN)) == SET \ 1154: && GET_CODE (PATTERN (DEP)) == SET) \ 1155: { \ 1156: enum attr_type insn_type = get_attr_type (INSN); \ 1157: enum attr_type dep_type = get_attr_type (DEP); \ 1158: /* index register must be ready one cycle early */ \ 1159: if (insn_type == TYPE_MLDW || insn_type == TYPE_MLDL \ 1160: || (insn_type == TYPE_MST \ 1161: && reg_mentioned_p (SET_DEST (PATTERN (DEP)), \ 1162: SET_SRC (PATTERN (INSN))))) \ 1163: (COST) += 1; \ 1164: /* alu forwarding off alu takes two */ \ 1165: if (dep_type == TYPE_ALU \ 1166: && insn_type != TYPE_ALU \ 1167: && ! (insn_type == TYPE_MST \ 1168: && SET_DEST (PATTERN (DEP)) == SET_SRC (PATTERN (INSN)))) \ 1169: (COST) += 1; \ 1170: } \ 1171: } 1172: 1173: /* Convex uses Vax or IEEE floats. 1174: Follow the host format. */ 1175: #define TARGET_FLOAT_FORMAT HOST_FLOAT_FORMAT 1176: 1177: /* But must prevent real.c from constructing Vax dfloats */ 1178: #define REAL_VALUE_ATOF(X,S) atof (X) 1179: extern double atof(); 1180: 1181: /* Check a `double' value for validity for a particular machine mode. */ 1.1.1.3 ! root 1182: #define CHECK_FLOAT_VALUE(MODE, D, OVERFLOW) \ ! 1183: overflow = check_float_value (MODE, &D, OVERFLOW) 1.1 root 1184: 1185: /* Tell final.c how to eliminate redundant test instructions. */ 1186: 1187: /* Here we define machine-dependent flags and fields in cc_status 1188: (see `conditions.h'). No extra ones are needed for convex. */ 1189: 1190: /* Store in cc_status the expressions 1191: that the condition codes will describe 1192: after execution of an instruction whose pattern is EXP. 1193: Do not alter them if the instruction would not alter the cc's. */ 1194: 1195: #define NOTICE_UPDATE_CC(EXP,INSN) {} 1196: 1197: /* Control the assembler format that we output. */ 1198: 1199: /* Output at beginning of assembler file. */ 1200: 1201: #if _IEEE_FLOAT_ 1202: #define ASM_FILE_START(FILE) fprintf (FILE, ";NO_APP\n.fpmode ieee\n") 1203: #else 1204: #define ASM_FILE_START(FILE) fprintf (FILE, ";NO_APP\n.fpmode native\n") 1205: #endif 1206: 1207: /* Output to assembler file text saying following lines 1208: may contain character constants, extra white space, comments, etc. */ 1209: 1210: #define ASM_APP_ON ";APP\n" 1211: 1212: /* Output to assembler file text saying following lines 1213: no longer contain unusual constructs. */ 1214: 1215: #define ASM_APP_OFF ";NO_APP\n" 1216: 1217: /* Alignment with Convex's assembler goes like this: 1218: .text can be .aligned up to a halfword. 1219: .data and .bss can be .aligned up to a longword. 1220: .lcomm is not supported, explicit declarations in .bss must be used instead. 1221: We get alignment for word and longword .text data by conventionally 1222: using .text 2 for word-aligned data and .text 3 for longword-aligned 1223: data. This requires that the data's size be a multiple of its alignment, 1224: which seems to be always true. */ 1225: 1226: /* Output before read-only data. */ 1227: 1228: #define TEXT_SECTION_ASM_OP (current_section_is_text = 1, ".text") 1229: 1230: /* Output before writable data. */ 1231: 1232: #define DATA_SECTION_ASM_OP (current_section_is_text = 0, ".data") 1233: 1234: /* Output before uninitialized data. */ 1235: 1236: #define BSS_SECTION_ASM_OP (current_section_is_text = 0, ".bss") 1237: 1238: /* Define the .bss section for ASM_OUTPUT_LOCAL to use. */ 1239: 1240: #define EXTRA_SECTIONS in_bss 1241: 1242: #define EXTRA_SECTION_FUNCTIONS \ 1243: void \ 1244: bss_section () \ 1245: { \ 1246: if (in_section != in_bss) \ 1247: { \ 1248: fprintf (asm_out_file, "%s\n", BSS_SECTION_ASM_OP); \ 1249: in_section = in_bss; \ 1250: } \ 1251: } 1252: 1253: /* This is how to output an assembler line 1254: that says to advance the location counter 1255: to a multiple of 2**LOG bytes. */ 1256: 1257: #define ASM_OUTPUT_ALIGN(FILE,LOG) \ 1258: if (current_section_is_text && (LOG) > 1) \ 1259: fprintf (FILE, ".text %d\n", LOG); \ 1260: else if (current_section_is_text) \ 1261: fprintf (FILE, ".text\n.align %d\n", 1 << (LOG)); \ 1262: else \ 1263: fprintf (FILE, ".align %d\n", 1 << (LOG)) 1264: 1265: /* How to refer to registers in assembler output. 1266: This sequence is indexed by compiler's hard-register-number (see above). */ 1267: 1268: #define REGISTER_NAMES \ 1269: { \ 1270: "s0", "s1", "s2", "s3", "s4", "s5", "s6", "s7", \ 1271: "sp", "a1", "a2", "a3", "a4", "a5", "ap", "fp", \ 1272: } 1273: 1274: /* This is BSD, so it wants DBX format. */ 1275: 1276: #define DBX_DEBUGGING_INFO 1277: 1278: /* How to renumber registers for dbx and gdb. */ 1279: 1280: #define DBX_REGISTER_NUMBER(REGNO) (REGNO) 1281: 1282: /* Do not break .stabs pseudos into continuations. */ 1283: 1284: #define DBX_CONTIN_LENGTH 0 1285: 1286: /* This is the char to use for continuation (in case we need to turn 1287: continuation back on). */ 1288: 1289: #define DBX_CONTIN_CHAR '?' 1290: 1291: /* Don't use stab extensions until GDB v4 port is available for convex. */ 1292: 1293: #define DEFAULT_GDB_EXTENSIONS 0 1294: #define DBX_NO_XREFS 1295: 1296: /* This is how to output the definition of a user-level label named NAME, 1297: such as the label on a static function or variable NAME. */ 1298: 1299: #define ASM_OUTPUT_LABEL(FILE,NAME) \ 1300: do { assemble_name (FILE, NAME); fputs (":\n", FILE); } while (0) 1301: 1302: /* This is how to output a command to make the user-level label named NAME 1303: defined for reference from other files. */ 1304: 1305: #define ASM_GLOBALIZE_LABEL(FILE,NAME) \ 1306: do { fputs (".globl ", FILE); assemble_name (FILE, NAME); fputs ("\n", FILE);} while (0) 1307: 1308: /* This is how to output a reference to a user-level label named NAME. */ 1309: 1310: #define ASM_OUTPUT_LABELREF(FILE,NAME) \ 1311: fprintf (FILE, "_%s", NAME) 1312: 1313: /* This is how to output an internal numbered label where 1314: PREFIX is the class of label and NUM is the number within the class. */ 1315: 1316: #define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \ 1317: fprintf (FILE, "%s%d:\n", PREFIX, NUM) 1318: 1319: /* Put case tables in .text 2, where they will be word-aligned */ 1320: 1321: #define ASM_OUTPUT_CASE_LABEL(FILE,PREFIX,NUM,TABLE) \ 1322: ASM_OUTPUT_ALIGN (FILE, 2); \ 1323: ASM_OUTPUT_INTERNAL_LABEL (FILE, PREFIX, NUM) 1324: 1325: #define ASM_OUTPUT_CASE_END(FILE,NUM,TABLE) \ 1326: ASM_OUTPUT_ALIGN (FILE, 1) 1327: 1328: /* This is how to store into the string LABEL 1329: the symbol_ref name of an internal numbered label where 1330: PREFIX is the class of label and NUM is the number within the class. 1331: This is suitable for output with `assemble_name'. */ 1332: 1333: #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \ 1334: sprintf (LABEL, "*%s%d", PREFIX, NUM) 1335: 1336: /* This is how to output an assembler line defining a `double' constant. */ 1337: 1338: #define ASM_OUTPUT_DOUBLE(FILE,VALUE) \ 1339: outfloat (FILE, VALUE, "%.17e", "\tds.d ", "\n") 1340: 1341: /* This is how to output an assembler line defining a `float' constant. */ 1342: 1343: #define ASM_OUTPUT_FLOAT(FILE,VALUE) \ 1344: outfloat (FILE, VALUE, "%.9e", "\tds.s ", "\n") 1345: 1346: /* This is how to output an assembler line defining an `int' constant. */ 1347: 1348: #define ASM_OUTPUT_INT(FILE,VALUE) \ 1349: { \ 1350: fprintf (FILE, "\tds.w "); \ 1351: output_addr_const (FILE, simplify_for_convex (VALUE)); \ 1352: fprintf (FILE, "\n"); \ 1353: } 1354: 1355: /* Likewise for a `long long int' constant. */ 1356: 1357: #define ASM_OUTPUT_DOUBLE_INT(FILE,VALUE) \ 1358: { \ 1359: if (GET_CODE (VALUE) == CONST_DOUBLE) \ 1360: fprintf (FILE, "\tds.w %d,%d\n", \ 1361: const_double_high_int (VALUE), const_double_low_int (VALUE)); \ 1362: else if (GET_CODE (VALUE) == CONST_INT) \ 1363: { \ 1364: int val = INTVAL (VALUE); \ 1365: fprintf (FILE, "\tds.w %d,%d\n", val < 0 ? -1 : 0, val); \ 1366: } \ 1367: else \ 1368: abort (); \ 1369: } 1370: 1371: /* Likewise for `char' and `short' constants. */ 1372: 1373: #define ASM_OUTPUT_SHORT(FILE,VALUE) \ 1374: ( fprintf (FILE, "\tds.h "), \ 1375: output_addr_const (FILE, (VALUE)), \ 1376: fprintf (FILE, "\n")) 1377: 1378: #define ASM_OUTPUT_CHAR(FILE,VALUE) \ 1379: ( fprintf (FILE, "\tds.b "), \ 1380: output_addr_const (FILE, (VALUE)), \ 1381: fprintf (FILE, "\n")) 1382: 1383: /* This is how to output an assembler line for a numeric constant byte. */ 1384: 1385: #define ASM_OUTPUT_BYTE(FILE,VALUE) \ 1386: fprintf (FILE, "\tds.b %#x\n", (VALUE)) 1387: 1388: /* This is how to output a string */ 1389: 1390: #define ASM_OUTPUT_ASCII(FILE,STR,SIZE) do { \ 1391: int i; \ 1392: fprintf ((FILE), "\tds.b \""); \ 1393: for (i = 0; i < (SIZE); i++) { \ 1394: register int c = (STR)[i] & 0377; \ 1395: if (c >= ' ' && c < 0177 && c != '\\' && c != '"') \ 1396: putc (c, (FILE)); \ 1397: else \ 1398: fprintf ((FILE), "\\%03o", c);} \ 1399: fprintf ((FILE), "\"\n");} while (0) 1400: 1401: /* This is how to output an insn to push a register on the stack. 1402: It need not be very fast code. */ 1403: 1404: #define ASM_OUTPUT_REG_PUSH(FILE,REGNO) \ 1405: fprintf (FILE, "\tpsh.%c %s\n", \ 1406: S_REGNO_P (REGNO) ? 'l' : 'w', \ 1407: reg_names[REGNO]) 1408: 1409: /* This is how to output an insn to pop a register from the stack. 1410: It need not be very fast code. */ 1411: 1412: #define ASM_OUTPUT_REG_POP(FILE,REGNO) \ 1413: fprintf (FILE, "\tpop.%c %s\n", \ 1414: S_REGNO_P (REGNO) ? 'l' : 'w', \ 1415: reg_names[REGNO]) 1416: 1417: /* This is how to output an element of a case-vector that is absolute. */ 1418: 1419: #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \ 1420: fprintf (FILE, "\tds.w L%d\n", VALUE) 1421: 1422: /* This is how to output an element of a case-vector that is relative. 1423: (not used on Convex) */ 1424: 1425: #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, VALUE, REL) \ 1426: fprintf (FILE, "\tds.w L%d-L%d\n", VALUE, REL) 1427: 1428: /* This is how to output an assembler line 1429: that says to advance the location counter by SIZE bytes. */ 1430: 1431: #define ASM_OUTPUT_SKIP(FILE,SIZE) \ 1432: fprintf (FILE, "\tds.b %u(0)\n", (SIZE)) 1433: 1434: /* This says how to output an assembler line 1435: to define a global common symbol. */ 1436: 1437: #define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \ 1438: ( fputs (".comm ", (FILE)), \ 1439: assemble_name ((FILE), (NAME)), \ 1440: fprintf ((FILE), ",%u\n", (ROUNDED))) 1441: 1442: /* This says how to output an assembler line 1443: to define a local common symbol. */ 1444: 1445: #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE, ROUNDED) \ 1446: ( bss_section (), \ 1447: assemble_name ((FILE), (NAME)), \ 1448: fprintf ((FILE), ":\tbs.b %u\n", (ROUNDED))) 1449: 1450: /* Store in OUTPUT a string (made with alloca) containing 1451: an assembler-name for a local static variable named NAME. 1452: LABELNO is an integer which is different for each call. */ 1453: 1454: #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \ 1455: ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \ 1456: sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO))) 1457: 1458: /* Output an arg count before function entries. */ 1459: 1460: #define ASM_DECLARE_FUNCTION_NAME(FILE, NAME, DECL) \ 1461: asm_declare_function_name (FILE, NAME, DECL) 1462: 1463: /* Define the parentheses used to group arithmetic operations 1464: in assembler code. */ 1465: 1466: #define ASM_OPEN_PAREN "(" 1467: #define ASM_CLOSE_PAREN ")" 1468: 1469: /* Define results of standard character escape sequences. */ 1470: #define TARGET_BELL 007 1471: #define TARGET_BS 010 1472: #define TARGET_TAB 011 1473: #define TARGET_NEWLINE 012 1474: #define TARGET_VT 013 1475: #define TARGET_FF 014 1476: #define TARGET_CR 015 1477: 1478: /* Print an instruction operand X on file FILE. 1479: CODE is the code from the %-spec that requested printing this operand; 1480: if `%z3' was used to print operand 3, then CODE is 'z'. */ 1481: 1482: #define PRINT_OPERAND(FILE, X, CODE) \ 1483: print_operand (FILE, X, CODE) 1484: 1485: /* Print a memory operand whose address is X, on file FILE. */ 1486: 1487: #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \ 1488: print_operand_address (FILE, ADDR) 1489: 1490: /* Do not put out GNU stabs for constructors and destructors. 1491: ld bounces them. */ 1492: 1493: #define FASCIST_ASSEMBLER 1494: 1495: /* __gcc_cleanup is loader-aliased to __ap$do_registered_functions if we 1496: are linking against standard libc, 0 if old (-traditional) libc. */ 1497: 1498: #define EXIT_BODY \ 1499: { \ 1500: extern void __gcc_cleanup (); \ 1501: if (__gcc_cleanup != _cleanup) \ 1502: __gcc_cleanup (); \ 1503: _cleanup (); \ 1504: } 1505: 1506: /* Header for convex.c. 1507: Here at the end so we can use types defined above. */ 1508: 1509: extern int target_cpu; 1510: extern int current_section_is_text; 1511: extern enum reg_class regno_reg_class[]; 1512: extern enum reg_class reg_class_from_letter[]; 1513: extern char regno_ok_for_index_p_base[]; 1514: #define regno_ok_for_index_p (regno_ok_for_index_p_base + 1) 1515: 1516: extern int const_double_low_int (); 1517: extern int const_double_high_int (); 1518: extern char *output_cmp (); 1519: extern char *output_condjump (); 1520: extern char *output_call (); 1521: extern void gen_ap_for_call (); 1.1.1.3 ! root 1522: extern int check_float_value (); 1.1 root 1523: extern void asm_declare_function_name ();
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