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1.1 root 1: /* Definitions of target machine for GNU compiler. Convex version. 1.1.1.4 ! root 2: Copyright (C) 1988, 1994, 1995 Free Software Foundation, Inc. 1.1 root 3: 4: This file is part of GNU CC. 5: 6: GNU CC is free software; you can redistribute it and/or modify 7: it under the terms of the GNU General Public License as published by 8: the Free Software Foundation; either version 2, or (at your option) 9: any later version. 10: 11: GNU CC is distributed in the hope that it will be useful, 12: but WITHOUT ANY WARRANTY; without even the implied warranty of 13: MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14: GNU General Public License for more details. 15: 16: You should have received a copy of the GNU General Public License 17: along with GNU CC; see the file COPYING. If not, write to 1.1.1.4 ! root 18: the Free Software Foundation, 59 Temple Place - Suite 330, ! 19: Boston, MA 02111-1307, USA. */ 1.1 root 20: 21: 22: /* Standard GCC variables that we reference. */ 23: 24: extern int target_flags; 25: 26: /* Convex machine-specific flags 27: -mc1 target instruction set, libraries, scheduling 28: -mc2 29: -mc32 30: -mc34 31: -mc38 32: -margcount use standard calling sequence, with arg count word 33: -mno-argcount don't push arg count, depend on symbol table 34: -margcount-nop place arg count in a nop instruction (faster than push) 35: -mvolatile-cache use data cache for volatile mem refs (default) 36: -mvolatile-nocache bypass data cache for volatile mem refs 37: -mlong32 cc- and libc-compatible 32-bit longs 38: -mlong64 64-bit longs 39: */ 40: 41: /* Macro to define tables used to set -mXXX flags. 42: This is a list in braces of pairs in braces, 43: each pair being { "NAME", VALUE } 44: where VALUE is the bits to set or minus the bits to clear. 45: An empty string NAME is used to identify the default VALUE. */ 46: 47: #ifndef TARGET_DEFAULT 48: #error Use one of convex1.h, convex2.h, etc. 49: #endif 50: 51: #define TARGET_SWITCHES \ 52: { { "c1", 001 }, \ 53: { "c2", 002 }, \ 54: { "c32", 004 }, \ 55: { "c34", 010 }, \ 56: { "c38", 020 }, \ 57: { "argcount", 0100 }, \ 58: { "argcount-nop", 0200 }, \ 59: { "no-argcount", -0300 }, \ 60: { "volatile-cache", -0400 }, \ 61: { "no-volatile-cache", 0400 }, \ 62: { "volatile-nocache", 0400 }, \ 63: { "long64", 01000 }, \ 64: { "long32", -01000 }, \ 65: { "", TARGET_DEFAULT }} 66: 67: /* Macros used in the machine description to test the flags. */ 68: 69: #define TARGET_C1 (target_cpu == 0) 70: #define TARGET_C2 (target_cpu == 1) 71: #define TARGET_C34 (target_cpu == 2) 72: #define TARGET_C38 (target_cpu == 3) 73: #define TARGET_ARGCOUNT (target_flags & 0100) 74: #define TARGET_ARGCOUNT_NOP (target_flags & 0200) 75: #define TARGET_LONG64 (target_flags & 01000) 76: #define TARGET_VOLATILE_NOCACHE (target_flags & 0400) 77: 78: #define OVERRIDE_OPTIONS \ 79: { \ 80: extern int dollars_in_ident; \ 81: init_convex (); \ 82: /* To compile system header files, allow $ in identifiers even if -ansi */ \ 83: dollars_in_ident = 1; \ 84: if ((target_flags & 077) != (TARGET_DEFAULT & 077)) \ 85: target_flags &= ~TARGET_DEFAULT; \ 86: if (target_flags & 001) \ 87: target_cpu = 0; \ 88: else if (target_flags & 006) \ 89: target_cpu = 1; \ 90: else if (target_flags & 010) \ 91: target_cpu = 2; \ 92: else if (target_flags & 020) \ 93: target_cpu = 3; \ 94: } 95: 96: /* Names to predefine in the preprocessor for this target machine. */ 97: 1.1.1.2 root 98: #define CPP_PREDEFINES "-Dconvex -Dunix -Asystem(unix) -Acpu(convex) -Amachine(convex)" 1.1 root 99: 100: /* Print subsidiary information on the compiler version in use. */ 101: 102: #define TARGET_VERSION fprintf (stderr, " (convex)"); 103: 104: /* Target-dependent specs. 105: Some libraries come in c1 and c2+ versions; use the appropriate ones. 106: Make a target-dependent __convex_cxx__ define to relay the target cpu 107: to the program being compiled. */ 108: 109: #if TARGET_DEFAULT & 1 110: 111: /* C1 default */ 112: 113: #if _IEEE_FLOAT_ 114: 115: #define CPP_SPEC \ 116: "%{!mc2:%{!mc32:%{!mc34:%{!mc38:-D__convex_c1__}}}} \ 117: %{mc2:-D__convex_c2__} \ 118: %{mc32:-D__convex_c32__} \ 119: %{mc34:-D__convex_c34__} \ 120: %{mc38:-D__convex_c38__} \ 121: %{fno-builtin:-D__NO_INLINE} \ 122: -D__NO_INLINE_MATH -D__NO_INLINE_STDLIB \ 123: -D_IEEE_FLOAT_ \ 124: %{.S:-P} \ 125: %{!traditional:-D__stdc__} \ 126: %{!traditional:-D_LONGLONG} \ 127: %{!traditional:-Ds64_t=long\\ long -Du64_t=unsigned\\ long\\ long} \ 128: %{!ansi:-D_POSIX_SOURCE} \ 129: %{!ansi:-D_CONVEX_SOURCE}" 130: 131: #else 132: 133: #define CPP_SPEC \ 134: "%{!mc2:%{!mc32:%{!mc34:%{!mc38:-D__convex_c1__}}}} \ 135: %{mc2:-D__convex_c2__} \ 136: %{mc32:-D__convex_c32__} \ 137: %{mc34:-D__convex_c34__} \ 138: %{mc38:-D__convex_c38__} \ 139: %{fno-builtin:-D__NO_INLINE} \ 140: -D__NO_INLINE_MATH -D__NO_INLINE_STDLIB \ 141: -D_CONVEX_FLOAT_ \ 142: %{.S:-P} \ 143: %{!traditional:-D__stdc__} \ 144: %{!traditional:-D_LONGLONG} \ 145: %{!traditional:-Ds64_t=long\\ long -Du64_t=unsigned\\ long\\ long} \ 146: %{!ansi:-D_POSIX_SOURCE} \ 147: %{!ansi:-D_CONVEX_SOURCE}" 148: 149: #endif 150: 151: #define LIB_SPEC \ 152: "%{!mc2:%{!mc32:%{!mc34:%{!mc38:-lC1%{traditional:_old}%{p:_p}%{pg:_p}}}}} \ 153: %{mc2:-lC2%{traditional:_old}%{p:_p}%{pg:_p}} \ 154: %{mc32:-lC2%{traditional:_old}%{p:_p}%{pg:_p}} \ 155: %{mc34:-lC2%{traditional:_old}%{p:_p}%{pg:_p}} \ 156: %{mc38:-lC2%{traditional:_old}%{p:_p}%{pg:_p}} \ 157: -lc%{traditional:_old}%{p:_p}%{pg:_p}" 158: 159: #endif 160: 161: #if TARGET_DEFAULT & 2 162: 163: /* C2 default */ 164: 165: #if _IEEE_FLOAT_ 166: 167: #define CPP_SPEC \ 168: "%{mc1:-D__convex_c1__} \ 169: %{!mc1:%{!mc32:%{!mc34:%{!mc38:-D__convex_c2__}}}} \ 170: %{mc32:-D__convex_c32__} \ 171: %{mc34:-D__convex_c34__} \ 172: %{mc38:-D__convex_c38__} \ 173: %{fno-builtin:-D__NO_INLINE} \ 174: -D__NO_INLINE_MATH -D__NO_INLINE_STDLIB \ 175: -D_IEEE_FLOAT_ \ 176: %{.S:-P} \ 177: %{!traditional:-D__stdc__} \ 178: %{!traditional:-D_LONGLONG} \ 179: %{!traditional:-Ds64_t=long\\ long -Du64_t=unsigned\\ long\\ long} \ 180: %{!ansi:-D_POSIX_SOURCE} \ 181: %{!ansi:-D_CONVEX_SOURCE}" 182: 183: #else 184: 185: #define CPP_SPEC \ 186: "%{mc1:-D__convex_c1__} \ 187: %{!mc1:%{!mc32:%{!mc34:%{!mc38:-D__convex_c2__}}}} \ 188: %{mc32:-D__convex_c32__} \ 189: %{mc34:-D__convex_c34__} \ 190: %{mc38:-D__convex_c38__} \ 191: %{fno-builtin:-D__NO_INLINE} \ 192: -D__NO_INLINE_MATH -D__NO_INLINE_STDLIB \ 193: -D_CONVEX_FLOAT_ \ 194: %{.S:-P} \ 195: %{!traditional:-D__stdc__} \ 196: %{!traditional:-D_LONGLONG} \ 197: %{!traditional:-Ds64_t=long\\ long -Du64_t=unsigned\\ long\\ long} \ 198: %{!ansi:-D_POSIX_SOURCE} \ 199: %{!ansi:-D_CONVEX_SOURCE}" 200: 201: #endif 202: 203: #define LIB_SPEC \ 204: "%{mc1:-lC1%{traditional:_old}%{p:_p}%{pg:_p}} \ 205: %{!mc1:%{!mc32:%{!mc34:%{!mc38:-lC2%{traditional:_old}%{p:_p}%{pg:_p}}}}} \ 206: %{mc32:-lC2%{traditional:_old}%{p:_p}%{pg:_p}} \ 207: %{mc34:-lC2%{traditional:_old}%{p:_p}%{pg:_p}} \ 208: %{mc38:-lC2%{traditional:_old}%{p:_p}%{pg:_p}} \ 209: -lc%{traditional:_old}%{p:_p}%{pg:_p}" 210: 211: #endif 212: 213: #if TARGET_DEFAULT & 4 214: 215: /* C32 default */ 216: 217: #if _IEEE_FLOAT_ 218: 219: #define CPP_SPEC \ 220: "%{mc1:-D__convex_c1__} \ 221: %{mc2:-D__convex_c2__} \ 222: %{!mc1:%{!mc2:%{!mc34:%{!mc38:-D__convex_c32__}}}} \ 223: %{mc34:-D__convex_c34__} \ 224: %{mc38:-D__convex_c38__} \ 225: %{fno-builtin:-D__NO_INLINE} \ 226: -D__NO_INLINE_MATH -D__NO_INLINE_STDLIB \ 227: -D_IEEE_FLOAT_ \ 228: %{.S:-P} \ 229: %{!traditional:-D__stdc__} \ 230: %{!traditional:-D_LONGLONG} \ 231: %{!traditional:-Ds64_t=long\\ long -Du64_t=unsigned\\ long\\ long} \ 232: %{!ansi:-D_POSIX_SOURCE} \ 233: %{!ansi:-D_CONVEX_SOURCE}" 234: 235: #else 236: 237: #define CPP_SPEC \ 238: "%{mc1:-D__convex_c1__} \ 239: %{mc2:-D__convex_c2__} \ 240: %{!mc1:%{!mc2:%{!mc34:%{!mc38:-D__convex_c32__}}}} \ 241: %{mc34:-D__convex_c34__} \ 242: %{mc38:-D__convex_c38__} \ 243: %{fno-builtin:-D__NO_INLINE} \ 244: -D__NO_INLINE_MATH -D__NO_INLINE_STDLIB \ 245: -D_CONVEX_FLOAT_ \ 246: %{.S:-P} \ 247: %{!traditional:-D__stdc__} \ 248: %{!traditional:-D_LONGLONG} \ 249: %{!traditional:-Ds64_t=long\\ long -Du64_t=unsigned\\ long\\ long} \ 250: %{!ansi:-D_POSIX_SOURCE} \ 251: %{!ansi:-D_CONVEX_SOURCE}" 252: 253: #endif 254: 255: #define LIB_SPEC \ 256: "%{mc1:-lC1%{traditional:_old}%{p:_p}%{pg:_p}} \ 257: %{mc2:-lC2%{traditional:_old}%{p:_p}%{pg:_p}} \ 258: %{!mc1:%{!mc2:%{!mc34:%{!mc38:-lC2%{traditional:_old}%{p:_p}%{pg:_p}}}}} \ 259: %{mc34:-lC2%{traditional:_old}%{p:_p}%{pg:_p}} \ 260: %{mc38:-lC2%{traditional:_old}%{p:_p}%{pg:_p}} \ 261: -lc%{traditional:_old}%{p:_p}%{pg:_p}" 262: 263: #endif 264: 265: #if TARGET_DEFAULT & 010 266: 267: /* C34 default */ 268: 269: #if _IEEE_FLOAT_ 270: 271: #define CPP_SPEC \ 272: "%{mc1:-D__convex_c1__} \ 273: %{mc2:-D__convex_c2__} \ 274: %{mc32:-D__convex_c32__} \ 275: %{!mc1:%{!mc2:%{!mc32:%{!mc38:-D__convex_c34__}}}} \ 276: %{mc38:-D__convex_c38__} \ 277: %{fno-builtin:-D__NO_INLINE} \ 278: -D__NO_INLINE_MATH -D__NO_INLINE_STDLIB \ 279: -D_IEEE_FLOAT_ \ 280: %{.S:-P} \ 281: %{!traditional:-D__stdc__} \ 282: %{!traditional:-D_LONGLONG} \ 283: %{!traditional:-Ds64_t=long\\ long -Du64_t=unsigned\\ long\\ long} \ 284: %{!ansi:-D_POSIX_SOURCE} \ 285: %{!ansi:-D_CONVEX_SOURCE}" 286: 287: #else 288: 289: #define CPP_SPEC \ 290: "%{mc1:-D__convex_c1__} \ 291: %{mc2:-D__convex_c2__} \ 292: %{mc32:-D__convex_c32__} \ 293: %{!mc1:%{!mc2:%{!mc32:%{!mc38:-D__convex_c34__}}}} \ 294: %{mc38:-D__convex_c38__} \ 295: %{fno-builtin:-D__NO_INLINE} \ 296: -D__NO_INLINE_MATH -D__NO_INLINE_STDLIB \ 297: -D_CONVEX_FLOAT_ \ 298: %{.S:-P} \ 299: %{!traditional:-D__stdc__} \ 300: %{!traditional:-D_LONGLONG} \ 301: %{!traditional:-Ds64_t=long\\ long -Du64_t=unsigned\\ long\\ long} \ 302: %{!ansi:-D_POSIX_SOURCE} \ 303: %{!ansi:-D_CONVEX_SOURCE}" 304: 305: #endif 306: 307: #define LIB_SPEC \ 308: "%{mc1:-lC1%{traditional:_old}%{p:_p}%{pg:_p}} \ 309: %{mc2:-lC2%{traditional:_old}%{p:_p}%{pg:_p}} \ 310: %{mc32:-lC2%{traditional:_old}%{p:_p}%{pg:_p}} \ 311: %{!mc1:%{!mc2:%{!mc32:%{!mc38:-lC2%{traditional:_old}%{p:_p}%{pg:_p}}}}} \ 312: %{mc38:-lC2%{traditional:_old}%{p:_p}%{pg:_p}} \ 313: -lc%{traditional:_old}%{p:_p}%{pg:_p}" 314: 315: #endif 316: 317: #if TARGET_DEFAULT & 020 318: 319: /* C38 default */ 320: 321: #if _IEEE_FLOAT_ 322: 323: #define CPP_SPEC \ 324: "%{mc1:-D__convex_c1__} \ 325: %{mc2:-D__convex_c2__} \ 326: %{mc32:-D__convex_c32__} \ 327: %{mc34:-D__convex_c34__} \ 328: %{fno-builtin:-D__NO_INLINE} \ 329: -D__NO_INLINE_MATH -D__NO_INLINE_STDLIB \ 330: -D_IEEE_FLOAT_ \ 331: %{!mc1:%{!mc2:%{!mc32:%{!mc34:-D__convex_c38__}}}} \ 332: %{.S:-P} \ 333: %{!traditional:-D__stdc__} \ 334: %{!traditional:-D_LONGLONG} \ 335: %{!traditional:-Ds64_t=long\\ long -Du64_t=unsigned\\ long\\ long} \ 336: %{!ansi:-D_POSIX_SOURCE} \ 337: %{!ansi:-D_CONVEX_SOURCE}" 338: 339: #else 340: 341: #define CPP_SPEC \ 342: "%{mc1:-D__convex_c1__} \ 343: %{mc2:-D__convex_c2__} \ 344: %{mc32:-D__convex_c32__} \ 345: %{mc34:-D__convex_c34__} \ 346: %{fno-builtin:-D__NO_INLINE} \ 347: -D__NO_INLINE_MATH -D__NO_INLINE_STDLIB \ 348: -D_CONVEX_FLOAT_ \ 349: %{!mc1:%{!mc2:%{!mc32:%{!mc34:-D__convex_c38__}}}} \ 350: %{.S:-P} \ 351: %{!traditional:-D__stdc__} \ 352: %{!traditional:-D_LONGLONG} \ 353: %{!traditional:-Ds64_t=long\\ long -Du64_t=unsigned\\ long\\ long} \ 354: %{!ansi:-D_POSIX_SOURCE} \ 355: %{!ansi:-D_CONVEX_SOURCE}" 356: 357: #endif 358: 359: #define LIB_SPEC \ 360: "%{mc1:-lC1%{traditional:_old}%{p:_p}%{pg:_p}} \ 361: %{mc2:-lC2%{traditional:_old}%{p:_p}%{pg:_p}} \ 362: %{mc32:-lC2%{traditional:_old}%{p:_p}%{pg:_p}} \ 363: %{mc34:-lC2%{traditional:_old}%{p:_p}%{pg:_p}} \ 364: %{!mc1:%{!mc2:%{!mc32:%{!mc34:-lC2%{traditional:_old}%{p:_p}%{pg:_p}}}}} \ 365: -lc%{traditional:_old}%{p:_p}%{pg:_p}" 366: 367: #endif 368: 369: #if _IEEE_FLOAT_ 370: 371: /* ieee default */ 372: 373: #define ASM_SPEC "-fi" 374: 375: #define LINK_SPEC \ 376: "-E%{traditional:no}posix \ 377: -X \ 378: %{F} %{M*} %{y*} \ 379: -fi \ 380: -A__iob=___ap$iob \ 381: -A_use_libc_sema=___ap$use_libc_sema \ 382: %{traditional:-A___gcc_cleanup=__cleanup} \ 383: %{!traditional:-A___gcc_cleanup=___ap$do_registered_functions} \ 384: -L/usr/lib" 385: 386: #define STARTFILE_SPEC \ 387: "%{!pg:%{!p:/usr/lib/crt/crt0.o}} \ 388: %{!pg:%{p:/usr/lib/crt/mcrt0.o}} \ 389: %{pg:/usr/lib/crt/gcrt0.o} \ 390: /usr/lib/crt/fpmode_i.o" 391: 392: #else 393: 394: /* native default */ 395: 396: #define ASM_SPEC "-fn" 397: 398: #define LINK_SPEC \ 399: "-E%{traditional:no}posix \ 400: -X \ 401: %{F} %{M*} %{y*} \ 402: -fn \ 403: -A__iob=___ap$iob \ 404: -A_use_libc_sema=___ap$use_libc_sema \ 405: %{traditional:-A___gcc_cleanup=__cleanup} \ 406: %{!traditional:-A___gcc_cleanup=___ap$do_registered_functions} \ 407: -L/usr/lib" 408: 409: #define STARTFILE_SPEC \ 410: "%{!pg:%{!p:/usr/lib/crt/crt0.o}} \ 411: %{!pg:%{p:/usr/lib/crt/mcrt0.o}} \ 412: %{pg:/usr/lib/crt/gcrt0.o}" 413: 414: #endif 415: 416: /* Use /path/libgcc.a instead of -lgcc, makes bootstrap work more smoothly. */ 417: 418: #define LINK_LIBGCC_SPECIAL_1 419: 420: /* Allow $ in identifiers. */ 421: 422: #define DOLLARS_IN_IDENTIFIERS 2 423: 424: /* Since IEEE support was added to gcc, most things seem to like it 425: better if we disable exceptions and check afterward for infinity. */ 426: 427: #if __convex__ 428: #if _IEEE_FLOAT_ 429: #define REAL_VALUE_ISNAN(x) 0 430: #define REAL_VALUE_ISINF(x) ((*(short *) &(x) & 0x7ff0) == 0x7ff0) 431: #else 432: #define REAL_VALUE_ISNAN(x) 0 433: #define REAL_VALUE_ISINF(x) ((*(short *) &(x) & 0xfff0) == 0x8000) 434: #endif 435: #endif 436: 437: /* Target machine storage layout */ 438: 439: /* Define this if most significant bit is lowest numbered 440: in instructions that operate on numbered bit-fields. */ 441: #define BITS_BIG_ENDIAN 1 442: 443: /* Define this if most significant byte of a word is the lowest numbered. */ 444: #define BYTES_BIG_ENDIAN 1 445: 446: /* Define this if most significant word of a multiword number is numbered. */ 447: #define WORDS_BIG_ENDIAN 1 448: 449: /* Number of bits in an addressable storage unit */ 450: #define BITS_PER_UNIT 8 451: 452: /* Width in bits of a "word", which is the contents of a machine register. 453: Note that this is not necessarily the width of data type `int'; 454: if using 16-bit ints on a 68000, this would still be 32. 455: But on a machine with 16-bit registers, this would be 16. */ 456: #define BITS_PER_WORD 64 457: 458: /* Width of a word, in units (bytes). */ 459: #define UNITS_PER_WORD 8 460: 461: /* Width in bits of a pointer. 462: See also the macro `Pmode' defined below. */ 463: #define POINTER_SIZE 32 464: 465: /* Allocation boundary (in *bits*) for storing arguments in argument list. */ 466: #define PARM_BOUNDARY 32 467: 468: /* Boundary (in *bits*) on which stack pointer should be aligned. */ 469: #define STACK_BOUNDARY 64 470: 471: /* Allocation boundary (in *bits*) for the code of a function. */ 472: #define FUNCTION_BOUNDARY 16 473: 474: /* Alignment of field after `int : 0' in a structure. */ 475: #define EMPTY_FIELD_BOUNDARY 32 476: 477: /* Every structure's size must be a multiple of this. */ 478: #define STRUCTURE_SIZE_BOUNDARY 8 479: 480: /* A bitfield declared as `int' forces `int' alignment for the struct. */ 481: #define PCC_BITFIELD_TYPE_MATTERS 1 482: 483: /* No data type wants to be aligned rounder than this. */ 484: /* beware of doubles in structs -- 64 is incompatible with cc */ 485: #define BIGGEST_ALIGNMENT 32 486: 487: /* Set this nonzero if move instructions will actually fail to work 488: when given unaligned data. */ 489: #define STRICT_ALIGNMENT 0 490: 491: /* Define sizes of basic C types to conform to ordinary usage -- these 492: types depend on BITS_PER_WORD otherwise. */ 493: #define CHAR_TYPE_SIZE 8 494: #define SHORT_TYPE_SIZE 16 495: #define INT_TYPE_SIZE 32 496: #define LONG_TYPE_SIZE (TARGET_LONG64 ? 64 : 32) 497: #define LONG_LONG_TYPE_SIZE 64 498: #define FLOAT_TYPE_SIZE 32 499: #define DOUBLE_TYPE_SIZE 64 500: #define LONG_DOUBLE_TYPE_SIZE 64 1.1.1.2 root 501: /* This prevents cexp.c from depending on LONG_TYPE_SIZE. */ 502: #define MAX_LONG_TYPE_SIZE 64 1.1 root 503: 504: /* Declare the standard types used by builtins to match convex stddef.h -- 505: with int rather than long. */ 506: 507: #define SIZE_TYPE "unsigned int" 508: #define PTRDIFF_TYPE "int" 509: 510: /* Standard register usage. */ 511: 512: /* Number of actual hardware registers. 513: The hardware registers are assigned numbers for the compiler 514: from 0 to just below FIRST_PSEUDO_REGISTER. 515: All registers that the compiler knows about must be given numbers, 516: even those that are not normally considered general registers. */ 517: #define FIRST_PSEUDO_REGISTER 16 518: 519: /* 1 for registers that have pervasive standard uses 520: and are not available for the register allocator. 521: For Convex, these are AP, FP, and SP. */ 522: #define FIXED_REGISTERS \ 523: { 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 1 } 524: 525: /* 1 for registers not available across function calls. 526: These must include the FIXED_REGISTERS and also any 527: registers that can be used without being saved. 528: The latter must include the registers where values are returned 529: and the register where structure-value addresses are passed. 530: Aside from that, you can include as many other registers as you like. */ 531: #define CALL_USED_REGISTERS \ 532: { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 } 533: 534: /* List the order in which to allocate registers. Each register must be 535: listed once, even those in FIXED_REGISTERS. 536: For Convex, put S0 (the return register) last. */ 537: #define REG_ALLOC_ORDER \ 538: { 1, 2, 3, 4, 5, 6, 7, 9, 10, 11, 12, 13, 0, 8, 14, 15 } 539: 540: /* Return number of consecutive hard regs needed starting at reg REGNO 541: to hold something of mode MODE. 542: This is ordinarily the length in words of a value of mode MODE 543: but can be less for certain modes in special long registers. */ 544: #define HARD_REGNO_NREGS(REGNO, MODE) \ 545: ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD) 546: 547: /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE. 548: On Convex, S registers can hold any type, A registers any nonfloat. */ 549: #define HARD_REGNO_MODE_OK(REGNO, MODE) \ 550: (S_REGNO_P (REGNO) \ 551: || (GET_MODE_SIZE (MODE) <= 4 && (MODE) != SFmode)) 552: 553: /* Value is 1 if it is a good idea to tie two pseudo registers 554: when one has mode MODE1 and one has mode MODE2. 555: If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2, 556: for any hard reg, then this must be 0 for correct output. */ 557: #define MODES_TIEABLE_P(MODE1, MODE2) \ 558: ((GET_MODE_SIZE (MODE1) <= 4 && (MODE1) != SFmode) \ 559: == (GET_MODE_SIZE (MODE2) <= 4 && (MODE2) != SFmode)) 560: 561: /* Specify the registers used for certain standard purposes. 562: The values of these macros are register numbers. */ 563: 564: #define S0_REGNUM 0 565: #define A0_REGNUM 8 566: 567: /* Register to use for pushing function arguments. */ 568: #define STACK_POINTER_REGNUM A0_REGNUM 569: 570: /* Base register for access to local variables of the function. */ 571: #define FRAME_POINTER_REGNUM (A0_REGNUM + 7) 572: 573: /* Value should be nonzero if functions must have frame pointers. 574: Zero means the frame pointer need not be set up (and parms 575: may be accessed via the stack pointer) in functions that seem suitable. 576: This is computed in `reload', in reload1.c. */ 577: #define FRAME_POINTER_REQUIRED 1 578: 579: /* Base register for access to arguments of the function. */ 580: #define ARG_POINTER_REGNUM (A0_REGNUM + 6) 581: 582: /* Register in which static-chain is passed to a function. 583: Use S0, not an A reg, because this rare use would otherwise prevent 584: an A reg from being available to global-alloc across calls. */ 585: #define STATIC_CHAIN_REGNUM S0_REGNUM 586: 587: /* Register in which address to store a structure value 588: is passed to a function. */ 589: #define STRUCT_VALUE_REGNUM (A0_REGNUM + 1) 590: 591: /* Define the classes of registers for register constraints in the 592: machine description. Also define ranges of constants. 593: 594: One of the classes must always be named ALL_REGS and include all hard regs. 595: If there is more than one class, another class must be named NO_REGS 596: and contain no registers. 597: 598: The name GENERAL_REGS must be the name of a class (or an alias for 599: another name such as ALL_REGS). This is the class of registers 600: that is allowed by "g" or "r" in a register constraint. 601: Also, registers outside this class are allocated only when 602: instructions express preferences for them. 603: 604: The classes must be numbered in nondecreasing order; that is, 605: a larger-numbered class must never be contained completely 606: in a smaller-numbered class. 607: 608: For any two classes, it is very desirable that there be another 609: class that represents their union. */ 610: 611: /* Convex has classes A (address) and S (scalar). 612: A is further divided into SP_REGS (stack pointer) and INDEX_REGS. 613: SI_REGS is S_REGS + INDEX_REGS -- all the regs except SP. */ 614: 615: enum reg_class { 616: NO_REGS, S_REGS, INDEX_REGS, SP_REGS, A_REGS, SI_REGS, 617: ALL_REGS, LIM_REG_CLASSES 618: }; 619: 620: #define N_REG_CLASSES (int) LIM_REG_CLASSES 621: 622: /* Since GENERAL_REGS is the same class as ALL_REGS, 623: don't give it a different class number; just make it an alias. */ 624: 625: #define GENERAL_REGS ALL_REGS 626: 627: /* Give names of register classes as strings for dump file. */ 628: 629: #define REG_CLASS_NAMES \ 630: {"NO_REGS", "S_REGS", "INDEX_REGS", "SP_REGS", "A_REGS", "SI_REGS", \ 631: "ALL_REGS" } 632: 633: /* Define which registers fit in which classes. 634: This is an initializer for a vector of HARD_REG_SET 635: of length N_REG_CLASSES. */ 636: 637: #define REG_CLASS_CONTENTS \ 638: { 0, 0x00ff, 0xfe00, 0x0100, 0xff00, 0xfeff, 0xffff } 639: 640: /* The same information, inverted: 641: Return the class number of the smallest class containing 642: reg number REGNO. This could be a conditional expression 643: or could index an array. */ 644: 645: #define REGNO_REG_CLASS(REGNO) (regno_reg_class[REGNO]) 646: 647: #define S_REGNO_P(REGNO) (((REGNO) - S0_REGNUM) < (unsigned) 8) 648: #define A_REGNO_P(REGNO) (((REGNO) - A0_REGNUM) < (unsigned) 8) 649: 650: #define S_REG_P(X) (REG_P (X) && S_REGNO_P (REGNO (X))) 651: #define A_REG_P(X) (REG_P (X) && A_REGNO_P (REGNO (X))) 652: 653: /* The class value for index registers, and the one for base regs. */ 654: 655: #define INDEX_REG_CLASS INDEX_REGS 656: #define BASE_REG_CLASS INDEX_REGS 657: 658: /* Get reg_class from a letter such as appears in the machine description. */ 659: /* a => A_REGS 660: d => S_REGS ('s' is taken) 661: A => INDEX_REGS (i.e., A_REGS except sp) */ 662: 663: #define REG_CLASS_FROM_LETTER(C) \ 664: reg_class_from_letter[(unsigned char) (C)] 665: 666: /* The letters I, J, K, L and M in a register constraint string 667: can be used to stand for particular ranges of immediate operands. 668: This macro defines what the ranges are. 669: C is the letter, and VALUE is a constant value. 670: Return 1 if VALUE is in the range specified by C. */ 671: /* 'I' is used to pass any CONST_INT and reject any CONST_DOUBLE. 672: CONST_DOUBLE integers are handled by G and H constraint chars. */ 673: 674: #define CONST_OK_FOR_LETTER_P(VALUE, C) 1 675: 676: /* Similar, but for floating constants, and defining letters G and H. 677: Here VALUE is the CONST_DOUBLE rtx itself. */ 678: /* Convex uses G, H: 679: value usable in ld.d (low word 0) or ld.l (high word all sign) */ 680: 681: #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \ 682: (((C) == 'G' && LD_D_P (VALUE)) || \ 683: ((C) == 'H' && LD_L_P (VALUE)) || \ 684: 0) 685: 686: #define LD_D_P(X) (const_double_low_int (X) == 0) 687: 688: #define LD_L_P(X) (const_double_low_int (X) >= 0 \ 689: ? const_double_high_int (X) == 0 \ 690: : const_double_high_int (X) == -1) 691: 692: /* Optional extra constraints for this machine. 693: For Convex, 'Q' means that OP is a volatile MEM. 694: For volatile scalars, we use instructions that bypass the data cache. */ 695: 696: #define EXTRA_CONSTRAINT(OP, C) \ 697: ((C) == 'Q' ? (GET_CODE (OP) == MEM && MEM_VOLATILE_P (OP) \ 698: && ! TARGET_C1 && TARGET_VOLATILE_NOCACHE) \ 699: : 0) 700: 701: /* Given an rtx X being reloaded into a reg required to be 702: in class CLASS, return the class of reg to actually use. 703: In general this is just CLASS; but on some machines 704: in some cases it is preferable to use a more restrictive class. */ 705: 706: /* Put 2-word constants that can't be immediate operands into memory. */ 707: 708: #define PREFERRED_RELOAD_CLASS(X,CLASS) \ 709: ((GET_CODE (X) != CONST_DOUBLE \ 710: || GET_MODE (X) == SFmode \ 711: || LD_L_P (X) || LD_D_P (X)) ? (CLASS) : NO_REGS) 712: 713: /* Return the maximum number of consecutive registers 714: needed to represent mode MODE in a register of class CLASS. */ 715: #define CLASS_MAX_NREGS(CLASS, MODE) ((GET_MODE_SIZE (MODE) + 7) / 8) 716: 717: /* Stack layout; function entry, exit and calling. */ 718: 719: /* Define this if pushing a word on the stack 720: makes the stack pointer a smaller address. */ 721: #define STACK_GROWS_DOWNWARD 722: 723: /* Define this if the nominal address of the stack frame 724: is at the high-address end of the local variables; 725: that is, each additional local variable allocated 726: goes at a more negative offset in the frame. */ 727: #define FRAME_GROWS_DOWNWARD 728: 729: /* Define this if should default to -fcaller-saves. */ 730: #define DEFAULT_CALLER_SAVES 731: 732: /* Offset within stack frame to start allocating local variables at. 733: If FRAME_GROWS_DOWNWARD, this is the offset to the END of the 734: first local allocated. Otherwise, it is the offset to the BEGINNING 735: of the first local allocated. */ 736: #define STARTING_FRAME_OFFSET 0 737: 738: /* If we generate an insn to push BYTES bytes, 739: this says how many the stack pointer really advances by. */ 740: #define PUSH_ROUNDING(BYTES) (((BYTES) + 3) & ~3) 741: 742: /* Offset of first parameter from the argument pointer register value. */ 743: #define FIRST_PARM_OFFSET(FNDECL) 0 744: 745: /* Value is the number of bytes of arguments automatically 746: popped when returning from a subroutine call. 1.1.1.4 ! root 747: FUNDECL is the declaration node of the function (as a tree), 1.1 root 748: FUNTYPE is the data type of the function (as a tree), 749: or for a library call it is an identifier node for the subroutine name. 750: SIZE is the number of bytes of arguments passed on the stack. */ 751: 1.1.1.4 ! root 752: #define RETURN_POPS_ARGS(FUNDECL,FUNTYPE,SIZE) (SIZE) 1.1 root 753: 754: /* Define how to find the value returned by a function. 755: VALTYPE is the data type of the value (as a tree). 756: If the precise function being called is known, FUNC is its FUNCTION_DECL; 757: otherwise, FUNC is 0. */ 758: 759: #define FUNCTION_VALUE(VALTYPE, FUNC) \ 760: gen_rtx (REG, TYPE_MODE (VALTYPE), S0_REGNUM) 761: 762: /* Define how to find the value returned by a library function 763: assuming the value has mode MODE. */ 764: 765: #define LIBCALL_VALUE(MODE) gen_rtx (REG, MODE, S0_REGNUM) 766: 767: /* Define this if PCC uses the nonreentrant convention for returning 768: structure and union values. */ 769: 770: #define PCC_STATIC_STRUCT_RETURN 771: 772: /* 1 if N is a possible register number for a function value. 773: On the Convex, S0 is the only register thus used. */ 774: 775: #define FUNCTION_VALUE_REGNO_P(N) ((N) == S0_REGNUM) 776: 777: /* 1 if N is a possible register number for function argument passing. */ 778: 779: #define FUNCTION_ARG_REGNO_P(N) 0 780: 781: /* Define a data type for recording info about an argument list 782: during the scan of that argument list. This data type should 783: hold all necessary information about the function itself 784: and about the args processed so far, enough to enable macros 785: such as FUNCTION_ARG to determine where the next arg should go. */ 786: /* On convex, simply count the arguments in case TARGET_ARGCOUNT is set. */ 787: 788: #define CUMULATIVE_ARGS int 789: 790: /* Initialize a variable CUM of type CUMULATIVE_ARGS 791: for a call to a function whose data type is FNTYPE. 792: For a library call, FNTYPE is 0. */ 793: 794: #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME) \ 795: ((CUM) = 0) 796: 797: /* Update the data in CUM to advance over an argument 798: of mode MODE and data type TYPE. 799: (TYPE is null for libcalls where that information may not be available.) */ 800: 801: #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \ 802: ((CUM) += 1) 803: 804: /* Define where to put the arguments to a function. 805: Value is zero to push the argument on the stack, 806: or a hard register in which to store the argument. 807: 808: MODE is the argument's machine mode. 809: TYPE is the data type of the argument (as a tree). 810: This is null for libcalls where that information may 811: not be available. 812: CUM is a variable of type CUMULATIVE_ARGS which gives info about 813: the preceding args and about the function being called. 814: NAMED is nonzero if this argument is a named parameter 815: (otherwise it is an extra parameter matching an ellipsis). 816: 817: Convex: all args go on the stack. But return the arg count 818: as the "next arg register" to be passed to gen_call. */ 819: 820: #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \ 821: ((MODE) == VOIDmode ? gen_rtx (CONST_INT, VOIDmode, (CUM)) : 0) 822: 823: /* This macro generates the assembly code for function entry. 824: FILE is a stdio stream to output the code to. 825: SIZE is an int: how many units of temporary storage to allocate. 826: Refer to the array `regs_ever_live' to determine which registers 827: to save; `regs_ever_live[I]' is nonzero if register number I 828: is ever used in the function. This macro is responsible for 829: knowing which registers should not be saved even if used. */ 830: 831: #define FUNCTION_PROLOGUE(FILE, SIZE) \ 832: { \ 833: int size = ((SIZE) + 7) & -8; \ 834: if (size != 0) \ 835: fprintf (FILE, "\tsub.w #%d,sp\n", size); \ 836: } 837: 838: /* This macro generates the assembly code for function exit, 839: on machines that need it. If FUNCTION_EPILOGUE is not defined 840: then individual return instructions are generated for each 841: return statement. Args are same as for FUNCTION_PROLOGUE. */ 842: 843: #define FUNCTION_EPILOGUE(FILE, SIZE) \ 844: { \ 845: /* Follow function with a zero to stop c34 icache prefetching. */ \ 846: fprintf (FILE, "\tds.h 0\n"); \ 847: } 848: 849: /* Output assembler code for a block containing the constant parts 850: of a trampoline, leaving space for the variable parts. */ 851: 852: /* On convex, the code for a trampoline is 853: ld.w #<link>,s0 854: jmp <func> */ 855: 856: #define TRAMPOLINE_TEMPLATE(FILE) \ 857: { \ 858: fprintf (FILE, "\tld.w #69696969,s0\n"); \ 859: fprintf (FILE, "\tjmp 52525252\n"); \ 860: } 861: 862: /* Length in units of the trampoline for entering a nested function. */ 863: 864: #define TRAMPOLINE_SIZE 12 865: 866: /* Emit RTL insns to initialize the variable parts of a trampoline. 867: FNADDR is an RTX for the address of the function's pure code. 868: CXT is an RTX for the static chain value for the function. */ 869: 870: #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \ 871: { \ 872: emit_move_insn (gen_rtx (MEM, Pmode, plus_constant (TRAMP, 2)), CXT); \ 873: emit_move_insn (gen_rtx (MEM, Pmode, plus_constant (TRAMP, 8)), FNADDR); \ 874: emit_call_insn (gen_call_pop (gen_rtx (MEM, QImode, \ 875: gen_rtx (SYMBOL_REF, Pmode, \ 876: "__enable_execute_stack")), \ 877: const0_rtx, const0_rtx, const0_rtx)); \ 878: } 879: 880: /* Output assembler code to FILE to increment profiler label # LABELNO 881: for profiling a function entry. */ 882: 883: #define FUNCTION_PROFILER(FILE, LABELNO) \ 884: fprintf (FILE, "\tldea LP%d,a1\n\tcallq mcount\n", (LABELNO)); 885: 886: /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function, 887: the stack pointer does not matter. The value is tested only in 888: functions that have frame pointers. 889: No definition is equivalent to always zero. */ 890: 891: #define EXIT_IGNORE_STACK 1 892: 893: /* Store in the variable DEPTH the initial difference between the 894: frame pointer reg contents and the stack pointer reg contents, 895: as of the start of the function body. This depends on the layout 896: of the fixed parts of the stack frame and on how registers are saved. */ 897: #define INITIAL_FRAME_POINTER_OFFSET(DEPTH) \ 898: { (DEPTH) = (get_frame_size () + 7) & -8; } 899: 900: /* Addressing modes, and classification of registers for them. */ 901: 902: /* #define HAVE_POST_INCREMENT */ 903: /* #define HAVE_POST_DECREMENT */ 904: 905: /* #define HAVE_PRE_DECREMENT */ 906: /* #define HAVE_PRE_INCREMENT */ 907: 908: /* Macros to check register numbers against specific register classes. */ 909: 910: /* These assume that REGNO is a hard or pseudo reg number. 911: They give nonzero only if REGNO is a hard reg of the suitable class 912: or a pseudo reg currently allocated to a suitable hard reg. 913: Since they use reg_renumber, they are safe only once reg_renumber 914: has been allocated, which happens in local-alloc.c. */ 915: 916: #define REGNO_OK_FOR_INDEX_P(regno) \ 917: ((regno) <= LAST_VIRTUAL_REGISTER \ 918: ? regno_ok_for_index_p[regno] \ 919: : regno_ok_for_index_p[reg_renumber[regno]]) 920: 921: #define REGNO_OK_FOR_BASE_P(regno) REGNO_OK_FOR_INDEX_P (regno) 922: 923: /* Maximum number of registers that can appear in a valid memory address. */ 924: 925: #define MAX_REGS_PER_ADDRESS 1 926: 927: /* 1 if X is an rtx for a constant that is a valid address. */ 928: 929: #define CONSTANT_ADDRESS_P(X) \ 930: (GET_CODE (X) == LABEL_REF || GET_CODE (X) == SYMBOL_REF \ 931: || GET_CODE (X) == CONST_INT || GET_CODE (X) == CONST \ 932: || GET_CODE (X) == HIGH) 933: 934: /* Nonzero if the constant value X is a legitimate general operand. 935: It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE. */ 936: 937: /* For convex, bounce 2-word constants that can't be immediate operands. */ 938: 939: #define LEGITIMATE_CONSTANT_P(X) \ 940: (GET_CODE (X) != CONST_DOUBLE \ 941: || GET_MODE (X) == SFmode \ 942: || LD_L_P (X) || LD_D_P (X)) 943: 944: /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx 945: and check its validity for a certain class. 946: We have two alternate definitions for each of them. 947: The usual definition accepts all pseudo regs; the other rejects 948: them unless they have been allocated suitable hard regs. 949: The symbol REG_OK_STRICT causes the latter definition to be used. 950: 951: Most source files want to accept pseudo regs in the hope that 952: they will get allocated to the class that the insn wants them to be in. 953: Source files for reload pass need to be strict. 954: After reload, it makes no difference, since pseudo regs have 955: been eliminated by then. */ 956: 957: #ifndef REG_OK_STRICT 958: 959: /* Nonzero if X is a hard reg that can be used as an index 960: or if it is a pseudo reg. */ 961: #define REG_OK_FOR_INDEX_P(X) \ 962: (REGNO (X) > LAST_VIRTUAL_REGISTER || regno_ok_for_index_p[REGNO (X)]) 963: 964: /* Nonzero if X is a hard reg that can be used as a base reg 965: or if it is a pseudo reg. */ 966: #define REG_OK_FOR_BASE_P(X) REG_OK_FOR_INDEX_P (X) 967: 968: #else 969: 970: /* Nonzero if X is a hard reg that can be used as an index. */ 971: #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X)) 972: 973: /* Nonzero if X is a hard reg that can be used as a base reg. */ 974: #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X)) 975: 976: #endif 977: 978: /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression 979: that is a valid memory address for an instruction. 980: The MODE argument is the machine mode for the MEM expression 981: that wants to use this address. 982: 983: For Convex, valid addresses are 984: indirectable or (MEM indirectable) 985: where indirectable is 986: const, reg, (PLUS reg const) 987: 988: We don't use indirection since with insn scheduling, load + indexing 989: is better. */ 990: 991: /* 1 if X is an address that we could indirect through. */ 992: #define INDIRECTABLE_ADDRESS_P(X) \ 993: (CONSTANT_ADDRESS_P (X) \ 994: || (GET_CODE (X) == REG && REG_OK_FOR_BASE_P (X)) \ 995: || (GET_CODE (X) == PLUS \ 996: && GET_CODE (XEXP (X, 0)) == REG \ 997: && REG_OK_FOR_BASE_P (XEXP (X, 0)) \ 998: && CONSTANT_ADDRESS_P (XEXP (X, 1))) \ 999: || (GET_CODE (X) == PLUS \ 1000: && GET_CODE (XEXP (X, 1)) == REG \ 1001: && REG_OK_FOR_BASE_P (XEXP (X, 1)) \ 1002: && CONSTANT_ADDRESS_P (XEXP (X, 0)))) 1003: 1004: /* Go to ADDR if X is a valid address. */ 1005: #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \ 1006: { register rtx xfoob = (X); \ 1007: if (INDIRECTABLE_ADDRESS_P (xfoob)) \ 1008: goto ADDR; \ 1009: if (GET_CODE (xfoob) == PRE_DEC && XEXP (xfoob, 0) == stack_pointer_rtx) \ 1010: goto ADDR; \ 1011: } 1012: 1013: /* Try machine-dependent ways of modifying an illegitimate address 1014: to be legitimate. If we find one, return the new, valid address. 1015: This macro is used in only one place: `memory_address' in explow.c. 1016: 1017: OLDX is the address as it was before break_out_memory_refs was called. 1018: In some cases it is useful to look at this to decide what needs to be done. 1019: 1020: MODE and WIN are passed so that this macro can use 1021: GO_IF_LEGITIMATE_ADDRESS. 1022: 1023: It is always safe for this macro to do nothing. It exists to recognize 1024: opportunities to optimize the output. 1025: 1026: For Convex, nothing needs to be done. */ 1027: 1028: #define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) {} 1029: 1030: /* Go to LABEL if ADDR (a legitimate address expression) 1031: has an effect that depends on the machine mode it is used for. */ 1032: 1033: #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) {} 1034: 1035: /* Specify the machine mode that this machine uses 1036: for the index in the tablejump instruction. */ 1037: #define CASE_VECTOR_MODE SImode 1038: 1039: /* Define this if the case instruction expects the table 1040: to contain offsets from the address of the table. 1041: Do not define this if the table should contain absolute addresses. */ 1042: /* #define CASE_VECTOR_PC_RELATIVE */ 1043: 1044: /* Define this if the case instruction drops through after the table 1045: when the index is out of range. Don't define it if the case insn 1046: jumps to the default label instead. */ 1047: /* #define CASE_DROPS_THROUGH */ 1048: 1049: /* Specify the tree operation to be used to convert reals to integers. */ 1050: #define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR 1051: 1052: /* This is the kind of divide that is easiest to do in the general case. */ 1053: #define EASY_DIV_EXPR TRUNC_DIV_EXPR 1054: 1055: /* Define this as 1 if `char' should by default be signed; else as 0. */ 1056: #define DEFAULT_SIGNED_CHAR 1 1057: 1058: /* This flag, if defined, says the same insns that convert to a signed fixnum 1059: also convert validly to an unsigned one. */ 1060: #define FIXUNS_TRUNC_LIKE_FIX_TRUNC 1061: 1062: /* Max number of bytes we can move from memory to memory 1063: in one reasonably fast instruction. */ 1064: #define MOVE_MAX 8 1065: 1066: /* Define this if zero-extension is slow (more than one real instruction). */ 1067: /* #define SLOW_ZERO_EXTEND */ 1068: 1069: /* Nonzero if access to memory by bytes is slow and undesirable. */ 1070: #define SLOW_BYTE_ACCESS (! TARGET_C2) 1071: 1072: /* Define if shifts truncate the shift count 1073: which implies one can omit a sign-extension or zero-extension 1074: of a shift count. */ 1075: /* #define SHIFT_COUNT_TRUNCATED */ 1076: 1077: /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits 1078: is done just by pretending it is already truncated. */ 1079: #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1 1080: 1081: /* On Convex, it is as good to call a constant function address as to 1082: call an address kept in a register. */ 1083: #define NO_FUNCTION_CSE 1084: 1085: /* When a prototype says `char' or `short', really pass an `int'. */ 1086: #define PROMOTE_PROTOTYPES 1087: 1088: /* Specify the machine mode that pointers have. 1089: After generation of rtl, the compiler makes no further distinction 1090: between pointers and any other objects of this machine mode. */ 1091: #define Pmode SImode 1092: 1093: /* A function address in a call instruction 1094: is a byte address (for indexing purposes) 1095: so give the MEM rtx a byte's mode. */ 1096: #define FUNCTION_MODE QImode 1097: 1098: /* Compute the cost of computing a constant rtl expression RTX 1099: whose rtx-code is CODE. The body of this macro is a portion 1100: of a switch statement. If the code is computed here, 1101: return it with a return statement. Otherwise, break from the switch. */ 1102: 1103: #define CONST_COSTS(RTX,CODE,OUTER_CODE) \ 1104: case CONST: \ 1105: case LABEL_REF: \ 1106: case SYMBOL_REF: \ 1107: case CONST_INT: \ 1108: case CONST_DOUBLE: \ 1109: return 0; 1110: 1111: /* Provide the costs of a rtl expression. This is in the body of a 1112: switch on CODE. */ 1113: 1114: #define RTX_COSTS(RTX,CODE,OUTER_CODE) \ 1115: case PLUS: \ 1116: if (regno_pointer_flag != 0 \ 1117: && GET_CODE (XEXP (RTX, 0)) == REG \ 1118: && REGNO_POINTER_FLAG (REGNO (XEXP (RTX, 0))) \ 1119: && GET_CODE (XEXP (RTX, 1)) == CONST_INT) \ 1120: return 0; \ 1121: else break; \ 1122: case MULT: \ 1123: return 4 * (char) (0x03060403 >> target_cpu * 8); \ 1124: case ASHIFT: \ 1125: case LSHIFTRT: \ 1126: case ASHIFTRT: \ 1127: return 4 * (char) (0x03010403 >> target_cpu * 8); \ 1128: case MEM: \ 1129: return 5; 1130: 1131: /* Compute the cost of an address. This is meant to approximate the size 1132: and/or execution delay of an insn using that address. If the cost is 1133: approximated by the RTL complexity, including CONST_COSTS above, as 1134: is usually the case for CISC machines, this macro should not be defined. 1135: For aggressively RISCy machines, only one insn format is allowed, so 1136: this macro should be a constant. The value of this macro only matters 1137: for valid addresses. */ 1138: 1139: #define ADDRESS_COST(RTX) 0 1140: 1141: /* Specify the cost of a branch insn; roughly the number of extra insns that 1142: should be added to avoid a branch. */ 1143: 1144: #define BRANCH_COST 0 1145: 1146: /* Adjust the cost of dependences. */ 1147: 1148: #define ADJUST_COST(INSN,LINK,DEP,COST) \ 1149: { \ 1150: /* Antidependencies don't block issue. */ \ 1151: if (REG_NOTE_KIND (LINK) != 0) \ 1152: (COST) = 0; \ 1153: /* C38 situations where delay depends on context */ \ 1154: else if (TARGET_C38 \ 1155: && GET_CODE (PATTERN (INSN)) == SET \ 1156: && GET_CODE (PATTERN (DEP)) == SET) \ 1157: { \ 1158: enum attr_type insn_type = get_attr_type (INSN); \ 1159: enum attr_type dep_type = get_attr_type (DEP); \ 1160: /* index register must be ready one cycle early */ \ 1161: if (insn_type == TYPE_MLDW || insn_type == TYPE_MLDL \ 1162: || (insn_type == TYPE_MST \ 1163: && reg_mentioned_p (SET_DEST (PATTERN (DEP)), \ 1164: SET_SRC (PATTERN (INSN))))) \ 1165: (COST) += 1; \ 1166: /* alu forwarding off alu takes two */ \ 1167: if (dep_type == TYPE_ALU \ 1168: && insn_type != TYPE_ALU \ 1169: && ! (insn_type == TYPE_MST \ 1170: && SET_DEST (PATTERN (DEP)) == SET_SRC (PATTERN (INSN)))) \ 1171: (COST) += 1; \ 1172: } \ 1173: } 1174: 1175: /* Convex uses Vax or IEEE floats. 1176: Follow the host format. */ 1177: #define TARGET_FLOAT_FORMAT HOST_FLOAT_FORMAT 1178: 1179: /* But must prevent real.c from constructing Vax dfloats */ 1180: #define REAL_VALUE_ATOF(X,S) atof (X) 1181: extern double atof(); 1182: 1183: /* Check a `double' value for validity for a particular machine mode. */ 1.1.1.3 root 1184: #define CHECK_FLOAT_VALUE(MODE, D, OVERFLOW) \ 1185: overflow = check_float_value (MODE, &D, OVERFLOW) 1.1 root 1186: 1187: /* Tell final.c how to eliminate redundant test instructions. */ 1188: 1189: /* Here we define machine-dependent flags and fields in cc_status 1190: (see `conditions.h'). No extra ones are needed for convex. */ 1191: 1192: /* Store in cc_status the expressions 1193: that the condition codes will describe 1194: after execution of an instruction whose pattern is EXP. 1195: Do not alter them if the instruction would not alter the cc's. */ 1196: 1197: #define NOTICE_UPDATE_CC(EXP,INSN) {} 1198: 1199: /* Control the assembler format that we output. */ 1200: 1201: /* Output at beginning of assembler file. */ 1202: 1203: #if _IEEE_FLOAT_ 1204: #define ASM_FILE_START(FILE) fprintf (FILE, ";NO_APP\n.fpmode ieee\n") 1205: #else 1206: #define ASM_FILE_START(FILE) fprintf (FILE, ";NO_APP\n.fpmode native\n") 1207: #endif 1208: 1209: /* Output to assembler file text saying following lines 1210: may contain character constants, extra white space, comments, etc. */ 1211: 1212: #define ASM_APP_ON ";APP\n" 1213: 1214: /* Output to assembler file text saying following lines 1215: no longer contain unusual constructs. */ 1216: 1217: #define ASM_APP_OFF ";NO_APP\n" 1218: 1219: /* Alignment with Convex's assembler goes like this: 1220: .text can be .aligned up to a halfword. 1221: .data and .bss can be .aligned up to a longword. 1222: .lcomm is not supported, explicit declarations in .bss must be used instead. 1223: We get alignment for word and longword .text data by conventionally 1224: using .text 2 for word-aligned data and .text 3 for longword-aligned 1225: data. This requires that the data's size be a multiple of its alignment, 1226: which seems to be always true. */ 1227: 1228: /* Output before read-only data. */ 1229: 1230: #define TEXT_SECTION_ASM_OP (current_section_is_text = 1, ".text") 1231: 1232: /* Output before writable data. */ 1233: 1234: #define DATA_SECTION_ASM_OP (current_section_is_text = 0, ".data") 1235: 1236: /* Output before uninitialized data. */ 1237: 1238: #define BSS_SECTION_ASM_OP (current_section_is_text = 0, ".bss") 1239: 1240: /* Define the .bss section for ASM_OUTPUT_LOCAL to use. */ 1241: 1242: #define EXTRA_SECTIONS in_bss 1243: 1244: #define EXTRA_SECTION_FUNCTIONS \ 1245: void \ 1246: bss_section () \ 1247: { \ 1248: if (in_section != in_bss) \ 1249: { \ 1250: fprintf (asm_out_file, "%s\n", BSS_SECTION_ASM_OP); \ 1251: in_section = in_bss; \ 1252: } \ 1253: } 1254: 1255: /* This is how to output an assembler line 1256: that says to advance the location counter 1257: to a multiple of 2**LOG bytes. */ 1258: 1259: #define ASM_OUTPUT_ALIGN(FILE,LOG) \ 1260: if (current_section_is_text && (LOG) > 1) \ 1261: fprintf (FILE, ".text %d\n", LOG); \ 1262: else if (current_section_is_text) \ 1263: fprintf (FILE, ".text\n.align %d\n", 1 << (LOG)); \ 1264: else \ 1265: fprintf (FILE, ".align %d\n", 1 << (LOG)) 1266: 1267: /* How to refer to registers in assembler output. 1268: This sequence is indexed by compiler's hard-register-number (see above). */ 1269: 1270: #define REGISTER_NAMES \ 1271: { \ 1272: "s0", "s1", "s2", "s3", "s4", "s5", "s6", "s7", \ 1273: "sp", "a1", "a2", "a3", "a4", "a5", "ap", "fp", \ 1274: } 1275: 1276: /* This is BSD, so it wants DBX format. */ 1277: 1278: #define DBX_DEBUGGING_INFO 1279: 1280: /* How to renumber registers for dbx and gdb. */ 1281: 1282: #define DBX_REGISTER_NUMBER(REGNO) (REGNO) 1283: 1284: /* Do not break .stabs pseudos into continuations. */ 1285: 1286: #define DBX_CONTIN_LENGTH 0 1287: 1288: /* This is the char to use for continuation (in case we need to turn 1289: continuation back on). */ 1290: 1291: #define DBX_CONTIN_CHAR '?' 1292: 1293: /* Don't use stab extensions until GDB v4 port is available for convex. */ 1294: 1295: #define DEFAULT_GDB_EXTENSIONS 0 1296: #define DBX_NO_XREFS 1297: 1298: /* This is how to output the definition of a user-level label named NAME, 1299: such as the label on a static function or variable NAME. */ 1300: 1301: #define ASM_OUTPUT_LABEL(FILE,NAME) \ 1302: do { assemble_name (FILE, NAME); fputs (":\n", FILE); } while (0) 1303: 1304: /* This is how to output a command to make the user-level label named NAME 1305: defined for reference from other files. */ 1306: 1307: #define ASM_GLOBALIZE_LABEL(FILE,NAME) \ 1308: do { fputs (".globl ", FILE); assemble_name (FILE, NAME); fputs ("\n", FILE);} while (0) 1309: 1310: /* This is how to output a reference to a user-level label named NAME. */ 1311: 1312: #define ASM_OUTPUT_LABELREF(FILE,NAME) \ 1313: fprintf (FILE, "_%s", NAME) 1314: 1315: /* This is how to output an internal numbered label where 1316: PREFIX is the class of label and NUM is the number within the class. */ 1317: 1318: #define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \ 1319: fprintf (FILE, "%s%d:\n", PREFIX, NUM) 1320: 1321: /* Put case tables in .text 2, where they will be word-aligned */ 1322: 1323: #define ASM_OUTPUT_CASE_LABEL(FILE,PREFIX,NUM,TABLE) \ 1324: ASM_OUTPUT_ALIGN (FILE, 2); \ 1325: ASM_OUTPUT_INTERNAL_LABEL (FILE, PREFIX, NUM) 1326: 1327: #define ASM_OUTPUT_CASE_END(FILE,NUM,TABLE) \ 1328: ASM_OUTPUT_ALIGN (FILE, 1) 1329: 1330: /* This is how to store into the string LABEL 1331: the symbol_ref name of an internal numbered label where 1332: PREFIX is the class of label and NUM is the number within the class. 1333: This is suitable for output with `assemble_name'. */ 1334: 1335: #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \ 1336: sprintf (LABEL, "*%s%d", PREFIX, NUM) 1337: 1338: /* This is how to output an assembler line defining a `double' constant. */ 1339: 1340: #define ASM_OUTPUT_DOUBLE(FILE,VALUE) \ 1341: outfloat (FILE, VALUE, "%.17e", "\tds.d ", "\n") 1342: 1343: /* This is how to output an assembler line defining a `float' constant. */ 1344: 1345: #define ASM_OUTPUT_FLOAT(FILE,VALUE) \ 1346: outfloat (FILE, VALUE, "%.9e", "\tds.s ", "\n") 1347: 1348: /* This is how to output an assembler line defining an `int' constant. */ 1349: 1350: #define ASM_OUTPUT_INT(FILE,VALUE) \ 1351: { \ 1352: fprintf (FILE, "\tds.w "); \ 1353: output_addr_const (FILE, simplify_for_convex (VALUE)); \ 1354: fprintf (FILE, "\n"); \ 1355: } 1356: 1357: /* Likewise for a `long long int' constant. */ 1358: 1359: #define ASM_OUTPUT_DOUBLE_INT(FILE,VALUE) \ 1360: { \ 1361: if (GET_CODE (VALUE) == CONST_DOUBLE) \ 1362: fprintf (FILE, "\tds.w %d,%d\n", \ 1363: const_double_high_int (VALUE), const_double_low_int (VALUE)); \ 1364: else if (GET_CODE (VALUE) == CONST_INT) \ 1365: { \ 1366: int val = INTVAL (VALUE); \ 1367: fprintf (FILE, "\tds.w %d,%d\n", val < 0 ? -1 : 0, val); \ 1368: } \ 1369: else \ 1370: abort (); \ 1371: } 1372: 1373: /* Likewise for `char' and `short' constants. */ 1374: 1375: #define ASM_OUTPUT_SHORT(FILE,VALUE) \ 1376: ( fprintf (FILE, "\tds.h "), \ 1377: output_addr_const (FILE, (VALUE)), \ 1378: fprintf (FILE, "\n")) 1379: 1380: #define ASM_OUTPUT_CHAR(FILE,VALUE) \ 1381: ( fprintf (FILE, "\tds.b "), \ 1382: output_addr_const (FILE, (VALUE)), \ 1383: fprintf (FILE, "\n")) 1384: 1385: /* This is how to output an assembler line for a numeric constant byte. */ 1386: 1387: #define ASM_OUTPUT_BYTE(FILE,VALUE) \ 1388: fprintf (FILE, "\tds.b %#x\n", (VALUE)) 1389: 1390: /* This is how to output a string */ 1391: 1392: #define ASM_OUTPUT_ASCII(FILE,STR,SIZE) do { \ 1393: int i; \ 1394: fprintf ((FILE), "\tds.b \""); \ 1395: for (i = 0; i < (SIZE); i++) { \ 1396: register int c = (STR)[i] & 0377; \ 1397: if (c >= ' ' && c < 0177 && c != '\\' && c != '"') \ 1398: putc (c, (FILE)); \ 1399: else \ 1400: fprintf ((FILE), "\\%03o", c);} \ 1401: fprintf ((FILE), "\"\n");} while (0) 1402: 1403: /* This is how to output an insn to push a register on the stack. 1404: It need not be very fast code. */ 1405: 1406: #define ASM_OUTPUT_REG_PUSH(FILE,REGNO) \ 1407: fprintf (FILE, "\tpsh.%c %s\n", \ 1408: S_REGNO_P (REGNO) ? 'l' : 'w', \ 1409: reg_names[REGNO]) 1410: 1411: /* This is how to output an insn to pop a register from the stack. 1412: It need not be very fast code. */ 1413: 1414: #define ASM_OUTPUT_REG_POP(FILE,REGNO) \ 1415: fprintf (FILE, "\tpop.%c %s\n", \ 1416: S_REGNO_P (REGNO) ? 'l' : 'w', \ 1417: reg_names[REGNO]) 1418: 1419: /* This is how to output an element of a case-vector that is absolute. */ 1420: 1421: #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \ 1422: fprintf (FILE, "\tds.w L%d\n", VALUE) 1423: 1424: /* This is how to output an element of a case-vector that is relative. 1425: (not used on Convex) */ 1426: 1427: #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, VALUE, REL) \ 1428: fprintf (FILE, "\tds.w L%d-L%d\n", VALUE, REL) 1429: 1430: /* This is how to output an assembler line 1431: that says to advance the location counter by SIZE bytes. */ 1432: 1433: #define ASM_OUTPUT_SKIP(FILE,SIZE) \ 1434: fprintf (FILE, "\tds.b %u(0)\n", (SIZE)) 1435: 1436: /* This says how to output an assembler line 1437: to define a global common symbol. */ 1438: 1439: #define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \ 1440: ( fputs (".comm ", (FILE)), \ 1441: assemble_name ((FILE), (NAME)), \ 1442: fprintf ((FILE), ",%u\n", (ROUNDED))) 1443: 1444: /* This says how to output an assembler line 1445: to define a local common symbol. */ 1446: 1447: #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE, ROUNDED) \ 1448: ( bss_section (), \ 1449: assemble_name ((FILE), (NAME)), \ 1450: fprintf ((FILE), ":\tbs.b %u\n", (ROUNDED))) 1451: 1452: /* Store in OUTPUT a string (made with alloca) containing 1453: an assembler-name for a local static variable named NAME. 1454: LABELNO is an integer which is different for each call. */ 1455: 1456: #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \ 1457: ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \ 1458: sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO))) 1459: 1460: /* Output an arg count before function entries. */ 1461: 1462: #define ASM_DECLARE_FUNCTION_NAME(FILE, NAME, DECL) \ 1463: asm_declare_function_name (FILE, NAME, DECL) 1464: 1465: /* Define the parentheses used to group arithmetic operations 1466: in assembler code. */ 1467: 1468: #define ASM_OPEN_PAREN "(" 1469: #define ASM_CLOSE_PAREN ")" 1470: 1471: /* Define results of standard character escape sequences. */ 1472: #define TARGET_BELL 007 1473: #define TARGET_BS 010 1474: #define TARGET_TAB 011 1475: #define TARGET_NEWLINE 012 1476: #define TARGET_VT 013 1477: #define TARGET_FF 014 1478: #define TARGET_CR 015 1479: 1480: /* Print an instruction operand X on file FILE. 1481: CODE is the code from the %-spec that requested printing this operand; 1482: if `%z3' was used to print operand 3, then CODE is 'z'. */ 1483: 1484: #define PRINT_OPERAND(FILE, X, CODE) \ 1485: print_operand (FILE, X, CODE) 1486: 1487: /* Print a memory operand whose address is X, on file FILE. */ 1488: 1489: #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \ 1490: print_operand_address (FILE, ADDR) 1491: 1492: /* Do not put out GNU stabs for constructors and destructors. 1493: ld bounces them. */ 1494: 1495: #define FASCIST_ASSEMBLER 1496: 1497: /* __gcc_cleanup is loader-aliased to __ap$do_registered_functions if we 1498: are linking against standard libc, 0 if old (-traditional) libc. */ 1499: 1500: #define EXIT_BODY \ 1501: { \ 1502: extern void __gcc_cleanup (); \ 1503: if (__gcc_cleanup != _cleanup) \ 1504: __gcc_cleanup (); \ 1505: _cleanup (); \ 1506: } 1507: 1508: /* Header for convex.c. 1509: Here at the end so we can use types defined above. */ 1510: 1511: extern int target_cpu; 1512: extern int current_section_is_text; 1513: extern enum reg_class regno_reg_class[]; 1514: extern enum reg_class reg_class_from_letter[]; 1515: extern char regno_ok_for_index_p_base[]; 1516: #define regno_ok_for_index_p (regno_ok_for_index_p_base + 1) 1517: 1518: extern int const_double_low_int (); 1519: extern int const_double_high_int (); 1520: extern char *output_cmp (); 1521: extern char *output_condjump (); 1522: extern char *output_call (); 1523: extern void gen_ap_for_call (); 1.1.1.3 root 1524: extern int check_float_value (); 1.1 root 1525: extern void asm_declare_function_name ();
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