![[BACK]](/cvsweb/icons/back.gif){kind=icon}
Return to dsp16xx.h CVS log ![[TXT]](/cvsweb/icons/text.gif){kind=icon}
![[DIR]](/cvsweb/icons/dir.gif){kind=icon}
Up to [GCC 2.x] / gcc / config / dsp16xx|
Return to dsp16xx.h CVS log | Up to [GCC 2.x] / gcc / config / dsp16xx |
1.1 root 1: /* Definitions of target machine for GNU compiler. AT&T DSP1600.
2: Copyright (C) 1994 Free Software Foundation, Inc.
3: Contributed by Michael Collison ([email protected]).
4:
5: This file is part of GNU CC.
6:
7: GNU CC is free software; you can redistribute it and/or modify
8: it under the terms of the GNU General Public License as published by
9: the Free Software Foundation; either version 1, or (at your option)
10: any later version.
11:
12: GNU CC is distributed in the hope that it will be useful,
13: but WITHOUT ANY WARRANTY; without even the implied warranty of
14: MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15: GNU General Public License for more details.
16:
17: You should have received a copy of the GNU General Public License
18: along with GNU CC; see the file COPYING. If not, write to
19: the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
20:
21: extern char *low_reg_names[];
22: extern char *text_seg_name;
23: extern char *rsect_text;
24: extern char *data_seg_name;
25: extern char *rsect_data;
26: extern char *bss_seg_name;
27: extern char *rsect_bss;
28: extern char *const_seg_name;
29: extern char *rsect_const;
30: extern char *chip_name;
31: extern char *save_chip_name;
32: extern struct rtx_def *dsp16xx_compare_op0, *dsp16xx_compare_op1;
33: extern struct rtx_def *(*dsp16xx_compare_gen)();
34: extern struct rtx_def *gen_compare_reg();
35: extern struct rtx_def *dsp16xx_addhf3_libcall;
36: extern struct rtx_def *dsp16xx_subhf3_libcall;
37: extern struct rtx_def *dsp16xx_mulhf3_libcall;
38: extern struct rtx_def *dsp16xx_divhf3_libcall;
39: extern struct rtx_def *dsp16xx_cmphf3_libcall;
40: extern struct rtx_def *dsp16xx_fixhfhi2_libcall;
41: extern struct rtx_def *dsp16xx_floathihf2_libcall;
42: extern struct rtx_def *dsp16xx_neghf2_libcall;
43: extern struct rtx_def *dsp16xx_umulhi3_libcall;
44: extern struct rtx_def *dsp16xx_mulhi3_libcall;
45: extern struct rtx_def *dsp16xx_udivqi3_libcall;
46: extern struct rtx_def *dsp16xx_udivhi3_libcall;
47: extern struct rtx_def *dsp16xx_divqi3_libcall;
48: extern struct rtx_def *dsp16xx_divhi3_libcall;
49: extern struct rtx_def *dsp16xx_modqi3_libcall;
50: extern struct rtx_def *dsp16xx_modhi3_libcall;
51: extern struct rtx_def *dsp16xx_umodqi3_libcall;
52: extern struct rtx_def *dsp16xx_umodhi3_libcall;
53:
54: extern struct rtx_def *dsp16xx_ashrhi3_libcall;
55: extern struct rtx_def *dsp16xx_ashlhi3_libcall;
56: extern struct rtx_def *dsp16xx_lshrhi3_libcall;
57:
58:
59: extern int hard_regno_mode_ok ();
60: extern enum reg_class dsp16xx_reg_class_from_letter ();
61: extern enum reg_class dsp16xx_limit_reload_class ();
62: extern int hard_regno_nregs ();
63: extern int regno_reg_class ();
64: extern int move_operand ();
65: extern int symbolic_address_p ();
66: extern int Y_address ();
67: extern int call_address_operand ();
68: extern void notice_update_cc();
69: extern void function_prologue ();
70: extern void function_epilogue ();
71: extern int dsp1600_comparison_reverse ();
72: extern void double_reg_from_memory ();
73: extern void double_reg_to_memory ();
74: extern void bss_section ();
75: extern struct rtx_def *dsp16xx_function_arg ();
76: extern void dsp16xx_function_arg_advance ();
77: extern enum rtx_code next_cc_user_code ();
78: extern enum rtx_code save_next_cc_user_code;
79: extern struct rtx_def *gen_tst_reg ();
80: extern char *output_block_move();
81:
82: /* RUN-TIME TARGET SPECIFICATION */
83: #define DSP16XX 1
84:
85: /* Name of the AT&T assembler */
86:
87: #define ASM_PROG "as1600"
88:
89: /* Name of the AT&T linker */
90:
91: #define LD_PROG "ld1600"
92:
93: /* Define which switches take word arguments */
94: #define WORD_SWITCH_TAKES_ARG(STR) \
95: (!strcmp (STR, "ifile") ? 1 : \
96: 0)
97:
98: #ifdef CC1_SPEC
99: #undef CC1_SPEC
100: #endif
101: #define CC1_SPEC ""
102:
103: /* Define this as a spec to call the AT&T assembler */
104:
105: #define CROSS_ASM_SPEC "%{!S:as1600 %a %i\n }"
106:
107: /* Define this as a spec to call the AT&T linker */
108:
109: #define CROSS_LINK_SPEC "%{!c:%{!M:%{!MM:%{!E:%{!S:ld1600 %l %X %{o*} %{m} \
110: %{r} %{s} %{t} %{u*} %{x}\
111: %{!A:%{!nostdlib:%S}} %{static:}\
112: %{L*} %D %o %{!nostdlib:-le1600 %L -le1600 %{!A:%E}}\n }}}}}"
113:
114: /* Nothing complicated here, just link with libc.a under normal
115: circumstances */
116: #define LIB_SPEC "-lc"
117:
118: /* Specify the startup file to link with. */
119: #define STARTFILE_SPEC "%{mmap1:m1_crt0.o%s} \
120: %{mmap2:m2_crt0.o%s} \
121: %{mmap3:m3_crt0.o%s} \
122: %{mmap4:m4_crt0.o%s} \
123: %{!mmap*: %{!ifile*: m4_crt0.o%s} %{ifile*: \
124: %eA -ifile option requires a -map option}}"
125:
126: /* Specify the end file to link with */
127:
128: #define ENDFILE_SPEC "%{mmap1:m1_crtn.o%s} \
129: %{mmap2:m2_crtn.o%s} \
130: %{mmap3:m3_crtn.o%s} \
131: %{mmap4:m4_crtn.o%s} \
132: %{!mmap*: %{!ifile*: m4_crtn.o%s} %{ifile*: \
133: %eA -ifile option requires a -map option}}"
134:
135:
136: /* Tell gcc where to look for the startfile */
137: #define STANDARD_STARTFILE_PREFIX "/d1600/lib"
138:
139: /* Tell gcc where to look for it's executables */
140: #define STANDARD_EXEC_PREFIX "/d1600/bin"
141:
142: /* Command line options to the AT&T assembler */
143: #define ASM_SPEC "%{V} %{v:%{!V:-V}} %{g*:-g}"
144:
145: /* Command line options for the AT&T linker */
146: #define LINK_SPEC "%{V} %{v:%{!V:-V}} %{minit:-i} \
147: %{!ifile*:%{mmap1:-ifile m1_deflt.if%s} \
148: %{mmap2:-ifile m2_deflt.if%s} \
149: %{mmap3:-ifile m3_deflt.if%s} \
150: %{mmap4:-ifile m4_deflt.if%s} \
151: %{!mmap*:-ifile m4_deflt.if%s}} \
152: %{ifile*} %{!r:-a}"
153:
154: /* Names to predefine in the preprocessor for this target machine. */
155: #ifdef __MSDOS__
156: #define CPP_PREDEFINES "-Ddsp1600 -DDSP1600 -DMSDOS"
157: #else
158: #define CPP_PREDEFINES "-Ddsp1600 -DDSP1600 -Ddsp1610 -DDSP1610"
159: #endif
160:
161: /* Run-time compilation parameters selecting different hardware subsets. */
162:
163: extern int target_flags;
164:
165: /* Macros used in the machine description to test the flags. */
166:
167: #define MASK_REGPARM 0x00000001 /* Pass parameters in registers */
168: #define MASK_NEAR_CALL 0x00000002 /* The call is on the same 4k page */
169: #define MASK_NEAR_JUMP 0x00000004 /* The jump is on the same 4k page */
170: #define MASK_BMU 0x00000008 /* Use the 'bmu' shift instructions */
171: #define MASK_OPTIMIZE_MEMORY 0x00000010 /* Optimize to conserve memory */
172: #define MASK_OPTIMIZE_SPEED 0x00000020 /* Optimize for speed */
173: #define MASK_MAP1 0x00000040 /* Link with map1 */
174: #define MASK_MAP2 0x00000080 /* Link with map2 */
175: #define MASK_MAP3 0x00000100 /* Link with map3 */
176: #define MASK_MAP4 0x00000200 /* Link with map4 */
177: #define MASK_YBASE_HIGH 0x00000400 /* The ybase register window starts high */
178: #define MASK_INIT 0x00000800 /* Have the linker generate tables to
179: initialize data at startup */
180: #define MASK_INLINE_MULT 0x00001000 /* Inline 32 bit multiplies */
181: #define MASK_RESERVE_YBASE 0x00002000 /* Reserved the ybase registers */
182:
183: /* Compile passing first two args in regs 0 and 1.
184: This exists only to test compiler features that will
185: be needed for RISC chips. It is not usable
186: and is not intended to be usable on this cpu. */
187: #define TARGET_REGPARM (target_flags & MASK_REGPARM)
188:
189: /* The call is on the same 4k page, so instead of loading
190: the 'pt' register and branching, we can branch directly */
191:
192: #define TARGET_NEAR_CALL (target_flags & MASK_NEAR_CALL)
193:
194: /* The jump is on the same 4k page, so instead of loading
195: the 'pt' register and branching, we can branch directly */
196:
197: #define TARGET_NEAR_JUMP (target_flags & MASK_NEAR_JUMP)
198:
199: /* Generate shift instructions to use the 1610 Bit Manipulation
200: Unit. */
201: #define TARGET_BMU (target_flags & MASK_BMU)
202:
203: /* Optimize to conseverve memory */
204: #define TARGET_OPTIMIZE_MEMORY (target_flags & MASK_OPTIMIZE_MEMORY)
205:
206: /* Optimize for maximum speed */
207: #define TARGET_OPTIMIZE_SPEED (target_flags & MASK_OPTIMIZE_SPEED)
208:
209: #define TARGET_YBASE_HIGH (target_flags & MASK_YBASE_HIGH)
210:
211: /* Direct the linker to output extra info for initialized data */
212: #define TARGET_MASK_INIT (target_flags & MASK_INIT)
213:
214: #define TARGET_INLINE_MULT (target_flags & MASK_INLINE_MULT)
215:
216: /* Reserve the ybase registers *(0) - *(31) */
217: #define TARGET_RESERVE_YBASE (target_flags & MASK_RESERVE_YBASE)
218:
219: /* Macro to define tables used to set the flags.
220: This is a list in braces of pairs in braces,
221: each pair being { "NAME", VALUE }
222: where VALUE is the bits to set or minus the bits to clear.
223: An empty string NAME is used to identify the default VALUE. */
224:
225:
226: #define TARGET_SWITCHES \
227: { \
228: { "regparm", MASK_REGPARM}, \
229: { "no-regparm", -MASK_REGPARM}, \
230: { "no-near-call", -MASK_NEAR_CALL}, \
231: { "near-jump", MASK_NEAR_JUMP}, \
232: { "no-near-jump", -MASK_NEAR_JUMP}, \
233: { "bmu", MASK_BMU}, \
234: { "no-bmu", -MASK_BMU}, \
235: { "Om", MASK_OPTIMIZE_MEMORY}, \
236: { "Os", MASK_OPTIMIZE_SPEED}, \
237: { "map1", MASK_MAP1}, \
238: { "map2", MASK_MAP2}, \
239: { "map3", MASK_MAP3}, \
240: { "map4", MASK_MAP4}, \
241: { "ybase-high", MASK_YBASE_HIGH}, \
242: { "init", MASK_INIT}, \
243: { "inline-mult", MASK_INLINE_MULT}, \
244: { "reserve-ybase", MASK_RESERVE_YBASE}, \
245: { "", TARGET_DEFAULT} \
246: }
247:
248: /* Default target_flags if no switches are specified */
249: #ifndef TARGET_DEFAULT
250: #define TARGET_DEFAULT MASK_OPTIMIZE_MEMORY|MASK_REGPARM|MASK_YBASE_HIGH
251: #endif
252:
253: /* This macro is similar to `TARGET_SWITCHES' but defines names of
254: command options that have values. Its definition is an
255: initializer with a subgrouping for each command option.
256:
257: Each subgrouping contains a string constant, that defines the
258: fixed part of the option name, and the address of a variable.
259: The variable, type `char *', is set to the variable part of the
260: given option if the fixed part matches. The actual option name
261: is made by appending `-m' to the specified name.
262:
263: Here is an example which defines `-mshort-data-NUMBER'. If the
264: given option is `-mshort-data-512', the variable `m88k_short_data'
265: will be set to the string `"512"'.
266:
267: extern char *m88k_short_data;
268: #define TARGET_OPTIONS { { "short-data-", &m88k_short_data } } */
269:
270: #define TARGET_OPTIONS \
271: { \
272: { "text=", &text_seg_name }, \
273: { "data=", &data_seg_name }, \
274: { "bss=", &bss_seg_name }, \
275: { "const=", &const_seg_name }, \
276: { "chip=", &chip_name } \
277: }
278:
279: /* Sometimes certain combinations of command options do not make sense
280: on a particular target machine. You can define a macro
281: `OVERRIDE_OPTIONS' to take account of this. This macro, if
282: defined, is executed once just after all the command options have
283: been parsed. */
284:
285: #define OVERRIDE_OPTIONS override_options ()
286:
287: #define OPTIMIZATION_OPTIONS(LEVEL) \
288: { \
289: flag_gnu_linker = FALSE; \
290: \
291: if (LEVEL) \
292: { \
293: flag_omit_frame_pointer = TRUE; \
294: flag_thread_jumps = TRUE; \
295: } \
296: \
297: if (LEVEL >= 2) \
298: { \
299: flag_strength_reduce = TRUE; \
300: flag_cse_follow_jumps = TRUE; \
301: flag_cse_skip_blocks = TRUE; \
302: flag_expensive_optimizations = TRUE; \
303: flag_rerun_cse_after_loop = TRUE; \
304: } \
305: \
306: if (LEVEL >= 3) \
307: { \
308: flag_inline_functions = 1; \
309: } \
310: }
311:
312: /* STORAGE LAYOUT */
313:
314: /* Define if you don't want extended real, but do want to use the
315: software floating point emulator for REAL_ARITHMETIC and
316: decimal <-> binary conversion. */
317: #define REAL_ARITHMETIC
318:
319: /* Define this if most significant bit is lowest numbered
320: in instructions that operate on numbered bit-fields.
321: */
322: #define BITS_BIG_ENDIAN 1
323:
324: /* Define this if most significant byte of a word is the lowest numbered.
325: We define big-endian, but since the 1600 series cannot address bytes
326: it does not matter. */
327: #define BYTES_BIG_ENDIAN 1
328:
329: /* Define this if most significant word of a multiword number is numbered.
330: For the 1600 we can decide arbitrarily since there are no machine instructions for them. */
331: #define WORDS_BIG_ENDIAN 1
332:
333: /* number of bits in an addressible storage unit */
334: #define BITS_PER_UNIT 16
335:
336: /* Width in bits of a "word", which is the contents of a machine register.
337: Note that this is not necessarily the width of data type `int';
338: if using 16-bit ints on a 68000, this would still be 32.
339: But on a machine with 16-bit registers, this would be 16. */
340: #define BITS_PER_WORD 16
341:
342: /* Maximum number of bits in a word. */
343: #define MAX_BITS_PER_WORD 16
344:
345: /* Width of a word, in units (bytes). */
346: #define UNITS_PER_WORD 1
347:
348: /* Width in bits of a pointer.
349: See also the macro `Pmode' defined below. */
350: #define POINTER_SIZE 16
351:
352: /* Allocation boundary (in *bits*) for storing pointers in memory. */
353: #define POINTER_BOUNDARY 16
354:
355: /* Allocation boundary (in *bits*) for storing arguments in argument list. */
356: #define PARM_BOUNDARY 16
357:
358: /* Boundary (in *bits*) on which stack pointer should be aligned. */
359: #define STACK_BOUNDARY 16
360:
361: /* Allocation boundary (in *bits*) for the code of a function. */
362: #define FUNCTION_BOUNDARY 16
363:
364: /* Biggest alignment that any data type can require on this machine, in bits. */
365: #define BIGGEST_ALIGNMENT 16
366:
367: /* Biggest alignment that any structure field can require on this machine, in bits */
368: #define BIGGEST_FIELD_ALIGNMENT 16
369:
370: /* Alignment of field after `int : 0' in a structure. */
371: #define EMPTY_FIELD_BOUNDARY 16
372:
373: /* Number of bits which any structure or union's size must be a multiple of. Each structure
374: or union's size is rounded up to a multiple of this */
375: #define STRUCTURE_SIZE_BOUNDARY 16
376:
377: /* Define this if move instructions will actually fail to work
378: when given unaligned data. */
379: #define STRICT_ALIGNMENT 1
380:
381: /* An integer expression for the size in bits of the largest integer machine mode that
382: should actually be used. All integer machine modes of this size or smaller can be
383: used for structures and unions with the appropriate sizes. */
384: #define MAX_FIXED_MODE_SIZE 32
385:
386: /* LAYOUT OF SOURCE LANGUAGE DATA TYPES */
387:
388: #define CHAR_TYPE_SIZE 16
389: #define SHORT_TYPE_SIZE 16
390: #define INT_TYPE_SIZE 16
391: #define LONG_TYPE_SIZE 32
392: #define LONG_LONG_TYPE_SIZE 32
393: #define FLOAT_TYPE_SIZE 32
394: #define DOUBLE_TYPE_SIZE 32
395: #define LONG_DOUBLE_TYPE_SIZE 32
396:
397: /* An expression whose value is 1 or 0, according to whether the type char should be
398: signed or unsigned by default. */
399:
400: #define DEFAULT_SIGNED_CHAR 1
401:
402: /* A C expression to determine whether to give an enum type only as many bytes
403: as it takes to represent the range of possible values of that type. A nonzero
404: value means to do that; a zero value means all enum types should be allocated
405: like int. */
406:
407: #define DEFAULT_SHORT_ENUMS 0
408:
409: /* A C expression for a string describing the name of the data type to use for
410: size values. */
411:
412: #define SIZE_TYPE "long unsigned int"
413:
414: /* A C expression for a string describing the name of the datat type to use for the
415: result of subtracting two pointers */
416:
417: #define PTRDIFF_TYPE "long int"
418:
419: #define TARGET_BELL '\a'
420: #define TARGET_BS '\b'
421: #define TARGET_TAB '\t'
422: #define TARGET_NEWLINE '\n'
423: #define TARGET_VT '\v'
424: #define TARGET_FF '\f'
425: #define TARGET_CR '\r'
426:
427:
428: /* REGISTER USAGE. */
429:
430: #define ALL_16_BIT_REGISTERS 1
431:
432: /* Number of actual hardware registers.
433: The hardware registers are assigned numbers for the compiler
434: from 0 to FIRST_PSEUDO_REGISTER-1 */
435:
436: #define FIRST_PSEUDO_REGISTER REG_YBASE31 + 1
437:
438: /* 1 for registers that have pervasive standard uses
439: and are not available for the register allocator.
440:
441: The registers are layed out as follows:
442:
443: {a0,a0l,a1,a1l,x,y,yl,p,pl} - Data Arithmetic Unit
444: {r0,r1,r2,r3,j,k,ybase} - Y Space Address Arithmetic Unit
445: {pt} - X Space Address Arithmetic Unit
446: {ar0,ar1,ar2,ar3} - Bit Manipulation UNit
447: {pr} - Return Address Register
448:
449: We reserve r2 for the Stack Pointer.
450: We specify r3 for the Frame Pointer but allow the compiler
451: to omit it when possible since we have so few pointer registers. */
452:
453: #define REG_A0 0
454: #define REG_A0L 1
455: #define REG_A1 2
456: #define REG_A1L 3
457: #define REG_X 4
458: #define REG_Y 5
459: #define REG_YL 6
460: #define REG_PROD 7
461: #define REG_PRODL 8
462: #define REG_R0 9
463: #define REG_R1 10
464: #define REG_R2 11
465: #define REG_R3 12
466: #define REG_J 13
467: #define REG_K 14
468: #define REG_YBASE 15
469: #define REG_PT 16
470: #define REG_AR0 17
471: #define REG_AR1 18
472: #define REG_AR2 19
473: #define REG_AR3 20
474: #define REG_C0 21
475: #define REG_C1 22
476: #define REG_C2 23
477: #define REG_PR 24
478: #define REG_RB 25
479: #define REG_YBASE0 26
480: #define REG_YBASE1 27
481: #define REG_YBASE2 28
482: #define REG_YBASE3 29
483: #define REG_YBASE4 30
484: #define REG_YBASE5 31
485: #define REG_YBASE6 32
486: #define REG_YBASE7 33
487: #define REG_YBASE8 34
488: #define REG_YBASE9 35
489: #define REG_YBASE10 36
490: #define REG_YBASE11 37
491: #define REG_YBASE12 38
492: #define REG_YBASE13 39
493: #define REG_YBASE14 40
494: #define REG_YBASE15 41
495: #define REG_YBASE16 42
496: #define REG_YBASE17 43
497: #define REG_YBASE18 44
498: #define REG_YBASE19 45
499: #define REG_YBASE20 46
500: #define REG_YBASE21 47
501: #define REG_YBASE22 48
502: #define REG_YBASE23 49
503: #define REG_YBASE24 50
504: #define REG_YBASE25 51
505: #define REG_YBASE26 52
506: #define REG_YBASE27 53
507: #define REG_YBASE28 54
508: #define REG_YBASE29 55
509: #define REG_YBASE30 56
510: #define REG_YBASE31 57
511:
512: /* Do we have a accumulator register? */
513: #define IS_ACCUM_REG(REGNO) ((REGNO) >= REG_A0 && (REGNO) <= REG_A1L)
514: #define IS_ACCUM_LOW_REG(REGNO) ((REGNO) == REG_A0L || (REGNO) == REG_A1L)
515:
516: /* Do we have a virtual ybase register */
517: #define IS_YBASE_REGISTER_WINDOW(REGNO) ((REGNO) >= REG_YBASE0 && (REGNO) <= REG_YBASE31)
518:
519: #define IS_ADDRESS_REGISTER(REGNO) ((REGNO) >= REG_R0 && (REGNO) <= REG_R3)
520:
521: #define FIXED_REGISTERS \
522: {0, 0, 0, 0, 0, 0, 0, 0, 0, \
523: 0, 0, 0, 1, 0, 0, 1, \
524: 1, \
525: 0, 0, 0, 0, \
526: 1, 1, 1, \
527: 0, 0, \
528: 0, 0, 0, 0, 0, 0, 0, 0, \
529: 0, 0, 0, 0, 0, 0, 0, 0, \
530: 0, 0, 0, 0, 0, 0, 0, 0, \
531: 0, 0, 0, 0, 0, 0, 0, 0}
532:
533: /* 1 for registers not available across function calls.
534: These must include the FIXED_REGISTERS and also any
535: registers that can be used without being saved.
536: The latter must include the registers where values are returned
537: and the register where structure-value addresses are passed.
538: On the 1610 'a0' holds return values from functions. 'r0' holds
539: structure-value addresses.
540:
541: In addition we don't save either j, k, ybase or any of the
542: bit manipulation registers. */
543:
544:
545: #define CALL_USED_REGISTERS \
546: {1, 1, 1, 1, 0, 1, 1, 1, 1, \
547: 1, 0, 0, 1, 1, 1, 1, \
548: 1, \
549: 0, 0, 1, 1, \
550: 1, 1, 1, \
551: 0, 1, \
552: 0, 0, 0, 0, 0, 0, 0, 0, \
553: 0, 0, 0, 0, 0, 0, 0, 0, \
554: 0, 0, 0, 0, 0, 0, 0, 0, \
555: 0, 0, 0, 0, 0, 0, 0, 0}
556:
557: /* List the order in which to allocate registers. Each register must be
558: listed once, even those in FIXED_REGISTERS.
559:
560: We allocate in the following order:
561: */
562:
563: #define REG_ALLOC_ORDER \
564: { REG_R0, REG_R1, REG_R2, REG_PROD, REG_Y, REG_X, \
565: REG_PRODL, REG_YL, REG_AR0, REG_AR1, \
566: REG_RB, REG_A0, REG_A1, REG_A0L, \
567: REG_A1L, REG_AR2, REG_AR3, \
568: REG_YBASE, REG_J, REG_K, REG_PR, REG_PT, REG_C0, \
569: REG_C1, REG_C2, REG_R3, \
570: REG_YBASE0, REG_YBASE1, REG_YBASE2, REG_YBASE3, \
571: REG_YBASE4, REG_YBASE5, REG_YBASE6, REG_YBASE7, \
572: REG_YBASE8, REG_YBASE9, REG_YBASE10, REG_YBASE11, \
573: REG_YBASE12, REG_YBASE13, REG_YBASE14, REG_YBASE15, \
574: REG_YBASE16, REG_YBASE17, REG_YBASE18, REG_YBASE19, \
575: REG_YBASE20, REG_YBASE21, REG_YBASE22, REG_YBASE23, \
576: REG_YBASE24, REG_YBASE25, REG_YBASE26, REG_YBASE27, \
577: REG_YBASE28, REG_YBASE29, REG_YBASE30, REG_YBASE31 }
578:
579: /* Zero or more C statements that may conditionally modify two
580: variables `fixed_regs' and `call_used_regs' (both of type `char
581: []') after they have been initialized from the two preceding
582: macros.
583:
584: This is necessary in case the fixed or call-clobbered registers
585: depend on target flags.
586:
587: You need not define this macro if it has no work to do.
588:
589: If the usage of an entire class of registers depends on the target
590: flags, you may indicate this to GCC by using this macro to modify
591: `fixed_regs' and `call_used_regs' to 1 for each of the registers in
592: the classes which should not be used by GCC. Also define the macro
593: `REG_CLASS_FROM_LETTER' to return `NO_REGS' if it is called with a
594: letter for a class that shouldn't be used.
595:
596: (However, if this class is not included in `GENERAL_REGS' and all
597: of the insn patterns whose constraints permit this class are
598: controlled by target switches, then GCC will automatically avoid
599: using these registers when the target switches are opposed to
600: them.) If the user tells us there is no BMU, we can't use
601: ar0-ar3 for regsiter allocation */
602:
603: #define CONDITIONAL_REGISTER_USAGE \
604: do \
605: { \
606: if (!TARGET_BMU) \
607: { \
608: int regno; \
609: \
610: for (regno = REG_AR0; regno <= REG_AR3; regno++) \
611: fixed_regs[regno] = call_used_regs[regno] = 1; \
612: } \
613: if (TARGET_RESERVE_YBASE) \
614: { \
615: int regno; \
616: \
617: for (regno = REG_YBASE0; regno <= REG_YBASE31; regno++) \
618: fixed_regs[regno] = call_used_regs[regno] = 1; \
619: } \
620: } \
621: while (0)
622:
623: /* Determine which register classes are very likely used by spill registers.
624: local-alloc.c won't allocate pseudos that have these classes as their
625: preferred class unless they are "preferred or nothing". */
626:
627: #define CLASS_LIKELY_SPILLED_P(CLASS) \
628: ((CLASS) != ALL_REGS && (CLASS) != YBASE_VIRT_REGS)
629:
630: /* Return number of consecutive hard regs needed starting at reg REGNO
631: to hold something of mode MODE.
632: This is ordinarily the length in words of a value of mode MODE
633: but can be less for certain modes in special long registers. */
634:
635: #define HARD_REGNO_NREGS(REGNO, MODE) \
636: (GET_MODE_SIZE(MODE))
637:
638: /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE. */
639:
640: #define HARD_REGNO_MODE_OK(REGNO, MODE) hard_regno_mode_ok(REGNO, MODE)
641:
642: /* Value is 1 if it is a good idea to tie two pseudo registers
643: when one has mode MODE1 and one has mode MODE2.
644: If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
645: for any hard reg, then this must be 0 for correct output. */
646: #define MODES_TIEABLE_P(MODE1, MODE2) \
647: (((MODE1) == (MODE2)) || \
648: (GET_MODE_CLASS((MODE1)) == MODE_FLOAT) \
649: == (GET_MODE_CLASS((MODE2)) == MODE_FLOAT))
650:
651: /* Specify the registers used for certain standard purposes.
652: The values of these macros are register numbers. */
653:
654: /* DSP1600 pc isn't overloaded on a register. */
655: /* #define PC_REGNUM */
656:
657: /* Register to use for pushing function arguments.
658: This is r3 in our case */
659: #define STACK_POINTER_REGNUM REG_R3
660:
661: /* Base register for access to local variables of the function.
662: This is r2 in our case */
663: #define FRAME_POINTER_REGNUM REG_R2
664:
665: /* We can debug without the frame pointer */
666: #define CAN_DEBUG_WITHOUT_FP 1
667:
668: /* The 1610 saves the return address in this register */
669: #define RETURN_ADDRESS_REGNUM REG_PR
670:
671: /* Base register for access to arguments of the function. */
672: #define ARG_POINTER_REGNUM FRAME_POINTER_REGNUM
673:
674: /* Register in which static-chain is passed to a function. */
675:
676: #define STATIC_CHAIN_REGNUM 4
677:
678: /* Register in which address to store a structure value
679: is passed to a function. This is 'r0' in our case */
680: #define STRUCT_VALUE_REGNUM REG_R0
681:
682: /* Define the classes of registers for register constraints in the
683: machine description. Also define ranges of constants.
684:
685: One of the classes must always be named ALL_REGS and include all hard regs.
686: If there is more than one class, another class must be named NO_REGS
687: and contain no registers.
688:
689: The name GENERAL_REGS must be the name of a class (or an alias for
690: another name such as ALL_REGS). This is the class of registers
691: that is allowed by "g" or "r" in a register constraint.
692: Also, registers outside this class are allocated only when
693: instructions express preferences for them.
694:
695: The classes must be numbered in nondecreasing order; that is,
696: a larger-numbered class must never be contained completely
697: in a smaller-numbered class.
698:
699: For any two classes, it is very desirable that there be another
700: class that represents their union. */
701:
702:
703: enum reg_class
704: {
705: NO_REGS,
706: A0H_REG,
707: A0L_REG,
708: A0_REG,
709: A1H_REG,
710: ACCUM_HIGH_REGS,
711: A1L_REG,
712: ACCUM_LOW_REGS,
713: A1_REG,
714: ACCUM_REGS,
715: X_REG,
716: X_OR_ACCUM_LOW_REGS,
717: X_OR_ACCUM_REGS,
718: YH_REG,
719: YH_OR_ACCUM_HIGH_REGS,
720: X_OR_YH_REGS,
721: YL_REG,
722: YL_OR_ACCUM_LOW_REGS,
723: X_OR_YL_REGS,
724: X_OR_Y_REGS,
725: Y_REG,
726: ACCUM_OR_Y_REGS,
727: PH_REG,
728: X_OR_PH_REGS,
729: PL_REG,
730: PL_OR_ACCUM_LOW_REGS,
731: X_OR_PL_REGS,
732: YL_OR_PL_OR_ACCUM_LOW_REGS,
733: P_REG,
734: ACCUM_OR_P_REGS,
735: YL_OR_P_REGS,
736: ACCUM_LOW_OR_YL_OR_P_REGS,
737: Y_OR_P_REGS,
738: ACCUM_Y_OR_P_REGS,
739: NO_FRAME_Y_ADDR_REGS,
740: Y_ADDR_REGS,
741: ACCUM_LOW_OR_Y_ADDR_REGS,
742: ACCUM_OR_Y_ADDR_REGS,
743: X_OR_Y_ADDR_REGS,
744: Y_OR_Y_ADDR_REGS,
745: P_OR_Y_ADDR_REGS,
746: NON_HIGH_YBASE_ELIGIBLE_REGS,
747: YBASE_ELIGIBLE_REGS,
748: J_REG,
749: J_OR_DAU_16_BIT_REGS,
750: BMU_REGS,
751: NOHIGH_NON_ADDR_REGS,
752: NON_ADDR_REGS,
753: SLOW_MEM_LOAD_REGS,
754: NOHIGH_NON_YBASE_REGS,
755: NO_ACCUM_NON_YBASE_REGS,
756: NON_YBASE_REGS,
757: YBASE_VIRT_REGS,
758: ACCUM_LOW_OR_YBASE_REGS,
759: ACCUM_OR_YBASE_REGS,
760: X_OR_YBASE_REGS,
761: Y_OR_YBASE_REGS,
762: ACCUM_LOW_YL_PL_OR_YBASE_REGS,
763: P_OR_YBASE_REGS,
764: ACCUM_Y_P_OR_YBASE_REGS,
765: Y_ADDR_OR_YBASE_REGS,
766: YBASE_OR_NOHIGH_YBASE_ELIGIBLE_REGS,
767: YBASE_OR_YBASE_ELIGIBLE_REGS,
768: NO_HIGH_ALL_REGS,
769: ALL_REGS,
770: LIM_REG_CLASSES
771: };
772:
773: /* GENERAL_REGS must be the name of a register class */
774: #define GENERAL_REGS ALL_REGS
775:
776: #define N_REG_CLASSES (int) LIM_REG_CLASSES
777:
778: /* Give names of register classes as strings for dump file. */
779:
780: #define REG_CLASS_NAMES \
781: { \
782: "NO_REGS", \
783: "A0H_REG", \
784: "A0L_REG", \
785: "A0_REG", \
786: "A1H_REG", \
787: "ACCUM_HIGH_REGS", \
788: "A1L_REG", \
789: "ACCUM_LOW_REGS", \
790: "A1_REG", \
791: "ACCUM_REGS", \
792: "X_REG", \
793: "X_OR_ACCUM_LOW_REGS", \
794: "X_OR_ACCUM_REGS", \
795: "YH_REG", \
796: "YH_OR_ACCUM_HIGH_REGS", \
797: "X_OR_YH_REGS", \
798: "YL_REG", \
799: "YL_OR_ACCUM_LOW_REGS", \
800: "X_OR_YL_REGS", \
801: "X_OR_Y_REGS", \
802: "Y_REG", \
803: "ACCUM_OR_Y_REGS", \
804: "PH_REG", \
805: "X_OR_PH_REGS", \
806: "PL_REG", \
807: "PL_OR_ACCUM_LOW_REGS", \
808: "X_OR_PL_REGS", \
809: "PL_OR_YL_OR_ACCUM_LOW_REGS", \
810: "P_REG", \
811: "ACCUM_OR_P_REGS", \
812: "YL_OR_P_REGS", \
813: "ACCUM_LOW_OR_YL_OR_P_REGS", \
814: "Y_OR_P_REGS", \
815: "ACCUM_Y_OR_P_REGS", \
816: "NO_FRAME_Y_ADDR_REGS", \
817: "Y_ADDR_REGS", \
818: "ACCUM_LOW_OR_Y_ADDR_REGS", \
819: "ACCUM_OR_Y_ADDR_REGS", \
820: "X_OR_Y_ADDR_REGS", \
821: "Y_OR_Y_ADDR_REGS", \
822: "P_OR_Y_ADDR_REGS", \
823: "NON_HIGH_YBASE_ELIGIBLE_REGS", \
824: "YBASE_ELIGIBLE_REGS", \
825: "J_REG", \
826: "J_OR_DAU_16_BIT_REGS", \
827: "BMU_REGS", \
828: "NOHIGH_NON_ADDR_REGS", \
829: "NON_ADDR_REGS", \
830: "SLOW_MEM_LOAD_REGS", \
831: "NOHIGH_NON_YBASE_REGS", \
832: "NO_ACCUM_NON_YBASE_REGS", \
833: "NON_YBASE_REGS", \
834: "YBASE_VIRT_REGS", \
835: "ACCUM_LOW_OR_YBASE_REGS", \
836: "ACCUM_OR_YBASE_REGS", \
837: "X_OR_YBASE_REGS", \
838: "Y_OR_YBASE_REGS", \
839: "ACCUM_LOW_YL_PL_OR_YBASE_REGS", \
840: "P_OR_YBASE_REGS", \
841: "ACCUM_Y_P_OR_YBASE_REGS", \
842: "Y_ADDR_OR_YBASE_REGS", \
843: "YBASE_OR_NOHIGH_YBASE_ELIGIBLE_REGS", \
844: "YBASE_OR_YBASE_ELIGIBLE_REGS", \
845: "NO_HIGH_ALL_REGS", \
846: "ALL_REGS" \
847: }
848:
849: /* Define which registers fit in which classes.
850: This is an initializer for a vector of HARD_REG_SET
851: of length N_REG_CLASSES. */
852:
853: #define REG_CLASS_CONTENTS \
854: { \
855: {0x00000000, 0x00000000}, /* no reg */ \
856: {0x00000001, 0x00000000}, /* a0h */ \
857: {0x00000002, 0x00000000}, /* a0l */ \
858: {0x00000003, 0x00000000}, /* a0h:a0l */ \
859: {0x00000004, 0x00000000}, /* a1h */ \
860: {0x00000005, 0x00000000}, /* accum high */ \
861: {0x00000008, 0x00000000}, /* a1l */ \
862: {0x0000000A, 0x00000000}, /* accum low */ \
863: {0x0000000c, 0x00000000}, /* a1h:a1l */ \
864: {0x0000000f, 0x00000000}, /* accum regs */ \
865: {0x00000010, 0x00000000}, /* x reg */ \
866: {0x0000001A, 0x00000000}, /* x & accum_low_regs */ \
867: {0x0000001f, 0x00000000}, /* x & accum regs */ \
868: {0x00000020, 0x00000000}, /* y high */ \
869: {0x00000025, 0x00000000}, /* yh, accum high */ \
870: {0x00000030, 0x00000000}, /* x & yh */ \
871: {0x00000040, 0x00000000}, /* y low */ \
872: {0x0000004A, 0x00000000}, /* y low, accum_low */ \
873: {0x00000050, 0x00000000}, /* x & yl */ \
874: {0x00000060, 0x00000000}, /* yl:yh */ \
875: {0x00000070, 0x00000000}, /* x, yh,a nd yl */ \
876: {0x0000006F, 0x00000000}, /* accum, y */ \
877: {0x00000080, 0x00000000}, /* p high */ \
878: {0x00000090, 0x00000000}, /* x & ph */ \
879: {0x00000100, 0x00000000}, /* p low */ \
880: {0x0000010A, 0x00000000}, /* p_low and accum_low */ \
881: {0x00000110, 0x00000000}, /* x & pl */ \
882: {0x0000014A, 0x00000000}, /* pl,yl,a1l,a0l */ \
883: {0x00000180, 0x00000000}, /* pl:ph */ \
884: {0x0000018F, 0x00000000}, /* accum, p */ \
885: {0x000001C0, 0x00000000}, /* pl:ph and yl */ \
886: {0x000001CA, 0x00000000}, /* pl:ph, yl, a0l, a1l */ \
887: {0x000001E0, 0x00000000}, /* y or p */ \
888: {0x000001EF, 0x00000000}, /* accum, y or p */ \
889: {0x00000E00, 0x00000000}, /* r0-r2 */ \
890: {0x00001E00, 0x00000000}, /* r0-r3 */ \
891: {0x00001E0A, 0x00000000}, /* r0-r3, accum_low */ \
892: {0x00001E0F, 0x00000000}, /* accum,r0-r3 */ \
893: {0x00001E10, 0x00000000}, /* x,r0-r3 */ \
894: {0x00001E60, 0x00000000}, /* y,r0-r3 */ \
895: {0x00001F80, 0x00000000}, /* p,r0-r3 */ \
896: {0x00001FDA, 0x00000000}, /* ph:pl, r0-r3, x,a0l,a1l */ \
897: {0x00001fff, 0x00000000}, /* accum,x,y,p,r0-r3 */ \
898: {0x00002000, 0x00000000}, /* j */ \
899: {0x00002025, 0x00000000}, /* j, yh, a1h, a0h */ \
900: {0x001E0000, 0x00000000}, /* ar0-ar3 */ \
901: {0x03FFE1DA, 0x00000000}, /* non_addr except yh,a0h,a1h */ \
902: {0x03FFE1FF, 0x00000000}, /* non_addr regs */ \
903: {0x03FFFF8F, 0x00000000}, /* non ybase except yh, yl, and x */ \
904: {0x03FFFFDA, 0x00000000}, /* non ybase regs except yh,a0h,a1h */ \
905: {0x03FFFFF0, 0x00000000}, /* non ybase except a0,a0l,a1,a1l */ \
906: {0x03FFFFFF, 0x00000000}, /* non ybase regs */ \
907: {0xFC000000, 0x03FFFFFF}, /* virt ybase regs */ \
908: {0xFC00000A, 0x03FFFFFF}, /* accum_low, virt ybase regs */ \
909: {0xFC00000F, 0x03FFFFFF}, /* accum, virt ybase regs */ \
910: {0xFC000010, 0x03FFFFFF}, /* x,virt ybase regs */ \
911: {0xFC000060, 0x03FFFFFF}, /* y,virt ybase regs */ \
912: {0xFC00014A, 0x03FFFFFF}, /* accum_low, yl, pl, ybase */ \
913: {0xFC000180, 0x03FFFFFF}, /* p,virt ybase regs */ \
914: {0xFC0001EF, 0x03FFFFFF}, /* accum,y,p,ybase regs */ \
915: {0xFC001E00, 0x03FFFFFF}, /* r0-r3, ybase regs */ \
916: {0xFC001FDA, 0x03FFFFFF}, /* r0-r3, pl:ph,yl,x,a1l,a0l */ \
917: {0xFC001FFF, 0x03FFFFFF}, /* virt ybase, ybase eligible regs */ \
918: {0xFCFFFFDA, 0x03FFFFFF}, /* all regs except yh,a0h,a1h */ \
919: {0xFFFFFFFF, 0x03FFFFFF} /* all regs */ \
920: }
921:
922:
923: /* The same information, inverted:
924: Return the class number of the smallest class containing
925: reg number REGNO. This could be a conditional expression
926: or could index an array. */
927:
928: #define REGNO_REG_CLASS(REGNO) regno_reg_class(REGNO)
929:
930: /* The class value for index registers, and the one for base regs. */
931:
932: #define INDEX_REG_CLASS NO_REGS
933: #define BASE_REG_CLASS Y_ADDR_REGS
934:
935: /* Get reg_class from a letter such as appears in the machine description. */
936:
937: #define REG_CLASS_FROM_LETTER(C) \
938: dsp16xx_reg_class_from_letter(C)
939:
940: #define SECONDARY_RELOAD_CLASS(CLASS, MODE, X) \
941: secondary_reload_class(CLASS, MODE, X)
942:
943: /* When defined, the compiler allows registers explicitly used in the
944: rtl to be used as spill registers but prevents the compiler from
945: extending the lifetime of these registers. */
946:
947: #define SMALL_REGISTER_CLASSES
948:
949: /* Macros to check register numbers against specific register classes. */
950:
951: /* These assume that REGNO is a hard or pseudo reg number.
952: They give nonzero only if REGNO is a hard reg of the suitable class
953: or a pseudo reg currently allocated to a suitable hard reg.
954: Since they use reg_renumber, they are safe only once reg_renumber
955: has been allocated, which happens in local-alloc.c. */
956:
957: /* A C expression which is nonzero if register REGNO is suitable for use
958: as a base register in operand addresses. It may be either a suitable
959: hard register or a pseudo register that has been allocated such a
960: hard register.
961:
962: On the 1610 the Y address pointers can be used as a base registers */
963: #define REGNO_OK_FOR_BASE_P(REGNO) \
964: (((REGNO) >= REG_R0 && (REGNO) < REG_R3 + 1) || ((unsigned) reg_renumber[REGNO] >= REG_R0 \
965: && (unsigned) reg_renumber[REGNO] < REG_R3 + 1))
966:
967: #define REGNO_OK_FOR_YBASE_P(REGNO) \
968: (((REGNO) == REG_YBASE) || ((unsigned) reg_renumber[REGNO] == REG_YBASE))
969:
970: #define REGNO_OK_FOR_INDEX_P(REGNO) 0
971:
972: #ifdef ALL_16_BIT_REGISTERS
973: #define IS_32_BIT_REG(REGNO) 0
974: #else
975: #define IS_32_BIT_REG(REGNO) \
976: ((REGNO) == REG_A0 || (REGNO) == REG_A1 || (REGNO) == REG_Y || (REGNO) == REG_PROD)
977: #endif
978:
979: /* Given an rtx X being reloaded into a reg required to be
980: in class CLASS, return the class of reg to actually use.
981: In general this is just CLASS; but on some machines
982: in some cases it is preferable to use a more restrictive class.
983: Also, we must ensure that a PLUS is reloaded either
984: into an accumulator or an address register. */
985:
986: #define PREFERRED_RELOAD_CLASS(X,CLASS) preferred_reload_class (X, CLASS)
987:
988: /* A C expression that places additional restrictions on the register
989: class to use when it is necessary to be able to hold a value of
990: mode MODE in a reload register for which class CLASS would
991: ordinarily be used.
992:
993: Unlike `PREFERRED_RELOAD_CLASS', this macro should be used when
994: there are certain modes that simply can't go in certain reload
995: classes.
996:
997: The value is a register class; perhaps CLASS, or perhaps another,
998: smaller class.
999:
1000: Don't define this macro unless the target machine has limitations
1001: which require the macro to do something nontrivial. */
1002:
1003: #if 0
1004: #define LIMIT_RELOAD_CLASS(MODE, CLASS) dsp16xx_limit_reload_class (MODE, CLASS)
1005: #endif
1006:
1007: /* A C expression for the maximum number of consecutive registers of class CLASS
1008: needed to hold a vlaue of mode MODE */
1009: #define CLASS_MAX_NREGS(CLASS, MODE) \
1010: class_max_nregs(CLASS, MODE)
1011:
1012: /* The letters 'I' through 'P' in a register constraint string
1013: can be used to stand for particular ranges of immediate operands.
1014: This macro defines what the ranges are.
1015: C is the letter, and VALUE is a constant value.
1016: Return 1 if VALUE is in the range specified by C.
1017:
1018: For the 16xx, the following constraints are used:
1019: 'I' requires a non-negative 16-bit value.
1020: 'J' requires a non-negative 9-bit value
1021: 'K' requires a constant 0 operand.
1022: 'L' requires 16-bit value
1023: 'M' 32-bit value -- low 16-bits zero
1024: */
1025:
1026: #define SMALL_INT(X) (SMALL_INTVAL (INTVAL (X)))
1027: #define SMALL_INTVAL(I) ((unsigned) (I) < 0x10000)
1028: #define SHORT_IMMEDIATE(X) (SHORT_INTVAL (INTVAL(X)))
1029: #define SHORT_INTVAL(I) ((unsigned) (I) < 0x100)
1030:
1031: #define CONST_OK_FOR_LETTER_P(VALUE, C) \
1032: ((C) == 'I' ? (SMALL_INTVAL(VALUE)) \
1033: : (C) == 'J' ? (SHORT_INTVAL(VALUE)) \
1034: : (C) == 'K' ? ((VALUE) == 0) \
1035: : (C) == 'L' ? ! ((VALUE) & ~0x0000ffff) \
1036: : (C) == 'M' ? ! ((VALUE) & ~0xffff0000) \
1037: : (C) == 'N' ? ((VALUE) == -1 || (VALUE) == 1 || \
1038: (VALUE) == -2 || (VALUE) == 2) \
1039: : 0)
1040:
1041: #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) 1
1042:
1043: /* Optional extra constraints for this machine */
1044: #define EXTRA_CONSTRAINT(OP,C) \
1045: ((C) == 'R' ? symbolic_address_p (OP) \
1046: : 0)
1047:
1048: /* DESCRIBING STACK LAYOUT AND CALLING CONVENTIONS */
1049:
1050: /* Define this if pushing a word on the stack
1051: makes the stack pointer a smaller address. */
1052: /* #define STACK_GROWS_DOWNWARD */
1053:
1054: /* Define this if the nominal address of the stack frame
1055: is at the high-address end of the local variables;
1056: that is, each additional local variable allocated
1057: goes at a more negative offset in the frame. */
1058: /* #define FRAME_GROWS_DOWNWARD */
1059:
1060: #define ARGS_GROW_DOWNWARD
1061:
1062: /* We use post decrement on the 1600 because there isn't
1063: a pre-decrement addressing mode. This means that we
1064: assume the stack pointer always points at the next
1065: FREE location on the stack. */
1066: #define STACK_PUSH_CODE POST_INC
1067:
1068: /* Offset within stack frame to start allocating local variables at.
1069: If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
1070: first local allocated. Otherwise, it is the offset to the BEGINNING
1071: of the first local allocated. */
1072: #define STARTING_FRAME_OFFSET 0
1073:
1074: /* Offset from the stack pointer register to the first
1075: location at which outgoing arguments are placed. */
1076: #define STACK_POINTER_OFFSET (0)
1077:
1078: struct dsp16xx_frame_info
1079: {
1080: unsigned long total_size; /* # bytes that the entire frame takes up */
1081: unsigned long var_size; /* # bytes that variables take up */
1082: unsigned long args_size; /* # bytes that outgoing arguments take up */
1083: unsigned long extra_size; /* # bytes of extra gunk */
1084: unsigned int reg_size; /* # bytes needed to store regs */
1085: long fp_save_offset; /* offset from vfp to store registers */
1086: unsigned long sp_save_offset; /* offset from new sp to store registers */
1087: int initialized; /* != 0 if frame size already calculated */
1088: int num_regs; /* number of registers saved */
1089: int function_makes_calls; /* Does the function make calls */
1090: };
1091:
1092: extern struct dsp16xx_frame_info current_frame_info;
1093:
1094: /* If we generate an insn to push BYTES bytes,
1095: this says how many the stack pointer really advances by. */
1096: /* #define PUSH_ROUNDING(BYTES) ((BYTES)) */
1097:
1098: /* If defined, the maximum amount of space required for outgoing
1099: arguments will be computed and placed into the variable
1100: 'current_function_outgoing_args_size'. No space will be pushed
1101: onto the stack for each call; instead, the function prologue should
1102: increase the stack frame size by this amount.
1103:
1104: It is not proper to define both 'PUSH_ROUNDING' and
1105: 'ACCUMULATE_OUTGOING_ARGS'. */
1106: #define ACCUMULATE_OUTGOING_ARGS
1107:
1108: /* Offset of first parameter from the argument pointer
1109: register value. */
1110:
1111: #define FIRST_PARM_OFFSET(FNDECL) (0)
1112:
1113: /* Value is 1 if returning from a function call automatically
1114: pops the arguments described by the number-of-args field in the call.
1115: FUNTYPE is the data type of the function (as a tree),
1116: or for a library call it is an identifier node for the subroutine name. */
1117:
1118: #define RETURN_POPS_ARGS(FUNTYPE, STACK_SIZE) 0
1119:
1120: /* Define how to find the value returned by a function.
1121: VALTYPE is the data type of the value (as a tree).
1122: If the precise function being called is known, FUNC is its FUNCTION_DECL;
1123: otherwise, FUNC is 0. On the 1610 all function return their values
1124: in a0 (i.e. the upper 16 bits). If the return value is 32-bits the
1125: entire register is significant. */
1126:
1127: #define VALUE_REGNO(MODE) (REG_Y)
1128:
1129: #define FUNCTION_VALUE(VALTYPE, FUNC) \
1130: gen_rtx (REG, TYPE_MODE (VALTYPE), VALUE_REGNO(TYPE_MODE(VALTYPE)))
1131:
1132: /* Define how to find the value returned by a library function
1133: assuming the value has mode MODE. */
1134: #define LIBCALL_VALUE(MODE) gen_rtx (REG, MODE, VALUE_REGNO(MODE))
1135:
1136: /* 1 if N is a possible register number for a function value. */
1137: #define FUNCTION_VALUE_REGNO_P(N) ((N) == REG_Y)
1138:
1139:
1140: /* Define where to put the arguments to a function.
1141: Value is zero to push the argument on the stack,
1142: or a hard register in which to store the argument.
1143:
1144: MODE is the argument's machine mode.
1145: TYPE is the data type of the argument (as a tree).
1146: This is null for libcalls where that information may
1147: not be available.
1148: CUM is a variable of type CUMULATIVE_ARGS which gives info about
1149: the preceding args and about the function being called.
1150: NAMED is nonzero if this argument is a named parameter
1151: (otherwise it is an extra parameter matching an ellipsis). */
1152:
1153: /* On the 1610 all args are pushed, except if -mregparm is specified
1154: then the first two words of arguments are passed in a0, a1. */
1155: #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
1156: dsp16xx_function_arg (CUM, MODE, TYPE, NAMED)
1157:
1158: /* Define the first register to be used for argument passing */
1159: #define FIRST_REG_FOR_FUNCTION_ARG REG_Y
1160:
1161: /* Define the profitablity of saving registers around calls.
1162: NOTE: For now we turin this off because of a bug in the
1163: caller-saves code and also because i'm not sure it is helpful
1164: on the 1610. */
1165:
1166: #define CALLER_SAVE_PROFITABLE(REFS,CALLS) 0
1167:
1168: /* This indicates that an argument is to be passed with an invisible reference
1169: (i.e., a pointer to the object is passed).
1170:
1171: On the dsp16xx, we do this if it must be passed on the stack. */
1172:
1173: #define FUNCTION_ARG_PASS_BY_REFERENCE(CUM, MODE, TYPE, NAMED) \
1174: (MUST_PASS_IN_STACK (MODE, TYPE))
1175:
1176: /* For an arg passed partly in registers and partly in memory,
1177: this is the number of registers used.
1178: For args passed entirely in registers or entirely in memory, zero. */
1179:
1180: #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) (0)
1181:
1182: /* Define a data type for recording info about an argument list
1183: during the scan of that argument list. This data type should
1184: hold all necessary information about the function itself
1185: and about the args processed so far, enough to enable macros
1186: such as FUNCTION_ARG to determine where the next arg should go. */
1187: #define CUMULATIVE_ARGS int
1188:
1189: /* Initialize a variable CUM of type CUMULATIVE_ARGS
1190: for a call to a function whose data type is FNTYPE.
1191: For a library call, FNTYPE is 0. */
1192: #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME) ((CUM) = 0)
1193:
1194: /* Update the data in CUM to advance over an argument
1195: of mode MODE and data type TYPE.
1196: (TYPE is null for libcalls where that information may not be available.) */
1197:
1198: #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
1199: dsp16xx_function_arg_advance (&CUM, MODE,TYPE, NAMED)
1200:
1201: /* 1 if N is a possible register number for function argument passing. */
1202: #define FUNCTION_ARG_REGNO_P(N) \
1203: ((N) == REG_Y || (N) == REG_YL || (N) == REG_PROD || (N) == REG_PRODL)
1204:
1205: /* This macro generates the assembly code for function entry.
1206: FILE is a stdio stream to output the code to.
1207: SIZE is an int: how many units of temporary storage to allocate.
1208: Refer to the array `regs_ever_live' to determine which registers
1209: to save; `regs_ever_live[I]' is nonzero if register number I
1210: is ever used in the function. This macro is responsible for
1211: knowing which registers should not be saved even if used. */
1212:
1213: #define FUNCTION_PROLOGUE(FILE, SIZE) function_prologue(FILE, SIZE)
1214:
1215: /* Output assembler code to FILE to increment profiler label # LABELNO
1216: for profiling a function entry. */
1217:
1218: #define FUNCTION_PROFILER(FILE, LABELNO) fatal("Profiling not implemented yet.")
1219:
1220: /* Output assembler code to FILE to initialize this source file's
1221: basic block profiling info, if that has not already been done. */
1222: #define FUNCTION_BLOCK_PROFILER(FILE, LABELNO) fatal("Profiling not implemented yet.")
1223:
1224: /* Output assembler code to FILE to increment the entry-count for
1225: the BLOCKNO'th basic block in this source file. */
1226: #define BLOCK_PROFILER(FILE, BLOCKNO) fatal("Profiling not implemented yet.")
1227:
1228:
1229: /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
1230: the stack pointer does not matter. The value is tested only in
1231: functions that have frame pointers.
1232: No definition is equivalent to always zero. */
1233:
1234: #define EXIT_IGNORE_STACK (0)
1235:
1236: #define TRAMPOLINE_TEMPLATE(FILE) fatal ("Trampolines not yet implemented");
1237:
1238: /* Length in units of the trampoline for entering a nested function.
1239: This is a dummy value */
1240:
1241: #define TRAMPOLINE_SIZE 20
1242:
1243: /* Emit RTL insns to initialize the variable parts of a trampoline.
1244: FNADDR is an RTX for the address of the function's pure code.
1245: CXT is an RTX for the static chain value for the function. */
1246:
1247: #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
1248: fatal ("Trampolines not yet implemented");
1249:
1250: /* This macro generates the assembly code for function exit,
1251: on machines that need it. If FUNCTION_EPILOGUE is not defined
1252: then individual return instructions are generated for each
1253: return statement. Args are same as for FUNCTION_PROLOGUE.
1254:
1255: The function epilogue should not depend on the current stack pointer!
1256: It should use the frame pointer only. This is mandatory because
1257: of alloca; we also take advantage of it to omit stack adjustments
1258: before returning. */
1259:
1260: #define FUNCTION_EPILOGUE(FILE, SIZE) function_epilogue(FILE, SIZE)
1261:
1262: /* A C expression which is nonzero if a function must have and use a
1263: frame pointer. If its value is nonzero the functions will have a
1264: frame pointer. */
1265: #define FRAME_POINTER_REQUIRED (current_function_calls_alloca)
1266:
1267: /* A C statement to store in the variable 'DEPTH' the difference
1268: between the frame pointer and the stack pointer values immediately
1269: after the function prologue. */
1270: #define INITIAL_FRAME_POINTER_OFFSET(DEPTH) \
1271: { (DEPTH) = initial_frame_pointer_offset(); \
1272: }
1273:
1274: /* IMPLICIT CALLS TO LIBRARY ROUTINES */
1275:
1276: #define ADDHF3_LIBCALL "__Emulate_addhf3"
1277: #define SUBHF3_LIBCALL "__Emulate_subhf3"
1278: #define MULHF3_LIBCALL "__Emulate_mulhf3"
1279: #define DIVHF3_LIBCALL "__Emulate_divhf3"
1280: #define CMPHF3_LIBCALL "__Emulate_cmphf3"
1281: #define FIXHFHI2_LIBCALL "__Emulate_fixhfhi2"
1282: #define FLOATHIHF2_LIBCALL "__Emulate_floathihf2"
1283: #define NEGHF2_LIBCALL "__Emulate_neghf2"
1284:
1285: #define UMULHI3_LIBCALL "__Emulate_umulhi3"
1286: #define MULHI3_LIBCALL "__Emulate_mulhi3"
1287: #define UDIVQI3_LIBCALL "__Emulate_udivqi3"
1288: #define UDIVHI3_LIBCALL "__Emulate_udivhi3"
1289: #define DIVQI3_LIBCALL "__Emulate_divqi3"
1290: #define DIVHI3_LIBCALL "__Emulate_divhi3"
1291: #define MODQI3_LIBCALL "__Emulate_modqi3"
1292: #define MODHI3_LIBCALL "__Emulate_modhi3"
1293: #define UMODQI3_LIBCALL "__Emulate_umodqi3"
1294: #define UMODHI3_LIBCALL "__Emulate_umodhi3"
1295: #define ASHRHI3_LIBCALL "__Emulate_ashrhi3"
1296: #define LSHRHI3_LIBCALL "__Emulate_lshrhi3"
1297: #define ASHLHI3_LIBCALL "__Emulate_ashlhi3"
1298: #define LSHLHI3_LIBCALL "__Emulate_lshlhi3" /* NOT USED */
1299:
1300: /* Define this macro if calls to the ANSI C library functions memcpy and
1301: memset should be generated instead of the BSD function bcopy & bzero. */
1302: #define TARGET_MEM_FUNCTIONS
1303:
1304:
1305: /* ADDRESSING MODES */
1306:
1307: /* The 1610 has post-increment and decrement, but no pre-modify */
1308: #define HAVE_POST_INCREMENT
1309: #define HAVE_POST_DECREMENT
1310:
1311: /* #define HAVE_PRE_DECREMENT */
1312: /* #define HAVE_PRE_INCREMENT */
1313:
1314: /* Recognize any constant value that is a valid address. */
1315: #define CONSTANT_ADDRESS_P(X) CONSTANT_P (X)
1316:
1317: /* Maximum number of registers that can appear in a valid memory address. */
1318: #define MAX_REGS_PER_ADDRESS 1
1319:
1320: /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
1321: and check its validity for a certain class.
1322: We have two alternate definitions for each of them.
1323: The usual definition accepts all pseudo regs; the other rejects
1324: them unless they have been allocated suitable hard regs.
1325: The symbol REG_OK_STRICT causes the latter definition to be used.
1326:
1327: Most source files want to accept pseudo regs in the hope that
1328: they will get allocated to the class that the insn wants them to be in.
1329: Source files for reload pass need to be strict.
1330: After reload, it makes no difference, since pseudo regs have
1331: been eliminated by then. */
1332:
1333: #ifndef REG_OK_STRICT
1334:
1335: /* Nonzero if X is a hard reg that can be used as an index
1336: or if it is a pseudo reg. */
1337: #define REG_OK_FOR_INDEX_P(X) 0
1338:
1339: /* Nonzero if X is a hard reg that can be used as a base reg
1340: or if it is a pseudo reg. */
1341: #define REG_OK_FOR_BASE_P(X) \
1342: ((REGNO (X) >= REG_R0 && REGNO (X) < REG_R3 + 1 ) \
1343: || (REGNO (X) >= FIRST_PSEUDO_REGISTER))
1344:
1345: /* Nonzero if X is the 'ybase' register */
1346: #define REG_OK_FOR_YBASE_P(X) \
1347: (REGNO(X) == REG_YBASE || (REGNO (X) >= FIRST_PSEUDO_REGISTER))
1348: #else
1349:
1350: /* Nonzero if X is a hard reg that can be used as an index. */
1351: #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
1352:
1353: /* Nonzero if X is a hard reg that can be used as a base reg. */
1354: #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
1355:
1356: /* Nonzero if X is the 'ybase' register */
1357: #define REG_OK_FOR_YBASE_P(X) REGNO_OK_FOR_YBASE_P (REGNO(X))
1358:
1359: #endif
1360:
1361: /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
1362: that is a valid memory address for an instruction.
1363: The MODE argument is the machine mode for the MEM expression
1364: that wants to use this address.
1365:
1366: On the 1610, the actual legitimate addresses must be N (N must fit in
1367: 5 bits), *rn (register indirect), *rn++, or *rn-- */
1368:
1369: #define INT_FITS_5_BITS(I) ((unsigned long) (I) < 0x20)
1370: #define INT_FITS_16_BITS(I) ((unsigned long) (I) < 0x10000)
1371: #define YBASE_CONST_OFFSET(I) ((I) >= -31 && (I) <= 0)
1372: #define YBASE_OFFSET(X) (GET_CODE (X) == CONST_INT && YBASE_CONST_OFFSET (INTVAL(X)))
1373:
1374: #define FITS_16_BITS(X) (GET_CODE (X) == CONST_INT && INT_FITS_16_BITS(INTVAL(X)))
1375: #define FITS_5_BITS(X) (GET_CODE (X) == CONST_INT && INT_FITS_5_BITS(INTVAL(X)))
1376: #define ILLEGAL_HIMODE_ADDR(MODE, CONST) ((MODE) == HImode && CONST == -31)
1377:
1378: #define INDIRECTABLE_ADDRESS_P(X) \
1379: ((GET_CODE(X) == REG && REG_OK_FOR_BASE_P(X)) \
1380: || ((GET_CODE(X) == POST_DEC || GET_CODE(X) == POST_INC) \
1381: && REG_P(XEXP(X,0)) && REG_OK_FOR_BASE_P(XEXP(X,0))) \
1382: || (GET_CODE(X) == CONST_INT && (unsigned long) (X) < 0x20))
1383:
1384:
1385: #define INDEXABLE_ADDRESS_P(X,MODE) \
1386: ((GET_CODE(X) == PLUS && GET_CODE (XEXP (X,0)) == REG && \
1387: XEXP(X,0) == stack_pointer_rtx && YBASE_OFFSET(XEXP(X,1)) && \
1388: !ILLEGAL_HIMODE_ADDR(MODE, INTVAL(XEXP(X,1)))) || \
1389: (GET_CODE(X) == PLUS && GET_CODE (XEXP (X,1)) == REG && \
1390: XEXP(X,1) == stack_pointer_rtx && YBASE_OFFSET(XEXP(X,0)) && \
1391: !ILLEGAL_HIMODE_ADDR(MODE, INTVAL(XEXP(X,0)))))
1392:
1393: #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
1394: { \
1395: if (INDIRECTABLE_ADDRESS_P(X)) \
1396: goto ADDR; \
1397: }
1398:
1399:
1400: /* Try machine-dependent ways of modifying an illegitimate address
1401: to be legitimate. If we find one, return the new, valid address.
1402: This macro is used in only one place: `memory_address' in explow.c.
1403:
1404: OLDX is the address as it was before break_out_memory_refs was called.
1405: In some cases it is useful to look at this to decide what needs to be done.
1406:
1407: MODE and WIN are passed so that this macro can use
1408: GO_IF_LEGITIMATE_ADDRESS.
1409:
1410: It is always safe for this macro to do nothing. It exists to recognize
1411: opportunities to optimize the output.
1412:
1413: For the 1610, we need not do anything. However, if we don't,
1414: `memory_address' will try lots of things to get a valid address, most of
1415: which will result in dead code and extra pseudos. So we make the address
1416: valid here.
1417:
1418: This is easy: The only valid addresses are an offset from a register
1419: and we know the address isn't valid. So just call either `force_operand'
1420: or `force_reg' unless this is a (plus (reg ...) (const_int 0)). */
1421:
1422: #define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) \
1423: { if (GET_CODE (X) == PLUS && XEXP (X, 1) == const0_rtx) \
1424: X = XEXP (x, 0); \
1425: if (GET_CODE (X) == MULT || GET_CODE (X) == PLUS) \
1426: X = force_operand (X, 0); \
1427: else \
1428: X = force_reg (Pmode, X); \
1429: goto WIN; \
1430: }
1431:
1432: /* Go to LABEL if ADDR (a legitimate address expression)
1433: has an effect that depends on the machine mode it is used for.
1434: On the 1610, only postdecrement and postincrement address depend thus
1435: (the amount of decrement or increment being the length of the operand). */
1436:
1437: #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) \
1438: if (GET_CODE (ADDR) == POST_INC || GET_CODE (ADDR) == POST_DEC) goto LABEL
1439:
1440: /* Nonzero if the constant value X is a legitimate general operand.
1441: It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE. */
1442: #define LEGITIMATE_CONSTANT_P(X) (1)
1443:
1444:
1445: /* CONDITION CODE INFORMATION */
1446:
1447: /* Store in cc_status the expressions
1448: that the condition codes will describe
1449: after execution of an instruction whose pattern is EXP.
1450: Do not alter them if the instruction would not alter the cc's. */
1451:
1452: #define NOTICE_UPDATE_CC(EXP, INSN) \
1453: notice_update_cc( (EXP) )
1454:
1455: /* DESCRIBING RELATIVE COSTS OF OPERATIONS */
1456:
1457: /* Compute the cost of computing a constant rtl expression RTX
1458: whose rtx-code is CODE. The body of this macro is a portion
1459: of a switch statement. If the code is computed here,
1460: return it with a return statement. */
1461: #define CONST_COSTS(RTX,CODE,OUTER_CODE) \
1462: case CONST_INT: \
1463: return 0; \
1464: case LABEL_REF: \
1465: case SYMBOL_REF: \
1466: case CONST: \
1467: return COSTS_N_INSNS (1); \
1468: \
1469: case CONST_DOUBLE: \
1470: return COSTS_N_INSNS (2);
1471:
1472: /* Like CONST_COSTS but applies to nonsonstant RTL expressions.
1473: This can be used, for example to indicate how costly a multiply
1474: instruction is. */
1475: #define RTX_COSTS(X,CODE,OUTER_CODE) \
1476: case MEM: \
1477: return GET_MODE (X) == QImode ? COSTS_N_INSNS (2) : \
1478: COSTS_N_INSNS (4); \
1479: case DIV: \
1480: case MOD: \
1481: return COSTS_N_INSNS (38); \
1482: case MULT: \
1483: if (GET_MODE (X) == QImode) \
1484: return COSTS_N_INSNS (2); \
1485: else \
1486: return COSTS_N_INSNS (38); \
1487: case PLUS: \
1488: if (GET_MODE_CLASS (GET_MODE (X)) == MODE_INT) \
1489: { \
1490: if (GET_CODE (XEXP (X,1)) == CONST_INT) \
1491: { \
1492: int number = INTVAL(XEXP (X,1)); \
1493: if (number == 1) \
1494: return COSTS_N_INSNS (1); \
1495: if (INT_FITS_16_BITS(number)) \
1496: return COSTS_N_INSNS (2); \
1497: else \
1498: return COSTS_N_INSNS (4); \
1499: } \
1500: return COSTS_N_INSNS (1); \
1501: } \
1502: else \
1503: return COSTS_N_INSNS (38); \
1504: case MINUS: \
1505: if (GET_MODE_CLASS (GET_MODE (X)) == MODE_INT) \
1506: { \
1507: if (GET_CODE (XEXP (X,1)) == CONST_INT) \
1508: { \
1509: if (INT_FITS_16_BITS(INTVAL(XEXP(X,1)))) \
1510: return COSTS_N_INSNS (2); \
1511: else \
1512: return COSTS_N_INSNS (4); \
1513: } \
1514: return COSTS_N_INSNS (1); \
1515: } \
1516: else \
1517: return COSTS_N_INSNS (38); \
1518: case AND: case IOR: case XOR: \
1519: if (GET_CODE (XEXP (X,1)) == CONST_INT) \
1520: { \
1521: if (INT_FITS_16_BITS(INTVAL(XEXP(X,1)))) \
1522: return COSTS_N_INSNS (2); \
1523: else \
1524: return COSTS_N_INSNS (4); \
1525: } \
1526: return COSTS_N_INSNS (1); \
1527: case NEG: case NOT: \
1528: return COSTS_N_INSNS (1); \
1529: case ASHIFT: \
1530: case ASHIFTRT: \
1531: case LSHIFTRT: \
1532: if (GET_CODE (XEXP (X,1)) == CONST_INT) \
1533: { \
1534: int number = INTVAL(XEXP (X,1)); \
1535: if (number == 1 || number == 4 || number == 8 || \
1536: number == 16) \
1537: return COSTS_N_INSNS (1); \
1538: else \
1539: return COSTS_N_INSNS (2); \
1540: } \
1541: return COSTS_N_INSNS (1);
1542:
1543: /* An expression giving the cost of an addressing mode that contains
1544: address. */
1545: #define ADDRESS_COST(ADDR) dsp16xx_address_cost (ADDR)
1546:
1547: /* A c expression for the cost of moving data from a register in
1548: class FROM to one in class TO. The classes are expressed using
1549: the enumeration values such as GENERAL_REGS. A value of 2 is
1550: the default. */
1551: #define REGISTER_MOVE_COST(FROM,TO) dsp16xx_register_move_cost (FROM, TO)
1552:
1553: /* A C expression for the cost of moving data of mode MODE between
1554: a register and memory. A value of 2 is the default. */
1555: #define MEMORY_MOVE_COST(MODE) \
1556: (GET_MODE_CLASS(MODE) == MODE_INT && MODE == QImode ? 12 \
1557: : 16)
1558:
1559: /* A C expression for the cost of a branch instruction. A value of
1560: 1 is the default; */
1561: #define BRANCH_COST 2
1562:
1563:
1564: /* Define this because otherwise gcc will try to put the function address
1565: in any old pseudo register. We can only use pt. */
1566: #define NO_FUNCTION_CSE
1567:
1568: /* Define this macro as a C expression which is nonzero if accessing less
1569: than a word of memory (i.e a char or short) is no faster than accessing
1570: a word of memory, i.e if such access require more than one instruction
1571: or if ther is no difference in cost between byte and (aligned) word
1572: loads. */
1573: #define SLOW_BYTE_ACCESS 1
1574:
1575: /* Define this macro if zero-extension (of a char or short to an int) can
1576: be done faster if the destination is a register that is know to be zero. */
1577: /* #define SLOW_ZERO_EXTEND */
1578:
1579: /* Define this macro if unaligned accesses have a cost many times greater than
1580: aligned accesses, for example if they are emulated in a trap handler */
1581: /* define SLOW_UNALIGNED_ACCESS */
1582:
1583: /* Define this macro to inhibit strength reduction of memory addresses */
1584: /* #define DONT_REDUCE_ADDR */
1585:
1586:
1587: /* DIVIDING THE OUTPUT IN SECTIONS */
1588: /* Output before read-only data. */
1589:
1590: #define DEFAULT_TEXT_SEG_NAME ".text"
1591: #define TEXT_SECTION_ASM_OP rsect_text
1592:
1593: /* Output before constants and strings */
1594: #define DEFAULT_CONST_SEG_NAME ".const"
1595: #define READONLY_SECTION_ASM_OP rsect_const
1596: #define READONLY_DATA_SECTION const_section
1597:
1598: /* Output before writable data. */
1599: #define DEFAULT_DATA_SEG_NAME ".data"
1600: #define DATA_SECTION_ASM_OP rsect_data
1601:
1602: #define DEFAULT_BSS_SEG_NAME ".bss"
1603: #define BSS_SECTION_ASM_OP rsect_bss
1604:
1605: /* We will default to using 1610 if the user doesn't
1606: specify it. */
1607: #define DEFAULT_CHIP_NAME "1610"
1608:
1609: /* A list of names for sections other than the standard two, which are
1610: 'in_text' and 'in_data'. */
1611: #define EXTRA_SECTIONS in_bss, in_const
1612:
1613: #define EXTRA_SECTION_FUNCTIONS \
1614: void \
1615: const_section () \
1616: { \
1617: if (in_section != in_const) \
1618: { \
1619: fprintf (asm_out_file, "%s\n", READONLY_SECTION_ASM_OP); \
1620: in_section = in_const; \
1621: } \
1622: } \
1623: void \
1624: bss_section () \
1625: { \
1626: if (in_section != in_bss) { \
1627: fprintf (asm_out_file, "%s\n", BSS_SECTION_ASM_OP); \
1628: in_section = in_bss; \
1629: } \
1630: }
1631:
1632:
1633: /* THE OVERALL FRAMEWORK OF AN ASSEMBLER FILE */
1634:
1635: /* Output at beginning of assembler file. */
1636: #define ASM_FILE_START(FILE) dsp16xx_file_start ()
1637:
1638: /* Prevent output of .gcc_compiled */
1639: #define ASM_IDENTIFY_GCC(FILE)
1640:
1641: /* A C string constant describing how to begin a comment in the target
1642: assembler language. */
1643: /* define ASM_COMMENT_START */
1644:
1645: /* Output to assembler file text saying following lines
1646: may contain character constants, extra white space, comments, etc. */
1647: #define ASM_APP_ON ""
1648:
1649: /* Output to assembler file text saying following lines
1650: no longer contain unusual constructs. */
1651: #define ASM_APP_OFF ""
1652:
1653: /* OUTPUT OF DATA */
1654:
1655: /* This is how to output an assembler line defining a `double' constant. */
1656: #define ASM_OUTPUT_DOUBLE(FILE,VALUE) asm_output_float (FILE,VALUE)
1657:
1658: /* This is how to output an assembler line defining a `float' constant. */
1659: #define ASM_OUTPUT_FLOAT(FILE,VALUE) asm_output_float (FILE, VALUE)
1660:
1661: /* This is how to output and assembler line defininf a 'float' constant of
1662: size HFmode. */
1663: #define ASM_OUTPUT_SHORT_FLOAT(FILE,VALUE) asm_output_float (FILE, VALUE)
1664:
1665: /* This is how to output an assembler line defining an `char' constant. */
1666: #define ASM_OUTPUT_CHAR(FILE,VALUE) \
1667: ( fprintf (FILE, "\tint "), \
1668: output_addr_const (FILE, (VALUE)), \
1669: fprintf (FILE, "\n"))
1670:
1671: /* This is how to output an assembler line defining an `short' constant. */
1672: #define ASM_OUTPUT_SHORT(FILE,EXP) asm_output_long(FILE,INTVAL(EXP))
1673:
1674: /* This is how to output an assembler line defining a 'int' constant. */
1675: #define ASM_OUTPUT_INT(FILE, EXP) asm_output_long(FILE,INTVAL(EXP))
1676:
1677: /* This is how to output an assembler line for a numeric constant byte. */
1678: #define ASM_OUTPUT_BYTE(FILE,VALUE) ASM_OUTPUT_CHAR(FILE,VALUE)
1679:
1680: /* This is how we output a 'c' character string. For the 16xx
1681: assembler we have to do it one letter at a time */
1682:
1683: #define ASCII_LENGTH 10
1684:
1685: #define ASM_OUTPUT_ASCII(MYFILE, MYSTRING, MYLENGTH) \
1686: do { \
1687: FILE *_hide_asm_out_file = (MYFILE); \
1688: unsigned char *_hide_p = (unsigned char *) (MYSTRING); \
1689: int _hide_thissize = (MYLENGTH); \
1690: { \
1691: FILE *asm_out_file = _hide_asm_out_file; \
1692: unsigned char *p = _hide_p; \
1693: int thissize = _hide_thissize; \
1694: int i; \
1695: \
1696: for (i = 0; i < thissize; i++) \
1697: { \
1698: register int c = p[i]; \
1699: \
1700: if (i % ASCII_LENGTH == 0) \
1701: fprintf (asm_out_file, "\tint "); \
1702: \
1703: if (c >= ' ' && c < 0177 && c != '\'') \
1704: { \
1705: putc ('\'', asm_out_file); \
1706: putc (c, asm_out_file); \
1707: putc ('\'', asm_out_file); \
1708: } \
1709: else \
1710: { \
1711: fprintf (asm_out_file, "%d", c); \
1712: /* After an octal-escape, if a digit follows, \
1713: terminate one string constant and start another. \
1714: The Vax assembler fails to stop reading the escape \
1715: after three digits, so this is the only way we \
1716: can get it to parse the data properly. \
1717: if (i < thissize - 1 \
1718: && p[i + 1] >= '0' && p[i + 1] <= '9') \
1719: fprintf (asm_out_file, "\'\n\tint \'"); \
1720: */ \
1721: } \
1722: /* if: \
1723: we are not at the last char (i != thissize -1) \
1724: and (we are not at a line break multiple \
1725: but i == 0) (it will be the very first time) \
1726: then put out a comma to extend. \
1727: */ \
1728: if ((i != thissize - 1) && ((i + 1) % ASCII_LENGTH)) \
1729: fprintf(asm_out_file, ","); \
1730: if (!((i + 1) % ASCII_LENGTH)) \
1731: fprintf (asm_out_file, "\n"); \
1732: } \
1733: fprintf (asm_out_file, "\n"); \
1734: } \
1735: } \
1736: while (0)
1737:
1738: /* Store in OUTPUT a string (made with alloca) containing
1739: an assembler-name for a local static variable or function
1740: named NAME. LABELNO is an integer which is different for
1741: each call. */
1742:
1743: #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \
1744: do { \
1745: int len = strlen (NAME); \
1746: char *temp = (char *) alloca (len + 3); \
1747: temp[0] = 'L'; \
1748: strcpy (&temp[1], (NAME)); \
1749: temp[len + 1] = '_'; \
1750: temp[len + 2] = 0; \
1751: (OUTPUT) = (char *) alloca (strlen (NAME) + 11); \
1752: ASM_GENERATE_INTERNAL_LABEL (OUTPUT, temp, LABELNO); \
1753: } while (0)
1754:
1755: #define ASM_OPEN_PAREN "("
1756: #define ASM_CLOSE_PAREN ")"
1757:
1758:
1759: /* OUTPUT OF UNINITIALIZED VARIABLES */
1760:
1761: /* This says how to output an assembler line
1762: to define a global common symbol. */
1763:
1764: #define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \
1765: asm_output_common (FILE, NAME, SIZE, ROUNDED);
1766:
1767: /* This says how to output an assembler line
1768: to define a local common symbol. */
1769:
1770: #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE, ROUNDED) \
1771: asm_output_local (FILE, NAME, SIZE, ROUNDED);
1772:
1773: /* OUTPUT AND GENERATION OF LABELS */
1774:
1775: /* This is how to output the definition of a user-level label named NAME,
1776: such as the label on a static function or variable NAME. */
1777: #define ASM_OUTPUT_LABEL(FILE,NAME) \
1778: do { assemble_name (FILE, NAME); fputs (":\n", FILE); } while (0)
1779:
1780: /* This is how to output a command to make the user-level label named NAME
1781: defined for reference from other files. */
1782:
1783: #define ASM_GLOBALIZE_LABEL(FILE,NAME) \
1784: do { fputs (".global ", FILE); assemble_name (FILE, NAME); fputs ("\n", FILE);} while (0)
1785:
1786: /* A C statement to output to the stdio stream any text necessary
1787: for declaring the name of an external symbol named name which
1788: is referenced in this compilation but not defined. */
1789:
1790: #define ASM_OUTPUT_EXTERNAL(FILE, DECL, NAME) \
1791: { \
1792: fprintf (FILE, ".extern "); \
1793: assemble_name (FILE, NAME); \
1794: fprintf (FILE, "\n"); \
1795: }
1796: /* A C statement to output on stream an assembler pseudo-op to
1797: declare a library function named external. */
1798:
1799: #define ASM_OUTPUT_EXTERNAL_LIBCALL(FILE, FUN) \
1800: { \
1801: fprintf (FILE, ".extern "); \
1802: assemble_name (FILE, XSTR (FUN, 0)); \
1803: fprintf (FILE, "\n"); \
1804: }
1805: /* This is how to output a reference to a user-level label named NAME.
1806: `assemble_name' uses this. */
1807: #define ASM_OUTPUT_LABELREF(FILE,NAME) \
1808: fprintf (FILE, "_%s", NAME)
1809:
1810: /* This is how to output an internal numbered label where
1811: PREFIX is the class of label and NUM is the number within the class. */
1812: #define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \
1813: fprintf (FILE, "%s%d:\n", PREFIX, NUM)
1814:
1815: /* This is how to store into the string LABEL
1816: the symbol_ref name of an internal numbered label where
1817: PREFIX is the class of label and NUM is the number within the class.
1818: This is suitable for output with `assemble_name'. */
1819: #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \
1820: sprintf (LABEL, "*%s%d", PREFIX, NUM)
1821:
1822:
1823: /* OUTPUT OF ASSEMBLER INSTRUCTIONS */
1824:
1825: /* How to refer to registers in assembler output.
1826: This sequence is indexed by compiler's hard-register-number (see above). */
1827:
1828: #define REGISTER_NAMES \
1829: {"a0", "a0l", "a1", "a1l", "x", "y", "yl", "p", "pl", \
1830: "r0", "r1", "r2", "r3", "j", "k", "ybase", "pt", \
1831: "ar0", "ar1", "ar2", "ar3", \
1832: "c0", "c1", "c2", "pr", "rb", \
1833: "*(0)", "*(1)", "*(2)", "*(3)", "*(4)", "*(5)", \
1834: "*(6)", "*(7)", "*(8)", "*(9)", "*(10)", "*(11)", \
1835: "*(12)", "*(13)", "*(14)", "*(15)", "*(16)", "*(17)", \
1836: "*(18)", "*(19)", "*(20)", "*(21)", "*(22)", "*(23)", \
1837: "*(24)", "*(25)", "*(26)", "*(27)", "*(28)", "*(29)", \
1838: "*(30)", "*(31)" }
1839:
1840: #define HIMODE_REGISTER_NAMES \
1841: {"a0", "a0", "a1", "a1", "x", "y", "y", "p", "p", \
1842: "r0", "r1", "r2", "r3", "j", "k", "ybase", "pt", \
1843: "ar0", "ar1", "ar2", "ar3", \
1844: "c0", "c1", "c2", "pr", "rb", \
1845: "*(0)", "*(1)", "*(2)", "*(3)", "*(4)", "*(5)", \
1846: "*(6)", "*(7)", "*(8)", "*(9)", "*(10)", "*(11)", \
1847: "*(12)", "*(13)", "*(14)", "*(15)", "*(16)", "*(17)", \
1848: "*(18)", "*(19)", "*(20)", "*(21)", "*(22)", "*(23)", \
1849: "*(24)", "*(25)", "*(26)", "*(27)", "*(28)", "*(29)", \
1850: "*(30)", "*(31)" }
1851:
1852: #define PRINT_OPERAND_PUNCT_VALID_P(CODE) 0
1853:
1854: /* Print operand X (an rtx) in assembler syntax to file FILE.
1855: CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
1856: For `%' followed by punctuation, CODE is the punctuation and X is null.
1857:
1858: DSP1610 extensions for operand codes:
1859:
1860: %H - print lower 16 bits of constant
1861: %U - print upper 16 bits of constant
1862: %w - print low half of register (e.g 'a0l')
1863: %u - print upper half of register (e.g 'a0')
1864: %b - print high half of accumulator for F3 ALU instructions
1865: %h - print constant in decimal */
1866:
1867: #define PRINT_OPERAND(FILE, X, CODE) print_operand(FILE, X, CODE)
1868:
1869:
1870: /* Print a memory address as an operand to reference that memory location. */
1871:
1872: #define PRINT_OPERAND_ADDRESS(FILE, ADDR) print_operand_address (FILE, ADDR)
1873:
1874: /* This is how to output an insn to push a register on the stack.
1875: It need not be very fast code since it is used only for profiling */
1876: #define ASM_OUTPUT_REG_PUSH(FILE,REGNO) fatal("Profiling not implemented yet.");
1877:
1878: /* This is how to output an insn to pop a register from the stack.
1879: It need not be very fast code since it is used only for profiling */
1880: #define ASM_OUTPUT_REG_POP(FILE,REGNO) fatal("Profiling not implemented yet.");
1881:
1882: /* OUTPUT OF DISPATCH TABLES */
1883:
1884: /* This macro should be provided on machines where the addresses in a dispatch
1885: table are relative to the table's own address. */
1886: #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, VALUE, REL) \
1887: fprintf (FILE, "\tint L%d-L%d\n", VALUE, REL)
1888:
1889: /* This macro should be provided on machines where the addresses in a dispatch
1890: table are absolute. */
1891: #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
1892: fprintf (FILE, "\tint L%d\n", VALUE)
1893:
1894: /* ASSEMBLER COMMANDS FOR ALIGNMENT */
1895:
1896: /* This is how to output an assembler line that says to advance
1897: the location counter to a multiple of 2**LOG bytes. We should
1898: not have to do any alignemnt since the 1610 is a word machine. */
1899: #define ASM_OUTPUT_ALIGN(FILE,LOG)
1900:
1901: /* Define this macro if ASM_OUTPUT_SKIP should not be used in the text section
1902: because it fails to put zero1 in the bytes that are skipped. */
1903: #define ASM_NO_SKIP_IN_TEXT 1
1904:
1905: #define ASM_OUTPUT_SKIP(FILE,SIZE) \
1906: fprintf (FILE, "\t%d * int 0\n", (SIZE))
1907:
1908: /* CONTROLLING DEBUGGING INFORMATION FORMAT */
1909:
1910: /* Define this macro if GCC should produce COFF-style debugging output
1911: for SDB in response to the '-g' option */
1912: #define SDB_DEBUGGING_INFO
1913:
1914: /* Support generating stabs for the listing file generator */
1915: #define DBX_DEBUGGING_INFO
1916:
1917: /* The default format when -g is given is still COFF debug info */
1918: #define PREFERRED_DEBUGGING_TYPE SDB_DEBUG
1919:
1920: #define DBX_REGISTER_NUMBER(REGNO) (REGNO)
1921:
1922: /* MISCELLANEOUS PARAMETERS */
1923:
1924: /* Specify the machine mode that this machine uses
1925: for the index in the tablejump instruction. */
1926: #define CASE_VECTOR_MODE QImode
1927:
1928: /* Define this if the tablejump instruction expects the table
1929: to contain offsets from the address of the table.
1930: Do not define this if the table should contain absolute addresses. */
1931: /* #define CASE_VECTOR_PC_RELATIVE */
1932:
1933: /* Specify the tree operation to be used to convert reals to integers. */
1934: #define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR
1935:
1936: /* This is the kind of divide that is easiest to do in the general case. */
1937: #define EASY_DIV_EXPR TRUNC_DIV_EXPR
1938:
1939: /* Define this if the library function 'vprintf' is available on your system. */
1940: #define HAVE_VPRINTF
1941:
1942: /* Max number of bytes we can move from memory to memory
1943: in one reasonably fast instruction. */
1944: #define MOVE_MAX 1
1945:
1946: /* Defining this macro causes the compiler to omit a sign-extend, zero-extend,
1947: or bitwise 'and' instruction that truncates the count of a shift operation
1948: to a width equal to the number of bits needed to represent the size of the
1949: object being shifted. Do not define this macro unless the trucation applies
1950: to both shoft operations and bit-field operations (if any). */
1951: /* #define SHIFT_COUNT_TRUNCATED */
1952:
1953: /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
1954: is done just by pretending it is already truncated. */
1955: #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
1956:
1957: /* When a prototype says `char' or `short', really pass an `int'. */
1958: #define PROMOTE_PROTOTYPES
1959:
1960: /* An alias for the machine mode used for pointers */
1961: #define Pmode QImode
1962:
1963: /* A function address in a call instruction
1964: is a byte address (for indexing purposes)
1965: so give the MEM rtx a byte's mode. */
1966: #define FUNCTION_MODE QImode
1967:
1968: #if !defined(__DATE__)
1969: #define TARGET_VERSION fprintf (stderr, " (%s)", VERSION_INFO1)
1970: #else
1971: #define TARGET_VERSION fprintf (stderr, " (%s, %s)", VERSION_INFO1, __DATE__)
1972: #endif
1973:
1974: #define VERSION_INFO1 "AT&T DSP16xx C Cross Compiler, version 1.2.0"
1975:
1976:
1977: /* Define this as 1 if `char' should by default be signed; else as 0. */
1978: #define DEFAULT_SIGNED_CHAR 1
1979:
1980: /* If this macro is defined, GNU CC gathers statistics about the number and
1981: kind of tree node it allocates during each run. The option '-fstats' will
1982: tell the compiler to print these statistics about the sizes of it obstacks. */
1983: #define GATHER_STATISTICS
1984:
1985: /* Define this so gcc does not output a call to __main, since we
1986: are not currently supporting c++. */
1987: #define INIT_SECTION_ASM_OP 1
This archive runs on limited infrastructure. Preserving old code on modern bandwidth. Automated agents are requested to crawl responsibly.