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1.1 root 1: /* Definitions of target machine for GNU compiler. AT&T DSP1600. 1.1.1.2 ! root 2: Copyright (C) 1994, 1995 Free Software Foundation, Inc. 1.1 root 3: Contributed by Michael Collison ([email protected]). 4: 5: This file is part of GNU CC. 6: 7: GNU CC is free software; you can redistribute it and/or modify 8: it under the terms of the GNU General Public License as published by 9: the Free Software Foundation; either version 1, or (at your option) 10: any later version. 11: 12: GNU CC is distributed in the hope that it will be useful, 13: but WITHOUT ANY WARRANTY; without even the implied warranty of 14: MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15: GNU General Public License for more details. 16: 17: You should have received a copy of the GNU General Public License 18: along with GNU CC; see the file COPYING. If not, write to 1.1.1.2 ! root 19: the Free Software Foundation, 59 Temple Place - Suite 330, ! 20: Boston, MA 02111-1307, USA. */ 1.1 root 21: 22: extern char *low_reg_names[]; 23: extern char *text_seg_name; 24: extern char *rsect_text; 25: extern char *data_seg_name; 26: extern char *rsect_data; 27: extern char *bss_seg_name; 28: extern char *rsect_bss; 29: extern char *const_seg_name; 30: extern char *rsect_const; 31: extern char *chip_name; 32: extern char *save_chip_name; 33: extern struct rtx_def *dsp16xx_compare_op0, *dsp16xx_compare_op1; 34: extern struct rtx_def *(*dsp16xx_compare_gen)(); 35: extern struct rtx_def *gen_compare_reg(); 36: extern struct rtx_def *dsp16xx_addhf3_libcall; 37: extern struct rtx_def *dsp16xx_subhf3_libcall; 38: extern struct rtx_def *dsp16xx_mulhf3_libcall; 39: extern struct rtx_def *dsp16xx_divhf3_libcall; 40: extern struct rtx_def *dsp16xx_cmphf3_libcall; 41: extern struct rtx_def *dsp16xx_fixhfhi2_libcall; 42: extern struct rtx_def *dsp16xx_floathihf2_libcall; 43: extern struct rtx_def *dsp16xx_neghf2_libcall; 44: extern struct rtx_def *dsp16xx_umulhi3_libcall; 45: extern struct rtx_def *dsp16xx_mulhi3_libcall; 46: extern struct rtx_def *dsp16xx_udivqi3_libcall; 47: extern struct rtx_def *dsp16xx_udivhi3_libcall; 48: extern struct rtx_def *dsp16xx_divqi3_libcall; 49: extern struct rtx_def *dsp16xx_divhi3_libcall; 50: extern struct rtx_def *dsp16xx_modqi3_libcall; 51: extern struct rtx_def *dsp16xx_modhi3_libcall; 52: extern struct rtx_def *dsp16xx_umodqi3_libcall; 53: extern struct rtx_def *dsp16xx_umodhi3_libcall; 54: 55: extern struct rtx_def *dsp16xx_ashrhi3_libcall; 56: extern struct rtx_def *dsp16xx_ashlhi3_libcall; 57: extern struct rtx_def *dsp16xx_lshrhi3_libcall; 58: 59: 60: extern int hard_regno_mode_ok (); 61: extern enum reg_class dsp16xx_reg_class_from_letter (); 62: extern enum reg_class dsp16xx_limit_reload_class (); 63: extern int hard_regno_nregs (); 64: extern int regno_reg_class (); 65: extern int move_operand (); 66: extern int symbolic_address_p (); 67: extern int Y_address (); 68: extern int call_address_operand (); 69: extern void notice_update_cc(); 70: extern void function_prologue (); 71: extern void function_epilogue (); 72: extern int dsp1600_comparison_reverse (); 73: extern void double_reg_from_memory (); 74: extern void double_reg_to_memory (); 75: extern void bss_section (); 76: extern struct rtx_def *dsp16xx_function_arg (); 77: extern void dsp16xx_function_arg_advance (); 78: extern enum rtx_code next_cc_user_code (); 79: extern enum rtx_code save_next_cc_user_code; 80: extern struct rtx_def *gen_tst_reg (); 81: extern char *output_block_move(); 82: 83: /* RUN-TIME TARGET SPECIFICATION */ 84: #define DSP16XX 1 85: 86: /* Name of the AT&T assembler */ 87: 88: #define ASM_PROG "as1600" 89: 90: /* Name of the AT&T linker */ 91: 92: #define LD_PROG "ld1600" 93: 94: /* Define which switches take word arguments */ 95: #define WORD_SWITCH_TAKES_ARG(STR) \ 96: (!strcmp (STR, "ifile") ? 1 : \ 97: 0) 98: 99: #ifdef CC1_SPEC 100: #undef CC1_SPEC 101: #endif 102: #define CC1_SPEC "" 103: 104: /* Define this as a spec to call the AT&T assembler */ 105: 106: #define CROSS_ASM_SPEC "%{!S:as1600 %a %i\n }" 107: 108: /* Define this as a spec to call the AT&T linker */ 109: 110: #define CROSS_LINK_SPEC "%{!c:%{!M:%{!MM:%{!E:%{!S:ld1600 %l %X %{o*} %{m} \ 111: %{r} %{s} %{t} %{u*} %{x}\ 1.1.1.2 ! root 112: %{!A:%{!nostdlib:%{!nostartfiles:%S}}} %{static:}\ ! 113: %{L*} %D %o %{!nostdlib:-le1600 %L -le1600}\ ! 114: %{!A:%{!nostdlib:%{!nostartfiles:%E}}}\n }}}}}" 1.1 root 115: 116: /* Nothing complicated here, just link with libc.a under normal 117: circumstances */ 118: #define LIB_SPEC "-lc" 119: 120: /* Specify the startup file to link with. */ 121: #define STARTFILE_SPEC "%{mmap1:m1_crt0.o%s} \ 122: %{mmap2:m2_crt0.o%s} \ 123: %{mmap3:m3_crt0.o%s} \ 124: %{mmap4:m4_crt0.o%s} \ 125: %{!mmap*: %{!ifile*: m4_crt0.o%s} %{ifile*: \ 126: %eA -ifile option requires a -map option}}" 127: 128: /* Specify the end file to link with */ 129: 130: #define ENDFILE_SPEC "%{mmap1:m1_crtn.o%s} \ 131: %{mmap2:m2_crtn.o%s} \ 132: %{mmap3:m3_crtn.o%s} \ 133: %{mmap4:m4_crtn.o%s} \ 134: %{!mmap*: %{!ifile*: m4_crtn.o%s} %{ifile*: \ 135: %eA -ifile option requires a -map option}}" 136: 137: 138: /* Tell gcc where to look for the startfile */ 139: #define STANDARD_STARTFILE_PREFIX "/d1600/lib" 140: 141: /* Tell gcc where to look for it's executables */ 142: #define STANDARD_EXEC_PREFIX "/d1600/bin" 143: 144: /* Command line options to the AT&T assembler */ 145: #define ASM_SPEC "%{V} %{v:%{!V:-V}} %{g*:-g}" 146: 147: /* Command line options for the AT&T linker */ 148: #define LINK_SPEC "%{V} %{v:%{!V:-V}} %{minit:-i} \ 149: %{!ifile*:%{mmap1:-ifile m1_deflt.if%s} \ 150: %{mmap2:-ifile m2_deflt.if%s} \ 151: %{mmap3:-ifile m3_deflt.if%s} \ 152: %{mmap4:-ifile m4_deflt.if%s} \ 153: %{!mmap*:-ifile m4_deflt.if%s}} \ 154: %{ifile*} %{!r:-a}" 155: 156: /* Names to predefine in the preprocessor for this target machine. */ 157: #ifdef __MSDOS__ 158: #define CPP_PREDEFINES "-Ddsp1600 -DDSP1600 -DMSDOS" 159: #else 160: #define CPP_PREDEFINES "-Ddsp1600 -DDSP1600 -Ddsp1610 -DDSP1610" 161: #endif 162: 163: /* Run-time compilation parameters selecting different hardware subsets. */ 164: 165: extern int target_flags; 166: 167: /* Macros used in the machine description to test the flags. */ 168: 169: #define MASK_REGPARM 0x00000001 /* Pass parameters in registers */ 170: #define MASK_NEAR_CALL 0x00000002 /* The call is on the same 4k page */ 171: #define MASK_NEAR_JUMP 0x00000004 /* The jump is on the same 4k page */ 172: #define MASK_BMU 0x00000008 /* Use the 'bmu' shift instructions */ 173: #define MASK_OPTIMIZE_MEMORY 0x00000010 /* Optimize to conserve memory */ 174: #define MASK_OPTIMIZE_SPEED 0x00000020 /* Optimize for speed */ 175: #define MASK_MAP1 0x00000040 /* Link with map1 */ 176: #define MASK_MAP2 0x00000080 /* Link with map2 */ 177: #define MASK_MAP3 0x00000100 /* Link with map3 */ 178: #define MASK_MAP4 0x00000200 /* Link with map4 */ 179: #define MASK_YBASE_HIGH 0x00000400 /* The ybase register window starts high */ 180: #define MASK_INIT 0x00000800 /* Have the linker generate tables to 181: initialize data at startup */ 182: #define MASK_INLINE_MULT 0x00001000 /* Inline 32 bit multiplies */ 183: #define MASK_RESERVE_YBASE 0x00002000 /* Reserved the ybase registers */ 184: 185: /* Compile passing first two args in regs 0 and 1. 186: This exists only to test compiler features that will 187: be needed for RISC chips. It is not usable 188: and is not intended to be usable on this cpu. */ 189: #define TARGET_REGPARM (target_flags & MASK_REGPARM) 190: 191: /* The call is on the same 4k page, so instead of loading 192: the 'pt' register and branching, we can branch directly */ 193: 194: #define TARGET_NEAR_CALL (target_flags & MASK_NEAR_CALL) 195: 196: /* The jump is on the same 4k page, so instead of loading 197: the 'pt' register and branching, we can branch directly */ 198: 199: #define TARGET_NEAR_JUMP (target_flags & MASK_NEAR_JUMP) 200: 201: /* Generate shift instructions to use the 1610 Bit Manipulation 202: Unit. */ 203: #define TARGET_BMU (target_flags & MASK_BMU) 204: 1.1.1.2 ! root 205: /* Optimize to conserve memory */ 1.1 root 206: #define TARGET_OPTIMIZE_MEMORY (target_flags & MASK_OPTIMIZE_MEMORY) 207: 208: /* Optimize for maximum speed */ 209: #define TARGET_OPTIMIZE_SPEED (target_flags & MASK_OPTIMIZE_SPEED) 210: 211: #define TARGET_YBASE_HIGH (target_flags & MASK_YBASE_HIGH) 212: 213: /* Direct the linker to output extra info for initialized data */ 214: #define TARGET_MASK_INIT (target_flags & MASK_INIT) 215: 216: #define TARGET_INLINE_MULT (target_flags & MASK_INLINE_MULT) 217: 218: /* Reserve the ybase registers *(0) - *(31) */ 219: #define TARGET_RESERVE_YBASE (target_flags & MASK_RESERVE_YBASE) 220: 221: /* Macro to define tables used to set the flags. 222: This is a list in braces of pairs in braces, 223: each pair being { "NAME", VALUE } 224: where VALUE is the bits to set or minus the bits to clear. 225: An empty string NAME is used to identify the default VALUE. */ 226: 227: 228: #define TARGET_SWITCHES \ 229: { \ 230: { "regparm", MASK_REGPARM}, \ 231: { "no-regparm", -MASK_REGPARM}, \ 232: { "no-near-call", -MASK_NEAR_CALL}, \ 233: { "near-jump", MASK_NEAR_JUMP}, \ 234: { "no-near-jump", -MASK_NEAR_JUMP}, \ 235: { "bmu", MASK_BMU}, \ 236: { "no-bmu", -MASK_BMU}, \ 237: { "Om", MASK_OPTIMIZE_MEMORY}, \ 238: { "Os", MASK_OPTIMIZE_SPEED}, \ 239: { "map1", MASK_MAP1}, \ 240: { "map2", MASK_MAP2}, \ 241: { "map3", MASK_MAP3}, \ 242: { "map4", MASK_MAP4}, \ 243: { "ybase-high", MASK_YBASE_HIGH}, \ 244: { "init", MASK_INIT}, \ 245: { "inline-mult", MASK_INLINE_MULT}, \ 246: { "reserve-ybase", MASK_RESERVE_YBASE}, \ 247: { "", TARGET_DEFAULT} \ 248: } 249: 250: /* Default target_flags if no switches are specified */ 251: #ifndef TARGET_DEFAULT 252: #define TARGET_DEFAULT MASK_OPTIMIZE_MEMORY|MASK_REGPARM|MASK_YBASE_HIGH 253: #endif 254: 255: /* This macro is similar to `TARGET_SWITCHES' but defines names of 256: command options that have values. Its definition is an 257: initializer with a subgrouping for each command option. 258: 259: Each subgrouping contains a string constant, that defines the 260: fixed part of the option name, and the address of a variable. 261: The variable, type `char *', is set to the variable part of the 262: given option if the fixed part matches. The actual option name 263: is made by appending `-m' to the specified name. 264: 265: Here is an example which defines `-mshort-data-NUMBER'. If the 266: given option is `-mshort-data-512', the variable `m88k_short_data' 267: will be set to the string `"512"'. 268: 269: extern char *m88k_short_data; 270: #define TARGET_OPTIONS { { "short-data-", &m88k_short_data } } */ 271: 272: #define TARGET_OPTIONS \ 273: { \ 274: { "text=", &text_seg_name }, \ 275: { "data=", &data_seg_name }, \ 276: { "bss=", &bss_seg_name }, \ 277: { "const=", &const_seg_name }, \ 278: { "chip=", &chip_name } \ 279: } 280: 281: /* Sometimes certain combinations of command options do not make sense 282: on a particular target machine. You can define a macro 283: `OVERRIDE_OPTIONS' to take account of this. This macro, if 284: defined, is executed once just after all the command options have 285: been parsed. */ 286: 287: #define OVERRIDE_OPTIONS override_options () 288: 289: #define OPTIMIZATION_OPTIONS(LEVEL) \ 290: { \ 291: flag_gnu_linker = FALSE; \ 292: \ 293: if (LEVEL) \ 294: { \ 295: flag_omit_frame_pointer = TRUE; \ 296: flag_thread_jumps = TRUE; \ 297: } \ 298: \ 299: if (LEVEL >= 2) \ 300: { \ 301: flag_strength_reduce = TRUE; \ 302: flag_cse_follow_jumps = TRUE; \ 303: flag_cse_skip_blocks = TRUE; \ 304: flag_expensive_optimizations = TRUE; \ 305: flag_rerun_cse_after_loop = TRUE; \ 306: } \ 307: \ 308: if (LEVEL >= 3) \ 309: { \ 310: flag_inline_functions = 1; \ 311: } \ 312: } 313: 314: /* STORAGE LAYOUT */ 315: 316: /* Define if you don't want extended real, but do want to use the 317: software floating point emulator for REAL_ARITHMETIC and 318: decimal <-> binary conversion. */ 319: #define REAL_ARITHMETIC 320: 321: /* Define this if most significant bit is lowest numbered 322: in instructions that operate on numbered bit-fields. 323: */ 324: #define BITS_BIG_ENDIAN 1 325: 326: /* Define this if most significant byte of a word is the lowest numbered. 327: We define big-endian, but since the 1600 series cannot address bytes 328: it does not matter. */ 329: #define BYTES_BIG_ENDIAN 1 330: 331: /* Define this if most significant word of a multiword number is numbered. 332: For the 1600 we can decide arbitrarily since there are no machine instructions for them. */ 333: #define WORDS_BIG_ENDIAN 1 334: 1.1.1.2 ! root 335: /* number of bits in an addressable storage unit */ 1.1 root 336: #define BITS_PER_UNIT 16 337: 338: /* Width in bits of a "word", which is the contents of a machine register. 339: Note that this is not necessarily the width of data type `int'; 340: if using 16-bit ints on a 68000, this would still be 32. 341: But on a machine with 16-bit registers, this would be 16. */ 342: #define BITS_PER_WORD 16 343: 344: /* Maximum number of bits in a word. */ 345: #define MAX_BITS_PER_WORD 16 346: 347: /* Width of a word, in units (bytes). */ 348: #define UNITS_PER_WORD 1 349: 350: /* Width in bits of a pointer. 351: See also the macro `Pmode' defined below. */ 352: #define POINTER_SIZE 16 353: 354: /* Allocation boundary (in *bits*) for storing pointers in memory. */ 355: #define POINTER_BOUNDARY 16 356: 357: /* Allocation boundary (in *bits*) for storing arguments in argument list. */ 358: #define PARM_BOUNDARY 16 359: 360: /* Boundary (in *bits*) on which stack pointer should be aligned. */ 361: #define STACK_BOUNDARY 16 362: 363: /* Allocation boundary (in *bits*) for the code of a function. */ 364: #define FUNCTION_BOUNDARY 16 365: 366: /* Biggest alignment that any data type can require on this machine, in bits. */ 367: #define BIGGEST_ALIGNMENT 16 368: 369: /* Biggest alignment that any structure field can require on this machine, in bits */ 370: #define BIGGEST_FIELD_ALIGNMENT 16 371: 372: /* Alignment of field after `int : 0' in a structure. */ 373: #define EMPTY_FIELD_BOUNDARY 16 374: 375: /* Number of bits which any structure or union's size must be a multiple of. Each structure 376: or union's size is rounded up to a multiple of this */ 377: #define STRUCTURE_SIZE_BOUNDARY 16 378: 379: /* Define this if move instructions will actually fail to work 380: when given unaligned data. */ 381: #define STRICT_ALIGNMENT 1 382: 383: /* An integer expression for the size in bits of the largest integer machine mode that 384: should actually be used. All integer machine modes of this size or smaller can be 385: used for structures and unions with the appropriate sizes. */ 386: #define MAX_FIXED_MODE_SIZE 32 387: 388: /* LAYOUT OF SOURCE LANGUAGE DATA TYPES */ 389: 390: #define CHAR_TYPE_SIZE 16 391: #define SHORT_TYPE_SIZE 16 392: #define INT_TYPE_SIZE 16 393: #define LONG_TYPE_SIZE 32 394: #define LONG_LONG_TYPE_SIZE 32 395: #define FLOAT_TYPE_SIZE 32 396: #define DOUBLE_TYPE_SIZE 32 397: #define LONG_DOUBLE_TYPE_SIZE 32 398: 399: /* An expression whose value is 1 or 0, according to whether the type char should be 400: signed or unsigned by default. */ 401: 402: #define DEFAULT_SIGNED_CHAR 1 403: 404: /* A C expression to determine whether to give an enum type only as many bytes 405: as it takes to represent the range of possible values of that type. A nonzero 406: value means to do that; a zero value means all enum types should be allocated 407: like int. */ 408: 409: #define DEFAULT_SHORT_ENUMS 0 410: 411: /* A C expression for a string describing the name of the data type to use for 412: size values. */ 413: 414: #define SIZE_TYPE "long unsigned int" 415: 416: /* A C expression for a string describing the name of the datat type to use for the 417: result of subtracting two pointers */ 418: 419: #define PTRDIFF_TYPE "long int" 420: 421: #define TARGET_BELL '\a' 422: #define TARGET_BS '\b' 423: #define TARGET_TAB '\t' 424: #define TARGET_NEWLINE '\n' 425: #define TARGET_VT '\v' 426: #define TARGET_FF '\f' 427: #define TARGET_CR '\r' 428: 429: 430: /* REGISTER USAGE. */ 431: 432: #define ALL_16_BIT_REGISTERS 1 433: 434: /* Number of actual hardware registers. 435: The hardware registers are assigned numbers for the compiler 436: from 0 to FIRST_PSEUDO_REGISTER-1 */ 437: 438: #define FIRST_PSEUDO_REGISTER REG_YBASE31 + 1 439: 440: /* 1 for registers that have pervasive standard uses 441: and are not available for the register allocator. 442: 443: The registers are layed out as follows: 444: 445: {a0,a0l,a1,a1l,x,y,yl,p,pl} - Data Arithmetic Unit 446: {r0,r1,r2,r3,j,k,ybase} - Y Space Address Arithmetic Unit 447: {pt} - X Space Address Arithmetic Unit 448: {ar0,ar1,ar2,ar3} - Bit Manipulation UNit 449: {pr} - Return Address Register 450: 451: We reserve r2 for the Stack Pointer. 452: We specify r3 for the Frame Pointer but allow the compiler 453: to omit it when possible since we have so few pointer registers. */ 454: 455: #define REG_A0 0 456: #define REG_A0L 1 457: #define REG_A1 2 458: #define REG_A1L 3 459: #define REG_X 4 460: #define REG_Y 5 461: #define REG_YL 6 462: #define REG_PROD 7 463: #define REG_PRODL 8 464: #define REG_R0 9 465: #define REG_R1 10 466: #define REG_R2 11 467: #define REG_R3 12 468: #define REG_J 13 469: #define REG_K 14 470: #define REG_YBASE 15 471: #define REG_PT 16 472: #define REG_AR0 17 473: #define REG_AR1 18 474: #define REG_AR2 19 475: #define REG_AR3 20 476: #define REG_C0 21 477: #define REG_C1 22 478: #define REG_C2 23 479: #define REG_PR 24 480: #define REG_RB 25 481: #define REG_YBASE0 26 482: #define REG_YBASE1 27 483: #define REG_YBASE2 28 484: #define REG_YBASE3 29 485: #define REG_YBASE4 30 486: #define REG_YBASE5 31 487: #define REG_YBASE6 32 488: #define REG_YBASE7 33 489: #define REG_YBASE8 34 490: #define REG_YBASE9 35 491: #define REG_YBASE10 36 492: #define REG_YBASE11 37 493: #define REG_YBASE12 38 494: #define REG_YBASE13 39 495: #define REG_YBASE14 40 496: #define REG_YBASE15 41 497: #define REG_YBASE16 42 498: #define REG_YBASE17 43 499: #define REG_YBASE18 44 500: #define REG_YBASE19 45 501: #define REG_YBASE20 46 502: #define REG_YBASE21 47 503: #define REG_YBASE22 48 504: #define REG_YBASE23 49 505: #define REG_YBASE24 50 506: #define REG_YBASE25 51 507: #define REG_YBASE26 52 508: #define REG_YBASE27 53 509: #define REG_YBASE28 54 510: #define REG_YBASE29 55 511: #define REG_YBASE30 56 512: #define REG_YBASE31 57 513: 514: /* Do we have a accumulator register? */ 515: #define IS_ACCUM_REG(REGNO) ((REGNO) >= REG_A0 && (REGNO) <= REG_A1L) 516: #define IS_ACCUM_LOW_REG(REGNO) ((REGNO) == REG_A0L || (REGNO) == REG_A1L) 517: 518: /* Do we have a virtual ybase register */ 519: #define IS_YBASE_REGISTER_WINDOW(REGNO) ((REGNO) >= REG_YBASE0 && (REGNO) <= REG_YBASE31) 520: 521: #define IS_ADDRESS_REGISTER(REGNO) ((REGNO) >= REG_R0 && (REGNO) <= REG_R3) 522: 523: #define FIXED_REGISTERS \ 524: {0, 0, 0, 0, 0, 0, 0, 0, 0, \ 525: 0, 0, 0, 1, 0, 0, 1, \ 526: 1, \ 527: 0, 0, 0, 0, \ 528: 1, 1, 1, \ 529: 0, 0, \ 530: 0, 0, 0, 0, 0, 0, 0, 0, \ 531: 0, 0, 0, 0, 0, 0, 0, 0, \ 532: 0, 0, 0, 0, 0, 0, 0, 0, \ 533: 0, 0, 0, 0, 0, 0, 0, 0} 534: 535: /* 1 for registers not available across function calls. 536: These must include the FIXED_REGISTERS and also any 537: registers that can be used without being saved. 538: The latter must include the registers where values are returned 539: and the register where structure-value addresses are passed. 540: On the 1610 'a0' holds return values from functions. 'r0' holds 541: structure-value addresses. 542: 543: In addition we don't save either j, k, ybase or any of the 544: bit manipulation registers. */ 545: 546: 547: #define CALL_USED_REGISTERS \ 548: {1, 1, 1, 1, 0, 1, 1, 1, 1, \ 549: 1, 0, 0, 1, 1, 1, 1, \ 550: 1, \ 551: 0, 0, 1, 1, \ 552: 1, 1, 1, \ 553: 0, 1, \ 554: 0, 0, 0, 0, 0, 0, 0, 0, \ 555: 0, 0, 0, 0, 0, 0, 0, 0, \ 556: 0, 0, 0, 0, 0, 0, 0, 0, \ 557: 0, 0, 0, 0, 0, 0, 0, 0} 558: 559: /* List the order in which to allocate registers. Each register must be 560: listed once, even those in FIXED_REGISTERS. 561: 562: We allocate in the following order: 563: */ 564: 565: #define REG_ALLOC_ORDER \ 566: { REG_R0, REG_R1, REG_R2, REG_PROD, REG_Y, REG_X, \ 567: REG_PRODL, REG_YL, REG_AR0, REG_AR1, \ 568: REG_RB, REG_A0, REG_A1, REG_A0L, \ 569: REG_A1L, REG_AR2, REG_AR3, \ 570: REG_YBASE, REG_J, REG_K, REG_PR, REG_PT, REG_C0, \ 571: REG_C1, REG_C2, REG_R3, \ 572: REG_YBASE0, REG_YBASE1, REG_YBASE2, REG_YBASE3, \ 573: REG_YBASE4, REG_YBASE5, REG_YBASE6, REG_YBASE7, \ 574: REG_YBASE8, REG_YBASE9, REG_YBASE10, REG_YBASE11, \ 575: REG_YBASE12, REG_YBASE13, REG_YBASE14, REG_YBASE15, \ 576: REG_YBASE16, REG_YBASE17, REG_YBASE18, REG_YBASE19, \ 577: REG_YBASE20, REG_YBASE21, REG_YBASE22, REG_YBASE23, \ 578: REG_YBASE24, REG_YBASE25, REG_YBASE26, REG_YBASE27, \ 579: REG_YBASE28, REG_YBASE29, REG_YBASE30, REG_YBASE31 } 580: 581: /* Zero or more C statements that may conditionally modify two 582: variables `fixed_regs' and `call_used_regs' (both of type `char 583: []') after they have been initialized from the two preceding 584: macros. 585: 586: This is necessary in case the fixed or call-clobbered registers 587: depend on target flags. 588: 589: You need not define this macro if it has no work to do. 590: 591: If the usage of an entire class of registers depends on the target 592: flags, you may indicate this to GCC by using this macro to modify 593: `fixed_regs' and `call_used_regs' to 1 for each of the registers in 594: the classes which should not be used by GCC. Also define the macro 595: `REG_CLASS_FROM_LETTER' to return `NO_REGS' if it is called with a 596: letter for a class that shouldn't be used. 597: 598: (However, if this class is not included in `GENERAL_REGS' and all 599: of the insn patterns whose constraints permit this class are 600: controlled by target switches, then GCC will automatically avoid 601: using these registers when the target switches are opposed to 602: them.) If the user tells us there is no BMU, we can't use 1.1.1.2 ! root 603: ar0-ar3 for register allocation */ 1.1 root 604: 605: #define CONDITIONAL_REGISTER_USAGE \ 606: do \ 607: { \ 608: if (!TARGET_BMU) \ 609: { \ 610: int regno; \ 611: \ 612: for (regno = REG_AR0; regno <= REG_AR3; regno++) \ 613: fixed_regs[regno] = call_used_regs[regno] = 1; \ 614: } \ 615: if (TARGET_RESERVE_YBASE) \ 616: { \ 617: int regno; \ 618: \ 619: for (regno = REG_YBASE0; regno <= REG_YBASE31; regno++) \ 620: fixed_regs[regno] = call_used_regs[regno] = 1; \ 621: } \ 622: } \ 623: while (0) 624: 625: /* Determine which register classes are very likely used by spill registers. 626: local-alloc.c won't allocate pseudos that have these classes as their 627: preferred class unless they are "preferred or nothing". */ 628: 629: #define CLASS_LIKELY_SPILLED_P(CLASS) \ 630: ((CLASS) != ALL_REGS && (CLASS) != YBASE_VIRT_REGS) 631: 632: /* Return number of consecutive hard regs needed starting at reg REGNO 633: to hold something of mode MODE. 634: This is ordinarily the length in words of a value of mode MODE 635: but can be less for certain modes in special long registers. */ 636: 637: #define HARD_REGNO_NREGS(REGNO, MODE) \ 638: (GET_MODE_SIZE(MODE)) 639: 640: /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE. */ 641: 642: #define HARD_REGNO_MODE_OK(REGNO, MODE) hard_regno_mode_ok(REGNO, MODE) 643: 644: /* Value is 1 if it is a good idea to tie two pseudo registers 645: when one has mode MODE1 and one has mode MODE2. 646: If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2, 647: for any hard reg, then this must be 0 for correct output. */ 648: #define MODES_TIEABLE_P(MODE1, MODE2) \ 649: (((MODE1) == (MODE2)) || \ 650: (GET_MODE_CLASS((MODE1)) == MODE_FLOAT) \ 651: == (GET_MODE_CLASS((MODE2)) == MODE_FLOAT)) 652: 653: /* Specify the registers used for certain standard purposes. 654: The values of these macros are register numbers. */ 655: 656: /* DSP1600 pc isn't overloaded on a register. */ 657: /* #define PC_REGNUM */ 658: 659: /* Register to use for pushing function arguments. 660: This is r3 in our case */ 661: #define STACK_POINTER_REGNUM REG_R3 662: 663: /* Base register for access to local variables of the function. 664: This is r2 in our case */ 665: #define FRAME_POINTER_REGNUM REG_R2 666: 667: /* We can debug without the frame pointer */ 668: #define CAN_DEBUG_WITHOUT_FP 1 669: 670: /* The 1610 saves the return address in this register */ 671: #define RETURN_ADDRESS_REGNUM REG_PR 672: 673: /* Base register for access to arguments of the function. */ 674: #define ARG_POINTER_REGNUM FRAME_POINTER_REGNUM 675: 676: /* Register in which static-chain is passed to a function. */ 677: 678: #define STATIC_CHAIN_REGNUM 4 679: 680: /* Register in which address to store a structure value 681: is passed to a function. This is 'r0' in our case */ 682: #define STRUCT_VALUE_REGNUM REG_R0 683: 684: /* Define the classes of registers for register constraints in the 685: machine description. Also define ranges of constants. 686: 687: One of the classes must always be named ALL_REGS and include all hard regs. 688: If there is more than one class, another class must be named NO_REGS 689: and contain no registers. 690: 691: The name GENERAL_REGS must be the name of a class (or an alias for 692: another name such as ALL_REGS). This is the class of registers 693: that is allowed by "g" or "r" in a register constraint. 694: Also, registers outside this class are allocated only when 695: instructions express preferences for them. 696: 697: The classes must be numbered in nondecreasing order; that is, 698: a larger-numbered class must never be contained completely 699: in a smaller-numbered class. 700: 701: For any two classes, it is very desirable that there be another 702: class that represents their union. */ 703: 704: 705: enum reg_class 706: { 707: NO_REGS, 708: A0H_REG, 709: A0L_REG, 710: A0_REG, 711: A1H_REG, 712: ACCUM_HIGH_REGS, 713: A1L_REG, 714: ACCUM_LOW_REGS, 715: A1_REG, 716: ACCUM_REGS, 717: X_REG, 718: X_OR_ACCUM_LOW_REGS, 719: X_OR_ACCUM_REGS, 720: YH_REG, 721: YH_OR_ACCUM_HIGH_REGS, 722: X_OR_YH_REGS, 723: YL_REG, 724: YL_OR_ACCUM_LOW_REGS, 725: X_OR_YL_REGS, 726: X_OR_Y_REGS, 727: Y_REG, 728: ACCUM_OR_Y_REGS, 729: PH_REG, 730: X_OR_PH_REGS, 731: PL_REG, 732: PL_OR_ACCUM_LOW_REGS, 733: X_OR_PL_REGS, 734: YL_OR_PL_OR_ACCUM_LOW_REGS, 735: P_REG, 736: ACCUM_OR_P_REGS, 737: YL_OR_P_REGS, 738: ACCUM_LOW_OR_YL_OR_P_REGS, 739: Y_OR_P_REGS, 740: ACCUM_Y_OR_P_REGS, 741: NO_FRAME_Y_ADDR_REGS, 742: Y_ADDR_REGS, 743: ACCUM_LOW_OR_Y_ADDR_REGS, 744: ACCUM_OR_Y_ADDR_REGS, 745: X_OR_Y_ADDR_REGS, 746: Y_OR_Y_ADDR_REGS, 747: P_OR_Y_ADDR_REGS, 748: NON_HIGH_YBASE_ELIGIBLE_REGS, 749: YBASE_ELIGIBLE_REGS, 750: J_REG, 751: J_OR_DAU_16_BIT_REGS, 752: BMU_REGS, 753: NOHIGH_NON_ADDR_REGS, 754: NON_ADDR_REGS, 755: SLOW_MEM_LOAD_REGS, 756: NOHIGH_NON_YBASE_REGS, 757: NO_ACCUM_NON_YBASE_REGS, 758: NON_YBASE_REGS, 759: YBASE_VIRT_REGS, 760: ACCUM_LOW_OR_YBASE_REGS, 761: ACCUM_OR_YBASE_REGS, 762: X_OR_YBASE_REGS, 763: Y_OR_YBASE_REGS, 764: ACCUM_LOW_YL_PL_OR_YBASE_REGS, 765: P_OR_YBASE_REGS, 766: ACCUM_Y_P_OR_YBASE_REGS, 767: Y_ADDR_OR_YBASE_REGS, 768: YBASE_OR_NOHIGH_YBASE_ELIGIBLE_REGS, 769: YBASE_OR_YBASE_ELIGIBLE_REGS, 770: NO_HIGH_ALL_REGS, 771: ALL_REGS, 772: LIM_REG_CLASSES 773: }; 774: 775: /* GENERAL_REGS must be the name of a register class */ 776: #define GENERAL_REGS ALL_REGS 777: 778: #define N_REG_CLASSES (int) LIM_REG_CLASSES 779: 780: /* Give names of register classes as strings for dump file. */ 781: 782: #define REG_CLASS_NAMES \ 783: { \ 784: "NO_REGS", \ 785: "A0H_REG", \ 786: "A0L_REG", \ 787: "A0_REG", \ 788: "A1H_REG", \ 789: "ACCUM_HIGH_REGS", \ 790: "A1L_REG", \ 791: "ACCUM_LOW_REGS", \ 792: "A1_REG", \ 793: "ACCUM_REGS", \ 794: "X_REG", \ 795: "X_OR_ACCUM_LOW_REGS", \ 796: "X_OR_ACCUM_REGS", \ 797: "YH_REG", \ 798: "YH_OR_ACCUM_HIGH_REGS", \ 799: "X_OR_YH_REGS", \ 800: "YL_REG", \ 801: "YL_OR_ACCUM_LOW_REGS", \ 802: "X_OR_YL_REGS", \ 803: "X_OR_Y_REGS", \ 804: "Y_REG", \ 805: "ACCUM_OR_Y_REGS", \ 806: "PH_REG", \ 807: "X_OR_PH_REGS", \ 808: "PL_REG", \ 809: "PL_OR_ACCUM_LOW_REGS", \ 810: "X_OR_PL_REGS", \ 811: "PL_OR_YL_OR_ACCUM_LOW_REGS", \ 812: "P_REG", \ 813: "ACCUM_OR_P_REGS", \ 814: "YL_OR_P_REGS", \ 815: "ACCUM_LOW_OR_YL_OR_P_REGS", \ 816: "Y_OR_P_REGS", \ 817: "ACCUM_Y_OR_P_REGS", \ 818: "NO_FRAME_Y_ADDR_REGS", \ 819: "Y_ADDR_REGS", \ 820: "ACCUM_LOW_OR_Y_ADDR_REGS", \ 821: "ACCUM_OR_Y_ADDR_REGS", \ 822: "X_OR_Y_ADDR_REGS", \ 823: "Y_OR_Y_ADDR_REGS", \ 824: "P_OR_Y_ADDR_REGS", \ 825: "NON_HIGH_YBASE_ELIGIBLE_REGS", \ 826: "YBASE_ELIGIBLE_REGS", \ 827: "J_REG", \ 828: "J_OR_DAU_16_BIT_REGS", \ 829: "BMU_REGS", \ 830: "NOHIGH_NON_ADDR_REGS", \ 831: "NON_ADDR_REGS", \ 832: "SLOW_MEM_LOAD_REGS", \ 833: "NOHIGH_NON_YBASE_REGS", \ 834: "NO_ACCUM_NON_YBASE_REGS", \ 835: "NON_YBASE_REGS", \ 836: "YBASE_VIRT_REGS", \ 837: "ACCUM_LOW_OR_YBASE_REGS", \ 838: "ACCUM_OR_YBASE_REGS", \ 839: "X_OR_YBASE_REGS", \ 840: "Y_OR_YBASE_REGS", \ 841: "ACCUM_LOW_YL_PL_OR_YBASE_REGS", \ 842: "P_OR_YBASE_REGS", \ 843: "ACCUM_Y_P_OR_YBASE_REGS", \ 844: "Y_ADDR_OR_YBASE_REGS", \ 845: "YBASE_OR_NOHIGH_YBASE_ELIGIBLE_REGS", \ 846: "YBASE_OR_YBASE_ELIGIBLE_REGS", \ 847: "NO_HIGH_ALL_REGS", \ 848: "ALL_REGS" \ 849: } 850: 851: /* Define which registers fit in which classes. 852: This is an initializer for a vector of HARD_REG_SET 853: of length N_REG_CLASSES. */ 854: 855: #define REG_CLASS_CONTENTS \ 856: { \ 857: {0x00000000, 0x00000000}, /* no reg */ \ 858: {0x00000001, 0x00000000}, /* a0h */ \ 859: {0x00000002, 0x00000000}, /* a0l */ \ 860: {0x00000003, 0x00000000}, /* a0h:a0l */ \ 861: {0x00000004, 0x00000000}, /* a1h */ \ 862: {0x00000005, 0x00000000}, /* accum high */ \ 863: {0x00000008, 0x00000000}, /* a1l */ \ 864: {0x0000000A, 0x00000000}, /* accum low */ \ 865: {0x0000000c, 0x00000000}, /* a1h:a1l */ \ 866: {0x0000000f, 0x00000000}, /* accum regs */ \ 867: {0x00000010, 0x00000000}, /* x reg */ \ 868: {0x0000001A, 0x00000000}, /* x & accum_low_regs */ \ 869: {0x0000001f, 0x00000000}, /* x & accum regs */ \ 870: {0x00000020, 0x00000000}, /* y high */ \ 871: {0x00000025, 0x00000000}, /* yh, accum high */ \ 872: {0x00000030, 0x00000000}, /* x & yh */ \ 873: {0x00000040, 0x00000000}, /* y low */ \ 874: {0x0000004A, 0x00000000}, /* y low, accum_low */ \ 875: {0x00000050, 0x00000000}, /* x & yl */ \ 876: {0x00000060, 0x00000000}, /* yl:yh */ \ 877: {0x00000070, 0x00000000}, /* x, yh,a nd yl */ \ 878: {0x0000006F, 0x00000000}, /* accum, y */ \ 879: {0x00000080, 0x00000000}, /* p high */ \ 880: {0x00000090, 0x00000000}, /* x & ph */ \ 881: {0x00000100, 0x00000000}, /* p low */ \ 882: {0x0000010A, 0x00000000}, /* p_low and accum_low */ \ 883: {0x00000110, 0x00000000}, /* x & pl */ \ 884: {0x0000014A, 0x00000000}, /* pl,yl,a1l,a0l */ \ 885: {0x00000180, 0x00000000}, /* pl:ph */ \ 886: {0x0000018F, 0x00000000}, /* accum, p */ \ 887: {0x000001C0, 0x00000000}, /* pl:ph and yl */ \ 888: {0x000001CA, 0x00000000}, /* pl:ph, yl, a0l, a1l */ \ 889: {0x000001E0, 0x00000000}, /* y or p */ \ 890: {0x000001EF, 0x00000000}, /* accum, y or p */ \ 891: {0x00000E00, 0x00000000}, /* r0-r2 */ \ 892: {0x00001E00, 0x00000000}, /* r0-r3 */ \ 893: {0x00001E0A, 0x00000000}, /* r0-r3, accum_low */ \ 894: {0x00001E0F, 0x00000000}, /* accum,r0-r3 */ \ 895: {0x00001E10, 0x00000000}, /* x,r0-r3 */ \ 896: {0x00001E60, 0x00000000}, /* y,r0-r3 */ \ 897: {0x00001F80, 0x00000000}, /* p,r0-r3 */ \ 898: {0x00001FDA, 0x00000000}, /* ph:pl, r0-r3, x,a0l,a1l */ \ 899: {0x00001fff, 0x00000000}, /* accum,x,y,p,r0-r3 */ \ 900: {0x00002000, 0x00000000}, /* j */ \ 901: {0x00002025, 0x00000000}, /* j, yh, a1h, a0h */ \ 902: {0x001E0000, 0x00000000}, /* ar0-ar3 */ \ 903: {0x03FFE1DA, 0x00000000}, /* non_addr except yh,a0h,a1h */ \ 904: {0x03FFE1FF, 0x00000000}, /* non_addr regs */ \ 905: {0x03FFFF8F, 0x00000000}, /* non ybase except yh, yl, and x */ \ 906: {0x03FFFFDA, 0x00000000}, /* non ybase regs except yh,a0h,a1h */ \ 907: {0x03FFFFF0, 0x00000000}, /* non ybase except a0,a0l,a1,a1l */ \ 908: {0x03FFFFFF, 0x00000000}, /* non ybase regs */ \ 909: {0xFC000000, 0x03FFFFFF}, /* virt ybase regs */ \ 910: {0xFC00000A, 0x03FFFFFF}, /* accum_low, virt ybase regs */ \ 911: {0xFC00000F, 0x03FFFFFF}, /* accum, virt ybase regs */ \ 912: {0xFC000010, 0x03FFFFFF}, /* x,virt ybase regs */ \ 913: {0xFC000060, 0x03FFFFFF}, /* y,virt ybase regs */ \ 914: {0xFC00014A, 0x03FFFFFF}, /* accum_low, yl, pl, ybase */ \ 915: {0xFC000180, 0x03FFFFFF}, /* p,virt ybase regs */ \ 916: {0xFC0001EF, 0x03FFFFFF}, /* accum,y,p,ybase regs */ \ 917: {0xFC001E00, 0x03FFFFFF}, /* r0-r3, ybase regs */ \ 918: {0xFC001FDA, 0x03FFFFFF}, /* r0-r3, pl:ph,yl,x,a1l,a0l */ \ 919: {0xFC001FFF, 0x03FFFFFF}, /* virt ybase, ybase eligible regs */ \ 920: {0xFCFFFFDA, 0x03FFFFFF}, /* all regs except yh,a0h,a1h */ \ 921: {0xFFFFFFFF, 0x03FFFFFF} /* all regs */ \ 922: } 923: 924: 925: /* The same information, inverted: 926: Return the class number of the smallest class containing 927: reg number REGNO. This could be a conditional expression 928: or could index an array. */ 929: 930: #define REGNO_REG_CLASS(REGNO) regno_reg_class(REGNO) 931: 932: /* The class value for index registers, and the one for base regs. */ 933: 934: #define INDEX_REG_CLASS NO_REGS 935: #define BASE_REG_CLASS Y_ADDR_REGS 936: 937: /* Get reg_class from a letter such as appears in the machine description. */ 938: 939: #define REG_CLASS_FROM_LETTER(C) \ 940: dsp16xx_reg_class_from_letter(C) 941: 942: #define SECONDARY_RELOAD_CLASS(CLASS, MODE, X) \ 943: secondary_reload_class(CLASS, MODE, X) 944: 945: /* When defined, the compiler allows registers explicitly used in the 946: rtl to be used as spill registers but prevents the compiler from 947: extending the lifetime of these registers. */ 948: 949: #define SMALL_REGISTER_CLASSES 950: 951: /* Macros to check register numbers against specific register classes. */ 952: 953: /* These assume that REGNO is a hard or pseudo reg number. 954: They give nonzero only if REGNO is a hard reg of the suitable class 955: or a pseudo reg currently allocated to a suitable hard reg. 956: Since they use reg_renumber, they are safe only once reg_renumber 957: has been allocated, which happens in local-alloc.c. */ 958: 959: /* A C expression which is nonzero if register REGNO is suitable for use 960: as a base register in operand addresses. It may be either a suitable 961: hard register or a pseudo register that has been allocated such a 962: hard register. 963: 964: On the 1610 the Y address pointers can be used as a base registers */ 965: #define REGNO_OK_FOR_BASE_P(REGNO) \ 966: (((REGNO) >= REG_R0 && (REGNO) < REG_R3 + 1) || ((unsigned) reg_renumber[REGNO] >= REG_R0 \ 967: && (unsigned) reg_renumber[REGNO] < REG_R3 + 1)) 968: 969: #define REGNO_OK_FOR_YBASE_P(REGNO) \ 970: (((REGNO) == REG_YBASE) || ((unsigned) reg_renumber[REGNO] == REG_YBASE)) 971: 972: #define REGNO_OK_FOR_INDEX_P(REGNO) 0 973: 974: #ifdef ALL_16_BIT_REGISTERS 975: #define IS_32_BIT_REG(REGNO) 0 976: #else 977: #define IS_32_BIT_REG(REGNO) \ 978: ((REGNO) == REG_A0 || (REGNO) == REG_A1 || (REGNO) == REG_Y || (REGNO) == REG_PROD) 979: #endif 980: 981: /* Given an rtx X being reloaded into a reg required to be 982: in class CLASS, return the class of reg to actually use. 983: In general this is just CLASS; but on some machines 984: in some cases it is preferable to use a more restrictive class. 985: Also, we must ensure that a PLUS is reloaded either 986: into an accumulator or an address register. */ 987: 988: #define PREFERRED_RELOAD_CLASS(X,CLASS) preferred_reload_class (X, CLASS) 989: 990: /* A C expression that places additional restrictions on the register 991: class to use when it is necessary to be able to hold a value of 992: mode MODE in a reload register for which class CLASS would 993: ordinarily be used. 994: 995: Unlike `PREFERRED_RELOAD_CLASS', this macro should be used when 996: there are certain modes that simply can't go in certain reload 997: classes. 998: 999: The value is a register class; perhaps CLASS, or perhaps another, 1000: smaller class. 1001: 1002: Don't define this macro unless the target machine has limitations 1003: which require the macro to do something nontrivial. */ 1004: 1005: #if 0 1006: #define LIMIT_RELOAD_CLASS(MODE, CLASS) dsp16xx_limit_reload_class (MODE, CLASS) 1007: #endif 1008: 1009: /* A C expression for the maximum number of consecutive registers of class CLASS 1.1.1.2 ! root 1010: needed to hold a value of mode MODE */ 1.1 root 1011: #define CLASS_MAX_NREGS(CLASS, MODE) \ 1012: class_max_nregs(CLASS, MODE) 1013: 1014: /* The letters 'I' through 'P' in a register constraint string 1015: can be used to stand for particular ranges of immediate operands. 1016: This macro defines what the ranges are. 1017: C is the letter, and VALUE is a constant value. 1018: Return 1 if VALUE is in the range specified by C. 1019: 1020: For the 16xx, the following constraints are used: 1021: 'I' requires a non-negative 16-bit value. 1022: 'J' requires a non-negative 9-bit value 1023: 'K' requires a constant 0 operand. 1024: 'L' requires 16-bit value 1025: 'M' 32-bit value -- low 16-bits zero 1026: */ 1027: 1028: #define SMALL_INT(X) (SMALL_INTVAL (INTVAL (X))) 1029: #define SMALL_INTVAL(I) ((unsigned) (I) < 0x10000) 1030: #define SHORT_IMMEDIATE(X) (SHORT_INTVAL (INTVAL(X))) 1031: #define SHORT_INTVAL(I) ((unsigned) (I) < 0x100) 1032: 1033: #define CONST_OK_FOR_LETTER_P(VALUE, C) \ 1034: ((C) == 'I' ? (SMALL_INTVAL(VALUE)) \ 1035: : (C) == 'J' ? (SHORT_INTVAL(VALUE)) \ 1036: : (C) == 'K' ? ((VALUE) == 0) \ 1037: : (C) == 'L' ? ! ((VALUE) & ~0x0000ffff) \ 1038: : (C) == 'M' ? ! ((VALUE) & ~0xffff0000) \ 1039: : (C) == 'N' ? ((VALUE) == -1 || (VALUE) == 1 || \ 1040: (VALUE) == -2 || (VALUE) == 2) \ 1041: : 0) 1042: 1043: #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) 1 1044: 1045: /* Optional extra constraints for this machine */ 1046: #define EXTRA_CONSTRAINT(OP,C) \ 1047: ((C) == 'R' ? symbolic_address_p (OP) \ 1048: : 0) 1049: 1050: /* DESCRIBING STACK LAYOUT AND CALLING CONVENTIONS */ 1051: 1052: /* Define this if pushing a word on the stack 1053: makes the stack pointer a smaller address. */ 1054: /* #define STACK_GROWS_DOWNWARD */ 1055: 1056: /* Define this if the nominal address of the stack frame 1057: is at the high-address end of the local variables; 1058: that is, each additional local variable allocated 1059: goes at a more negative offset in the frame. */ 1060: /* #define FRAME_GROWS_DOWNWARD */ 1061: 1062: #define ARGS_GROW_DOWNWARD 1063: 1064: /* We use post decrement on the 1600 because there isn't 1065: a pre-decrement addressing mode. This means that we 1066: assume the stack pointer always points at the next 1067: FREE location on the stack. */ 1068: #define STACK_PUSH_CODE POST_INC 1069: 1070: /* Offset within stack frame to start allocating local variables at. 1071: If FRAME_GROWS_DOWNWARD, this is the offset to the END of the 1072: first local allocated. Otherwise, it is the offset to the BEGINNING 1073: of the first local allocated. */ 1074: #define STARTING_FRAME_OFFSET 0 1075: 1076: /* Offset from the stack pointer register to the first 1077: location at which outgoing arguments are placed. */ 1078: #define STACK_POINTER_OFFSET (0) 1079: 1080: struct dsp16xx_frame_info 1081: { 1082: unsigned long total_size; /* # bytes that the entire frame takes up */ 1083: unsigned long var_size; /* # bytes that variables take up */ 1084: unsigned long args_size; /* # bytes that outgoing arguments take up */ 1085: unsigned long extra_size; /* # bytes of extra gunk */ 1086: unsigned int reg_size; /* # bytes needed to store regs */ 1087: long fp_save_offset; /* offset from vfp to store registers */ 1088: unsigned long sp_save_offset; /* offset from new sp to store registers */ 1089: int initialized; /* != 0 if frame size already calculated */ 1090: int num_regs; /* number of registers saved */ 1091: int function_makes_calls; /* Does the function make calls */ 1092: }; 1093: 1094: extern struct dsp16xx_frame_info current_frame_info; 1095: 1096: /* If we generate an insn to push BYTES bytes, 1097: this says how many the stack pointer really advances by. */ 1098: /* #define PUSH_ROUNDING(BYTES) ((BYTES)) */ 1099: 1100: /* If defined, the maximum amount of space required for outgoing 1101: arguments will be computed and placed into the variable 1102: 'current_function_outgoing_args_size'. No space will be pushed 1103: onto the stack for each call; instead, the function prologue should 1104: increase the stack frame size by this amount. 1105: 1106: It is not proper to define both 'PUSH_ROUNDING' and 1107: 'ACCUMULATE_OUTGOING_ARGS'. */ 1108: #define ACCUMULATE_OUTGOING_ARGS 1109: 1110: /* Offset of first parameter from the argument pointer 1111: register value. */ 1112: 1113: #define FIRST_PARM_OFFSET(FNDECL) (0) 1114: 1115: /* Value is 1 if returning from a function call automatically 1116: pops the arguments described by the number-of-args field in the call. 1.1.1.2 ! root 1117: FUNDECL is the declaration node of the function (as a tree), 1.1 root 1118: FUNTYPE is the data type of the function (as a tree), 1119: or for a library call it is an identifier node for the subroutine name. */ 1120: 1.1.1.2 ! root 1121: #define RETURN_POPS_ARGS(FUNDECL,FUNTYPE,SIZE) 0 1.1 root 1122: 1123: /* Define how to find the value returned by a function. 1124: VALTYPE is the data type of the value (as a tree). 1125: If the precise function being called is known, FUNC is its FUNCTION_DECL; 1126: otherwise, FUNC is 0. On the 1610 all function return their values 1127: in a0 (i.e. the upper 16 bits). If the return value is 32-bits the 1128: entire register is significant. */ 1129: 1130: #define VALUE_REGNO(MODE) (REG_Y) 1131: 1132: #define FUNCTION_VALUE(VALTYPE, FUNC) \ 1133: gen_rtx (REG, TYPE_MODE (VALTYPE), VALUE_REGNO(TYPE_MODE(VALTYPE))) 1134: 1135: /* Define how to find the value returned by a library function 1136: assuming the value has mode MODE. */ 1137: #define LIBCALL_VALUE(MODE) gen_rtx (REG, MODE, VALUE_REGNO(MODE)) 1138: 1139: /* 1 if N is a possible register number for a function value. */ 1140: #define FUNCTION_VALUE_REGNO_P(N) ((N) == REG_Y) 1141: 1142: 1143: /* Define where to put the arguments to a function. 1144: Value is zero to push the argument on the stack, 1145: or a hard register in which to store the argument. 1146: 1147: MODE is the argument's machine mode. 1148: TYPE is the data type of the argument (as a tree). 1149: This is null for libcalls where that information may 1150: not be available. 1151: CUM is a variable of type CUMULATIVE_ARGS which gives info about 1152: the preceding args and about the function being called. 1153: NAMED is nonzero if this argument is a named parameter 1154: (otherwise it is an extra parameter matching an ellipsis). */ 1155: 1156: /* On the 1610 all args are pushed, except if -mregparm is specified 1157: then the first two words of arguments are passed in a0, a1. */ 1158: #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \ 1159: dsp16xx_function_arg (CUM, MODE, TYPE, NAMED) 1160: 1161: /* Define the first register to be used for argument passing */ 1162: #define FIRST_REG_FOR_FUNCTION_ARG REG_Y 1163: 1.1.1.2 ! root 1164: /* Define the profitability of saving registers around calls. ! 1165: NOTE: For now we turn this off because of a bug in the 1.1 root 1166: caller-saves code and also because i'm not sure it is helpful 1167: on the 1610. */ 1168: 1169: #define CALLER_SAVE_PROFITABLE(REFS,CALLS) 0 1170: 1171: /* This indicates that an argument is to be passed with an invisible reference 1172: (i.e., a pointer to the object is passed). 1173: 1174: On the dsp16xx, we do this if it must be passed on the stack. */ 1175: 1176: #define FUNCTION_ARG_PASS_BY_REFERENCE(CUM, MODE, TYPE, NAMED) \ 1177: (MUST_PASS_IN_STACK (MODE, TYPE)) 1178: 1179: /* For an arg passed partly in registers and partly in memory, 1180: this is the number of registers used. 1181: For args passed entirely in registers or entirely in memory, zero. */ 1182: 1183: #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) (0) 1184: 1185: /* Define a data type for recording info about an argument list 1186: during the scan of that argument list. This data type should 1187: hold all necessary information about the function itself 1188: and about the args processed so far, enough to enable macros 1189: such as FUNCTION_ARG to determine where the next arg should go. */ 1190: #define CUMULATIVE_ARGS int 1191: 1192: /* Initialize a variable CUM of type CUMULATIVE_ARGS 1193: for a call to a function whose data type is FNTYPE. 1194: For a library call, FNTYPE is 0. */ 1195: #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME) ((CUM) = 0) 1196: 1197: /* Update the data in CUM to advance over an argument 1198: of mode MODE and data type TYPE. 1199: (TYPE is null for libcalls where that information may not be available.) */ 1200: 1201: #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \ 1202: dsp16xx_function_arg_advance (&CUM, MODE,TYPE, NAMED) 1203: 1204: /* 1 if N is a possible register number for function argument passing. */ 1205: #define FUNCTION_ARG_REGNO_P(N) \ 1206: ((N) == REG_Y || (N) == REG_YL || (N) == REG_PROD || (N) == REG_PRODL) 1207: 1208: /* This macro generates the assembly code for function entry. 1209: FILE is a stdio stream to output the code to. 1210: SIZE is an int: how many units of temporary storage to allocate. 1211: Refer to the array `regs_ever_live' to determine which registers 1212: to save; `regs_ever_live[I]' is nonzero if register number I 1213: is ever used in the function. This macro is responsible for 1214: knowing which registers should not be saved even if used. */ 1215: 1216: #define FUNCTION_PROLOGUE(FILE, SIZE) function_prologue(FILE, SIZE) 1217: 1218: /* Output assembler code to FILE to increment profiler label # LABELNO 1219: for profiling a function entry. */ 1220: 1221: #define FUNCTION_PROFILER(FILE, LABELNO) fatal("Profiling not implemented yet.") 1222: 1223: /* Output assembler code to FILE to initialize this source file's 1224: basic block profiling info, if that has not already been done. */ 1225: #define FUNCTION_BLOCK_PROFILER(FILE, LABELNO) fatal("Profiling not implemented yet.") 1226: 1227: /* Output assembler code to FILE to increment the entry-count for 1228: the BLOCKNO'th basic block in this source file. */ 1229: #define BLOCK_PROFILER(FILE, BLOCKNO) fatal("Profiling not implemented yet.") 1230: 1231: 1232: /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function, 1233: the stack pointer does not matter. The value is tested only in 1234: functions that have frame pointers. 1235: No definition is equivalent to always zero. */ 1236: 1237: #define EXIT_IGNORE_STACK (0) 1238: 1239: #define TRAMPOLINE_TEMPLATE(FILE) fatal ("Trampolines not yet implemented"); 1240: 1241: /* Length in units of the trampoline for entering a nested function. 1242: This is a dummy value */ 1243: 1244: #define TRAMPOLINE_SIZE 20 1245: 1246: /* Emit RTL insns to initialize the variable parts of a trampoline. 1247: FNADDR is an RTX for the address of the function's pure code. 1248: CXT is an RTX for the static chain value for the function. */ 1249: 1250: #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \ 1251: fatal ("Trampolines not yet implemented"); 1252: 1253: /* This macro generates the assembly code for function exit, 1254: on machines that need it. If FUNCTION_EPILOGUE is not defined 1255: then individual return instructions are generated for each 1256: return statement. Args are same as for FUNCTION_PROLOGUE. 1257: 1258: The function epilogue should not depend on the current stack pointer! 1259: It should use the frame pointer only. This is mandatory because 1260: of alloca; we also take advantage of it to omit stack adjustments 1261: before returning. */ 1262: 1263: #define FUNCTION_EPILOGUE(FILE, SIZE) function_epilogue(FILE, SIZE) 1264: 1265: /* A C expression which is nonzero if a function must have and use a 1266: frame pointer. If its value is nonzero the functions will have a 1267: frame pointer. */ 1268: #define FRAME_POINTER_REQUIRED (current_function_calls_alloca) 1269: 1270: /* A C statement to store in the variable 'DEPTH' the difference 1271: between the frame pointer and the stack pointer values immediately 1272: after the function prologue. */ 1273: #define INITIAL_FRAME_POINTER_OFFSET(DEPTH) \ 1274: { (DEPTH) = initial_frame_pointer_offset(); \ 1275: } 1276: 1277: /* IMPLICIT CALLS TO LIBRARY ROUTINES */ 1278: 1279: #define ADDHF3_LIBCALL "__Emulate_addhf3" 1280: #define SUBHF3_LIBCALL "__Emulate_subhf3" 1281: #define MULHF3_LIBCALL "__Emulate_mulhf3" 1282: #define DIVHF3_LIBCALL "__Emulate_divhf3" 1283: #define CMPHF3_LIBCALL "__Emulate_cmphf3" 1284: #define FIXHFHI2_LIBCALL "__Emulate_fixhfhi2" 1285: #define FLOATHIHF2_LIBCALL "__Emulate_floathihf2" 1286: #define NEGHF2_LIBCALL "__Emulate_neghf2" 1287: 1288: #define UMULHI3_LIBCALL "__Emulate_umulhi3" 1289: #define MULHI3_LIBCALL "__Emulate_mulhi3" 1290: #define UDIVQI3_LIBCALL "__Emulate_udivqi3" 1291: #define UDIVHI3_LIBCALL "__Emulate_udivhi3" 1292: #define DIVQI3_LIBCALL "__Emulate_divqi3" 1293: #define DIVHI3_LIBCALL "__Emulate_divhi3" 1294: #define MODQI3_LIBCALL "__Emulate_modqi3" 1295: #define MODHI3_LIBCALL "__Emulate_modhi3" 1296: #define UMODQI3_LIBCALL "__Emulate_umodqi3" 1297: #define UMODHI3_LIBCALL "__Emulate_umodhi3" 1298: #define ASHRHI3_LIBCALL "__Emulate_ashrhi3" 1299: #define LSHRHI3_LIBCALL "__Emulate_lshrhi3" 1300: #define ASHLHI3_LIBCALL "__Emulate_ashlhi3" 1301: #define LSHLHI3_LIBCALL "__Emulate_lshlhi3" /* NOT USED */ 1302: 1303: /* Define this macro if calls to the ANSI C library functions memcpy and 1304: memset should be generated instead of the BSD function bcopy & bzero. */ 1305: #define TARGET_MEM_FUNCTIONS 1306: 1307: 1308: /* ADDRESSING MODES */ 1309: 1310: /* The 1610 has post-increment and decrement, but no pre-modify */ 1311: #define HAVE_POST_INCREMENT 1312: #define HAVE_POST_DECREMENT 1313: 1314: /* #define HAVE_PRE_DECREMENT */ 1315: /* #define HAVE_PRE_INCREMENT */ 1316: 1317: /* Recognize any constant value that is a valid address. */ 1318: #define CONSTANT_ADDRESS_P(X) CONSTANT_P (X) 1319: 1320: /* Maximum number of registers that can appear in a valid memory address. */ 1321: #define MAX_REGS_PER_ADDRESS 1 1322: 1323: /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx 1324: and check its validity for a certain class. 1325: We have two alternate definitions for each of them. 1326: The usual definition accepts all pseudo regs; the other rejects 1327: them unless they have been allocated suitable hard regs. 1328: The symbol REG_OK_STRICT causes the latter definition to be used. 1329: 1330: Most source files want to accept pseudo regs in the hope that 1331: they will get allocated to the class that the insn wants them to be in. 1332: Source files for reload pass need to be strict. 1333: After reload, it makes no difference, since pseudo regs have 1334: been eliminated by then. */ 1335: 1336: #ifndef REG_OK_STRICT 1337: 1338: /* Nonzero if X is a hard reg that can be used as an index 1339: or if it is a pseudo reg. */ 1340: #define REG_OK_FOR_INDEX_P(X) 0 1341: 1342: /* Nonzero if X is a hard reg that can be used as a base reg 1343: or if it is a pseudo reg. */ 1344: #define REG_OK_FOR_BASE_P(X) \ 1345: ((REGNO (X) >= REG_R0 && REGNO (X) < REG_R3 + 1 ) \ 1346: || (REGNO (X) >= FIRST_PSEUDO_REGISTER)) 1347: 1348: /* Nonzero if X is the 'ybase' register */ 1349: #define REG_OK_FOR_YBASE_P(X) \ 1350: (REGNO(X) == REG_YBASE || (REGNO (X) >= FIRST_PSEUDO_REGISTER)) 1351: #else 1352: 1353: /* Nonzero if X is a hard reg that can be used as an index. */ 1354: #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X)) 1355: 1356: /* Nonzero if X is a hard reg that can be used as a base reg. */ 1357: #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X)) 1358: 1359: /* Nonzero if X is the 'ybase' register */ 1360: #define REG_OK_FOR_YBASE_P(X) REGNO_OK_FOR_YBASE_P (REGNO(X)) 1361: 1362: #endif 1363: 1364: /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression 1365: that is a valid memory address for an instruction. 1366: The MODE argument is the machine mode for the MEM expression 1367: that wants to use this address. 1368: 1369: On the 1610, the actual legitimate addresses must be N (N must fit in 1370: 5 bits), *rn (register indirect), *rn++, or *rn-- */ 1371: 1372: #define INT_FITS_5_BITS(I) ((unsigned long) (I) < 0x20) 1373: #define INT_FITS_16_BITS(I) ((unsigned long) (I) < 0x10000) 1374: #define YBASE_CONST_OFFSET(I) ((I) >= -31 && (I) <= 0) 1375: #define YBASE_OFFSET(X) (GET_CODE (X) == CONST_INT && YBASE_CONST_OFFSET (INTVAL(X))) 1376: 1377: #define FITS_16_BITS(X) (GET_CODE (X) == CONST_INT && INT_FITS_16_BITS(INTVAL(X))) 1378: #define FITS_5_BITS(X) (GET_CODE (X) == CONST_INT && INT_FITS_5_BITS(INTVAL(X))) 1379: #define ILLEGAL_HIMODE_ADDR(MODE, CONST) ((MODE) == HImode && CONST == -31) 1380: 1381: #define INDIRECTABLE_ADDRESS_P(X) \ 1382: ((GET_CODE(X) == REG && REG_OK_FOR_BASE_P(X)) \ 1383: || ((GET_CODE(X) == POST_DEC || GET_CODE(X) == POST_INC) \ 1384: && REG_P(XEXP(X,0)) && REG_OK_FOR_BASE_P(XEXP(X,0))) \ 1385: || (GET_CODE(X) == CONST_INT && (unsigned long) (X) < 0x20)) 1386: 1387: 1388: #define INDEXABLE_ADDRESS_P(X,MODE) \ 1389: ((GET_CODE(X) == PLUS && GET_CODE (XEXP (X,0)) == REG && \ 1390: XEXP(X,0) == stack_pointer_rtx && YBASE_OFFSET(XEXP(X,1)) && \ 1391: !ILLEGAL_HIMODE_ADDR(MODE, INTVAL(XEXP(X,1)))) || \ 1392: (GET_CODE(X) == PLUS && GET_CODE (XEXP (X,1)) == REG && \ 1393: XEXP(X,1) == stack_pointer_rtx && YBASE_OFFSET(XEXP(X,0)) && \ 1394: !ILLEGAL_HIMODE_ADDR(MODE, INTVAL(XEXP(X,0))))) 1395: 1396: #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \ 1397: { \ 1398: if (INDIRECTABLE_ADDRESS_P(X)) \ 1399: goto ADDR; \ 1400: } 1401: 1402: 1403: /* Try machine-dependent ways of modifying an illegitimate address 1404: to be legitimate. If we find one, return the new, valid address. 1405: This macro is used in only one place: `memory_address' in explow.c. 1406: 1407: OLDX is the address as it was before break_out_memory_refs was called. 1408: In some cases it is useful to look at this to decide what needs to be done. 1409: 1410: MODE and WIN are passed so that this macro can use 1411: GO_IF_LEGITIMATE_ADDRESS. 1412: 1413: It is always safe for this macro to do nothing. It exists to recognize 1414: opportunities to optimize the output. 1415: 1416: For the 1610, we need not do anything. However, if we don't, 1417: `memory_address' will try lots of things to get a valid address, most of 1418: which will result in dead code and extra pseudos. So we make the address 1419: valid here. 1420: 1421: This is easy: The only valid addresses are an offset from a register 1422: and we know the address isn't valid. So just call either `force_operand' 1423: or `force_reg' unless this is a (plus (reg ...) (const_int 0)). */ 1424: 1425: #define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) \ 1426: { if (GET_CODE (X) == PLUS && XEXP (X, 1) == const0_rtx) \ 1427: X = XEXP (x, 0); \ 1428: if (GET_CODE (X) == MULT || GET_CODE (X) == PLUS) \ 1429: X = force_operand (X, 0); \ 1430: else \ 1431: X = force_reg (Pmode, X); \ 1432: goto WIN; \ 1433: } 1434: 1435: /* Go to LABEL if ADDR (a legitimate address expression) 1436: has an effect that depends on the machine mode it is used for. 1437: On the 1610, only postdecrement and postincrement address depend thus 1438: (the amount of decrement or increment being the length of the operand). */ 1439: 1440: #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) \ 1441: if (GET_CODE (ADDR) == POST_INC || GET_CODE (ADDR) == POST_DEC) goto LABEL 1442: 1443: /* Nonzero if the constant value X is a legitimate general operand. 1444: It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE. */ 1445: #define LEGITIMATE_CONSTANT_P(X) (1) 1446: 1447: 1448: /* CONDITION CODE INFORMATION */ 1449: 1450: /* Store in cc_status the expressions 1451: that the condition codes will describe 1452: after execution of an instruction whose pattern is EXP. 1453: Do not alter them if the instruction would not alter the cc's. */ 1454: 1455: #define NOTICE_UPDATE_CC(EXP, INSN) \ 1456: notice_update_cc( (EXP) ) 1457: 1458: /* DESCRIBING RELATIVE COSTS OF OPERATIONS */ 1459: 1460: /* Compute the cost of computing a constant rtl expression RTX 1461: whose rtx-code is CODE. The body of this macro is a portion 1462: of a switch statement. If the code is computed here, 1463: return it with a return statement. */ 1464: #define CONST_COSTS(RTX,CODE,OUTER_CODE) \ 1465: case CONST_INT: \ 1466: return 0; \ 1467: case LABEL_REF: \ 1468: case SYMBOL_REF: \ 1469: case CONST: \ 1470: return COSTS_N_INSNS (1); \ 1471: \ 1472: case CONST_DOUBLE: \ 1473: return COSTS_N_INSNS (2); 1474: 1.1.1.2 ! root 1475: /* Like CONST_COSTS but applies to nonconstant RTL expressions. 1.1 root 1476: This can be used, for example to indicate how costly a multiply 1477: instruction is. */ 1478: #define RTX_COSTS(X,CODE,OUTER_CODE) \ 1479: case MEM: \ 1480: return GET_MODE (X) == QImode ? COSTS_N_INSNS (2) : \ 1481: COSTS_N_INSNS (4); \ 1482: case DIV: \ 1483: case MOD: \ 1484: return COSTS_N_INSNS (38); \ 1485: case MULT: \ 1486: if (GET_MODE (X) == QImode) \ 1487: return COSTS_N_INSNS (2); \ 1488: else \ 1489: return COSTS_N_INSNS (38); \ 1490: case PLUS: \ 1491: if (GET_MODE_CLASS (GET_MODE (X)) == MODE_INT) \ 1492: { \ 1493: if (GET_CODE (XEXP (X,1)) == CONST_INT) \ 1494: { \ 1495: int number = INTVAL(XEXP (X,1)); \ 1496: if (number == 1) \ 1497: return COSTS_N_INSNS (1); \ 1498: if (INT_FITS_16_BITS(number)) \ 1499: return COSTS_N_INSNS (2); \ 1500: else \ 1501: return COSTS_N_INSNS (4); \ 1502: } \ 1503: return COSTS_N_INSNS (1); \ 1504: } \ 1505: else \ 1506: return COSTS_N_INSNS (38); \ 1507: case MINUS: \ 1508: if (GET_MODE_CLASS (GET_MODE (X)) == MODE_INT) \ 1509: { \ 1510: if (GET_CODE (XEXP (X,1)) == CONST_INT) \ 1511: { \ 1512: if (INT_FITS_16_BITS(INTVAL(XEXP(X,1)))) \ 1513: return COSTS_N_INSNS (2); \ 1514: else \ 1515: return COSTS_N_INSNS (4); \ 1516: } \ 1517: return COSTS_N_INSNS (1); \ 1518: } \ 1519: else \ 1520: return COSTS_N_INSNS (38); \ 1521: case AND: case IOR: case XOR: \ 1522: if (GET_CODE (XEXP (X,1)) == CONST_INT) \ 1523: { \ 1524: if (INT_FITS_16_BITS(INTVAL(XEXP(X,1)))) \ 1525: return COSTS_N_INSNS (2); \ 1526: else \ 1527: return COSTS_N_INSNS (4); \ 1528: } \ 1529: return COSTS_N_INSNS (1); \ 1530: case NEG: case NOT: \ 1531: return COSTS_N_INSNS (1); \ 1532: case ASHIFT: \ 1533: case ASHIFTRT: \ 1534: case LSHIFTRT: \ 1535: if (GET_CODE (XEXP (X,1)) == CONST_INT) \ 1536: { \ 1537: int number = INTVAL(XEXP (X,1)); \ 1538: if (number == 1 || number == 4 || number == 8 || \ 1539: number == 16) \ 1540: return COSTS_N_INSNS (1); \ 1541: else \ 1542: return COSTS_N_INSNS (2); \ 1543: } \ 1544: return COSTS_N_INSNS (1); 1545: 1546: /* An expression giving the cost of an addressing mode that contains 1547: address. */ 1548: #define ADDRESS_COST(ADDR) dsp16xx_address_cost (ADDR) 1549: 1550: /* A c expression for the cost of moving data from a register in 1551: class FROM to one in class TO. The classes are expressed using 1552: the enumeration values such as GENERAL_REGS. A value of 2 is 1553: the default. */ 1554: #define REGISTER_MOVE_COST(FROM,TO) dsp16xx_register_move_cost (FROM, TO) 1555: 1556: /* A C expression for the cost of moving data of mode MODE between 1557: a register and memory. A value of 2 is the default. */ 1558: #define MEMORY_MOVE_COST(MODE) \ 1559: (GET_MODE_CLASS(MODE) == MODE_INT && MODE == QImode ? 12 \ 1560: : 16) 1561: 1562: /* A C expression for the cost of a branch instruction. A value of 1563: 1 is the default; */ 1564: #define BRANCH_COST 2 1565: 1566: 1567: /* Define this because otherwise gcc will try to put the function address 1568: in any old pseudo register. We can only use pt. */ 1569: #define NO_FUNCTION_CSE 1570: 1571: /* Define this macro as a C expression which is nonzero if accessing less 1572: than a word of memory (i.e a char or short) is no faster than accessing 1573: a word of memory, i.e if such access require more than one instruction 1574: or if ther is no difference in cost between byte and (aligned) word 1575: loads. */ 1576: #define SLOW_BYTE_ACCESS 1 1577: 1578: /* Define this macro if zero-extension (of a char or short to an int) can 1579: be done faster if the destination is a register that is know to be zero. */ 1580: /* #define SLOW_ZERO_EXTEND */ 1581: 1582: /* Define this macro if unaligned accesses have a cost many times greater than 1583: aligned accesses, for example if they are emulated in a trap handler */ 1584: /* define SLOW_UNALIGNED_ACCESS */ 1585: 1586: /* Define this macro to inhibit strength reduction of memory addresses */ 1587: /* #define DONT_REDUCE_ADDR */ 1588: 1589: 1590: /* DIVIDING THE OUTPUT IN SECTIONS */ 1591: /* Output before read-only data. */ 1592: 1593: #define DEFAULT_TEXT_SEG_NAME ".text" 1594: #define TEXT_SECTION_ASM_OP rsect_text 1595: 1596: /* Output before constants and strings */ 1597: #define DEFAULT_CONST_SEG_NAME ".const" 1598: #define READONLY_SECTION_ASM_OP rsect_const 1599: #define READONLY_DATA_SECTION const_section 1600: 1601: /* Output before writable data. */ 1602: #define DEFAULT_DATA_SEG_NAME ".data" 1603: #define DATA_SECTION_ASM_OP rsect_data 1604: 1605: #define DEFAULT_BSS_SEG_NAME ".bss" 1606: #define BSS_SECTION_ASM_OP rsect_bss 1607: 1608: /* We will default to using 1610 if the user doesn't 1609: specify it. */ 1610: #define DEFAULT_CHIP_NAME "1610" 1611: 1612: /* A list of names for sections other than the standard two, which are 1613: 'in_text' and 'in_data'. */ 1614: #define EXTRA_SECTIONS in_bss, in_const 1615: 1616: #define EXTRA_SECTION_FUNCTIONS \ 1617: void \ 1618: const_section () \ 1619: { \ 1620: if (in_section != in_const) \ 1621: { \ 1622: fprintf (asm_out_file, "%s\n", READONLY_SECTION_ASM_OP); \ 1623: in_section = in_const; \ 1624: } \ 1625: } \ 1626: void \ 1627: bss_section () \ 1628: { \ 1629: if (in_section != in_bss) { \ 1630: fprintf (asm_out_file, "%s\n", BSS_SECTION_ASM_OP); \ 1631: in_section = in_bss; \ 1632: } \ 1633: } 1634: 1635: 1636: /* THE OVERALL FRAMEWORK OF AN ASSEMBLER FILE */ 1637: 1638: /* Output at beginning of assembler file. */ 1639: #define ASM_FILE_START(FILE) dsp16xx_file_start () 1640: 1641: /* Prevent output of .gcc_compiled */ 1642: #define ASM_IDENTIFY_GCC(FILE) 1643: 1644: /* A C string constant describing how to begin a comment in the target 1645: assembler language. */ 1646: /* define ASM_COMMENT_START */ 1647: 1648: /* Output to assembler file text saying following lines 1649: may contain character constants, extra white space, comments, etc. */ 1650: #define ASM_APP_ON "" 1651: 1652: /* Output to assembler file text saying following lines 1653: no longer contain unusual constructs. */ 1654: #define ASM_APP_OFF "" 1655: 1656: /* OUTPUT OF DATA */ 1657: 1658: /* This is how to output an assembler line defining a `double' constant. */ 1659: #define ASM_OUTPUT_DOUBLE(FILE,VALUE) asm_output_float (FILE,VALUE) 1660: 1661: /* This is how to output an assembler line defining a `float' constant. */ 1662: #define ASM_OUTPUT_FLOAT(FILE,VALUE) asm_output_float (FILE, VALUE) 1663: 1664: /* This is how to output and assembler line defininf a 'float' constant of 1665: size HFmode. */ 1666: #define ASM_OUTPUT_SHORT_FLOAT(FILE,VALUE) asm_output_float (FILE, VALUE) 1667: 1668: /* This is how to output an assembler line defining an `char' constant. */ 1669: #define ASM_OUTPUT_CHAR(FILE,VALUE) \ 1670: ( fprintf (FILE, "\tint "), \ 1671: output_addr_const (FILE, (VALUE)), \ 1672: fprintf (FILE, "\n")) 1673: 1674: /* This is how to output an assembler line defining an `short' constant. */ 1675: #define ASM_OUTPUT_SHORT(FILE,EXP) asm_output_long(FILE,INTVAL(EXP)) 1676: 1677: /* This is how to output an assembler line defining a 'int' constant. */ 1678: #define ASM_OUTPUT_INT(FILE, EXP) asm_output_long(FILE,INTVAL(EXP)) 1679: 1680: /* This is how to output an assembler line for a numeric constant byte. */ 1681: #define ASM_OUTPUT_BYTE(FILE,VALUE) ASM_OUTPUT_CHAR(FILE,VALUE) 1682: 1683: /* This is how we output a 'c' character string. For the 16xx 1684: assembler we have to do it one letter at a time */ 1685: 1686: #define ASCII_LENGTH 10 1687: 1688: #define ASM_OUTPUT_ASCII(MYFILE, MYSTRING, MYLENGTH) \ 1689: do { \ 1690: FILE *_hide_asm_out_file = (MYFILE); \ 1691: unsigned char *_hide_p = (unsigned char *) (MYSTRING); \ 1692: int _hide_thissize = (MYLENGTH); \ 1693: { \ 1694: FILE *asm_out_file = _hide_asm_out_file; \ 1695: unsigned char *p = _hide_p; \ 1696: int thissize = _hide_thissize; \ 1697: int i; \ 1698: \ 1699: for (i = 0; i < thissize; i++) \ 1700: { \ 1701: register int c = p[i]; \ 1702: \ 1703: if (i % ASCII_LENGTH == 0) \ 1704: fprintf (asm_out_file, "\tint "); \ 1705: \ 1706: if (c >= ' ' && c < 0177 && c != '\'') \ 1707: { \ 1708: putc ('\'', asm_out_file); \ 1709: putc (c, asm_out_file); \ 1710: putc ('\'', asm_out_file); \ 1711: } \ 1712: else \ 1713: { \ 1714: fprintf (asm_out_file, "%d", c); \ 1715: /* After an octal-escape, if a digit follows, \ 1716: terminate one string constant and start another. \ 1717: The Vax assembler fails to stop reading the escape \ 1718: after three digits, so this is the only way we \ 1719: can get it to parse the data properly. \ 1720: if (i < thissize - 1 \ 1721: && p[i + 1] >= '0' && p[i + 1] <= '9') \ 1722: fprintf (asm_out_file, "\'\n\tint \'"); \ 1723: */ \ 1724: } \ 1725: /* if: \ 1726: we are not at the last char (i != thissize -1) \ 1727: and (we are not at a line break multiple \ 1728: but i == 0) (it will be the very first time) \ 1729: then put out a comma to extend. \ 1730: */ \ 1731: if ((i != thissize - 1) && ((i + 1) % ASCII_LENGTH)) \ 1732: fprintf(asm_out_file, ","); \ 1733: if (!((i + 1) % ASCII_LENGTH)) \ 1734: fprintf (asm_out_file, "\n"); \ 1735: } \ 1736: fprintf (asm_out_file, "\n"); \ 1737: } \ 1738: } \ 1739: while (0) 1740: 1741: /* Store in OUTPUT a string (made with alloca) containing 1742: an assembler-name for a local static variable or function 1743: named NAME. LABELNO is an integer which is different for 1744: each call. */ 1745: 1746: #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \ 1747: do { \ 1748: int len = strlen (NAME); \ 1749: char *temp = (char *) alloca (len + 3); \ 1750: temp[0] = 'L'; \ 1751: strcpy (&temp[1], (NAME)); \ 1752: temp[len + 1] = '_'; \ 1753: temp[len + 2] = 0; \ 1754: (OUTPUT) = (char *) alloca (strlen (NAME) + 11); \ 1755: ASM_GENERATE_INTERNAL_LABEL (OUTPUT, temp, LABELNO); \ 1756: } while (0) 1757: 1758: #define ASM_OPEN_PAREN "(" 1759: #define ASM_CLOSE_PAREN ")" 1760: 1761: 1762: /* OUTPUT OF UNINITIALIZED VARIABLES */ 1763: 1764: /* This says how to output an assembler line 1765: to define a global common symbol. */ 1766: 1767: #define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \ 1768: asm_output_common (FILE, NAME, SIZE, ROUNDED); 1769: 1770: /* This says how to output an assembler line 1771: to define a local common symbol. */ 1772: 1773: #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE, ROUNDED) \ 1774: asm_output_local (FILE, NAME, SIZE, ROUNDED); 1775: 1776: /* OUTPUT AND GENERATION OF LABELS */ 1777: 1778: /* This is how to output the definition of a user-level label named NAME, 1779: such as the label on a static function or variable NAME. */ 1780: #define ASM_OUTPUT_LABEL(FILE,NAME) \ 1781: do { assemble_name (FILE, NAME); fputs (":\n", FILE); } while (0) 1782: 1783: /* This is how to output a command to make the user-level label named NAME 1784: defined for reference from other files. */ 1785: 1786: #define ASM_GLOBALIZE_LABEL(FILE,NAME) \ 1787: do { fputs (".global ", FILE); assemble_name (FILE, NAME); fputs ("\n", FILE);} while (0) 1788: 1789: /* A C statement to output to the stdio stream any text necessary 1790: for declaring the name of an external symbol named name which 1791: is referenced in this compilation but not defined. */ 1792: 1793: #define ASM_OUTPUT_EXTERNAL(FILE, DECL, NAME) \ 1794: { \ 1795: fprintf (FILE, ".extern "); \ 1796: assemble_name (FILE, NAME); \ 1797: fprintf (FILE, "\n"); \ 1798: } 1799: /* A C statement to output on stream an assembler pseudo-op to 1800: declare a library function named external. */ 1801: 1802: #define ASM_OUTPUT_EXTERNAL_LIBCALL(FILE, FUN) \ 1803: { \ 1804: fprintf (FILE, ".extern "); \ 1805: assemble_name (FILE, XSTR (FUN, 0)); \ 1806: fprintf (FILE, "\n"); \ 1807: } 1808: /* This is how to output a reference to a user-level label named NAME. 1809: `assemble_name' uses this. */ 1810: #define ASM_OUTPUT_LABELREF(FILE,NAME) \ 1811: fprintf (FILE, "_%s", NAME) 1812: 1813: /* This is how to output an internal numbered label where 1814: PREFIX is the class of label and NUM is the number within the class. */ 1815: #define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \ 1816: fprintf (FILE, "%s%d:\n", PREFIX, NUM) 1817: 1818: /* This is how to store into the string LABEL 1819: the symbol_ref name of an internal numbered label where 1820: PREFIX is the class of label and NUM is the number within the class. 1821: This is suitable for output with `assemble_name'. */ 1822: #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \ 1823: sprintf (LABEL, "*%s%d", PREFIX, NUM) 1824: 1825: 1826: /* OUTPUT OF ASSEMBLER INSTRUCTIONS */ 1827: 1828: /* How to refer to registers in assembler output. 1829: This sequence is indexed by compiler's hard-register-number (see above). */ 1830: 1831: #define REGISTER_NAMES \ 1832: {"a0", "a0l", "a1", "a1l", "x", "y", "yl", "p", "pl", \ 1833: "r0", "r1", "r2", "r3", "j", "k", "ybase", "pt", \ 1834: "ar0", "ar1", "ar2", "ar3", \ 1835: "c0", "c1", "c2", "pr", "rb", \ 1836: "*(0)", "*(1)", "*(2)", "*(3)", "*(4)", "*(5)", \ 1837: "*(6)", "*(7)", "*(8)", "*(9)", "*(10)", "*(11)", \ 1838: "*(12)", "*(13)", "*(14)", "*(15)", "*(16)", "*(17)", \ 1839: "*(18)", "*(19)", "*(20)", "*(21)", "*(22)", "*(23)", \ 1840: "*(24)", "*(25)", "*(26)", "*(27)", "*(28)", "*(29)", \ 1841: "*(30)", "*(31)" } 1842: 1843: #define HIMODE_REGISTER_NAMES \ 1844: {"a0", "a0", "a1", "a1", "x", "y", "y", "p", "p", \ 1845: "r0", "r1", "r2", "r3", "j", "k", "ybase", "pt", \ 1846: "ar0", "ar1", "ar2", "ar3", \ 1847: "c0", "c1", "c2", "pr", "rb", \ 1848: "*(0)", "*(1)", "*(2)", "*(3)", "*(4)", "*(5)", \ 1849: "*(6)", "*(7)", "*(8)", "*(9)", "*(10)", "*(11)", \ 1850: "*(12)", "*(13)", "*(14)", "*(15)", "*(16)", "*(17)", \ 1851: "*(18)", "*(19)", "*(20)", "*(21)", "*(22)", "*(23)", \ 1852: "*(24)", "*(25)", "*(26)", "*(27)", "*(28)", "*(29)", \ 1853: "*(30)", "*(31)" } 1854: 1855: #define PRINT_OPERAND_PUNCT_VALID_P(CODE) 0 1856: 1857: /* Print operand X (an rtx) in assembler syntax to file FILE. 1858: CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified. 1859: For `%' followed by punctuation, CODE is the punctuation and X is null. 1860: 1861: DSP1610 extensions for operand codes: 1862: 1863: %H - print lower 16 bits of constant 1864: %U - print upper 16 bits of constant 1865: %w - print low half of register (e.g 'a0l') 1866: %u - print upper half of register (e.g 'a0') 1867: %b - print high half of accumulator for F3 ALU instructions 1868: %h - print constant in decimal */ 1869: 1870: #define PRINT_OPERAND(FILE, X, CODE) print_operand(FILE, X, CODE) 1871: 1872: 1873: /* Print a memory address as an operand to reference that memory location. */ 1874: 1875: #define PRINT_OPERAND_ADDRESS(FILE, ADDR) print_operand_address (FILE, ADDR) 1876: 1877: /* This is how to output an insn to push a register on the stack. 1878: It need not be very fast code since it is used only for profiling */ 1879: #define ASM_OUTPUT_REG_PUSH(FILE,REGNO) fatal("Profiling not implemented yet."); 1880: 1881: /* This is how to output an insn to pop a register from the stack. 1882: It need not be very fast code since it is used only for profiling */ 1883: #define ASM_OUTPUT_REG_POP(FILE,REGNO) fatal("Profiling not implemented yet."); 1884: 1885: /* OUTPUT OF DISPATCH TABLES */ 1886: 1887: /* This macro should be provided on machines where the addresses in a dispatch 1888: table are relative to the table's own address. */ 1889: #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, VALUE, REL) \ 1890: fprintf (FILE, "\tint L%d-L%d\n", VALUE, REL) 1891: 1892: /* This macro should be provided on machines where the addresses in a dispatch 1893: table are absolute. */ 1894: #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \ 1895: fprintf (FILE, "\tint L%d\n", VALUE) 1896: 1897: /* ASSEMBLER COMMANDS FOR ALIGNMENT */ 1898: 1899: /* This is how to output an assembler line that says to advance 1900: the location counter to a multiple of 2**LOG bytes. We should 1.1.1.2 ! root 1901: not have to do any alignment since the 1610 is a word machine. */ 1.1 root 1902: #define ASM_OUTPUT_ALIGN(FILE,LOG) 1903: 1904: /* Define this macro if ASM_OUTPUT_SKIP should not be used in the text section 1905: because it fails to put zero1 in the bytes that are skipped. */ 1906: #define ASM_NO_SKIP_IN_TEXT 1 1907: 1908: #define ASM_OUTPUT_SKIP(FILE,SIZE) \ 1909: fprintf (FILE, "\t%d * int 0\n", (SIZE)) 1910: 1911: /* CONTROLLING DEBUGGING INFORMATION FORMAT */ 1912: 1913: /* Define this macro if GCC should produce COFF-style debugging output 1914: for SDB in response to the '-g' option */ 1915: #define SDB_DEBUGGING_INFO 1916: 1917: /* Support generating stabs for the listing file generator */ 1918: #define DBX_DEBUGGING_INFO 1919: 1920: /* The default format when -g is given is still COFF debug info */ 1921: #define PREFERRED_DEBUGGING_TYPE SDB_DEBUG 1922: 1923: #define DBX_REGISTER_NUMBER(REGNO) (REGNO) 1924: 1925: /* MISCELLANEOUS PARAMETERS */ 1926: 1927: /* Specify the machine mode that this machine uses 1928: for the index in the tablejump instruction. */ 1929: #define CASE_VECTOR_MODE QImode 1930: 1931: /* Define this if the tablejump instruction expects the table 1932: to contain offsets from the address of the table. 1933: Do not define this if the table should contain absolute addresses. */ 1934: /* #define CASE_VECTOR_PC_RELATIVE */ 1935: 1936: /* Specify the tree operation to be used to convert reals to integers. */ 1937: #define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR 1938: 1939: /* This is the kind of divide that is easiest to do in the general case. */ 1940: #define EASY_DIV_EXPR TRUNC_DIV_EXPR 1941: 1942: /* Max number of bytes we can move from memory to memory 1943: in one reasonably fast instruction. */ 1944: #define MOVE_MAX 1 1945: 1946: /* Defining this macro causes the compiler to omit a sign-extend, zero-extend, 1947: or bitwise 'and' instruction that truncates the count of a shift operation 1948: to a width equal to the number of bits needed to represent the size of the 1.1.1.2 ! root 1949: object being shifted. Do not define this macro unless the truncation applies ! 1950: to both shift operations and bit-field operations (if any). */ 1.1 root 1951: /* #define SHIFT_COUNT_TRUNCATED */ 1952: 1953: /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits 1954: is done just by pretending it is already truncated. */ 1955: #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1 1956: 1957: /* When a prototype says `char' or `short', really pass an `int'. */ 1958: #define PROMOTE_PROTOTYPES 1959: 1960: /* An alias for the machine mode used for pointers */ 1961: #define Pmode QImode 1962: 1963: /* A function address in a call instruction 1964: is a byte address (for indexing purposes) 1965: so give the MEM rtx a byte's mode. */ 1966: #define FUNCTION_MODE QImode 1967: 1968: #if !defined(__DATE__) 1969: #define TARGET_VERSION fprintf (stderr, " (%s)", VERSION_INFO1) 1970: #else 1971: #define TARGET_VERSION fprintf (stderr, " (%s, %s)", VERSION_INFO1, __DATE__) 1972: #endif 1973: 1974: #define VERSION_INFO1 "AT&T DSP16xx C Cross Compiler, version 1.2.0" 1975: 1976: 1977: /* Define this as 1 if `char' should by default be signed; else as 0. */ 1978: #define DEFAULT_SIGNED_CHAR 1 1979: 1980: /* If this macro is defined, GNU CC gathers statistics about the number and 1981: kind of tree node it allocates during each run. The option '-fstats' will 1982: tell the compiler to print these statistics about the sizes of it obstacks. */ 1983: #define GATHER_STATISTICS 1984: 1985: /* Define this so gcc does not output a call to __main, since we 1986: are not currently supporting c++. */ 1987: #define INIT_SECTION_ASM_OP 1
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