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1.1 ! root 1: /* Definitions of target machine for GNU compiler. Alliant FX version. ! 2: Copyright (C) 1989 Free Software Foundation, Inc. ! 3: Adapted from m68k.h by Paul Petersen ([email protected]) ! 4: and Joe Weening ([email protected]). ! 5: ! 6: This file is part of GNU CC. ! 7: ! 8: GNU CC is free software; you can redistribute it and/or modify ! 9: it under the terms of the GNU General Public License as published by ! 10: the Free Software Foundation; either version 2, or (at your option) ! 11: any later version. ! 12: ! 13: GNU CC is distributed in the hope that it will be useful, ! 14: but WITHOUT ANY WARRANTY; without even the implied warranty of ! 15: MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ! 16: GNU General Public License for more details. ! 17: ! 18: You should have received a copy of the GNU General Public License ! 19: along with GNU CC; see the file COPYING. If not, write to ! 20: the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */ ! 21: ! 22: ! 23: /* This file is based on m68k.h, simplified by removing support for ! 24: the Sun FPA and other things not applicable to the Alliant. Some ! 25: remnants of these features remain. */ ! 26: ! 27: /* Names to predefine in the preprocessor for this target machine. */ ! 28: ! 29: #define CPP_PREDEFINES "-Dmc68000 -Dalliant -Dunix" ! 30: ! 31: /* Print subsidiary information on the compiler version in use. */ ! 32: ! 33: #define TARGET_VERSION fprintf (stderr, " (Alliant)"); ! 34: ! 35: /* Run-time compilation parameters selecting different hardware ! 36: subsets. The Alliant IP is an mc68020. (Older mc68010-based IPs ! 37: are no longer supported.) The Alliant CE is 68020-compatible, and ! 38: also has floating point, vector and concurrency instructions. ! 39: ! 40: Although the IP doesn't have floating point, it emulates it in the ! 41: operating system. Using this generally is faster than running code ! 42: compiled with -msoft-float, because the soft-float code still uses ! 43: (simulated) FP registers and ends up emulating several fmove{s,d} ! 44: instructions per call. So I don't recommend using soft-float for ! 45: any Alliant code. -- JSW ! 46: */ ! 47: ! 48: extern int target_flags; ! 49: ! 50: /* Macros used in the machine description to test the flags. */ ! 51: ! 52: /* Compile for a 68020 (not a 68000 or 68010). */ ! 53: #define TARGET_68020 (target_flags & 1) ! 54: /* Compile CE insns for floating point (not library calls). */ ! 55: #define TARGET_CE (target_flags & 2) ! 56: /* Compile using 68020 bitfield insns. */ ! 57: #define TARGET_BITFIELD (target_flags & 4) ! 58: /* Compile with 16-bit `int'. */ ! 59: #define TARGET_SHORT (target_flags & 040) ! 60: ! 61: /* Default 3 means compile 68020 and CE instructions. We don't use ! 62: bitfield instructions because there appears to be a bug in the ! 63: implementation of bfins on the CE. */ ! 64: ! 65: #define TARGET_DEFAULT 3 ! 66: ! 67: /* Define __HAVE_CE__ in preprocessor according to the -m flags. ! 68: This will control the use of inline FP insns in certain macros. ! 69: Also inform the program which CPU this is for. */ ! 70: ! 71: #if TARGET_DEFAULT & 02 ! 72: ! 73: /* -mce is the default */ ! 74: #define CPP_SPEC \ ! 75: "%{!msoft-float:-D__HAVE_CE__ }\ ! 76: %{m68000:-Dmc68010}%{mc68000:-Dmc68010}%{!mc68000:%{!m68000:-Dmc68020}}" ! 77: ! 78: #else ! 79: ! 80: /* -msoft-float is the default */ ! 81: #define CPP_SPEC \ ! 82: "%{mce:-D__HAVE_CE__ }\ ! 83: %{m68000:-Dmc68010}%{mc68000:-Dmc68010}%{!mc68000:%{!m68000:-Dmc68020}}" ! 84: ! 85: #endif ! 86: ! 87: /* Link with libg.a when debugging, for dbx's sake. */ ! 88: ! 89: #define LIB_SPEC "%{g:-lg} %{!p:%{!pg:-lc}}%{p:-lc_p}%{pg:-lc_p} " ! 90: ! 91: /* Make the linker remove temporary labels, since the Alliant assembler ! 92: doesn't. */ ! 93: ! 94: #define LINK_SPEC "-X" ! 95: ! 96: /* Every structure or union's size must be a multiple of 2 bytes. */ ! 97: ! 98: #define STRUCTURE_SIZE_BOUNDARY 16 ! 99: ! 100: /* This is BSD, so it wants DBX format. */ ! 101: ! 102: #define DBX_DEBUGGING_INFO ! 103: ! 104: /* Macro to define tables used to set the flags. ! 105: This is a list in braces of pairs in braces, ! 106: each pair being { "NAME", VALUE } ! 107: where VALUE is the bits to set or minus the bits to clear. ! 108: An empty string NAME is used to identify the default VALUE. */ ! 109: ! 110: #define TARGET_SWITCHES \ ! 111: { { "68020", 5}, \ ! 112: { "c68020", 5}, \ ! 113: { "bitfield", 4}, \ ! 114: { "68000", -7}, \ ! 115: { "c68000", -7}, \ ! 116: { "soft-float", -2}, \ ! 117: { "nobitfield", -4}, \ ! 118: { "short", 040}, \ ! 119: { "noshort", -040}, \ ! 120: { "", TARGET_DEFAULT}} ! 121: ! 122: /* target machine storage layout */ ! 123: ! 124: /* Define this if most significant bit is lowest numbered ! 125: in instructions that operate on numbered bit-fields. ! 126: This is true for 68020 insns such as bfins and bfexts. ! 127: We make it true always by avoiding using the single-bit insns ! 128: except in special cases with constant bit numbers. */ ! 129: #define BITS_BIG_ENDIAN 1 ! 130: ! 131: /* Define this if most significant byte of a word is the lowest numbered. */ ! 132: /* That is true on the 68000. */ ! 133: #define BYTES_BIG_ENDIAN 1 ! 134: ! 135: /* Define this if most significant word of a multiword number is the lowest ! 136: numbered. */ ! 137: /* For 68000 we can decide arbitrarily ! 138: since there are no machine instructions for them. */ ! 139: #define WORDS_BIG_ENDIAN 0 ! 140: ! 141: /* number of bits in an addressible storage unit */ ! 142: #define BITS_PER_UNIT 8 ! 143: ! 144: /* Width in bits of a "word", which is the contents of a machine register. ! 145: Note that this is not necessarily the width of data type `int'; ! 146: if using 16-bit ints on a 68000, this would still be 32. ! 147: But on a machine with 16-bit registers, this would be 16. */ ! 148: #define BITS_PER_WORD 32 ! 149: ! 150: /* Width of a word, in units (bytes). */ ! 151: #define UNITS_PER_WORD 4 ! 152: ! 153: /* Width in bits of a pointer. ! 154: See also the macro `Pmode' defined below. */ ! 155: #define POINTER_SIZE 32 ! 156: ! 157: /* Allocation boundary (in *bits*) for storing arguments in argument list. */ ! 158: #define PARM_BOUNDARY (TARGET_SHORT ? 16 : 32) ! 159: ! 160: /* Boundary (in *bits*) on which stack pointer should be aligned. */ ! 161: #define STACK_BOUNDARY 16 ! 162: ! 163: /* Allocation boundary (in *bits*) for the code of a function. */ ! 164: #define FUNCTION_BOUNDARY 16 ! 165: ! 166: /* Alignment of field after `int : 0' in a structure. */ ! 167: #define EMPTY_FIELD_BOUNDARY 16 ! 168: ! 169: /* No data type wants to be aligned rounder than this. */ ! 170: #define BIGGEST_ALIGNMENT 16 ! 171: ! 172: /* Define this if move instructions will actually fail to work ! 173: when given unaligned data. */ ! 174: #define STRICT_ALIGNMENT ! 175: ! 176: /* Define number of bits in most basic integer type. ! 177: (If undefined, default is BITS_PER_WORD). */ ! 178: ! 179: #define INT_TYPE_SIZE (TARGET_SHORT ? 16 : 32) ! 180: ! 181: /* Define these to avoid dependence on meaning of `int'. ! 182: Note that WCHAR_TYPE_SIZE is used in cexp.y, ! 183: where TARGET_SHORT is not available. */ ! 184: ! 185: #define WCHAR_TYPE "long int" ! 186: #define WCHAR_TYPE_SIZE 32 ! 187: ! 188: /* Standard register usage. */ ! 189: ! 190: /* Number of actual hardware registers. ! 191: The hardware registers are assigned numbers for the compiler ! 192: from 0 to just below FIRST_PSEUDO_REGISTER. ! 193: All registers that the compiler knows about must be given numbers, ! 194: even those that are not normally considered general registers. ! 195: For the Alliant, we give the data registers numbers 0-7, ! 196: the address registers numbers 010-017, ! 197: and the floating point registers numbers 020-027. */ ! 198: #define FIRST_PSEUDO_REGISTER 24 ! 199: ! 200: /* 1 for registers that have pervasive standard uses ! 201: and are not available for the register allocator. ! 202: On the Alliant, these are a0 (argument pointer), ! 203: a6 (frame pointer) and a7 (stack pointer). */ ! 204: #define FIXED_REGISTERS \ ! 205: {0, 0, 0, 0, 0, 0, 0, 0, \ ! 206: 1, 0, 0, 0, 0, 0, 1, 1, \ ! 207: 0, 0, 0, 0, 0, 0, 0, 0 } ! 208: ! 209: /* 1 for registers not available across function calls. ! 210: These must include the FIXED_REGISTERS and also any ! 211: registers that can be used without being saved. ! 212: The latter must include the registers where values are returned ! 213: and the register where structure-value addresses are passed. ! 214: Aside from that, you can include as many other registers as you like. ! 215: The Alliant calling sequence allows a function to use any register, ! 216: so we include them all here. */ ! 217: ! 218: #define CALL_USED_REGISTERS \ ! 219: {1, 1, 1, 1, 1, 1, 1, 1, \ ! 220: 1, 1, 1, 1, 1, 1, 1, 1, \ ! 221: 1, 1, 1, 1, 1, 1, 1, 1 } ! 222: ! 223: /* Return number of consecutive hard regs needed starting at reg REGNO ! 224: to hold something of mode MODE. ! 225: This is ordinarily the length in words of a value of mode MODE ! 226: but can be less for certain modes in special long registers. ! 227: ! 228: On the Alliant, ordinary registers hold 32 bits worth; ! 229: for the FP registers, a single register is always enough for ! 230: any floating-point value. */ ! 231: #define HARD_REGNO_NREGS(REGNO, MODE) \ ! 232: ((REGNO) >= 16 ? GET_MODE_NUNITS (MODE) \ ! 233: : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)) ! 234: ! 235: /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE. ! 236: On the Alliant, the cpu registers can hold any mode but the FP registers ! 237: can hold only floating point. */ ! 238: #define HARD_REGNO_MODE_OK(REGNO, MODE) \ ! 239: ((REGNO) < 16 || GET_MODE_CLASS (MODE) == MODE_FLOAT \ ! 240: || GET_MODE_CLASS (MODE) == MODE_COMPLEX_FLOAT) ! 241: ! 242: /* Value is 1 if it is a good idea to tie two pseudo registers ! 243: when one has mode MODE1 and one has mode MODE2. ! 244: If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2, ! 245: for any hard reg, then this must be 0 for correct output. */ ! 246: #define MODES_TIEABLE_P(MODE1, MODE2) \ ! 247: (((MODE1) == SFmode || (MODE1) == DFmode \ ! 248: || (MODE1) == SCmode || (MODE1) == DCmode) \ ! 249: == ((MODE2) == SFmode || (MODE2) == DFmode \ ! 250: || (MODE2) == SCmode || (MODE2) == DCmode)) ! 251: ! 252: /* Specify the registers used for certain standard purposes. ! 253: The values of these macros are register numbers. */ ! 254: ! 255: /* m68000 pc isn't overloaded on a register. */ ! 256: /* #define PC_REGNUM */ ! 257: ! 258: /* Register to use for pushing function arguments. */ ! 259: #define STACK_POINTER_REGNUM 15 ! 260: ! 261: /* Base register for access to local variables of the function. */ ! 262: #define FRAME_POINTER_REGNUM 14 ! 263: ! 264: /* Value should be nonzero if functions must have frame pointers. ! 265: Zero means the frame pointer need not be set up (and parms ! 266: may be accessed via the stack pointer) in functions that seem suitable. ! 267: This is computed in `reload', in reload1.c. */ ! 268: /* Set for now on Alliant until we find a way to make this work with ! 269: their calling sequence. */ ! 270: #define FRAME_POINTER_REQUIRED 1 ! 271: ! 272: /* Base register for access to arguments of the function. */ ! 273: #define ARG_POINTER_REGNUM 8 ! 274: ! 275: /* Register in which static-chain is passed to a function. */ ! 276: #define STATIC_CHAIN_REGNUM 10 ! 277: ! 278: /* Register in which address to store a structure value ! 279: is passed to a function. */ ! 280: #define STRUCT_VALUE_REGNUM 9 ! 281: ! 282: /* Define the classes of registers for register constraints in the ! 283: machine description. Also define ranges of constants. ! 284: ! 285: One of the classes must always be named ALL_REGS and include all hard regs. ! 286: If there is more than one class, another class must be named NO_REGS ! 287: and contain no registers. ! 288: ! 289: The name GENERAL_REGS must be the name of a class (or an alias for ! 290: another name such as ALL_REGS). This is the class of registers ! 291: that is allowed by "g" or "r" in a register constraint. ! 292: Also, registers outside this class are allocated only when ! 293: instructions express preferences for them. ! 294: ! 295: The classes must be numbered in nondecreasing order; that is, ! 296: a larger-numbered class must never be contained completely ! 297: in a smaller-numbered class. ! 298: ! 299: For any two classes, it is very desirable that there be another ! 300: class that represents their union. */ ! 301: ! 302: /* The Alliant has three kinds of registers, so eight classes would be ! 303: a complete set. One of them is not needed. */ ! 304: ! 305: enum reg_class { NO_REGS, FP_REGS, DATA_REGS, DATA_OR_FP_REGS, ! 306: ADDR_REGS, GENERAL_REGS, ALL_REGS, LIM_REG_CLASSES }; ! 307: ! 308: #define N_REG_CLASSES (int) LIM_REG_CLASSES ! 309: ! 310: /* Give names of register classes as strings for dump file. */ ! 311: ! 312: #define REG_CLASS_NAMES \ ! 313: { "NO_REGS", "FP_REGS", "DATA_REGS", "DATA_OR_FP_REGS", \ ! 314: "ADDR_REGS", "GENERAL_REGS", "ALL_REGS" } ! 315: ! 316: /* Define which registers fit in which classes. ! 317: This is an initializer for a vector of HARD_REG_SET ! 318: of length N_REG_CLASSES. */ ! 319: ! 320: #define REG_CLASS_CONTENTS \ ! 321: { \ ! 322: 0, /* NO_REGS */ \ ! 323: 0x00ff0000, /* FP_REGS */ \ ! 324: 0x000000ff, /* DATA_REGS */ \ ! 325: 0x00ff00ff, /* DATA_OR_FP_REGS */ \ ! 326: 0x0000ff00, /* ADDR_REGS */ \ ! 327: 0x0000ffff, /* GENERAL_REGS */ \ ! 328: 0x00ffffff /* ALL_REGS */ \ ! 329: } ! 330: ! 331: /* The same information, inverted: ! 332: Return the class number of the smallest class containing ! 333: reg number REGNO. This could be a conditional expression ! 334: or could index an array. */ ! 335: ! 336: extern enum reg_class regno_reg_class[]; ! 337: #define REGNO_REG_CLASS(REGNO) (regno_reg_class[(REGNO)>>3]) ! 338: ! 339: /* The class value for index registers, and the one for base regs. */ ! 340: ! 341: #define INDEX_REG_CLASS GENERAL_REGS ! 342: #define BASE_REG_CLASS ADDR_REGS ! 343: ! 344: /* Get reg_class from a letter such as appears in the machine description. */ ! 345: ! 346: #define REG_CLASS_FROM_LETTER(C) \ ! 347: ((C) == 'a' ? ADDR_REGS : \ ! 348: ((C) == 'd' ? DATA_REGS : \ ! 349: ((C) == 'f' ? FP_REGS : \ ! 350: NO_REGS))) ! 351: ! 352: /* The letters I, J, K, L and M in a register constraint string ! 353: can be used to stand for particular ranges of immediate operands. ! 354: This macro defines what the ranges are. ! 355: C is the letter, and VALUE is a constant value. ! 356: Return 1 if VALUE is in the range specified by C. ! 357: ! 358: For the 68000, `I' is used for the range 1 to 8 ! 359: allowed as immediate shift counts and in addq. ! 360: `J' is used for the range of signed numbers that fit in 16 bits. ! 361: `K' is for numbers that moveq can't handle. ! 362: `L' is for range -8 to -1, range of values that can be added with subq. */ ! 363: ! 364: #define CONST_OK_FOR_LETTER_P(VALUE, C) \ ! 365: ((C) == 'I' ? (VALUE) > 0 && (VALUE) <= 8 : \ ! 366: (C) == 'J' ? (VALUE) >= -0x8000 && (VALUE) <= 0x7FFF : \ ! 367: (C) == 'K' ? (VALUE) < -0x80 || (VALUE) >= 0x80 : \ ! 368: (C) == 'L' ? (VALUE) < 0 && (VALUE) >= -8 : 0) ! 369: ! 370: #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) 0 ! 371: ! 372: /* Given an rtx X being reloaded into a reg required to be ! 373: in class CLASS, return the class of reg to actually use. ! 374: In general this is just CLASS; but on some machines ! 375: in some cases it is preferable to use a more restrictive class. ! 376: On the 68000 series, use a data reg if possible when the ! 377: value is a constant in the range where moveq could be used ! 378: and we ensure that QImodes are reloaded into data regs. */ ! 379: ! 380: #define PREFERRED_RELOAD_CLASS(X,CLASS) \ ! 381: ((GET_CODE (X) == CONST_INT \ ! 382: && (unsigned) (INTVAL (X) + 0x80) < 0x100 \ ! 383: && (CLASS) != ADDR_REGS) \ ! 384: ? DATA_REGS \ ! 385: : GET_MODE (X) == QImode \ ! 386: ? DATA_REGS \ ! 387: : (CLASS)) ! 388: ! 389: /* Return the maximum number of consecutive registers ! 390: needed to represent mode MODE in a register of class CLASS. */ ! 391: /* On the 68000, this is the size of MODE in words, ! 392: except in the FP regs, where a single reg is always enough. */ ! 393: #define CLASS_MAX_NREGS(CLASS, MODE) \ ! 394: ((CLASS) == FP_REGS ? 1 \ ! 395: : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)) ! 396: ! 397: /* Moves between fp regs and other regs are two insns. */ ! 398: #define REGISTER_MOVE_COST(CLASS1, CLASS2) \ ! 399: ((((CLASS1) == FP_REGS && (CLASS2) != FP_REGS) \ ! 400: || ((CLASS2) == FP_REGS && (CLASS1) != FP_REGS)) \ ! 401: ? 4 : 2) ! 402: ! 403: /* Stack layout; function entry, exit and calling. */ ! 404: ! 405: /* Define this if pushing a word on the stack ! 406: makes the stack pointer a smaller address. */ ! 407: #define STACK_GROWS_DOWNWARD ! 408: ! 409: /* Define this if the nominal address of the stack frame ! 410: is at the high-address end of the local variables; ! 411: that is, each additional local variable allocated ! 412: goes at a more negative offset in the frame. */ ! 413: #define FRAME_GROWS_DOWNWARD ! 414: ! 415: /* The Alliant uses -fcaller-saves by default. */ ! 416: #define DEFAULT_CALLER_SAVES ! 417: ! 418: /* Offset within stack frame to start allocating local variables at. ! 419: If FRAME_GROWS_DOWNWARD, this is the offset to the END of the ! 420: first local allocated. Otherwise, it is the offset to the BEGINNING ! 421: of the first local allocated. */ ! 422: #define STARTING_FRAME_OFFSET -4 ! 423: ! 424: /* If we generate an insn to push BYTES bytes, ! 425: this says how many the stack pointer really advances by. ! 426: On the 68000, sp@- in a byte insn really pushes a word. */ ! 427: #define PUSH_ROUNDING(BYTES) (((BYTES) + 1) & ~1) ! 428: ! 429: /* Offset of first parameter from the argument pointer register value. */ ! 430: #define FIRST_PARM_OFFSET(FNDECL) 0 ! 431: ! 432: /* Value is the number of bytes of arguments automatically ! 433: popped when returning from a subroutine call. ! 434: FUNTYPE is the data type of the function (as a tree), ! 435: or for a library call it is an identifier node for the subroutine name. ! 436: SIZE is the number of bytes of arguments passed on the stack. ! 437: ! 438: On the Alliant we define this as SIZE and make the calling sequence ! 439: (in alliant.md) pop the args. This wouldn't be necessary if we ! 440: could add to the pending stack adjustment the size of the argument ! 441: descriptors that are pushed after the arguments. */ ! 442: ! 443: #define RETURN_POPS_ARGS(FUNTYPE,SIZE) (SIZE) ! 444: ! 445: /* Define how to find the value returned by a function. ! 446: VALTYPE is the data type of the value (as a tree). ! 447: If the precise function being called is known, FUNC is its FUNCTION_DECL; ! 448: otherwise, FUNC is 0. */ ! 449: ! 450: /* On the Alliant the return value is in FP0 if real, else D0. */ ! 451: ! 452: #define FUNCTION_VALUE(VALTYPE, FUNC) \ ! 453: (TREE_CODE (VALTYPE) == REAL_TYPE \ ! 454: ? gen_rtx (REG, TYPE_MODE (VALTYPE), 16) \ ! 455: : gen_rtx (REG, TYPE_MODE (VALTYPE), 0)) ! 456: ! 457: /* Define how to find the value returned by a library function ! 458: assuming the value has mode MODE. */ ! 459: ! 460: /* On the Alliant the return value is in FP0 if real, else D0. The ! 461: Alliant library functions for floating-point emulation return their ! 462: values both in FP0 and in D0/D1. But since not all libgcc functions ! 463: return the results of these directly, we cannot assume that D0/D1 ! 464: contain the values we expect on return from a libgcc function. */ ! 465: ! 466: #define LIBCALL_VALUE(MODE) \ ! 467: (((MODE) == DFmode || (MODE) == SFmode) \ ! 468: ? gen_rtx (REG, MODE, 16) \ ! 469: : gen_rtx (REG, MODE, 0)) ! 470: ! 471: /* 1 if N is a possible register number for a function value. ! 472: On the Alliant, D0 and FP0 are the only registers thus used. ! 473: (No need to mention D1 when used as a pair with D0.) */ ! 474: ! 475: #define FUNCTION_VALUE_REGNO_P(N) (((N) & ~16) == 0) ! 476: ! 477: /* Define this if PCC uses the nonreentrant convention for returning ! 478: structure and union values. */ ! 479: ! 480: #define PCC_STATIC_STRUCT_RETURN ! 481: ! 482: /* 1 if N is a possible register number for function argument passing. ! 483: On the Alliant, no registers are used in this way. */ ! 484: ! 485: #define FUNCTION_ARG_REGNO_P(N) 0 ! 486: ! 487: /* Define a data type for recording info about an argument list ! 488: during the scan of that argument list. This data type should ! 489: hold all necessary information about the function itself ! 490: and about the args processed so far, enough to enable macros ! 491: such as FUNCTION_ARG to determine where the next arg should go. ! 492: ! 493: On the Alliant, this is a single integer, which is a number of bytes ! 494: of arguments scanned so far. */ ! 495: ! 496: #define CUMULATIVE_ARGS int ! 497: ! 498: /* Initialize a variable CUM of type CUMULATIVE_ARGS ! 499: for a call to a function whose data type is FNTYPE. ! 500: For a library call, FNTYPE is 0. ! 501: ! 502: On the Alliant, the offset starts at 0. */ ! 503: ! 504: #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME) \ ! 505: ((CUM) = 0) ! 506: ! 507: /* Update the data in CUM to advance over an argument ! 508: of mode MODE and data type TYPE. ! 509: (TYPE is null for libcalls where that information may not be available.) */ ! 510: ! 511: #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \ ! 512: ((CUM) += ((MODE) != BLKmode \ ! 513: ? (GET_MODE_SIZE (MODE) + 3) & ~3 \ ! 514: : (int_size_in_bytes (TYPE) + 3) & ~3)) ! 515: ! 516: /* Define where to put the arguments to a function. ! 517: Value is zero to push the argument on the stack, ! 518: or a hard register in which to store the argument. ! 519: ! 520: MODE is the argument's machine mode. ! 521: TYPE is the data type of the argument (as a tree). ! 522: This is null for libcalls where that information may ! 523: not be available. ! 524: CUM is a variable of type CUMULATIVE_ARGS which gives info about ! 525: the preceding args and about the function being called. ! 526: NAMED is nonzero if this argument is a named parameter ! 527: (otherwise it is an extra parameter matching an ellipsis). */ ! 528: ! 529: /* On the Alliant all args are pushed. */ ! 530: ! 531: #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) 0 ! 532: ! 533: /* For an arg passed partly in registers and partly in memory, ! 534: this is the number of registers used. ! 535: For args passed entirely in registers or entirely in memory, zero. */ ! 536: ! 537: #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) 0 ! 538: ! 539: /* This macro generates the assembly code for function entry. ! 540: FILE is a stdio stream to output the code to. ! 541: SIZE is an int: how many units of temporary storage to allocate. ! 542: Refer to the array `regs_ever_live' to determine which registers ! 543: to save; `regs_ever_live[I]' is nonzero if register number I ! 544: is ever used in the function. This macro is responsible for ! 545: knowing which registers should not be saved even if used. ! 546: The Alliant uses caller-saves, so this macro is very simple. */ ! 547: ! 548: #define FUNCTION_PROLOGUE(FILE, SIZE) \ ! 549: { int fsize = ((SIZE) - STARTING_FRAME_OFFSET + 3) & -4; \ ! 550: if (frame_pointer_needed) \ ! 551: { \ ! 552: if (fsize < 0x8000) \ ! 553: fprintf(FILE,"\tlinkw a6,#%d\n", -fsize); \ ! 554: else if (TARGET_68020) \ ! 555: fprintf(FILE,"\tlinkl a6,#%d\n", -fsize); \ ! 556: else \ ! 557: fprintf(FILE,"\tlinkw a6,#0\n\tsubl #%d,sp\n", fsize); \ ! 558: fprintf(FILE, "\tmovl a0,a6@(-4)\n" ); }} ! 559: ! 560: /* Output assembler code to FILE to increment profiler label # LABELNO ! 561: for profiling a function entry. */ ! 562: ! 563: #define FUNCTION_PROFILER(FILE, LABELNO) \ ! 564: fprintf (FILE, "\tjbsr __mcount_\n") ! 565: ! 566: /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function, ! 567: the stack pointer does not matter. The value is tested only in ! 568: functions that have frame pointers. ! 569: No definition is equivalent to always zero. */ ! 570: ! 571: #define EXIT_IGNORE_STACK 1 ! 572: ! 573: /* This macro generates the assembly code for function exit, ! 574: on machines that need it. If FUNCTION_EPILOGUE is not defined ! 575: then individual return instructions are generated for each ! 576: return statement. Args are same as for FUNCTION_PROLOGUE. ! 577: ! 578: The function epilogue should not depend on the current stack pointer! ! 579: It should use the frame pointer only. This is mandatory because ! 580: of alloca; we also take advantage of it to omit stack adjustments ! 581: before returning. */ ! 582: ! 583: #define FUNCTION_EPILOGUE(FILE, SIZE) \ ! 584: { if (frame_pointer_needed) \ ! 585: fprintf (FILE, "\tunlk a6\n"); \ ! 586: fprintf (FILE, "\trts\n"); } ! 587: ! 588: /* Store in the variable DEPTH the initial difference between the ! 589: frame pointer reg contents and the stack pointer reg contents, ! 590: as of the start of the function body. This depends on the layout ! 591: of the fixed parts of the stack frame and on how registers are saved. */ ! 592: ! 593: #define INITIAL_FRAME_POINTER_OFFSET(DEPTH) \ ! 594: { \ ! 595: int regno; \ ! 596: int offset = -4; \ ! 597: for (regno = 16; regno < FIRST_PSEUDO_REGISTER; regno++) \ ! 598: if (regs_ever_live[regno] && ! call_used_regs[regno]) \ ! 599: offset += 12; \ ! 600: for (regno = 0; regno < 16; regno++) \ ! 601: if (regs_ever_live[regno] && ! call_used_regs[regno]) \ ! 602: offset += 4; \ ! 603: (DEPTH) = offset - ((get_frame_size () + 3) & -4); \ ! 604: } ! 605: ! 606: /* Addressing modes, and classification of registers for them. */ ! 607: ! 608: #define HAVE_POST_INCREMENT ! 609: /* #define HAVE_POST_DECREMENT */ ! 610: ! 611: #define HAVE_PRE_DECREMENT ! 612: /* #define HAVE_PRE_INCREMENT */ ! 613: ! 614: /* Macros to check register numbers against specific register classes. */ ! 615: ! 616: /* These assume that REGNO is a hard or pseudo reg number. ! 617: They give nonzero only if REGNO is a hard reg of the suitable class ! 618: or a pseudo reg currently allocated to a suitable hard reg. ! 619: Since they use reg_renumber, they are safe only once reg_renumber ! 620: has been allocated, which happens in local-alloc.c. */ ! 621: ! 622: #define REGNO_OK_FOR_INDEX_P(REGNO) \ ! 623: ((REGNO) < 16 || (unsigned) reg_renumber[REGNO] < 16) ! 624: #define REGNO_OK_FOR_BASE_P(REGNO) \ ! 625: (((REGNO) ^ 010) < 8 || (unsigned) (reg_renumber[REGNO] ^ 010) < 8) ! 626: #define REGNO_OK_FOR_DATA_P(REGNO) \ ! 627: ((REGNO) < 8 || (unsigned) reg_renumber[REGNO] < 8) ! 628: #define REGNO_OK_FOR_FP_P(REGNO) \ ! 629: (((REGNO) ^ 020) < 8 || (unsigned) (reg_renumber[REGNO] ^ 020) < 8) ! 630: ! 631: /* Now macros that check whether X is a register and also, ! 632: strictly, whether it is in a specified class. ! 633: ! 634: These macros are specific to the 68000, and may be used only ! 635: in code for printing assembler insns and in conditions for ! 636: define_optimization. */ ! 637: ! 638: /* 1 if X is a data register. */ ! 639: ! 640: #define DATA_REG_P(X) (REG_P (X) && REGNO_OK_FOR_DATA_P (REGNO (X))) ! 641: ! 642: /* 1 if X is an fp register. */ ! 643: ! 644: #define FP_REG_P(X) (REG_P (X) && REGNO_OK_FOR_FP_P (REGNO (X))) ! 645: ! 646: /* 1 if X is an address register */ ! 647: ! 648: #define ADDRESS_REG_P(X) (REG_P (X) && REGNO_OK_FOR_BASE_P (REGNO (X))) ! 649: ! 650: /* Maximum number of registers that can appear in a valid memory address. */ ! 651: ! 652: #define MAX_REGS_PER_ADDRESS 2 ! 653: ! 654: /* Recognize any constant value that is a valid address. */ ! 655: ! 656: #define CONSTANT_ADDRESS_P(X) CONSTANT_P (X) ! 657: ! 658: /* Nonzero if the constant value X is a legitimate general operand. ! 659: It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE. */ ! 660: ! 661: /* Alliant FP instructions don't take immediate operands, so this ! 662: forces them into memory. */ ! 663: #define LEGITIMATE_CONSTANT_P(X) (GET_CODE (X) != CONST_DOUBLE) ! 664: ! 665: /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx ! 666: and check its validity for a certain class. ! 667: We have two alternate definitions for each of them. ! 668: The usual definition accepts all pseudo regs; the other rejects ! 669: them unless they have been allocated suitable hard regs. ! 670: The symbol REG_OK_STRICT causes the latter definition to be used. ! 671: ! 672: Most source files want to accept pseudo regs in the hope that ! 673: they will get allocated to the class that the insn wants them to be in. ! 674: Source files for reload pass need to be strict. ! 675: After reload, it makes no difference, since pseudo regs have ! 676: been eliminated by then. */ ! 677: ! 678: #ifndef REG_OK_STRICT ! 679: ! 680: /* Nonzero if X is a hard reg that can be used as an index ! 681: or if it is a pseudo reg. */ ! 682: #define REG_OK_FOR_INDEX_P(X) ((REGNO (X) ^ 020) >= 8) ! 683: /* Nonzero if X is a hard reg that can be used as a base reg ! 684: or if it is a pseudo reg. */ ! 685: #define REG_OK_FOR_BASE_P(X) ((REGNO (X) & ~027) != 0) ! 686: ! 687: #else ! 688: ! 689: /* Nonzero if X is a hard reg that can be used as an index. */ ! 690: #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X)) ! 691: /* Nonzero if X is a hard reg that can be used as a base reg. */ ! 692: #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X)) ! 693: ! 694: #endif ! 695: ! 696: /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression ! 697: that is a valid memory address for an instruction. ! 698: The MODE argument is the machine mode for the MEM expression ! 699: that wants to use this address. ! 700: ! 701: The other macros defined here are used only in GO_IF_LEGITIMATE_ADDRESS. */ ! 702: ! 703: #define INDIRECTABLE_1_ADDRESS_P(X) \ ! 704: (CONSTANT_ADDRESS_P (X) \ ! 705: || (GET_CODE (X) == REG && REG_OK_FOR_BASE_P (X)) \ ! 706: || ((GET_CODE (X) == PRE_DEC || GET_CODE (X) == POST_INC) \ ! 707: && REG_P (XEXP (X, 0)) \ ! 708: && REG_OK_FOR_BASE_P (XEXP (X, 0))) \ ! 709: || (GET_CODE (X) == PLUS \ ! 710: && REG_P (XEXP (X, 0)) && REG_OK_FOR_BASE_P (XEXP (X, 0)) \ ! 711: && GET_CODE (XEXP (X, 1)) == CONST_INT \ ! 712: && ((unsigned) INTVAL (XEXP (X, 1)) + 0x8000) < 0x10000)) ! 713: ! 714: #define GO_IF_NONINDEXED_ADDRESS(X, ADDR) \ ! 715: { if (INDIRECTABLE_1_ADDRESS_P (X)) goto ADDR; } ! 716: ! 717: #define GO_IF_INDEXABLE_BASE(X, ADDR) \ ! 718: { if (GET_CODE (X) == LABEL_REF) goto ADDR; \ ! 719: if (GET_CODE (X) == REG && REG_OK_FOR_BASE_P (X)) goto ADDR; } ! 720: ! 721: #define GO_IF_INDEXING(X, ADDR) \ ! 722: { if (GET_CODE (X) == PLUS && LEGITIMATE_INDEX_P (XEXP (X, 0))) \ ! 723: { GO_IF_INDEXABLE_BASE (XEXP (X, 1), ADDR); } \ ! 724: if (GET_CODE (X) == PLUS && LEGITIMATE_INDEX_P (XEXP (X, 1))) \ ! 725: { GO_IF_INDEXABLE_BASE (XEXP (X, 0), ADDR); } } ! 726: ! 727: #define GO_IF_INDEXED_ADDRESS(X, ADDR) \ ! 728: { GO_IF_INDEXING (X, ADDR); \ ! 729: if (GET_CODE (X) == PLUS) \ ! 730: { if (GET_CODE (XEXP (X, 1)) == CONST_INT \ ! 731: && (unsigned) INTVAL (XEXP (X, 1)) + 0x80 < 0x100) \ ! 732: { rtx go_temp = XEXP (X, 0); GO_IF_INDEXING (go_temp, ADDR); } \ ! 733: if (GET_CODE (XEXP (X, 0)) == CONST_INT \ ! 734: && (unsigned) INTVAL (XEXP (X, 0)) + 0x80 < 0x100) \ ! 735: { rtx go_temp = XEXP (X, 1); GO_IF_INDEXING (go_temp, ADDR); } } } ! 736: ! 737: #define LEGITIMATE_INDEX_REG_P(X) \ ! 738: ((GET_CODE (X) == REG && REG_OK_FOR_INDEX_P (X)) \ ! 739: || (GET_CODE (X) == SIGN_EXTEND \ ! 740: && GET_CODE (XEXP (X, 0)) == REG \ ! 741: && GET_MODE (XEXP (X, 0)) == HImode \ ! 742: && REG_OK_FOR_INDEX_P (XEXP (X, 0)))) ! 743: ! 744: #define LEGITIMATE_INDEX_P(X) \ ! 745: (LEGITIMATE_INDEX_REG_P (X) \ ! 746: || (TARGET_68020 && GET_CODE (X) == MULT \ ! 747: && LEGITIMATE_INDEX_REG_P (XEXP (X, 0)) \ ! 748: && GET_CODE (XEXP (X, 1)) == CONST_INT \ ! 749: && (INTVAL (XEXP (X, 1)) == 2 \ ! 750: || INTVAL (XEXP (X, 1)) == 4 \ ! 751: || INTVAL (XEXP (X, 1)) == 8))) ! 752: ! 753: #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \ ! 754: { GO_IF_NONINDEXED_ADDRESS (X, ADDR); \ ! 755: GO_IF_INDEXED_ADDRESS (X, ADDR); } ! 756: ! 757: /* Try machine-dependent ways of modifying an illegitimate address ! 758: to be legitimate. If we find one, return the new, valid address. ! 759: This macro is used in only one place: `memory_address' in explow.c. ! 760: ! 761: OLDX is the address as it was before break_out_memory_refs was called. ! 762: In some cases it is useful to look at this to decide what needs to be done. ! 763: ! 764: MODE and WIN are passed so that this macro can use ! 765: GO_IF_LEGITIMATE_ADDRESS. ! 766: ! 767: It is always safe for this macro to do nothing. It exists to recognize ! 768: opportunities to optimize the output. ! 769: ! 770: For the 68000, we handle X+REG by loading X into a register R and ! 771: using R+REG. R will go in an address reg and indexing will be used. ! 772: However, if REG is a broken-out memory address or multiplication, ! 773: nothing needs to be done because REG can certainly go in an address reg. */ ! 774: ! 775: #define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) \ ! 776: { register int ch = (X) != (OLDX); \ ! 777: if (GET_CODE (X) == PLUS) \ ! 778: { if (GET_CODE (XEXP (X, 0)) == MULT) \ ! 779: ch = 1, XEXP (X, 0) = force_operand (XEXP (X, 0), 0); \ ! 780: if (GET_CODE (XEXP (X, 1)) == MULT) \ ! 781: ch = 1, XEXP (X, 1) = force_operand (XEXP (X, 1), 0); \ ! 782: if (ch && GET_CODE (XEXP (X, 1)) == REG \ ! 783: && GET_CODE (XEXP (X, 0)) == REG) \ ! 784: goto WIN; \ ! 785: if (ch) { GO_IF_LEGITIMATE_ADDRESS (MODE, X, WIN); } \ ! 786: if (GET_CODE (XEXP (X, 0)) == REG \ ! 787: || (GET_CODE (XEXP (X, 0)) == SIGN_EXTEND \ ! 788: && GET_CODE (XEXP (XEXP (X, 0), 0)) == REG \ ! 789: && GET_MODE (XEXP (XEXP (X, 0), 0)) == HImode)) \ ! 790: { register rtx temp = gen_reg_rtx (Pmode); \ ! 791: register rtx val = force_operand (XEXP (X, 1), 0); \ ! 792: emit_move_insn (temp, val); \ ! 793: XEXP (X, 1) = temp; \ ! 794: goto WIN; } \ ! 795: else if (GET_CODE (XEXP (X, 1)) == REG \ ! 796: || (GET_CODE (XEXP (X, 1)) == SIGN_EXTEND \ ! 797: && GET_CODE (XEXP (XEXP (X, 1), 0)) == REG \ ! 798: && GET_MODE (XEXP (XEXP (X, 1), 0)) == HImode)) \ ! 799: { register rtx temp = gen_reg_rtx (Pmode); \ ! 800: register rtx val = force_operand (XEXP (X, 0), 0); \ ! 801: emit_move_insn (temp, val); \ ! 802: XEXP (X, 0) = temp; \ ! 803: goto WIN; }}} ! 804: ! 805: /* Go to LABEL if ADDR (a legitimate address expression) ! 806: has an effect that depends on the machine mode it is used for. ! 807: On the 68000, only predecrement and postincrement address depend thus ! 808: (the amount of decrement or increment being the length of the operand). */ ! 809: ! 810: #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) \ ! 811: if (GET_CODE (ADDR) == POST_INC || GET_CODE (ADDR) == PRE_DEC) goto LABEL ! 812: ! 813: /* Specify the machine mode that this machine uses ! 814: for the index in the tablejump instruction. */ ! 815: #define CASE_VECTOR_MODE HImode ! 816: ! 817: /* Define this if the tablejump instruction expects the table ! 818: to contain offsets from the address of the table. ! 819: Do not define this if the table should contain absolute addresses. */ ! 820: #define CASE_VECTOR_PC_RELATIVE ! 821: ! 822: /* Specify the tree operation to be used to convert reals to integers. */ ! 823: #define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR ! 824: ! 825: /* This is the kind of divide that is easiest to do in the general case. */ ! 826: #define EASY_DIV_EXPR TRUNC_DIV_EXPR ! 827: ! 828: /* Define this as 1 if `char' should by default be signed; else as 0. */ ! 829: #define DEFAULT_SIGNED_CHAR 1 ! 830: ! 831: /* Max number of bytes we can move from memory to memory ! 832: in one reasonably fast instruction. */ ! 833: #define MOVE_MAX 4 ! 834: ! 835: /* Define this if zero-extension is slow (more than one real instruction). */ ! 836: #define SLOW_ZERO_EXTEND ! 837: ! 838: /* Nonzero if access to memory by bytes is slow and undesirable. */ ! 839: #define SLOW_BYTE_ACCESS 0 ! 840: ! 841: /* Define if shifts truncate the shift count ! 842: which implies one can omit a sign-extension or zero-extension ! 843: of a shift count. */ ! 844: #define SHIFT_COUNT_TRUNCATED ! 845: ! 846: /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits ! 847: is done just by pretending it is already truncated. */ ! 848: #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1 ! 849: ! 850: /* We assume that the store-condition-codes instructions store 0 for false ! 851: and some other value for true. This is the value stored for true. */ ! 852: ! 853: #define STORE_FLAG_VALUE -1 ! 854: ! 855: /* When a prototype says `char' or `short', really pass an `int'. */ ! 856: #define PROMOTE_PROTOTYPES ! 857: ! 858: /* Specify the machine mode that pointers have. ! 859: After generation of rtl, the compiler makes no further distinction ! 860: between pointers and any other objects of this machine mode. */ ! 861: #define Pmode SImode ! 862: ! 863: /* A function address in a call instruction ! 864: is a byte address (for indexing purposes) ! 865: so give the MEM rtx a byte's mode. */ ! 866: #define FUNCTION_MODE QImode ! 867: ! 868: /* Compute the cost of computing a constant rtl expression RTX ! 869: whose rtx-code is CODE. The body of this macro is a portion ! 870: of a switch statement. If the code is computed here, ! 871: return it with a return statement. Otherwise, break from the switch. */ ! 872: ! 873: #define CONST_COSTS(RTX,CODE) \ ! 874: case CONST_INT: \ ! 875: /* Constant zero is super cheap due to clr instruction. */ \ ! 876: if (RTX == const0_rtx) return 0; \ ! 877: if ((unsigned) INTVAL (RTX) < 077) return 1; \ ! 878: case CONST: \ ! 879: case LABEL_REF: \ ! 880: case SYMBOL_REF: \ ! 881: return 3; \ ! 882: case CONST_DOUBLE: \ ! 883: return 5; ! 884: ! 885: /* Check a `double' value for validity for a particular machine mode. ! 886: This is defined to avoid crashes outputting certain constants. */ ! 887: ! 888: #define CHECK_FLOAT_VALUE(mode, d) \ ! 889: if ((mode) == SFmode) \ ! 890: { \ ! 891: if ((d) > 3.4028234663852890e+38) \ ! 892: { warning ("magnitude of value too large for `float'"); \ ! 893: (d) = 3.4028234663852890e+38; } \ ! 894: else if ((d) < -3.4028234663852890e+38) \ ! 895: { warning ("magnitude of value too large for `float'"); \ ! 896: (d) = -3.4028234663852890e+38; } \ ! 897: else if (((d) > 0) && ((d) < 1.1754943508222873e-38)) \ ! 898: (d) = 0.0; \ ! 899: else if (((d) < 0) && ((d) > -1.1754943508222873e-38)) \ ! 900: (d) = 0.0; \ ! 901: } ! 902: ! 903: /* Tell final.c how to eliminate redundant test instructions. */ ! 904: ! 905: /* Here we define machine-dependent flags and fields in cc_status ! 906: (see `conditions.h'). */ ! 907: ! 908: /* On the Alliant, floating-point instructions do not modify the ! 909: ordinary CC register. Only fcmp and ftest instructions modify the ! 910: floating-point CC register. We should actually keep track of what ! 911: both kinds of CC registers contain, but for now we only consider ! 912: the most recent instruction that has set either register. */ ! 913: ! 914: /* Set if the cc value came from a floating point test, so a floating ! 915: point conditional branch must be output. */ ! 916: #define CC_IN_FP 04000 ! 917: ! 918: /* Store in cc_status the expressions ! 919: that the condition codes will describe ! 920: after execution of an instruction whose pattern is EXP. ! 921: Do not alter them if the instruction would not alter the cc's. */ ! 922: ! 923: /* On the 68000, all the insns to store in an address register ! 924: fail to set the cc's. However, in some cases these instructions ! 925: can make it possibly invalid to use the saved cc's. In those ! 926: cases we clear out some or all of the saved cc's so they won't be used. */ ! 927: ! 928: #define NOTICE_UPDATE_CC(EXP, INSN) \ ! 929: { \ ! 930: if (GET_CODE (EXP) == SET) \ ! 931: { if (ADDRESS_REG_P (SET_DEST (EXP)) || FP_REG_P (SET_DEST (EXP))) \ ! 932: { if (cc_status.value1 \ ! 933: && reg_overlap_mentioned_p (SET_DEST (EXP), cc_status.value1)) \ ! 934: cc_status.value1 = 0; \ ! 935: if (cc_status.value2 \ ! 936: && reg_overlap_mentioned_p (SET_DEST (EXP), cc_status.value2)) \ ! 937: cc_status.value2 = 0; } \ ! 938: else if (GET_CODE (SET_SRC (EXP)) == MOD \ ! 939: || GET_CODE (SET_SRC (EXP)) == UMOD \ ! 940: || (GET_CODE (SET_SRC (EXP)) == TRUNCATE \ ! 941: && (GET_CODE (XEXP (SET_SRC (EXP))) == MOD \ ! 942: || GET_CODE (XEXP (SET_SRC (EXP))) == UMOD))) \ ! 943: /* The swap insn produces cc's that don't correspond to the \ ! 944: result. */ \ ! 945: CC_STATUS_INIT; \ ! 946: else if (SET_DEST (EXP) != cc0_rtx \ ! 947: && (FP_REG_P (SET_SRC (EXP)) \ ! 948: || GET_CODE (SET_SRC (EXP)) == FIX \ ! 949: || GET_CODE (SET_SRC (EXP)) == FLOAT_TRUNCATE \ ! 950: || GET_CODE (SET_SRC (EXP)) == FLOAT_EXTEND)) \ ! 951: { CC_STATUS_INIT; } \ ! 952: /* A pair of move insns doesn't produce a useful overall cc. */ \ ! 953: else if (!FP_REG_P (SET_DEST (EXP)) \ ! 954: && !FP_REG_P (SET_SRC (EXP)) \ ! 955: && GET_MODE_SIZE (GET_MODE (SET_SRC (EXP))) > 4 \ ! 956: && (GET_CODE (SET_SRC (EXP)) == REG \ ! 957: || GET_CODE (SET_SRC (EXP)) == MEM \ ! 958: || GET_CODE (SET_SRC (EXP)) == CONST_DOUBLE))\ ! 959: { CC_STATUS_INIT; } \ ! 960: else if (GET_CODE (SET_SRC (EXP)) == CALL) \ ! 961: { CC_STATUS_INIT; } \ ! 962: else if (XEXP (EXP, 0) != pc_rtx) \ ! 963: { cc_status.flags = 0; \ ! 964: cc_status.value1 = XEXP (EXP, 0); \ ! 965: cc_status.value2 = XEXP (EXP, 1); } } \ ! 966: else if (GET_CODE (EXP) == PARALLEL \ ! 967: && GET_CODE (XVECEXP (EXP, 0, 0)) == SET) \ ! 968: { \ ! 969: if (ADDRESS_REG_P (XEXP (XVECEXP (EXP, 0, 0), 0))) \ ! 970: CC_STATUS_INIT; \ ! 971: else if (XEXP (XVECEXP (EXP, 0, 0), 0) != pc_rtx) \ ! 972: { cc_status.flags = 0; \ ! 973: cc_status.value1 = XEXP (XVECEXP (EXP, 0, 0), 0); \ ! 974: cc_status.value2 = XEXP (XVECEXP (EXP, 0, 0), 1); } } \ ! 975: else CC_STATUS_INIT; \ ! 976: if (cc_status.value2 != 0 \ ! 977: && ADDRESS_REG_P (cc_status.value2) \ ! 978: && GET_MODE (cc_status.value2) == QImode) \ ! 979: CC_STATUS_INIT; \ ! 980: if (cc_status.value2 != 0) \ ! 981: switch (GET_CODE (cc_status.value2)) \ ! 982: { case PLUS: case MINUS: case MULT: \ ! 983: case DIV: case UDIV: case MOD: case UMOD: case NEG: \ ! 984: case ASHIFT: case LSHIFT: case ASHIFTRT: case LSHIFTRT: \ ! 985: case ROTATE: case ROTATERT: \ ! 986: if (GET_MODE (cc_status.value2) != VOIDmode) \ ! 987: cc_status.flags |= CC_NO_OVERFLOW; \ ! 988: break; \ ! 989: case ZERO_EXTEND: \ ! 990: /* (SET r1 (ZERO_EXTEND r2)) on this machine ! 991: ends with a move insn moving r2 in r2's mode. ! 992: Thus, the cc's are set for r2. ! 993: This can set N bit spuriously. */ \ ! 994: cc_status.flags |= CC_NOT_NEGATIVE; } \ ! 995: if (cc_status.value1 && GET_CODE (cc_status.value1) == REG \ ! 996: && cc_status.value2 \ ! 997: && reg_overlap_mentioned_p (cc_status.value1, cc_status.value2)) \ ! 998: cc_status.value2 = 0; \ ! 999: if ((cc_status.value1 && FP_REG_P (cc_status.value1)) \ ! 1000: || (cc_status.value2 && FP_REG_P (cc_status.value2))) \ ! 1001: cc_status.flags = CC_IN_FP; } ! 1002: ! 1003: #define OUTPUT_JUMP(NORMAL, FLOAT, NO_OV) \ ! 1004: { if (cc_prev_status.flags & CC_IN_FP) \ ! 1005: return FLOAT; \ ! 1006: if (cc_prev_status.flags & CC_NO_OVERFLOW) \ ! 1007: return NO_OV; \ ! 1008: return NORMAL; } ! 1009: ! 1010: /* Control the assembler format that we output. */ ! 1011: ! 1012: /* Output at beginning of assembler file. */ ! 1013: ! 1014: #define ASM_FILE_START(FILE) \ ! 1015: fprintf (FILE, "#NO_APP\n"); ! 1016: ! 1017: /* Output to assembler file text saying following lines ! 1018: may contain character constants, extra white space, comments, etc. */ ! 1019: ! 1020: #define ASM_APP_ON "#APP\n" ! 1021: ! 1022: /* Output to assembler file text saying following lines ! 1023: no longer contain unusual constructs. */ ! 1024: ! 1025: #define ASM_APP_OFF "#NO_APP\n" ! 1026: ! 1027: /* Output before read-only data. */ ! 1028: ! 1029: #define TEXT_SECTION_ASM_OP "\t.text" ! 1030: ! 1031: /* Output before writable data. */ ! 1032: ! 1033: #define DATA_SECTION_ASM_OP "\t.data" ! 1034: ! 1035: /* How to refer to registers in assembler output. ! 1036: This sequence is indexed by compiler's hard-register-number (see above). */ ! 1037: ! 1038: #define REGISTER_NAMES \ ! 1039: {"d0", "d1", "d2", "d3", "d4", "d5", "d6", "d7", \ ! 1040: "a0", "a1", "a2", "a3", "a4", "a5", "a6", "sp", \ ! 1041: "fp0", "fp1", "fp2", "fp3", "fp4", "fp5", "fp6", "fp7" } ! 1042: ! 1043: /* How to renumber registers for dbx and gdb. ! 1044: On the Sun-3, the floating point registers have numbers ! 1045: 18 to 25, not 16 to 23 as they do in the compiler. */ ! 1046: /* (On the Alliant, dbx isn't working yet at all. */ ! 1047: ! 1048: #define DBX_REGISTER_NUMBER(REGNO) ((REGNO) < 16 ? (REGNO) : (REGNO) + 2) ! 1049: ! 1050: /* This is how to output the definition of a user-level label named NAME, ! 1051: such as the label on a static function or variable NAME. */ ! 1052: ! 1053: #define ASM_OUTPUT_LABEL(FILE,NAME) \ ! 1054: do { assemble_name (FILE, NAME); fputs (":\n", FILE); } while (0) ! 1055: ! 1056: /* This is how to output a command to make the user-level label named NAME ! 1057: defined for reference from other files. */ ! 1058: ! 1059: #define ASM_GLOBALIZE_LABEL(FILE,NAME) \ ! 1060: do { fputs ("\t.globl ", FILE); assemble_name (FILE, NAME); fputs ("\n", FILE);} while (0) ! 1061: ! 1062: /* This is how to output a reference to a user-level label named NAME. ! 1063: `assemble_name' uses this. */ ! 1064: ! 1065: #define ASM_OUTPUT_LABELREF(FILE,NAME) \ ! 1066: fprintf (FILE, "_%s", NAME) ! 1067: ! 1068: /* This is how to output an internal numbered label where ! 1069: PREFIX is the class of label and NUM is the number within the class. */ ! 1070: ! 1071: #define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \ ! 1072: fprintf (FILE, "%s%d:\n", PREFIX, NUM) ! 1073: ! 1074: /* This is how to store into the string LABEL ! 1075: the symbol_ref name of an internal numbered label where ! 1076: PREFIX is the class of label and NUM is the number within the class. ! 1077: This is suitable for output with `assemble_name'. */ ! 1078: ! 1079: #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \ ! 1080: sprintf (LABEL, "*%s%d", PREFIX, NUM) ! 1081: ! 1082: /* This is how to output an assembler line defining a `double' constant. */ ! 1083: ! 1084: #define ASM_OUTPUT_DOUBLE(FILE,VALUE) \ ! 1085: do { union { double d; long v[2];} tem; \ ! 1086: tem.d = (VALUE); \ ! 1087: fprintf (FILE, "\t.long 0x%x,0x%x\n", tem.v[0], tem.v[1]); \ ! 1088: } while (0) ! 1089: ! 1090: /* This is how to output an assembler line defining a `float' constant. */ ! 1091: ! 1092: #define ASM_OUTPUT_FLOAT(FILE,VALUE) \ ! 1093: do { union { float f; long l;} tem; \ ! 1094: tem.f = (VALUE); \ ! 1095: fprintf (FILE, "\t.long 0x%x\n", tem.l); \ ! 1096: } while (0) ! 1097: ! 1098: /* This is how to output an assembler line defining an `int' constant. */ ! 1099: ! 1100: #define ASM_OUTPUT_INT(FILE,VALUE) \ ! 1101: ( fprintf (FILE, "\t.long "), \ ! 1102: output_addr_const (FILE, (VALUE)), \ ! 1103: fprintf (FILE, "\n")) ! 1104: ! 1105: /* Likewise for `char' and `short' constants. */ ! 1106: ! 1107: #define ASM_OUTPUT_SHORT(FILE,VALUE) \ ! 1108: ( fprintf (FILE, "\t.word "), \ ! 1109: output_addr_const (FILE, (VALUE)), \ ! 1110: fprintf (FILE, "\n")) ! 1111: ! 1112: #define ASM_OUTPUT_CHAR(FILE,VALUE) \ ! 1113: ( fprintf (FILE, "\t.byte "), \ ! 1114: output_addr_const (FILE, (VALUE)), \ ! 1115: fprintf (FILE, "\n")) ! 1116: ! 1117: #define ASM_OUTPUT_ASCII(FILE,PTR,SIZE) \ ! 1118: { int i; unsigned char *pp = (unsigned char *) (PTR); \ ! 1119: fprintf((FILE), "\t.byte %d", (unsigned int)*pp++); \ ! 1120: for (i = 1; i < (SIZE); ++i, ++pp) { \ ! 1121: if ((i % 8) == 0) \ ! 1122: fprintf((FILE), "\n\t.byte %d", (unsigned int) *pp); \ ! 1123: else \ ! 1124: fprintf((FILE), ",%d", (unsigned int) *pp); } \ ! 1125: fprintf ((FILE), "\n"); } ! 1126: ! 1127: /* This is how to output an assembler line for a numeric constant byte. */ ! 1128: ! 1129: #define ASM_OUTPUT_BYTE(FILE,VALUE) \ ! 1130: fprintf (FILE, "\t.byte 0x%x\n", (VALUE)) ! 1131: ! 1132: /* This is how to output an insn to push a register on the stack. ! 1133: It need not be very fast code. */ ! 1134: ! 1135: #define ASM_OUTPUT_REG_PUSH(FILE,REGNO) \ ! 1136: fprintf (FILE, "\tmovl %s,sp@-\n", reg_names[REGNO]) ! 1137: ! 1138: /* This is how to output an insn to pop a register from the stack. ! 1139: It need not be very fast code. */ ! 1140: ! 1141: #define ASM_OUTPUT_REG_POP(FILE,REGNO) \ ! 1142: fprintf (FILE, "\tmovl sp@+,%s\n", reg_names[REGNO]) ! 1143: ! 1144: /* This is how to output an element of a case-vector that is absolute. ! 1145: (The 68000 does not use such vectors, ! 1146: but we must define this macro anyway.) */ ! 1147: ! 1148: #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \ ! 1149: fprintf (FILE, "\t.long L%d\n", VALUE) ! 1150: ! 1151: /* This is how to output an element of a case-vector that is relative. */ ! 1152: ! 1153: #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, VALUE, REL) \ ! 1154: fprintf (FILE, "\t.word L%d-L%d\n", VALUE, REL) ! 1155: ! 1156: /* This is how to output an assembler line ! 1157: that says to advance the location counter ! 1158: to a multiple of 2**LOG bytes. */ ! 1159: ! 1160: #define ASM_OUTPUT_ALIGN(FILE,LOG) \ ! 1161: if ((LOG) == 1) \ ! 1162: fprintf (FILE, "\t.even\n"); \ ! 1163: else if ((LOG) != 0) \ ! 1164: fprintf (FILE, "\t.align %dn", (LOG)); ! 1165: ! 1166: #define ASM_OUTPUT_SKIP(FILE,SIZE) \ ! 1167: fprintf (FILE, "\t. = . + %u\n", (SIZE)) ! 1168: ! 1169: /* This says how to output an assembler line ! 1170: to define a global common symbol. */ ! 1171: ! 1172: #define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \ ! 1173: ( fputs ("\t.comm ", (FILE)), \ ! 1174: assemble_name ((FILE), (NAME)), \ ! 1175: fprintf ((FILE), ",%u\n", (ROUNDED))) ! 1176: ! 1177: /* This says how to output an assembler line ! 1178: to define a local common symbol. */ ! 1179: ! 1180: #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE, ROUNDED) \ ! 1181: ( fputs ("\t.lcomm ", (FILE)), \ ! 1182: assemble_name ((FILE), (NAME)), \ ! 1183: fprintf ((FILE), ",%u\n", (ROUNDED))) ! 1184: ! 1185: /* Store in OUTPUT a string (made with alloca) containing ! 1186: an assembler-name for a local static variable named NAME. ! 1187: LABELNO is an integer which is different for each call. */ ! 1188: ! 1189: #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \ ! 1190: ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \ ! 1191: sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO))) ! 1192: ! 1193: /* Define the parentheses used to group arithmetic operations ! 1194: in assembler code. */ ! 1195: ! 1196: #define ASM_OPEN_PAREN "(" ! 1197: #define ASM_CLOSE_PAREN ")" ! 1198: ! 1199: /* Define results of standard character escape sequences. */ ! 1200: #define TARGET_BELL 007 ! 1201: #define TARGET_BS 010 ! 1202: #define TARGET_TAB 011 ! 1203: #define TARGET_NEWLINE 012 ! 1204: #define TARGET_VT 013 ! 1205: #define TARGET_FF 014 ! 1206: #define TARGET_CR 015 ! 1207: ! 1208: /* Print operand X (an rtx) in assembler syntax to file FILE. ! 1209: CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified. ! 1210: For `%' followed by punctuation, CODE is the punctuation and X is null. ! 1211: ! 1212: On the Alliant, we use several CODE characters: ! 1213: '.' for dot needed in Motorola-style opcode names. ! 1214: '-' for an operand pushing on the stack: ! 1215: sp@-, -(sp) or -(%sp) depending on the style of syntax. ! 1216: '+' for an operand pushing on the stack: ! 1217: sp@+, (sp)+ or (%sp)+ depending on the style of syntax. ! 1218: '@' for a reference to the top word on the stack: ! 1219: sp@, (sp) or (%sp) depending on the style of syntax. ! 1220: '#' for an immediate operand prefix (# in MIT and Motorola syntax ! 1221: but & in SGS syntax). ! 1222: '!' for the cc register (used in an `and to cc' insn). ! 1223: ! 1224: 'b' for byte insn (no effect, on the Sun; this is for the ISI). ! 1225: 'd' to force memory addressing to be absolute, not relative. ! 1226: 'f' for float insn (print a CONST_DOUBLE as a float rather than in hex) ! 1227: 'x' for float insn (print a CONST_DOUBLE as a float rather than in hex), ! 1228: or print pair of registers as rx:ry. */ ! 1229: ! 1230: #define PRINT_OPERAND_PUNCT_VALID_P(CODE) \ ! 1231: ((CODE) == '.' || (CODE) == '#' || (CODE) == '-' \ ! 1232: || (CODE) == '+' || (CODE) == '@' || (CODE) == '!') ! 1233: ! 1234: #define PRINT_OPERAND(FILE, X, CODE) \ ! 1235: { int i; \ ! 1236: if (CODE == '.') ; \ ! 1237: else if (CODE == '#') fprintf (FILE, "#"); \ ! 1238: else if (CODE == '-') fprintf (FILE, "sp@-"); \ ! 1239: else if (CODE == '+') fprintf (FILE, "sp@+"); \ ! 1240: else if (CODE == '@') fprintf (FILE, "sp@"); \ ! 1241: else if (CODE == '!') fprintf (FILE, "cc"); \ ! 1242: else if ((X) == 0 ) ; \ ! 1243: else if (GET_CODE (X) == REG) \ ! 1244: { if (REGNO (X) < 16 && (CODE == 'y' || CODE == 'x') && GET_MODE (X) == DFmode) \ ! 1245: fprintf (FILE, "%s,%s", reg_names[REGNO (X)], reg_names[REGNO (X)+1]); \ ! 1246: else \ ! 1247: fprintf (FILE, "%s", reg_names[REGNO (X)]); \ ! 1248: } \ ! 1249: else if (GET_CODE (X) == MEM) \ ! 1250: { \ ! 1251: output_address (XEXP (X, 0)); \ ! 1252: if (CODE == 'd' && ! TARGET_68020 \ ! 1253: && CONSTANT_ADDRESS_P (XEXP (X, 0)) \ ! 1254: && !(GET_CODE (XEXP (X, 0)) == CONST_INT \ ! 1255: && INTVAL (XEXP (X, 0)) < 0x8000 \ ! 1256: && INTVAL (XEXP (X, 0)) >= -0x8000)) \ ! 1257: fprintf (FILE, ":l"); \ ! 1258: } \ ! 1259: else if (GET_CODE (X) == CONST_DOUBLE && GET_MODE (X) == SFmode) \ ! 1260: { union { double d; int i[2]; } u; \ ! 1261: union { float f; int i; } u1; \ ! 1262: u.i[0] = CONST_DOUBLE_LOW (X); u.i[1] = CONST_DOUBLE_HIGH (X); \ ! 1263: u1.f = u.d; \ ! 1264: if (CODE == 'f') \ ! 1265: fprintf (FILE, "#0r%.9g", u1.f); \ ! 1266: else \ ! 1267: fprintf (FILE, "#0x%x", u1.i); } \ ! 1268: else if (GET_CODE (X) == CONST_DOUBLE && GET_MODE (X) != DImode) \ ! 1269: { union { double d; int i[2]; } u; \ ! 1270: u.i[0] = CONST_DOUBLE_LOW (X); u.i[1] = CONST_DOUBLE_HIGH (X); \ ! 1271: fprintf (FILE, "#0r%.20g", u.d); } \ ! 1272: else { putc ('#', FILE); output_addr_const (FILE, X); }} ! 1273: ! 1274: /* Note that this contains a kludge that knows that the only reason ! 1275: we have an address (plus (label_ref...) (reg...)) ! 1276: is in the insn before a tablejump, and we know that m68k.md ! 1277: generates a label LInnn: on such an insn. */ ! 1278: #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \ ! 1279: { register rtx reg1, reg2, breg, ireg; \ ! 1280: register rtx addr = ADDR; \ ! 1281: static char *sz = ".BW.L...D"; \ ! 1282: rtx offset; \ ! 1283: switch (GET_CODE (addr)) \ ! 1284: { \ ! 1285: case REG: \ ! 1286: fprintf (FILE, "%s@", reg_names[REGNO (addr)]); \ ! 1287: break; \ ! 1288: case PRE_DEC: \ ! 1289: fprintf (FILE, "%s@-", reg_names[REGNO (XEXP (addr, 0))]); \ ! 1290: break; \ ! 1291: case POST_INC: \ ! 1292: fprintf (FILE, "%s@+", reg_names[REGNO (XEXP (addr, 0))]); \ ! 1293: break; \ ! 1294: case PLUS: \ ! 1295: reg1 = 0; reg2 = 0; \ ! 1296: ireg = 0; breg = 0; \ ! 1297: offset = 0; \ ! 1298: if (CONSTANT_ADDRESS_P (XEXP (addr, 0))) \ ! 1299: { \ ! 1300: offset = XEXP (addr, 0); \ ! 1301: addr = XEXP (addr, 1); \ ! 1302: } \ ! 1303: else if (CONSTANT_ADDRESS_P (XEXP (addr, 1))) \ ! 1304: { \ ! 1305: offset = XEXP (addr, 1); \ ! 1306: addr = XEXP (addr, 0); \ ! 1307: } \ ! 1308: if (GET_CODE (addr) != PLUS) ; \ ! 1309: else if (GET_CODE (XEXP (addr, 0)) == SIGN_EXTEND) \ ! 1310: { \ ! 1311: reg1 = XEXP (addr, 0); \ ! 1312: addr = XEXP (addr, 1); \ ! 1313: } \ ! 1314: else if (GET_CODE (XEXP (addr, 1)) == SIGN_EXTEND) \ ! 1315: { \ ! 1316: reg1 = XEXP (addr, 1); \ ! 1317: addr = XEXP (addr, 0); \ ! 1318: } \ ! 1319: else if (GET_CODE (XEXP (addr, 0)) == MULT) \ ! 1320: { \ ! 1321: reg1 = XEXP (addr, 0); \ ! 1322: addr = XEXP (addr, 1); \ ! 1323: } \ ! 1324: else if (GET_CODE (XEXP (addr, 1)) == MULT) \ ! 1325: { \ ! 1326: reg1 = XEXP (addr, 1); \ ! 1327: addr = XEXP (addr, 0); \ ! 1328: } \ ! 1329: else if (GET_CODE (XEXP (addr, 0)) == REG) \ ! 1330: { \ ! 1331: reg1 = XEXP (addr, 0); \ ! 1332: addr = XEXP (addr, 1); \ ! 1333: } \ ! 1334: else if (GET_CODE (XEXP (addr, 1)) == REG) \ ! 1335: { \ ! 1336: reg1 = XEXP (addr, 1); \ ! 1337: addr = XEXP (addr, 0); \ ! 1338: } \ ! 1339: if (GET_CODE (addr) == REG || GET_CODE (addr) == MULT \ ! 1340: || GET_CODE (addr) == SIGN_EXTEND) \ ! 1341: { if (reg1 == 0) reg1 = addr; else reg2 = addr; addr = 0; } \ ! 1342: /* for OLD_INDEXING \ ! 1343: else if (GET_CODE (addr) == PLUS) \ ! 1344: { \ ! 1345: if (GET_CODE (XEXP (addr, 0)) == REG) \ ! 1346: { \ ! 1347: reg2 = XEXP (addr, 0); \ ! 1348: addr = XEXP (addr, 1); \ ! 1349: } \ ! 1350: else if (GET_CODE (XEXP (addr, 1)) == REG) \ ! 1351: { \ ! 1352: reg2 = XEXP (addr, 1); \ ! 1353: addr = XEXP (addr, 0); \ ! 1354: } \ ! 1355: } \ ! 1356: */ \ ! 1357: if (offset != 0) { if (addr != 0) abort (); addr = offset; } \ ! 1358: if ((reg1 && (GET_CODE (reg1) == SIGN_EXTEND \ ! 1359: || GET_CODE (reg1) == MULT)) \ ! 1360: || (reg2 != 0 && REGNO_OK_FOR_BASE_P (REGNO (reg2)))) \ ! 1361: { breg = reg2; ireg = reg1; } \ ! 1362: else if (reg1 != 0 && REGNO_OK_FOR_BASE_P (REGNO (reg1))) \ ! 1363: { breg = reg1; ireg = reg2; } \ ! 1364: if (ireg != 0 && breg == 0 && GET_CODE (addr) == LABEL_REF) \ ! 1365: { int scale = 1; \ ! 1366: if (GET_CODE (ireg) == MULT) \ ! 1367: { scale = INTVAL (XEXP (ireg, 1)); \ ! 1368: ireg = XEXP (ireg, 0); } \ ! 1369: if (GET_CODE (ireg) == SIGN_EXTEND) \ ! 1370: fprintf (FILE, "pc@(L%d-LI%d-2:B)[%s:W", \ ! 1371: CODE_LABEL_NUMBER (XEXP (addr, 0)), \ ! 1372: CODE_LABEL_NUMBER (XEXP (addr, 0)), \ ! 1373: reg_names[REGNO (XEXP (ireg, 0))]); \ ! 1374: else \ ! 1375: fprintf (FILE, "pc@(L%d-LI%d-2:B)[%s:L", \ ! 1376: CODE_LABEL_NUMBER (XEXP (addr, 0)), \ ! 1377: CODE_LABEL_NUMBER (XEXP (addr, 0)), \ ! 1378: reg_names[REGNO (ireg)]); \ ! 1379: fprintf (FILE, ":%c", sz[scale]); \ ! 1380: putc (']', FILE); \ ! 1381: break; } \ ! 1382: if (breg != 0 && ireg == 0 && GET_CODE (addr) == LABEL_REF) \ ! 1383: { fprintf (FILE, "pc@(L%d-LI%d-2:B)[%s:L:B]", \ ! 1384: CODE_LABEL_NUMBER (XEXP (addr, 0)), \ ! 1385: CODE_LABEL_NUMBER (XEXP (addr, 0)), \ ! 1386: reg_names[REGNO (breg)]); \ ! 1387: break; } \ ! 1388: if (ireg != 0 || breg != 0) \ ! 1389: { int scale = 1; \ ! 1390: if (breg == 0) \ ! 1391: abort (); \ ! 1392: if (addr && GET_CODE (addr) == LABEL_REF) abort (); \ ! 1393: fprintf (FILE, "%s@", reg_names[REGNO (breg)]); \ ! 1394: if (addr != 0) { \ ! 1395: putc( '(', FILE ); \ ! 1396: output_addr_const (FILE, addr); \ ! 1397: if (ireg != 0) { \ ! 1398: if (GET_CODE(addr) == CONST_INT) { \ ! 1399: int size_of = 1, val = INTVAL(addr); \ ! 1400: if (val < -0x8000 || val >= 0x8000) \ ! 1401: size_of = 4; \ ! 1402: else if (val < -0x80 || val >= 0x80) \ ! 1403: size_of = 2; \ ! 1404: fprintf(FILE, ":%c", sz[size_of]); \ ! 1405: } \ ! 1406: else \ ! 1407: fprintf(FILE, ":L"); } \ ! 1408: putc( ')', FILE ); } \ ! 1409: if (ireg != 0) { \ ! 1410: putc ('[', FILE); \ ! 1411: if (ireg != 0 && GET_CODE (ireg) == MULT) \ ! 1412: { scale = INTVAL (XEXP (ireg, 1)); \ ! 1413: ireg = XEXP (ireg, 0); } \ ! 1414: if (ireg != 0 && GET_CODE (ireg) == SIGN_EXTEND) \ ! 1415: fprintf (FILE, "%s:W", reg_names[REGNO (XEXP (ireg, 0))]); \ ! 1416: else if (ireg != 0) \ ! 1417: fprintf (FILE, "%s:L", reg_names[REGNO (ireg)]); \ ! 1418: fprintf (FILE, ":%c", sz[scale]); \ ! 1419: putc (']', FILE); \ ! 1420: } \ ! 1421: break; \ ! 1422: } \ ! 1423: else if (reg1 != 0 && GET_CODE (addr) == LABEL_REF) \ ! 1424: { fprintf (FILE, "pc@(L%d-LI%d-2:B)[%s:L:B]", \ ! 1425: CODE_LABEL_NUMBER (XEXP (addr, 0)), \ ! 1426: CODE_LABEL_NUMBER (XEXP (addr, 0)), \ ! 1427: reg_names[REGNO (reg1)]); \ ! 1428: break; } \ ! 1429: default: \ ! 1430: if (GET_CODE (addr) == CONST_INT \ ! 1431: && INTVAL (addr) < 0x8000 \ ! 1432: && INTVAL (addr) >= -0x8000) \ ! 1433: fprintf (FILE, "%d:W", INTVAL (addr)); \ ! 1434: else \ ! 1435: output_addr_const (FILE, addr); \ ! 1436: }} ! 1437: ! 1438: /* ! 1439: Local variables: ! 1440: version-control: t ! 1441: End: ! 1442: */ ! 1443:
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