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1.1 root 1: /* Definitions of target machine for GNU compiler, for the HP Spectrum.
2: Copyright (C) 1992 Free Software Foundation, Inc.
3: Contributed by Michael Tiemann ([email protected])
4: and Tim Moore ([email protected]) of the Center for
5: Software Science at the University of Utah.
6:
7: This file is part of GNU CC.
8:
9: GNU CC is free software; you can redistribute it and/or modify
10: it under the terms of the GNU General Public License as published by
11: the Free Software Foundation; either version 1, or (at your option)
12: any later version.
13:
14: GNU CC is distributed in the hope that it will be useful,
15: but WITHOUT ANY WARRANTY; without even the implied warranty of
16: MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17: GNU General Public License for more details.
18:
19: You should have received a copy of the GNU General Public License
20: along with GNU CC; see the file COPYING. If not, write to
21: the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
22:
23: enum cmp_type /* comparison type */
24: {
25: CMP_SI, /* compare integers */
26: CMP_SF, /* compare single precision floats */
27: CMP_DF, /* compare double precision floats */
28: CMP_MAX /* max comparison type */
29: };
30:
31: #define DBX_DEBUGGING_INFO
32: #define DEFAULT_GDB_EXTENSIONS 0
33:
34: /* Defines for a K&R CC */
35:
36: #ifdef OLD_CC
37: #define CPP_SPEC "%{!gnu:-nostdinc %{!nostinc:-I/usr/include}} \
38: %{gnu:%{nostdinc}} %{!gnu:-traditional} -Dvolatile=__volatile"
39: #define CC1_SPEC "%{!gnu:-traditional -fwritable-strings -fno-defer-pop} \
40: %{pg:} %{p:}"
41: #else
42: #define CC1_SPEC "%{pg:} %{p:}"
43: #endif
44:
45: /* Brain-dead loader */
46: #ifdef hpux8
47: #define LINK_SPEC "-u main -a archive"
48: #else
49: #define LINK_SPEC "-u main"
50: #endif
51:
52: /* Don't schedule insns unless explicitly asked...
53: it messes with debugging too much. Don't follow jumps except at
54: higher optimizations levels, since it's so slow to do so. */
55: #define OPTIMIZATION_OPTIONS(OPTIMIZE) \
56: (flag_omit_frame_pointer = (optimize >= 2), \
57: flag_cse_follow_jumps = (optimize >= 3), \
58: flag_schedule_insns = (optimize >= 4), \
59: flag_schedule_insns_after_reload = (optimize >= 5)) \
60:
61:
62: /* These compiler options take an argument. We ignore -target for now. */
63:
64: #define WORD_SWITCH_TAKES_ARG(STR) \
65: (!strcmp (STR, "Tdata") || !strcmp (STR, "include") \
66: || !strcmp (STR, "imacros") || !strcmp (STR, "target"))
67:
68: /* Names to predefine in the preprocessor for this target machine. */
69:
70: #ifdef hpux
71: #define CPP_PREDEFINES "-Dhp9000s800 -D__hp9000s800 -Dhp9k8 -DPWB -Dhpux -Dunix -D_HPUX_SOURCE"
72: #else
73: #define CPP_PREDEFINES "-Dhp9000s800 -D__hp9000s800 -Dhp9k8 -Dunix -D_HPUX_SOURCE -Dhp9000 -Dhp800 -Dspectrum -DREVARGV"
74: #endif
75:
76: /* Print subsidiary information on the compiler version in use. */
77:
78: #define TARGET_VERSION fprintf (stderr, " (hp9000s800)");
79:
80: /* Run-time compilation parameters selecting different hardware subsets.
81:
82: On the the hp9k800, we don't yet need any. But ... */
83:
84: extern int target_flags;
85:
86: /* compile code for PA-RISC 1.1 ("Snake") */
87:
88: #define TARGET_SNAKE (target_flags & 1)
89:
90: /* Macro to define tables used to set the flags.
91: This is a list in braces of pairs in braces,
92: each pair being { "NAME", VALUE }
93: where VALUE is the bits to set or minus the bits to clear.
94: An empty string NAME is used to identify the default VALUE. */
95:
96: #define TARGET_SWITCHES \
97: {{"snake", 1}, \
98: { "", TARGET_DEFAULT}}
99:
100: #define TARGET_DEFAULT 0
101:
102: /* target machine storage layout */
103:
104: /* Define this if most significant bit is lowest numbered
105: in instructions that operate on numbered bit-fields. */
106: #define BITS_BIG_ENDIAN 1
107:
108: /* Define this if most significant byte of a word is the lowest numbered. */
109: /* That is true on the hp9k8. */
110: #define BYTES_BIG_ENDIAN 1
111:
112: /* Define this if most significant word of a multiword number is numbered. */
113: /* For the hp9k800 we can decide arbitrarily
114: since there are no machine instructions for them. */
115: #define WORDS_BIG_ENDIAN 1
116:
117: /* number of bits in an addressible storage unit */
118: #define BITS_PER_UNIT 8
119:
120: /* Width in bits of a "word", which is the contents of a machine register.
121: Note that this is not necessarily the width of data type `int';
122: if using 16-bit ints on a 68000, this would still be 32.
123: But on a machine with 16-bit registers, this would be 16. */
124: #define BITS_PER_WORD 32
125:
126: /* Width of a word, in units (bytes). */
127: #define UNITS_PER_WORD 4
128:
129: /* Width in bits of a pointer.
130: See also the macro `Pmode' defined below. */
131: #define POINTER_SIZE 32
132:
133: /* Allocation boundary (in *bits*) for storing arguments in argument list. */
134: #define PARM_BOUNDARY 32
135:
136: /* Largest alignment required for any stack parameter, in bits.
137: Don't define this if it is equal to PARM_BOUNDRY */
138: #define MAX_PARM_BOUNDARY 64
139:
140: /* Boundary (in *bits*) on which stack pointer should be aligned. */
141: #define STACK_BOUNDARY (TARGET_SNAKE ? 512 : 64)
142:
143: /* Allocation boundary (in *bits*) for the code of a function. */
144: #define FUNCTION_BOUNDARY 32
145:
146: /* Alignment of field after `int : 0' in a structure. */
147: #define EMPTY_FIELD_BOUNDARY 32
148:
149: /* Every structure's size must be a multiple of this. */
150: #define STRUCTURE_SIZE_BOUNDARY 8
151:
152: /* A bitfield declared as `int' forces `int' alignment for the struct. */
153: #define PCC_BITFIELD_TYPE_MATTERS 1
154:
155: /* No data type wants to be aligned rounder than this. */
156: #define BIGGEST_ALIGNMENT 64
157:
158: /* Get around hp-ux assembler bug, and make strcpy of constants fast. */
159: #define CONSTANT_ALIGNMENT(CODE, TYPEALIGN) \
160: ((TYPEALIGN) < 32 ? 32 : (TYPEALIGN))
161:
162: /* Make arrays of chars word-aligned for the same reasons. */
163: #define DATA_ALIGNMENT(TYPE, ALIGN) \
164: (TREE_CODE (TYPE) == ARRAY_TYPE \
165: && TYPE_MODE (TREE_TYPE (TYPE)) == QImode \
166: && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN))
167:
168:
169: /* Define this if move instructions will actually fail to work
170: when given unaligned data. */
171: #define STRICT_ALIGNMENT
172:
173: /* Generate calls to memcpy, memcmp and memset. */
174: #define TARGET_MEM_FUNCTIONS
175:
176: /* Standard register usage. */
177:
178: /* Number of actual hardware registers.
179: The hardware registers are assigned numbers for the compiler
180: from 0 to just below FIRST_PSEUDO_REGISTER.
181: All registers that the compiler knows about must be given numbers,
182: even those that are not normally considered general registers.
183:
184: The hp9k800 has 32 fullword registers and 16 floating point
185: registers. The floating point registers hold either word or double
186: word values.
187:
188: 16 additional registers are reserved.
189:
190: PA-RISC 1.1 has 32 fullword registers and 32 floating point
191: registers. However, the floating point registers behave
192: differently: the left and right halves of registers are addressable
193: as 32 bit registers. So, we will set things up like the 68k which
194: has different fp units: define seperate register sets for the 1.0
195: and 1.1 fp units. */
196:
197: #define FIRST_PSEUDO_REGISTER 113 /* 32 + 16 1.0 regs + 64 1.1 regs + */
198: /* 1 shift reg */
199:
200: /* 1 for registers that have pervasive standard uses
201: and are not available for the register allocator.
202:
203: On the hp9k800, these are:
204: Reg 0 = 0 (hardware). However, 0 is used for condition code,
205: so is not fixed.
206: Reg 1 = ADDIL target/Temporary (hardware).
207: Reg 2 = Return Pointer
208: Reg 3 = Unused
209: Reg 4 = Frame Pointer (Gnu)
210: Reg 5-18 = Preserved Registers
211: Reg 19-22 = Temporary Registers
212: Reg 23-26 = Temporary/Parameter Registers
213: Reg 27 = Global Data Pointer (hp)
214: Reg 28 = Temporary/???/Return Value register
215: Reg 29 = Temporary/Static Chain/Return Value register
216: Reg 30 = stack pointer
217: Reg 31 = Temporary/Millicode Return Pointer (hp)
218:
219: Freg 0-3 = Status Registers
220: Freg 4-7 = Arguments/Return Value
221: Freg 8-11 = Temporary Registers
222: Freg 12-15 = Preserved Registers
223:
224: Freg 16-31 = Reserved
225:
226: On the Snake, fp regs are
227:
228: Freg 0-3 = Status Registers
229: Freg 4L-7R = Arguments/Return Value
230: Freg 8L-11R = Temporary Registers
231: Freg 12L-15R = Preserved Registers
232:
233: Freg 16L-31R = ?? Some partition of temporary and preserved; assume
234: preserved for now.
235:
236:
237: */
238:
239: #define FIXED_REGISTERS \
240: {0, 0, 1, 1, 1, 0, 0, 0, \
241: 0, 0, 0, 0, 0, 0, 0, 0, \
242: 0, 0, 0, 0, 0, 0, 0, 0, \
243: 0, 0, 0, 1, 0, 0, 1, 1, \
244: /* 1.0 fp registers */ \
245: 1, 1, 1, 1, 0, 0, 0, 0, \
246: 0, 0, 0, 0, 0, 0, 0, 0, \
247: /* 1.1 fp registers */ \
248: 1, 1, 1, 1, 1, 1, 1, 1, \
249: 0, 0, 0, 0, 0, 0, 0, 0, \
250: 0, 0, 0, 0, 0, 0, 0, 0, \
251: 0, 0, 0, 0, 0, 0, 0, 0, \
252: 0, 0, 0, 0, 0, 0, 0, 0, \
253: 0, 0, 0, 0, 0, 0, 0, 0, \
254: 0, 0, 0, 0, 0, 0, 0, 0, \
255: 0, 0, 0, 0, 0, 0, 0, 0, \
256: 1}
257:
258: /* 1 for registers not available across function calls.
259: These must include the FIXED_REGISTERS and also any
260: registers that can be used without being saved.
261: The latter must include the registers where values are returned
262: and the register where structure-value addresses are passed.
263: Aside from that, you can include as many other registers as you like. */
264: #define CALL_USED_REGISTERS \
265: {1, 1, 1, 1, 1, 0, 0, 0, \
266: 0, 0, 0, 0, 0, 0, 0, 0, \
267: 0, 0, 0, 1, 1, 1, 1, 1, \
268: 1, 1, 1, 1, 1, 1, 1, 1, \
269: /* 1.0 fp registers */ \
270: 1, 1, 1, 1, 1, 1, 1, 1, \
271: 1, 1, 1, 1, 0, 0, 0, 0, \
272: /* 1.1 fp registers */ \
273: 1, 1, 1, 1, 1, 1, 1, 1, \
274: 1, 1, 1, 1, 1, 1, 1, 1, \
275: 1, 1, 1, 1, 1, 1, 1, 1, \
276: 0, 0, 0, 0, 0, 0, 0, 0, \
277: 0, 0, 0, 0, 0, 0, 0, 0, \
278: 0, 0, 0, 0, 1, 1, 1, 1, \
279: 1, 1, 1, 1, 1, 1, 1, 1, \
280: 1, 1, 1, 1, 1, 1, 1, 1, \
281: 1}
282:
283: /* Make sure everything's fine if we *don't* have a given processor.
284: This assumes that putting a register in fixed_regs will keep the
285: compiler's mitts completely off it. We don't bother to zero it out
286: of register classes. */
287:
288: #define CONDITIONAL_REGISTER_USAGE \
289: { \
290: int i; \
291: HARD_REG_SET x; \
292: if (!TARGET_SNAKE) \
293: { \
294: COPY_HARD_REG_SET (x, reg_class_contents[(int)SNAKE_FP_REGS]);\
295: for (i = 0; i < FIRST_PSEUDO_REGISTER; i++ ) \
296: if (TEST_HARD_REG_BIT (x, i)) \
297: fixed_regs[i] = call_used_regs[i] = 1; \
298: } \
299: else \
300: { \
301: COPY_HARD_REG_SET (x, reg_class_contents[(int)FP_REGS]); \
302: for (i = 0; i < FIRST_PSEUDO_REGISTER; i++ ) \
303: if (TEST_HARD_REG_BIT (x, i)) \
304: fixed_regs[i] = call_used_regs[i] = 1; \
305: } \
306: }
307:
308: /* Allocated the call used registers first. This should minimize
309: the number of registers that need to be saved (as call used
310: registers will generally not be allocated across a call).
311:
312: It is possible that it would be wise to allocate the floating point
313: registers before the regular ones, but I doubt it matters. Same
314: comment for parameters versus normal. */
315:
316: #define REG_ALLOC_ORDER \
317: {19, 20, 21, 22, 23, 24, 25, 26, \
318: 27, 28, 29, 30, 31, 40, 41, 42, \
319: 43, 36, 37, 38, 39, \
320: 56, 57, 58, 59, 60, 61, 62, 63, \
321: 64, 65, 66, 67, 68, 69, 70, 71, \
322: 72, 73, 74, 75, 76, 77, 78, 79, \
323: 80, 81, 82, 83, 84, 85, 86, 87, \
324: 88, 89, 90, 91, 92, 93, 94, 95, \
325: 96, 97, 98, 99, 100, 101, 102, 103, \
326: 104, 105, 106, 107, 108, 109, 110, 111,\
327: 5, 6, 7, \
328: 8, 9, 10, 11, 12, 13, 14, 15, \
329: 16, 17, 18, 44, 45, 46, 47, \
330: 48, 49, 50, 51, 52, 53, 54, 55, \
331: 1, \
332: 2, 3, 4, 32, 33, 34, 35, 0, \
333: 112}
334:
335:
336: /* Return number of consecutive hard regs needed starting at reg REGNO
337: to hold something of mode MODE.
338: This is ordinarily the length in words of a value of mode MODE
339: but can be less for certain modes in special long registers.
340:
341: On the hp9k800, ordinary registers hold 32 bits worth;
342: The floating point registers are 64 bits wide. Snake fp regs are 32
343: bits wide */
344: #define HARD_REGNO_NREGS(REGNO, MODE) \
345: (((REGNO) < 32 || (REGNO) >= 48) \
346: ? ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD) : 1)
347:
348: /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE.
349: On the hp9k800, the cpu registers can hold any mode. We
350: force this to be an even register is it cannot hold the full mode. */
351: #define HARD_REGNO_MODE_OK(REGNO, MODE) \
352: ((REGNO) == 0 ? (MODE) == CCmode || (MODE) == CCFPmode \
353: : (REGNO) < 32 ? ((GET_MODE_SIZE (MODE) <= 4) ? 1 : ((REGNO) & 1) == 0)\
354: : (REGNO) < 48 ? (GET_MODE_SIZE (MODE) >= 4) \
355: : (GET_MODE_SIZE (MODE) > 4 ? ((REGNO) & 1) == 0 \
356: : GET_MODE_SIZE (MODE) == 4))
357:
358: /* Value is 1 if it is a good idea to tie two pseudo registers
359: when one has mode MODE1 and one has mode MODE2.
360: If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
361: for any hard reg, then this must be 0 for correct output. */
362: #define MODES_TIEABLE_P(MODE1, MODE2) \
363: ((MODE1) == (MODE2) || GET_MODE_CLASS (MODE1) == GET_MODE_CLASS (MODE2))
364:
365: /* Specify the registers used for certain standard purposes.
366: The values of these macros are register numbers. */
367:
368: /* the hp9k800 pc isn't overloaded on a register that the compiler knows about. */
369: /* #define PC_REGNUM */
370:
371: /* Register to use for pushing function arguments. */
372: #define STACK_POINTER_REGNUM 30
373:
374: /* Base register for access to local variables of the function. */
375: #define FRAME_POINTER_REGNUM 4
376:
377: /* Value should be nonzero if functions must have frame pointers.
378: Zero means the frame pointer need not be set up (and parms
379: may be accessed via the stack pointer) in functions that seem suitable.
380: This is computed in `reload', in reload1.c. */
381: extern int leaf_function;
382:
383: #define FRAME_POINTER_REQUIRED (current_function_calls_alloca)
384:
385:
386: /* C statement to store the difference between the frame pointer
387: and the stack pointer values immediately after the function prologue.
388:
389: Note, we always pretend that this is a leaf function because if
390: it's not, there's no point in trying to eliminate the
391: frame pointer. If it is a leaf function, we guessed right! */
392: #define INITIAL_FRAME_POINTER_OFFSET(VAR) \
393: do { (VAR) = compute_frame_size (get_frame_size (), 1); } while (0)
394:
395: /* Base register for access to arguments of the function. */
396: #define ARG_POINTER_REGNUM 4
397:
398: /* Register in which static-chain is passed to a function. */
399: /* ??? */
400: #define STATIC_CHAIN_REGNUM 29
401:
402: /* Register which holds offset table for position-independent
403: data references. */
404:
405: #define PIC_OFFSET_TABLE_REGNUM 18
406:
407: #define INITIALIZE_PIC initialize_pic ()
408: #define FINALIZE_PIC finalize_pic ()
409:
410: /* Register in which address to store a structure value
411: is passed to a function. */
412: #define STRUCT_VALUE_REGNUM 28
413:
414: /* Define the classes of registers for register constraints in the
415: machine description. Also define ranges of constants.
416:
417: One of the classes must always be named ALL_REGS and include all hard regs.
418: If there is more than one class, another class must be named NO_REGS
419: and contain no registers.
420:
421: The name GENERAL_REGS must be the name of a class (or an alias for
422: another name such as ALL_REGS). This is the class of registers
423: that is allowed by "g" or "r" in a register constraint.
424: Also, registers outside this class are allocated only when
425: instructions express preferences for them.
426:
427: The classes must be numbered in nondecreasing order; that is,
428: a larger-numbered class must never be contained completely
429: in a smaller-numbered class.
430:
431: For any two classes, it is very desirable that there be another
432: class that represents their union. */
433:
434: /* The hp9k800 has four kinds of registers: general regs, 1.0 fp regs,
435: 1.1 fp regs, and the high 1.1 fp regs, to which the operands of
436: fmpyadd and fmpysub are restricted. */
437:
438: enum reg_class { NO_REGS, R1_REGS, GENERAL_REGS, FP_REGS, HI_SNAKE_FP_REGS,
439: SNAKE_FP_REGS, FP_OR_SNAKE_FP_REGS, SHIFT_REGS, ALL_REGS, LIM_REG_CLASSES};
440:
441: #define N_REG_CLASSES (int) LIM_REG_CLASSES
442:
443: /* Give names of register classes as strings for dump file. */
444:
445: #define REG_CLASS_NAMES \
446: { "NO_REGS", "R1_REGS", "GENERAL_REGS", "FP_REGS", "HI_SNAKE_FP_REGS",\
447: "SNAKE_FP_REGS", "FP_OR_SNAKE_FP_REGS", "SHIFT_REGS", "ALL_REGS"}
448:
449: /* Define which registers fit in which classes.
450: This is an initializer for a vector of HARD_REG_SET
451: of length N_REG_CLASSES. Register 0, the "condition code" register,
452: is in no class. */
453:
454: #define REG_CLASS_CONTENTS \
455: { {0, 0, 0, 0}, /* NO_REGS */ \
456: {0x2, 0, 0, 0}, /* R1_REGS */ \
457: {-2, 0, 0, 0}, /* GENERAL_REGS */ \
458: {0, 0xffff, 0, 0}, /* FP_REGS */ \
459: {0, 0, 0xffff0000, 0xffff}, /* HI_SNAKE_FP_REGS */ \
460: {0, 0xffff0000, ~0, 0xffff}, /* SNAKE_FP_REGS */ \
461: {0, ~0, ~0, 0xffff}, /* FP_OR_SNAKE_FP_REGS */\
462: {0, 0, 0, 0x10000}, /* SHIFT_REGS */ \
463: {-2, ~0, ~0, 0x1ffff}} /* ALL_REGS */
464:
465: /* The same information, inverted:
466: Return the class number of the smallest class containing
467: reg number REGNO. This could be a conditional expression
468: or could index an array. */
469:
470: #define REGNO_REG_CLASS(REGNO) \
471: ((REGNO) == 0 ? NO_REGS \
472: : (REGNO) == 1 ? R1_REGS \
473: : (REGNO) < 32 ? GENERAL_REGS \
474: : (REGNO) < 48 ? FP_REGS \
475: : (REGNO) < 80 ? SNAKE_FP_REGS \
476: : (REGNO) < 112 ? HI_SNAKE_FP_REGS \
477: : SHIFT_REGS)
478:
479: /* The class value for index registers, and the one for base regs. */
480: #define INDEX_REG_CLASS GENERAL_REGS
481: #define BASE_REG_CLASS GENERAL_REGS
482:
483: /* Get reg_class from a letter such as appears in the machine description. */
484:
485: #define REG_CLASS_FROM_LETTER(C) \
486: ((C) == 'r' ? GENERAL_REGS : \
487: ((C) == 'f' ? (!TARGET_SNAKE ? FP_REGS : NO_REGS) : \
488: ((C) == 'x' ? (TARGET_SNAKE ? SNAKE_FP_REGS : NO_REGS) : \
489: ((C) == 'y' ? (TARGET_SNAKE ? HI_SNAKE_FP_REGS : NO_REGS) :\
490: ((C) == 'q' ? SHIFT_REGS : \
491: ((C) == 'a' ? R1_REGS : NO_REGS))))))
492:
493: /* The letters I, J, K, L and M in a register constraint string
494: can be used to stand for particular ranges of immediate operands.
495: This macro defines what the ranges are.
496: C is the letter, and VALUE is a constant value.
497: Return 1 if VALUE is in the range specified by C.
498:
499: HP9000/800 immediate field sizes:
500: 5 bits: scalar/floating short loads + stores; deposit; conditional branch
501: 11 bits: arithmetic immediate, compare immediate
502: 14 bits: loads and stores; load offset
503: 21 bits: load and add immediate long (but this isn't really used)
504: (there are also 13-bit and 26-bit immediates but only in system instructions)
505:
506: `I' is used for the 11 bit constants.
507: `J' is used for the 14 bit constants.
508: `K' is used for unsigned 5 bit constants (extract/deposit operands).
509: `L' is used for the 5 bit constants.
510: `M' is used for 0. */
511:
512: #define CONST_OK_FOR_LETTER_P(VALUE, C) \
513: ((C) == 'I' ? (unsigned) ((VALUE) + 0x400) < 0x800 \
514: : (C) == 'J' ? (unsigned) ((VALUE) + 0x2000) < 0x4000 \
515: : (C) == 'K' ? (unsigned) (VALUE) < 0x20 \
516: : (C) == 'L' ? (unsigned) ((VALUE) + 0x10) < 0x20 \
517: : (C) == 'M' ? (VALUE) == 0 \
518: : 0)
519:
520: /* Similar, but for floating constants, and defining letters G and H.
521: Here VALUE is the CONST_DOUBLE rtx itself. */
522:
523: #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
524: ((C) == 'G' && XINT (VALUE, 0) == 0 && XINT (VALUE, 1) == 0)
525:
526: /* Given an rtx X being reloaded into a reg required to be
527: in class CLASS, return the class of reg to actually use.
528: In general this is just CLASS; but on some machines
529: in some cases it is preferable to use a more restrictive class. */
530: #define PREFERRED_RELOAD_CLASS(X,CLASS) (CLASS)
531:
532: /* Return the register class of a scratch register needed to copy IN into
533: or out of a register in CLASS in MODE. If it can be done directly,
534: NO_REGS is returned. */
535:
536: #define SECONDARY_RELOAD_CLASS(CLASS,MODE,IN) \
537: secondary_reload_class (CLASS, MODE, IN)
538:
539: /* Return the maximum number of consecutive registers
540: needed to represent mode MODE in a register of class CLASS. */
541: #define CLASS_MAX_NREGS(CLASS, MODE) \
542: ((CLASS) == FP_REGS ? 1 : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))
543:
544: /* Stack layout; function entry, exit and calling. */
545:
546: /* Define this if pushing a word on the stack
547: makes the stack pointer a smaller address. */
548: /* #define STACK_GROWS_DOWNWARD */
549:
550: /* Believe it or not. */
551: #define ARGS_GROW_DOWNWARD
552:
553: /* Define this if the nominal address of the stack frame
554: is at the high-address end of the local variables;
555: that is, each additional local variable allocated
556: goes at a more negative offset in the frame. */
557: /* #define FRAME_GROWS_DOWNWARD */
558:
559: /* Offset within stack frame to start allocating local variables at.
560: If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
561: first local allocated. Otherwise, it is the offset to the BEGINNING
562: of the first local allocated. */
563: #define STARTING_FRAME_OFFSET 8
564:
565: /* If we generate an insn to push BYTES bytes,
566: this says how many the stack pointer really advances by.
567: On the hp9k800, don't define this because there are no push insns. */
568: /* #define PUSH_ROUNDING(BYTES) */
569:
570: /* Offset of first parameter from the argument pointer register value.
571: This value will be negated because the arguments grow down.
572: Also note that on STACK_GROWS_UPWARD machines (such as this one)
573: this is the distance from the frame pointer to the end of the first
574: argument, not it's beginning. To get the real offset of the first
575: argument, the size of the argument must be added.
576:
577: ??? Have to check on this.*/
578:
579: /* #define FIRST_PARM_OFFSET(FNDECL) 36 */
580: #define FIRST_PARM_OFFSET(FNDECL) -32
581:
582: /* Absolute value of offset from top-of-stack address to location to store the
583: function parameter if it can't go in a register.
584: Addresses for following parameters are computed relative to this one. */
585: /* #define FIRST_PARM_CALLER_OFFSET(FNDECL) 36 */
586: #define FIRST_PARM_CALLER_OFFSET(FNDECL) -32
587:
588:
589: /* When a parameter is passed in a register, stack space is still
590: allocated for it. */
591: #define REG_PARM_STACK_SPACE(DECL) 16
592:
593: /* Define this if the above stack space is to be considered part of the
594: space allocated by the caller. */
595: #define OUTGOING_REG_PARM_STACK_SPACE
596:
597: /* Keep the stack pointer constant throughout the function.
598: This is both an optimization and a neccessity: longjmp
599: doesn't behave itself when the stack pointer moves within
600: the function! */
601: #define ACCUMULATE_OUTGOING_ARGS
602:
603: /* The weird HPPA calling conventions require a minimum of 48 bytes on
604: the stack: 16 bytes for register saves, and 32 bytes for magic.
605: This is the difference between the logical top of stack and the
606: actual sp. */
607: #define STACK_POINTER_OFFSET -32
608:
609: #define STACK_DYNAMIC_OFFSET(FNDECL) \
610: ((STACK_POINTER_OFFSET) - current_function_outgoing_args_size)
611:
612: /* Value is 1 if returning from a function call automatically
613: pops the arguments described by the number-of-args field in the call.
614: FUNTYPE is the data type of the function (as a tree),
615: or for a library call it is an identifier node for the subroutine name. */
616:
617: #define RETURN_POPS_ARGS(FUNTYPE,SIZE) 0
618:
619: /* Define how to find the value returned by a function.
620: VALTYPE is the data type of the value (as a tree).
621: If the precise function being called is known, FUNC is its FUNCTION_DECL;
622: otherwise, FUNC is 0. */
623:
624: /* On the hp9k800 the value is found in register(s) 28(-29), unless
625: the mode is SF or DF. Then the value is returned in fr4 (36, ) */
626:
627:
628: #define FUNCTION_VALUE(VALTYPE, FUNC) \
629: gen_rtx (REG, TYPE_MODE (VALTYPE), ((TYPE_MODE (VALTYPE) == SFmode ||\
630: TYPE_MODE (VALTYPE) == DFmode) ? \
631: (TARGET_SNAKE ? 56 : 36) : 28))
632:
633: #define FUNCTION_OUTGOING_VALUE(VALTYPE, FUNC) \
634: FUNCTION_VALUE(VALTYPE, FUNC)
635:
636: /* Define how to find the value returned by a library function
637: assuming the value has mode MODE. */
638:
639: #define LIBCALL_VALUE(MODE) \
640: gen_rtx (REG, MODE, (MODE == SFmode || MODE == DFmode ?\
641: (TARGET_SNAKE ? 56 : 36) : 28))
642:
643: /* 1 if N is a possible register number for a function value
644: as seen by the caller. */
645:
646: #define FUNCTION_VALUE_REGNO_P(N) ((N) == 28 || (N) == 36 || (N) == 56)
647:
648: /* 1 if N is a possible register number for function argument passing. */
649:
650: #define FUNCTION_ARG_REGNO_P(N) (((N) >= 23 && (N) <= 26) || \
651: ((N) >= 36 && (N) <= 39) || \
652: ((N) >= 56 && (N) <= 63))
653:
654: /* Define a data type for recording info about an argument list
655: during the scan of that argument list. This data type should
656: hold all necessary information about the function itself
657: and about the args processed so far, enough to enable macros
658: such as FUNCTION_ARG to determine where the next arg should go.
659:
660: On the hp9k800, this is a single integer, which is a number of words
661: of arguments scanned so far (including the invisible argument,
662: if any, which holds the structure-value-address).
663: Thus 4 or more means all following args should go on the stack. */
664:
665: #define CUMULATIVE_ARGS int
666:
667: /* Initialize a variable CUM of type CUMULATIVE_ARGS
668: for a call to a function whose data type is FNTYPE.
669: For a library call, FNTYPE is 0.
670: */
671:
672: #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME) ((CUM) = 0)
673:
674: /* Figure out the size in words of the function argument. */
675:
676: #define FUNCTION_ARG_SIZE(MODE, TYPE) \
677: ((((MODE) != BLKmode ? GET_MODE_SIZE (MODE) : int_size_in_bytes (TYPE))+3)/4)
678:
679: /* Update the data in CUM to advance over an argument
680: of mode MODE and data type TYPE.
681: (TYPE is null for libcalls where that information may not be available.) */
682:
683: #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
684: (((((CUM) & 01) && (TYPE) != 0 && TYPE_ALIGN (TYPE) > BITS_PER_WORD)\
685: && (CUM)++), (CUM) += FUNCTION_ARG_SIZE(MODE, TYPE))
686:
687: /* Determine where to put an argument to a function.
688: Value is zero to push the argument on the stack,
689: or a hard register in which to store the argument.
690:
691: MODE is the argument's machine mode.
692: TYPE is the data type of the argument (as a tree).
693: This is null for libcalls where that information may
694: not be available.
695: CUM is a variable of type CUMULATIVE_ARGS which gives info about
696: the preceding args and about the function being called.
697: NAMED is nonzero if this argument is a named parameter
698: (otherwise it is an extra parameter matching an ellipsis). */
699:
700: /* On the hp9k800 the first four words of args are normally in registers
701: and the rest are pushed. But any arg that won't entirely fit in regs
702: is pushed. */
703:
704: #define FUNCTION_ARG_PADDING(MODE, TYPE) function_arg_padding ((MODE), (TYPE))
705:
706: #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
707: (4 >= ((CUM) + FUNCTION_ARG_SIZE ((MODE), (TYPE))) \
708: ? gen_rtx (REG, \
709: (MODE), \
710: ((MODE) == SFmode ? \
711: (TARGET_SNAKE ? 56 + 2 * (CUM) : 36 + (CUM)) : \
712: ((MODE) == DFmode ? ((CUM) ? \
713: (TARGET_SNAKE ? 62 : 39) : \
714: (TARGET_SNAKE ? 58 : 37)) : \
715: (27 - (CUM) - FUNCTION_ARG_SIZE ((MODE), (TYPE)))))) \
716: : 0)
717:
718: /* Define where a function finds its arguments.
719: This would be different from FUNCTION_ARG if we had register windows. */
720:
721: #define FUNCTION_INCOMING_ARG(CUM, MODE, TYPE, NAMED) \
722: FUNCTION_ARG (CUM, MODE, TYPE, NAMED)
723:
724: /* For an arg passed partly in registers and partly in memory,
725: this is the number of registers used.
726: For args passed entirely in registers or entirely in memory, zero. */
727:
728: #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) 0
729:
730: /* If defined, a C expression that gives the alignment boundary, in
731: bits, of an argument with the specified mode and type. If it is
732: not defined, `PARM_BOUNDARY' is used for all arguments. */
733:
734: #define FUNCTION_ARG_BOUNDARY(MODE, TYPE) \
735: (((TYPE) != 0) \
736: ? ((TYPE_ALIGN(TYPE) <= PARM_BOUNDARY) \
737: ? PARM_BOUNDARY \
738: : TYPE_ALIGN(TYPE)) \
739: : ((GET_MODE_ALIGNMENT(MODE) <= PARM_BOUNDARY) \
740: ? PARM_BOUNDARY \
741: : GET_MODE_ALIGNMENT(MODE)))
742:
743: /* Arguments larger than eight bytes are passed by invisible reference */
744:
745: #define FUNCTION_ARG_PASS_BY_REFERENCE(CUM, MODE, TYPE, NAMED) \
746: ((TYPE) ? int_size_in_bytes (TYPE) > 8 : GET_MODE_SIZE (MODE) > 8)
747:
748: extern struct rtx_def *hppa_compare_op0, *hppa_compare_op1;
749: extern enum cmp_type hppa_branch_type;
750:
751: /* Output the label for a function definition. */
752: #ifdef hpux8
753: #define ASM_DOUBLE_ARG_DESCRIPTORS(FILE, ARG0, ARG1) \
754: do { fprintf (FILE, ",ARGW%d=FR", (ARG0)); \
755: fprintf (FILE, ",ARGW%d=FU", (ARG1));} while (0)
756: #else
757: #define ASM_DOUBLE_ARG_DESCRIPTORS(FILE, ARG0, ARG1) \
758: do { fprintf (FILE, ",ARGW%d=FU", (ARG0)); \
759: fprintf (FILE, ",ARGW%d=FR", (ARG1));} while (0)
760: #endif
761:
762: #define ASM_DECLARE_FUNCTION_NAME(FILE, NAME, DECL) \
763: do { tree fntype = DECL_RESULT (DECL); \
764: tree tree_type = TREE_TYPE (DECL); \
765: tree parm; \
766: int i; \
767: fputs ("\t.EXPORT ", FILE); assemble_name (FILE, NAME); \
768: fputs (",PRIV_LEV=3", FILE); \
769: for (parm = DECL_ARGUMENTS (DECL), i = 0; parm && i < 4; \
770: parm = TREE_CHAIN (parm), i++) \
771: { \
772: if (TYPE_MODE (DECL_ARG_TYPE (parm)) == SFmode) \
773: fprintf (FILE, ",ARGW%d=FR", i); \
774: else if (TYPE_MODE (DECL_ARG_TYPE (parm)) == DFmode) \
775: { \
776: if (i == 0 || i == 2) \
777: { \
778: ASM_DOUBLE_ARG_DESCRIPTORS (FILE, i++, i); \
779: } \
780: else if (i == 1) \
781: { \
782: ASM_DOUBLE_ARG_DESCRIPTORS (FILE, ++i, ++i); \
783: } \
784: } \
785: else \
786: fprintf (FILE, ",ARGW%d=GR", i); \
787: } \
788: /* anonymous args */ \
789: if (TYPE_ARG_TYPES (tree_type) != 0 \
790: && (TREE_VALUE (tree_last (TYPE_ARG_TYPES (tree_type))) \
791: != void_type_node)) \
792: { \
793: for (; i < 4; i++) \
794: fprintf (FILE, ",ARGW%d=GR", i); \
795: } \
796: if (TYPE_MODE (fntype) == DFmode) \
797: fprintf (FILE, ",RTNVAL=FR"); \
798: else if (TYPE_MODE (fntype) == SFmode) \
799: fprintf (FILE, ",RTNVAL=FU"); \
800: else if (fntype != void_type_node) \
801: fprintf (FILE, ",RTNVAL=GR"); \
802: fputs ("\n", FILE); \
803: ASM_OUTPUT_LABEL (FILE, NAME);} while (0)
804:
805: /* Two views of the size of the current frame. */
806: extern int actual_fsize;
807: extern int apparent_fsize;
808:
809: /* This macro generates the assembly code for function entry.
810: FILE is a stdio stream to output the code to.
811: SIZE is an int: how many units of temporary storage to allocate.
812: Refer to the array `regs_ever_live' to determine which registers
813: to save; `regs_ever_live[I]' is nonzero if register number I
814: is ever used in the function. This macro is responsible for
815: knowing which registers should not be saved even if used. */
816:
817: /* On SPARC, move-double insns between fpu and cpu need an 8-byte block
818: of memory. If any fpu reg is used in the function, we allocate
819: such a block here, at the bottom of the frame, just in case it's needed.
820:
821: If this function is a leaf procedure, then we may choose not
822: to do a "save" insn. The decision about whether or not
823: to do this is made in regclass.c. */
824:
825: #define FUNCTION_PROLOGUE(FILE, SIZE) \
826: output_function_prologue (FILE, SIZE, leaf_function)
827:
828: /* Output assembler code to FILE to increment profiler label # LABELNO
829: for profiling a function entry.
830:
831: Because HPUX _mcount is so different, we actually emit the
832: profiling code in function_prologue. This just stores LABELNO for
833: that. */
834:
835: #ifdef hp800 /* Don't have the proper libraries yet */
836: #define FUNCTION_PROFILER(FILE, LABELNO) {}
837: #else
838: #define PROFILE_BEFORE_PROLOGUE
839: #define FUNCTION_PROFILER(FILE, LABELNO) \
840: { extern int hp_profile_labelno; hp_profile_labelno = (LABELNO);}
841: #endif
842:
843: /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
844: the stack pointer does not matter. The value is tested only in
845: functions that have frame pointers.
846: No definition is equivalent to always zero. */
847:
848: extern int may_call_alloca;
849: extern int current_function_pretend_args_size;
850:
851: #define EXIT_IGNORE_STACK \
852: (get_frame_size () != 0 \
853: || current_function_calls_alloca || current_function_outgoing_args_size)
854:
855:
856: /* This macro generates the assembly code for function exit,
857: on machines that need it. If FUNCTION_EPILOGUE is not defined
858: then individual return instructions are generated for each
859: return statement. Args are same as for FUNCTION_PROLOGUE.
860:
861: The function epilogue should not depend on the current stack pointer!
862: It should use the frame pointer only. This is mandatory because
863: of alloca; we also take advantage of it to omit stack adjustments
864: before returning. */
865:
866: /* This declaration is needed due to traditional/ANSI
867: incompatibilities which cannot be #ifdefed away
868: because they occur inside of macros. Sigh. */
869: extern union tree_node *current_function_decl;
870:
871: #define FUNCTION_EPILOGUE(FILE, SIZE) \
872: output_function_epilogue (FILE, SIZE, leaf_function)
873: #define DELAY_SLOTS_FOR_EPILOGUE 1
874: #define ELIGIBLE_FOR_EPILOGUE_DELAY(trial, slots_filled) \
875: eligible_for_epilogue_delay (trial, slots_filled)
876:
877: /* Output assembler code for a block containing the constant parts
878: of a trampoline, leaving space for the variable parts. */
879:
880: #define TRAMPOLINE_TEMPLATE(FILE) {}
881:
882: /* Length in units of the trampoline for entering a nested function. */
883:
884: #define TRAMPOLINE_SIZE 0
885:
886: /* Emit RTL insns to initialize the variable parts of a trampoline.
887: FNADDR is an RTX for the address of the function's pure code.
888: CXT is an RTX for the static chain value for the function.
889:
890: This takes 16 insns: 2 shifts & 2 ands (to split up addresses), 4 sethi
891: (to load in opcodes), 4 iors (to merge address and opcodes), and 4 writes
892: (to store insns). This is a bit excessive. Perhaps a different
893: mechanism would be better here. */
894: #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) {}
895:
896: /* Emit code for a call to builtin_saveregs. We must emit USE insns which
897: reference the 4 integer arg registers and 4 fp arg registers.
898: Ordinarily they are not call used registers, but they are for
899: _builtin_saveregs, so we must make this explicit. */
900:
901:
902: #define EXPAND_BUILTIN_SAVEREGS(ARGLIST) \
903: (emit_insn (gen_rtx (USE, VOIDmode, gen_rtx (REG, TImode, 23))), \
904: (TARGET_SNAKE ? \
905: (emit_insn (gen_rtx (USE, VOIDmode, gen_rtx (REG, DFmode, 56))), \
906: emit_insn (gen_rtx (USE, VOIDmode, gen_rtx (REG, DFmode, 58))), \
907: emit_insn (gen_rtx (USE, VOIDmode, gen_rtx (REG, DFmode, 60))), \
908: emit_insn (gen_rtx (USE, VOIDmode, gen_rtx (REG, DFmode, 62)))) : \
909: (emit_insn (gen_rtx (USE, VOIDmode, gen_rtx (REG, DFmode, 36))), \
910: emit_insn (gen_rtx (USE, VOIDmode, gen_rtx (REG, DFmode, 37))), \
911: emit_insn (gen_rtx (USE, VOIDmode, gen_rtx (REG, DFmode, 38))), \
912: emit_insn (gen_rtx (USE, VOIDmode, gen_rtx (REG, DFmode, 39))))))
913:
914:
915:
916: /* Addressing modes, and classification of registers for them. */
917:
918: #define HAVE_POST_INCREMENT
919: #define HAVE_POST_DECREMENT
920:
921: #define HAVE_PRE_DECREMENT
922: #define HAVE_PRE_INCREMENT
923:
924: /* Macros to check register numbers against specific register classes. */
925:
926: /* These assume that REGNO is a hard or pseudo reg number.
927: They give nonzero only if REGNO is a hard reg of the suitable class
928: or a pseudo reg currently allocated to a suitable hard reg.
929: Since they use reg_renumber, they are safe only once reg_renumber
930: has been allocated, which happens in local-alloc.c. */
931:
932: #define REGNO_OK_FOR_INDEX_P(REGNO) \
933: ((REGNO) < 32 || (unsigned) reg_renumber[REGNO] < 32)
934: #define REGNO_OK_FOR_BASE_P(REGNO) \
935: ((REGNO) < 32 || (unsigned) reg_renumber[REGNO] < 32)
936: #define REGNO_OK_FOR_FP_P(REGNO) \
937: (((REGNO) >= 32 || reg_renumber[REGNO] >= 32)\
938: && ((REGNO) <= 111 || reg_renumber[REGNO] <= 111))
939:
940: /* Now macros that check whether X is a register and also,
941: strictly, whether it is in a specified class.
942:
943: These macros are specific to the the hp9k800, and may be used only
944: in code for printing assembler insns and in conditions for
945: define_optimization. */
946:
947: /* 1 if X is an fp register. */
948:
949: #define FP_REG_P(X) (REG_P (X) && REGNO_OK_FOR_FP_P (REGNO (X)))
950:
951: /* Maximum number of registers that can appear in a valid memory address. */
952:
953: #define MAX_REGS_PER_ADDRESS 2
954:
955: /* Recognize any constant value that is a valid address. */
956:
957: #define CONSTANT_ADDRESS_P(X) CONSTANT_P (X)
958:
959: /* Nonzero if the constant value X is a legitimate general operand.
960: It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE. */
961:
962: /*#define LEGITIMATE_CONSTANT_P(X) (1)*/
963: #define LEGITIMATE_CONSTANT_P(X) \
964: (GET_CODE (X) != CONST_DOUBLE)
965:
966: /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
967: and check its validity for a certain class.
968: We have two alternate definitions for each of them.
969: The usual definition accepts all pseudo regs; the other rejects
970: them unless they have been allocated suitable hard regs.
971: The symbol REG_OK_STRICT causes the latter definition to be used.
972:
973: Most source files want to accept pseudo regs in the hope that
974: they will get allocated to the class that the insn wants them to be in.
975: Source files for reload pass need to be strict.
976: After reload, it makes no difference, since pseudo regs have
977: been eliminated by then. */
978:
979: /* Optional extra constraints for this machine. Borrowed from tm-sparc.h.
980:
981: For the HPPA, `Q' means that this is a memory operand but not a
982: symbolic memory operand. Note that an unassigned pseudo register
983: is such a memory operand. Needed because reload will generate
984: these things in insns and then not re-recognize the insns, causing
985: constrain_operands to fail.
986:
987: `R' handles the LO_SUM which can be an address for `Q'.
988:
989: `S' handles constraints for calls.
990:
991: `T' is for fp load and store addresses.*/
992:
993: #ifndef REG_OK_STRICT
994:
995: /* Nonzero if X is a hard reg that can be used as an index
996: or if it is a pseudo reg. */
997: #define REG_OK_FOR_INDEX_P(X) ((unsigned) REGNO (X) - 32 >= 32)
998: /* Nonzero if X is a hard reg that can be used as a base reg
999: or if it is a pseudo reg. */
1000: #define REG_OK_FOR_BASE_P(X) ((unsigned) REGNO (X) - 32 >= 32)
1001:
1002: #define EXTRA_CONSTRAINT(OP, C) \
1003: ((C) == 'Q' ? \
1004: ((GET_CODE (OP) == MEM \
1005: && memory_address_p (GET_MODE (OP), XEXP (OP, 0)) \
1006: && ! symbolic_memory_operand (OP, VOIDmode))) \
1007: : ((C) == 'R' ? \
1008: (GET_CODE (OP) == LO_SUM \
1009: && GET_CODE (XEXP (OP, 0)) == REG \
1010: && REG_OK_FOR_BASE_P (XEXP (OP, 0))) \
1011: : ((C) == 'S' \
1012: ? CONSTANT_P (OP) || memory_address_p (Pmode, OP)\
1013: : ((C) == 'T' ? short_memory_operand (OP, VOIDmode) : 0))))\
1014:
1015:
1016: #else
1017:
1018: /* Nonzero if X is a hard reg that can be used as an index. */
1019: #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
1020: /* Nonzero if X is a hard reg that can be used as a base reg. */
1021: #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
1022:
1023: #define EXTRA_CONSTRAINT(OP, C) \
1024: (((C) == 'Q' || (C) == 'T') ? \
1025: (GET_CODE (OP) == REG ? \
1026: (REGNO (OP) >= FIRST_PSEUDO_REGISTER \
1027: && reg_renumber[REGNO (OP)] < 0) \
1028: : GET_CODE (OP) == MEM) \
1029: : ((C) == 'R' ? \
1030: (GET_CODE (OP) == LO_SUM \
1031: && GET_CODE (XEXP (OP, 0)) == REG \
1032: && REG_OK_FOR_BASE_P (XEXP (OP, 0))) \
1033: : (CONSTANT_P (OP) \
1034: || (GET_CODE (OP) == REG && reg_renumber[REGNO (OP)] > 0)\
1035: || strict_memory_address_p (Pmode, OP))))
1036:
1037: #endif
1038:
1039: /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
1040: that is a valid memory address for an instruction.
1041: The MODE argument is the machine mode for the MEM expression
1042: that wants to use this address.
1043:
1044: On the hp9k800, the actual legitimate addresses must be
1045: REG+REG, REG+(REG*SCALE) or REG+SMALLINT.
1046: But we can treat a SYMBOL_REF as legitimate if it is part of this
1047: function's constant-pool, because such addresses can actually
1048: be output as REG+SMALLINT. */
1049:
1050: #define VAL_5_BITS_P(X) ((unsigned)(X) + 0x10 < 0x20)
1051: #define INT_5_BITS(X) VAL_5_BITS_P (INTVAL (X))
1052:
1053: #define VAL_U5_BITS_P(X) ((unsigned)(X) < 0x20)
1054: #define INT_U5_BITS(X) VAL_U5_BITS_P (INTVAL (X))
1055:
1056: #define VAL_11_BITS_P(X) ((unsigned)(X) + 0x400 < 0x800)
1057: #define INT_11_BITS(X) VAL_11_BITS_P (INTVAL (X))
1058:
1059: #define VAL_14_BITS_P(X) ((unsigned)(X) + 0x2000 < 0x4000)
1060: #define INT_14_BITS(X) VAL_14_BITS_P (INTVAL (X))
1061:
1062: #define FITS_14_BITS(X) \
1063: (GET_CODE (X) == CONST_INT && INT_14_BITS (X))
1064:
1065: #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
1066: { \
1067: if (REG_P (X) && REG_OK_FOR_BASE_P (X) \
1068: || ((GET_CODE (X) == PRE_DEC || GET_CODE (X) == POST_DEC \
1069: || GET_CODE (X) == PRE_INC || GET_CODE (X) == POST_INC) \
1070: && REG_P (XEXP (X, 0)) \
1071: && REG_OK_FOR_BASE_P (XEXP (X, 0)))) \
1072: goto ADDR; \
1073: else if (GET_CODE (X) == PLUS) \
1074: { \
1075: rtx base = 0, index; \
1076: if (flag_pic && XEXP (X, 0) == pic_offset_table_rtx)\
1077: { \
1078: if (GET_CODE (XEXP (X, 1)) == REG \
1079: && REG_OK_FOR_BASE_P (XEXP (X, 1))) \
1080: goto ADDR; \
1081: else if (flag_pic == 1 \
1082: && GET_CODE (XEXP (X, 1)) != REG \
1083: && GET_CODE (XEXP (X, 1)) != LO_SUM \
1084: && GET_CODE (XEXP (X, 1)) != MEM) \
1085: goto ADDR; \
1086: } \
1087: else if (REG_P (XEXP (X, 0)) \
1088: && REG_OK_FOR_BASE_P (XEXP (X, 0))) \
1089: base = XEXP (X, 0), index = XEXP (X, 1); \
1090: else if (REG_P (XEXP (X, 1)) \
1091: && REG_OK_FOR_BASE_P (XEXP (X, 1))) \
1092: base = XEXP (X, 1), index = XEXP (X, 0); \
1093: if (base != 0) \
1094: if (GET_CODE (index) == CONST_INT \
1095: && ((INT_14_BITS (index) && (MODE) != SFmode && (MODE) != DFmode) \
1096: || INT_5_BITS (index))) \
1097: goto ADDR; \
1098: } \
1099: else if (GET_CODE (X) == LO_SUM \
1100: && GET_CODE (XEXP (X, 0)) == REG \
1101: && REG_OK_FOR_BASE_P (XEXP (X, 0)) \
1102: && CONSTANT_P (XEXP (X, 1)) \
1103: && (MODE) != SFmode \
1104: && (MODE) != DFmode) \
1105: goto ADDR; \
1106: else if (GET_CODE (X) == LO_SUM \
1107: && GET_CODE (XEXP (X, 0)) == SUBREG \
1108: && GET_CODE (SUBREG_REG (XEXP (X, 0))) == REG\
1109: && REG_OK_FOR_BASE_P (SUBREG_REG (XEXP (X, 0)))\
1110: && CONSTANT_P (XEXP (X, 1)) \
1111: && (MODE) != SFmode \
1112: && (MODE) != DFmode) \
1113: goto ADDR; \
1114: else if (GET_CODE (X) == LABEL_REF \
1115: || (GET_CODE (X) == CONST_INT \
1116: && INT_14_BITS (X))) \
1117: goto ADDR; \
1118: }
1119:
1120: /* Try machine-dependent ways of modifying an illegitimate address
1121: to be legitimate. If we find one, return the new, valid address.
1122: This macro is used in only one place: `memory_address' in explow.c.
1123:
1124: OLDX is the address as it was before break_out_memory_refs was called.
1125: In some cases it is useful to look at this to decide what needs to be done.
1126:
1127: MODE and WIN are passed so that this macro can use
1128: GO_IF_LEGITIMATE_ADDRESS.
1129:
1130: It is always safe for this macro to do nothing. It exists to recognize
1131: opportunities to optimize the output. */
1132:
1133: /* On the hp9k800, change REG+N into REG+REG, and REG+(X*Y) into REG+REG. */
1134:
1135: #define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) \
1136: { if (GET_CODE (X) == PLUS && CONSTANT_ADDRESS_P (XEXP (X, 1))) \
1137: (X) = gen_rtx (PLUS, SImode, XEXP (X, 0), \
1138: copy_to_mode_reg (SImode, XEXP (X, 1))); \
1139: if (GET_CODE (X) == PLUS && CONSTANT_ADDRESS_P (XEXP (X, 0))) \
1140: (X) = gen_rtx (PLUS, SImode, XEXP (X, 1), \
1141: copy_to_mode_reg (SImode, XEXP (X, 0))); \
1142: if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 0)) == MULT) \
1143: (X) = gen_rtx (PLUS, SImode, XEXP (X, 1), \
1144: force_operand (XEXP (X, 0), 0)); \
1145: if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == MULT) \
1146: (X) = gen_rtx (PLUS, SImode, XEXP (X, 0), \
1147: force_operand (XEXP (X, 1), 0)); \
1148: if (memory_address_p (MODE, X)) \
1149: goto WIN; \
1150: if (flag_pic) (X) = legitimize_pic_address (X, MODE, gen_reg_rtx (Pmode));\
1151: else if ((GET_CODE (X) == SYMBOL_REF & read_only_operand (X)) \
1152: || GET_CODE (X) == CONST || GET_CODE (X) == LABEL_REF)\
1153: (X) = gen_rtx (LO_SUM, Pmode, \
1154: copy_to_mode_reg (Pmode, gen_rtx (HIGH, Pmode, X)), X); \
1155: else if (GET_CODE (X) == SYMBOL_REF) \
1156: (X) = gen_rtx (LO_SUM, Pmode, \
1157: copy_to_mode_reg (Pmode, \
1158: gen_rtx (PLUS, Pmode, \
1159: copy_to_mode_reg (Pmode,\
1160: gen_rtx (HIGH, Pmode, X)),\
1161: gen_rtx (REG, Pmode, 27))),\
1162: X); \
1163: if (memory_address_p (MODE, X)) \
1164: goto WIN;}
1165:
1166: /* Go to LABEL if ADDR (a legitimate address expression)
1167: has an effect that depends on the machine mode it is used for. */
1168:
1169: #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) \
1170: if (GET_CODE (ADDR) == PRE_DEC \
1171: || GET_CODE (ADDR) == POST_DEC \
1172: || GET_CODE (ADDR) == PRE_INC \
1173: || GET_CODE (ADDR) == POST_INC) \
1174: goto LABEL
1175:
1176: /* Define this macro if references to a symbol must be treated
1177: differently depending on something about the variable or
1178: function named by the symbol (such as what section it is in).
1179:
1180: The macro definition, if any, is executed immediately after the
1181: rtl for DECL has been created and stored in `DECL_RTL (DECL)'.
1182: The value of the rtl will be a `mem' whose address is a
1183: `symbol_ref'.
1184:
1185: The usual thing for this macro to do is to a flag in the
1186: `symbol_ref' (such as `SYMBOL_REF_FLAG') or to store a modified
1187: name string in the `symbol_ref' (if one bit is not enough
1188: information).
1189:
1190: On the PA-RISC we use this to indicate if a symbol is in text or
1191: data space.*/
1192:
1193: #define ENCODE_SECTION_INFO(DECL)\
1194: do \
1195: { \
1196: if (TREE_CODE (DECL) == FUNCTION_DECL) \
1197: SYMBOL_REF_FLAG (XEXP (DECL_RTL (DECL), 0)) = 1; \
1198: else \
1199: { \
1200: rtx decl_rtl = (*tree_code_type[(int)TREE_CODE (DECL)] == 'c') ?\
1201: TREE_CST_RTL (DECL) : DECL_RTL (DECL); \
1202: if (RTX_UNCHANGING_P (decl_rtl) && !MEM_VOLATILE_P (decl_rtl) \
1203: && !flag_pic) \
1204: SYMBOL_REF_FLAG (XEXP (decl_rtl, 0)) = 1; \
1205: } \
1206: } \
1207: while (0)
1208:
1209:
1210: /* Specify the machine mode that this machine uses
1211: for the index in the tablejump instruction. */
1212: #define CASE_VECTOR_MODE SImode
1213:
1214: /* Define this if the tablejump instruction expects the table
1215: to contain offsets from the address of the table.
1216: Do not define this if the table should contain absolute addresses. */
1217: /* #define CASE_VECTOR_PC_RELATIVE */
1218:
1219: /* Specify the tree operation to be used to convert reals to integers. */
1220: #define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR
1221:
1222: /* This is the kind of divide that is easiest to do in the general case. */
1223: #define EASY_DIV_EXPR TRUNC_DIV_EXPR
1224:
1225: /* Define this as 1 if `char' should by default be signed; else as 0. */
1226: #define DEFAULT_SIGNED_CHAR 1
1227:
1228: /* Max number of bytes we can move from memory to memory
1229: in one reasonably fast instruction. */
1230: #define MOVE_MAX 8
1231:
1232: /* Define if normal loads of shorter-than-word items from memory clears
1233: the rest of the bigs in the register. */
1234: #define BYTE_LOADS_ZERO_EXTEND
1235:
1236: /* Nonzero if access to memory by bytes is slow and undesirable. */
1237: #define SLOW_BYTE_ACCESS 1
1238:
1239: /* Do not break .stabs pseudos into continuations. */
1240: #define DBX_CONTIN_LENGTH 0
1241:
1242: /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
1243: is done just by pretending it is already truncated. */
1244: #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
1245:
1246: /* We assume that the store-condition-codes instructions store 0 for false
1247: and some other value for true. This is the value stored for true. */
1248:
1249: #define STORE_FLAG_VALUE 1
1250:
1251: /* When a prototype says `char' or `short', really pass an `int'. */
1252: #define PROMOTE_PROTOTYPES
1253:
1254: /* Specify the machine mode that pointers have.
1255: After generation of rtl, the compiler makes no further distinction
1256: between pointers and any other objects of this machine mode. */
1257: #define Pmode SImode
1258:
1259: /* Add any extra modes needed to represent the condition code.
1260:
1261: HPPA floating comparisons produce condition codes. */
1262: #define EXTRA_CC_MODES CCFPmode
1263:
1264: /* Define the names for the modes specified above. */
1265: #define EXTRA_CC_NAMES "CCFP"
1266:
1267: /* Given a comparison code (EQ, NE, etc.) and the first operand of a COMPARE,
1268: return the mode to be used for the comparison. For floating-point, CCFPmode
1269: should be used. CC_NOOVmode should be used when the first operand is a
1270: PLUS, MINUS, or NEG. CCmode should be used when no special processing is
1271: needed. */
1272: #define SELECT_CC_MODE(OP,X) \
1273: (GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT ? CCFPmode : CCmode) \
1274:
1275: /* A function address in a call instruction
1276: is a byte address (for indexing purposes)
1277: so give the MEM rtx a byte's mode. */
1278: #define FUNCTION_MODE SImode
1279:
1280: /* Define this if addresses of constant functions
1281: shouldn't be put through pseudo regs where they can be cse'd.
1282: Desirable on machines where ordinary constants are expensive
1283: but a CALL with constant address is cheap. */
1284: #define NO_FUNCTION_CSE
1285:
1286: /* Compute the cost of computing a constant rtl expression RTX
1287: whose rtx-code is CODE. The body of this macro is a portion
1288: of a switch statement. If the code is computed here,
1289: return it with a return statement. Otherwise, break from the switch. */
1290:
1291: #define CONST_COSTS(RTX,CODE) \
1292: case CONST_INT: \
1293: if (INTVAL (RTX) == 0) return 0; \
1294: if (INT_14_BITS (RTX)) return 1; \
1295: case CONST: \
1296: case LABEL_REF: \
1297: case SYMBOL_REF: \
1298: return 2; \
1299: case CONST_DOUBLE: \
1300: return 4;
1301:
1302: #define ADDRESS_COST(RTX) \
1303: (GET_CODE (RTX) == REG ? 1 : hppa_address_cost (RTX))
1304:
1305: /* Compute extra cost of moving data between one register class
1306: and another. */
1307: #define REGISTER_MOVE_COST(CLASS1, CLASS2) \
1308: (((CLASS1 == FP_REGS && CLASS2 == GENERAL_REGS) \
1309: || (CLASS1 == GENERAL_REGS && CLASS2 == FP_REGS)) ? 6 : 2)
1310:
1311: /* Conditional branches with empty delay slots have a length of two. */
1312: #define ADJUST_INSN_LENGTH(INSN, LENGTH) \
1313: if (GET_CODE (INSN) == CALL_INSN \
1314: || (GET_CODE (INSN) == JUMP_INSN && ! simplejump_p (insn))) \
1315: LENGTH += 1;
1316:
1317: /* Control the assembler format that we output. */
1318:
1319: /* Output at beginning of assembler file. */
1320:
1321: #define ASM_FILE_START(FILE) \
1322: do { fprintf (FILE, "\t.SPACE $PRIVATE$\n\
1323: \t.SUBSPA $DATA$,QUAD=1,ALIGN=8,ACCESS=31\n\
1324: \t.SPACE $TEXT$\n\
1325: \t.SUBSPA $LIT$,QUAD=0,ALIGN=8,ACCESS=44\n\
1326: \t.SUBSPA $CODE$,QUAD=0,ALIGN=8,ACCESS=44,CODE_ONLY\n\
1327: \t.IMPORT $global$,DATA\n\
1328: \t.IMPORT $$dyncall,MILLICODE\n");\
1329: if (profile_flag)\
1330: fprintf (FILE, "\t.IMPORT __gcc_mcount, CODE\n");\
1331: } while (0)
1332:
1333: /* Output to assembler file text saying following lines
1334: may contain character constants, extra white space, comments, etc. */
1335:
1336: #define ASM_APP_ON ""
1337:
1338: /* Output to assembler file text saying following lines
1339: no longer contain unusual constructs. */
1340:
1341: #define ASM_APP_OFF ""
1342:
1343: /* We don't yet know how to identify GCC to HP series 800. */
1344: #define ASM_IDENTIFY_GCC(FILE) fprintf (FILE, "; gcc_compiled.:\n")
1345:
1346: /* Output before code. */
1347:
1348: #define TEXT_SECTION_ASM_OP "\t.SPACE $TEXT$\n\t.SUBSPA $CODE$\n"
1349:
1350: /* Output before writable data. */
1351:
1352: #define DATA_SECTION_ASM_OP "\t.SPACE $PRIVATE$\n\t.SUBSPA $DATA$\n"
1353:
1354: /* How to refer to registers in assembler output.
1355: This sequence is indexed by compiler's hard-register-number (see above). */
1356:
1357: #define REGISTER_NAMES \
1358: {"0", "1", "2", "3", "4", "5", "6", "7", "8", "9", \
1359: "10", "11", "12", "13", "14", "15", "16", "17", "18", "19", \
1360: "20", "21", "22", "23", "24", "25", "26", "27", "28", "29", \
1361: "30", "31", \
1362: "0", "1", "2", "3", "4", "5", "6", "7", \
1363: "8", "9", "10", "11", "12", "13", "14", "15", \
1364: "0", "0R", "1", "1R", "2", "2R", "3", "3R", \
1365: "4", "4R", "5", "5R", "6", "6R", "7", "7R", \
1366: "8", "8R", "9", "9R", "10", "10R", "11", "11R", \
1367: "12", "12R", "13", "13R", "14", "14R", "15", "15R", \
1368: "16", "16R", "17", "17R", "18", "18R", "19", "19R", \
1369: "20", "20R", "21", "21R", "22", "22R", "23", "23R", \
1370: "24", "24R", "25", "25R", "26", "26R", "27", "27R", \
1371: "28", "28R", "29", "29R", "30", "30R", "31", "31R"}
1372:
1373: /* How to renumber registers for dbx and gdb. */
1374:
1375: #define DBX_REGISTER_NUMBER(REGNO) (REGNO)
1376:
1377: /* This is how to output the definition of a user-level label named NAME,
1378: such as the label on a static function or variable NAME. */
1379:
1380: #define ASM_OUTPUT_LABEL(FILE, NAME) \
1381: do { assemble_name (FILE, NAME); fputc ('\n', FILE); } while (0)
1382:
1383: /* This is how to output a command to make the user-level label named NAME
1384: defined for reference from other files. */
1385:
1386: #define ASM_OUTPUT_EXTERNAL(FILE, DECL, NAME) \
1387: do { fputs ("\t.IMPORT ", FILE); \
1388: assemble_name (FILE, NAME); \
1389: if (TREE_CODE (DECL) == VAR_DECL && ! TREE_READONLY (DECL)) \
1390: fputs (",DATA\n", FILE); \
1391: else \
1392: fputs (",CODE\n", FILE); \
1393: } while (0)
1394:
1395: /* hpux ld doesn't output the object file name, or anything useful at
1396: all, to indicate the start of an object file's symbols. This screws
1397: up gdb, so we'll output this magic cookie at the end of an object
1398: file with debugging symbols */
1399:
1400: #define ASM_FILE_END(FILE) \
1401: do { if (write_symbols == DBX_DEBUG)\
1402: { fputs (TEXT_SECTION_ASM_OP, FILE);\
1403: fputs (".stabs \"end_file.\",4,0,0,Ltext_end\nLtext_end:\n",\
1404: (FILE));\
1405: }\
1406: } while (0)
1407:
1408: /* The bogus HP assembler requires ALL external references to be
1409: "imported", even library calls. They look a bit different, so
1410: here's this macro. */
1411:
1412: #define ASM_OUTPUT_EXTERNAL_LIBCALL(FILE, RTL) \
1413: do { fputs ("\t.IMPORT ", FILE); \
1414: assemble_name (FILE, XSTR ((RTL), 0)); \
1415: fputs (",CODE\n", FILE); \
1416: } while (0)
1417:
1418: #define ASM_GLOBALIZE_LABEL(FILE, NAME) \
1419: do { fputs ("\t.EXPORT ", FILE); assemble_name (FILE, NAME); \
1420: fputs ("\n", FILE);} while (0)
1421:
1422: /* This is how to output a reference to a user-level label named NAME.
1423: `assemble_name' uses this. */
1424:
1425: #define ASM_OUTPUT_LABELREF(FILE,NAME) \
1426: fprintf (FILE, "%s", NAME)
1427:
1428: /* This is how to output an internal numbered label where
1429: PREFIX is the class of label and NUM is the number within the class. */
1430:
1431: #define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \
1432: fprintf (FILE, "%s$%04d\n", PREFIX, NUM)
1433:
1434: /* This is how to store into the string LABEL
1435: the symbol_ref name of an internal numbered label where
1436: PREFIX is the class of label and NUM is the number within the class.
1437: This is suitable for output with `assemble_name'. */
1438:
1439: #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \
1440: sprintf (LABEL, "*%s$%04d", PREFIX, NUM)
1441:
1442: /* This is how to output an assembler line defining a `double' constant. */
1443:
1444: #define ASM_OUTPUT_DOUBLE(FILE,VALUE) \
1445: do { union { double d; int i[2];} __u; \
1446: __u.d = (VALUE); \
1447: fprintf (FILE, "\t; .double %.20e\n\t.word %d ; = 0x%x\n\t.word %d ; = 0x%x\n", \
1448: __u.d, __u.i[0], __u.i[0], __u.i[1], __u.i[1]); \
1449: } while (0)
1450:
1451: /* This is how to output an assembler line defining a `float' constant. */
1452:
1453: #define ASM_OUTPUT_FLOAT(FILE,VALUE) \
1454: do { union { float f; int i;} __u; \
1455: __u.f = (VALUE); \
1456: fprintf (FILE, "\t; .float %.12e\n\t.word %d ; = 0x%x\n", __u.f, __u.i, __u.i); \
1457: } while (0)
1458:
1459: /* This is how to output an assembler line defining an `int' constant. */
1460:
1461: #define ASM_OUTPUT_INT(FILE,VALUE) \
1462: ( fprintf (FILE, "\t.word "), \
1463: output_addr_const (FILE, (VALUE)), \
1464: fprintf (FILE, "\n"))
1465:
1466: /* Likewise for `short' and `char' constants. */
1467:
1468: #define ASM_OUTPUT_SHORT(FILE,VALUE) \
1469: ( fprintf (FILE, "\t.half "), \
1470: output_addr_const (FILE, (VALUE)), \
1471: fprintf (FILE, "\n"))
1472:
1473: #define ASM_OUTPUT_CHAR(FILE,VALUE) \
1474: ( fprintf (FILE, "\t.byte "), \
1475: output_addr_const (FILE, (VALUE)), \
1476: fprintf (FILE, "\n"))
1477:
1478: /* This is how to output an assembler line for a numeric constant byte. */
1479:
1480: #define ASM_OUTPUT_BYTE(FILE,VALUE) \
1481: fprintf (FILE, "\t.byte 0x%x\n", (VALUE))
1482:
1483: #define ASM_OUTPUT_ASCII(FILE, P, SIZE) \
1484: output_ascii ((FILE), (P), (SIZE))
1485:
1486: #define ASM_OUTPUT_REG_PUSH(FILE,REGNO) \
1487: fprintf (FILE, "\tstws,mb %s,4(0,30)\n", reg_names[REGNO])
1488:
1489: /* This is how to output an insn to pop a register from the stack.
1490: It need not be very fast code. */
1491:
1492: #define ASM_OUTPUT_REG_POP(FILE,REGNO) \
1493: fprintf (FILE, "\tldws,ma -4(0,30),%s\n", reg_names[REGNO])
1494:
1495: /* This is how to output an element of a case-vector that is absolute.
1496: Note that this method makes filling these branch delay slots
1497: virtually impossible. */
1498:
1499: #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
1500: fprintf (FILE, "\tb L$%04d\n\tnop\n", VALUE)
1501:
1502: /* This is how to output an element of a case-vector that is relative.
1503: (the hp9k800 does not use such vectors,
1504: but we must define this macro anyway.) */
1505:
1506: #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, VALUE, REL) \
1507: fprintf (FILE, "\tword L%d-L%d\n", VALUE, REL)
1508:
1509: /* This is how to output an assembler line
1510: that says to advance the location counter
1511: to a multiple of 2**LOG bytes. */
1512:
1513: #define ASM_OUTPUT_ALIGN(FILE,LOG) \
1514: fprintf (FILE, "\t.align %d\n", (1<<(LOG)))
1515:
1516: #define ASM_OUTPUT_SKIP(FILE,SIZE) \
1517: fprintf (FILE, "\t.blockz %d\n", (SIZE))
1518:
1519: /* This says how to output an assembler line
1520: to define a global common symbol. */
1521:
1522: #define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \
1523: ( data_section (), \
1524: assemble_name ((FILE), (NAME)), \
1525: fputs ("\t.comm ", (FILE)), \
1526: fprintf ((FILE), "%d\n", (ROUNDED)))
1527:
1528: /* This says how to output an assembler line
1529: to define a local common symbol. */
1530:
1531: #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE, ROUNDED) \
1532: ( data_section (), \
1533: fprintf ((FILE), "\t.align %d\n", (SIZE) <= 4 ? 4 : 8), \
1534: assemble_name ((FILE), (NAME)), \
1535: fprintf ((FILE), "\n\t.blockz %d\n", (ROUNDED)))
1536:
1537: /* Store in OUTPUT a string (made with alloca) containing
1538: an assembler-name for a local static variable named NAME.
1539: LABELNO is an integer which is different for each call. */
1540:
1541: #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \
1542: ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 12), \
1543: sprintf ((OUTPUT), "%s___%d", (NAME), (LABELNO)))
1544:
1545: /* Define the parentheses used to group arithmetic operations
1546: in assembler code. */
1547:
1548: #define ASM_OPEN_PAREN "("
1549: #define ASM_CLOSE_PAREN ")"
1550:
1551: /* Define results of standard character escape sequences. */
1552: #define TARGET_BELL 007
1553: #define TARGET_BS 010
1554: #define TARGET_TAB 011
1555: #define TARGET_NEWLINE 012
1556: #define TARGET_VT 013
1557: #define TARGET_FF 014
1558: #define TARGET_CR 015
1559:
1560: #define PRINT_OPERAND_PUNCT_VALID_P(CHAR) \
1561: ((CHAR) == '@' || (CHAR) == '#' || (CHAR) == '*' || (CHAR) == '^')
1562:
1563: /* Print operand X (an rtx) in assembler syntax to file FILE.
1564: CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
1565: For `%' followed by punctuation, CODE is the punctuation and X is null.
1566:
1567: On the hp9k800, the CODE can be `r', meaning this is a register-only operand
1568: and an immediate zero should be represented as `r0'.
1569:
1570: Several % codes are defined:
1571: O an operation
1572: C compare conditions
1573: N extract conditions
1574: M modifier to handle preincrement addressing for memory refs.
1575: F modifier to handle preincrement addressing for fp memory refs */
1576:
1577: #define PRINT_OPERAND(FILE, X, CODE) print_operand (FILE, X, CODE)
1578:
1579:
1580: /* Print a memory address as an operand to reference that memory location. */
1581:
1582: #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \
1583: { register rtx addr = ADDR; \
1584: register rtx base; \
1585: int offset; \
1586: switch (GET_CODE (addr)) \
1587: { \
1588: case REG: \
1589: fprintf (FILE, "0(0,%s)", reg_names [REGNO (addr)]); \
1590: break; \
1591: case PLUS: \
1592: if (GET_CODE (XEXP (addr, 0)) == CONST_INT) \
1593: offset = INTVAL (XEXP (addr, 0)), base = XEXP (addr, 1); \
1594: else if (GET_CODE (XEXP (addr, 1)) == CONST_INT) \
1595: offset = INTVAL (XEXP (addr, 1)), base = XEXP (addr, 0); \
1596: else \
1597: abort (); \
1598: fprintf (FILE, "%d(0,%s)", offset, reg_names [REGNO (base)]); \
1599: break; \
1600: case LO_SUM: \
1601: fputs ("R'", FILE); \
1602: output_global_address (FILE, XEXP (addr, 1)); \
1603: fputs ("(", FILE); \
1604: output_operand (XEXP (addr, 0), 0); \
1605: fputs (")", FILE); \
1606: break; \
1607: default: \
1608: output_addr_const (FILE, addr); \
1609: }}
1610:
1611:
1612: #define SMALL_INT(OP) INT_14_BITS (OP)
1613: /* Define functions in out-sparc.c and used in insn-output.c. */
1614:
1615: extern char *output_move_double ();
1616: extern char *output_fp_move_double ();
1617: extern char *output_block_move ();
1618: extern char *output_scc_insn ();
1619: extern char *output_cbranch ();
1620: extern char *output_return ();
1621: extern char *output_floatsisf2 ();
1622: extern char *output_floatsidf2 ();
1623: extern char *output_mul_insn ();
1624: extern char *output_div_insn ();
1625: extern char *output_mod_insn ();
1626: extern void output_arg_descriptor ();
1627: extern void output_global_address ();
1628: extern struct rtx_def *legitimize_pic_address ();
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