![[BACK]](/cvsweb/icons/back.gif){kind=icon}
Return to hp800.h CVS log ![[TXT]](/cvsweb/icons/text.gif){kind=icon}
![[DIR]](/cvsweb/icons/dir.gif){kind=icon}
Up to [GCC 2.x] / gcc / config|
Return to hp800.h CVS log | Up to [GCC 2.x] / gcc / config |
1.1 root 1: /* Definitions of target machine for GNU compiler, for the HP Spectrum.
2: Copyright (C) 1992 Free Software Foundation, Inc.
3: Contributed by Michael Tiemann ([email protected])
4: and Tim Moore ([email protected]) of the Center for
5: Software Science at the University of Utah.
6:
7: This file is part of GNU CC.
8:
9: GNU CC is free software; you can redistribute it and/or modify
10: it under the terms of the GNU General Public License as published by
11: the Free Software Foundation; either version 1, or (at your option)
12: any later version.
13:
14: GNU CC is distributed in the hope that it will be useful,
15: but WITHOUT ANY WARRANTY; without even the implied warranty of
16: MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17: GNU General Public License for more details.
18:
19: You should have received a copy of the GNU General Public License
20: along with GNU CC; see the file COPYING. If not, write to
21: the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
22:
23: enum cmp_type /* comparison type */
24: {
25: CMP_SI, /* compare integers */
26: CMP_SF, /* compare single precision floats */
27: CMP_DF, /* compare double precision floats */
28: CMP_MAX /* max comparison type */
29: };
30:
31: #define DBX_DEBUGGING_INFO
32: #define DEFAULT_GDB_EXTENSIONS 0
33:
34: /* Defines for a K&R CC */
35:
36: #ifdef OLD_CC
37: #define CPP_SPEC "%{!gnu:-nostdinc %{!nostinc:-I/usr/include}} \
38: %{gnu:%{nostdinc}} %{!gnu:-traditional} -Dvolatile=__volatile"
39: #define CC1_SPEC "%{!gnu:-traditional -fwritable-strings -fno-defer-pop} \
40: %{pg:} %{p:}"
41: #else
42: #define CC1_SPEC "%{pg:} %{p:}"
43: #endif
44:
45: /* Brain-dead loader */
46: #ifdef hpux8
47: #define LINK_SPEC "-u main -a archive"
48: #else
49: #define LINK_SPEC "-u main"
50: #endif
51:
1.1.1.2 ! root 52: /* Omit frame pointer at high optimization levels. */
! 53:
1.1 root 54: #define OPTIMIZATION_OPTIONS(OPTIMIZE) \
1.1.1.2 ! root 55: { \
! 56: if (OPTIMIZE >= 2) \
! 57: flag_omit_frame_pointer = 1; \
! 58: }
1.1 root 59:
60: /* These compiler options take an argument. We ignore -target for now. */
61:
62: #define WORD_SWITCH_TAKES_ARG(STR) \
63: (!strcmp (STR, "Tdata") || !strcmp (STR, "include") \
1.1.1.2 ! root 64: || !strcmp (STR, "imacros") || !strcmp (STR, "target")\
! 65: || !strcmp (STR, "aux-info"))
1.1 root 66:
67: /* Names to predefine in the preprocessor for this target machine. */
68:
69: #ifdef hpux
70: #define CPP_PREDEFINES "-Dhp9000s800 -D__hp9000s800 -Dhp9k8 -DPWB -Dhpux -Dunix -D_HPUX_SOURCE"
71: #else
72: #define CPP_PREDEFINES "-Dhp9000s800 -D__hp9000s800 -Dhp9k8 -Dunix -D_HPUX_SOURCE -Dhp9000 -Dhp800 -Dspectrum -DREVARGV"
73: #endif
74:
75: /* Print subsidiary information on the compiler version in use. */
76:
77: #define TARGET_VERSION fprintf (stderr, " (hp9000s800)");
78:
79: /* Run-time compilation parameters selecting different hardware subsets.
80:
81: On the the hp9k800, we don't yet need any. But ... */
82:
83: extern int target_flags;
84:
85: /* compile code for PA-RISC 1.1 ("Snake") */
86:
87: #define TARGET_SNAKE (target_flags & 1)
88:
89: /* Macro to define tables used to set the flags.
90: This is a list in braces of pairs in braces,
91: each pair being { "NAME", VALUE }
92: where VALUE is the bits to set or minus the bits to clear.
93: An empty string NAME is used to identify the default VALUE. */
94:
95: #define TARGET_SWITCHES \
96: {{"snake", 1}, \
97: { "", TARGET_DEFAULT}}
98:
99: #define TARGET_DEFAULT 0
100:
101: /* target machine storage layout */
102:
103: /* Define this if most significant bit is lowest numbered
104: in instructions that operate on numbered bit-fields. */
105: #define BITS_BIG_ENDIAN 1
106:
107: /* Define this if most significant byte of a word is the lowest numbered. */
108: /* That is true on the hp9k8. */
109: #define BYTES_BIG_ENDIAN 1
110:
1.1.1.2 ! root 111: /* Define this if most significant word of a multiword number is lowest
! 112: numbered. */
1.1 root 113: /* For the hp9k800 we can decide arbitrarily
114: since there are no machine instructions for them. */
115: #define WORDS_BIG_ENDIAN 1
116:
1.1.1.2 ! root 117: /* number of bits in an addressable storage unit */
1.1 root 118: #define BITS_PER_UNIT 8
119:
120: /* Width in bits of a "word", which is the contents of a machine register.
121: Note that this is not necessarily the width of data type `int';
122: if using 16-bit ints on a 68000, this would still be 32.
123: But on a machine with 16-bit registers, this would be 16. */
124: #define BITS_PER_WORD 32
125:
126: /* Width of a word, in units (bytes). */
127: #define UNITS_PER_WORD 4
128:
129: /* Width in bits of a pointer.
130: See also the macro `Pmode' defined below. */
131: #define POINTER_SIZE 32
132:
133: /* Allocation boundary (in *bits*) for storing arguments in argument list. */
134: #define PARM_BOUNDARY 32
135:
136: /* Largest alignment required for any stack parameter, in bits.
1.1.1.2 ! root 137: Don't define this if it is equal to PARM_BOUNDARY */
1.1 root 138: #define MAX_PARM_BOUNDARY 64
139:
140: /* Boundary (in *bits*) on which stack pointer should be aligned. */
141: #define STACK_BOUNDARY (TARGET_SNAKE ? 512 : 64)
142:
143: /* Allocation boundary (in *bits*) for the code of a function. */
144: #define FUNCTION_BOUNDARY 32
145:
146: /* Alignment of field after `int : 0' in a structure. */
147: #define EMPTY_FIELD_BOUNDARY 32
148:
149: /* Every structure's size must be a multiple of this. */
150: #define STRUCTURE_SIZE_BOUNDARY 8
151:
152: /* A bitfield declared as `int' forces `int' alignment for the struct. */
153: #define PCC_BITFIELD_TYPE_MATTERS 1
154:
155: /* No data type wants to be aligned rounder than this. */
156: #define BIGGEST_ALIGNMENT 64
157:
158: /* Get around hp-ux assembler bug, and make strcpy of constants fast. */
159: #define CONSTANT_ALIGNMENT(CODE, TYPEALIGN) \
160: ((TYPEALIGN) < 32 ? 32 : (TYPEALIGN))
161:
162: /* Make arrays of chars word-aligned for the same reasons. */
163: #define DATA_ALIGNMENT(TYPE, ALIGN) \
164: (TREE_CODE (TYPE) == ARRAY_TYPE \
165: && TYPE_MODE (TREE_TYPE (TYPE)) == QImode \
166: && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN))
167:
168:
1.1.1.2 ! root 169: /* Set this nonzero if move instructions will actually fail to work
1.1 root 170: when given unaligned data. */
1.1.1.2 ! root 171: #define STRICT_ALIGNMENT 1
1.1 root 172:
173: /* Generate calls to memcpy, memcmp and memset. */
174: #define TARGET_MEM_FUNCTIONS
175:
176: /* Standard register usage. */
177:
178: /* Number of actual hardware registers.
179: The hardware registers are assigned numbers for the compiler
180: from 0 to just below FIRST_PSEUDO_REGISTER.
181: All registers that the compiler knows about must be given numbers,
182: even those that are not normally considered general registers.
183:
184: The hp9k800 has 32 fullword registers and 16 floating point
185: registers. The floating point registers hold either word or double
186: word values.
187:
188: 16 additional registers are reserved.
189:
190: PA-RISC 1.1 has 32 fullword registers and 32 floating point
191: registers. However, the floating point registers behave
192: differently: the left and right halves of registers are addressable
193: as 32 bit registers. So, we will set things up like the 68k which
1.1.1.2 ! root 194: has different fp units: define separate register sets for the 1.0
1.1 root 195: and 1.1 fp units. */
196:
197: #define FIRST_PSEUDO_REGISTER 113 /* 32 + 16 1.0 regs + 64 1.1 regs + */
198: /* 1 shift reg */
199:
200: /* 1 for registers that have pervasive standard uses
201: and are not available for the register allocator.
202:
203: On the hp9k800, these are:
204: Reg 0 = 0 (hardware). However, 0 is used for condition code,
205: so is not fixed.
206: Reg 1 = ADDIL target/Temporary (hardware).
207: Reg 2 = Return Pointer
208: Reg 3 = Unused
209: Reg 4 = Frame Pointer (Gnu)
210: Reg 5-18 = Preserved Registers
211: Reg 19-22 = Temporary Registers
212: Reg 23-26 = Temporary/Parameter Registers
213: Reg 27 = Global Data Pointer (hp)
214: Reg 28 = Temporary/???/Return Value register
215: Reg 29 = Temporary/Static Chain/Return Value register
216: Reg 30 = stack pointer
217: Reg 31 = Temporary/Millicode Return Pointer (hp)
218:
219: Freg 0-3 = Status Registers
220: Freg 4-7 = Arguments/Return Value
221: Freg 8-11 = Temporary Registers
222: Freg 12-15 = Preserved Registers
223:
224: Freg 16-31 = Reserved
225:
226: On the Snake, fp regs are
227:
228: Freg 0-3 = Status Registers
229: Freg 4L-7R = Arguments/Return Value
230: Freg 8L-11R = Temporary Registers
231: Freg 12L-15R = Preserved Registers
232:
233: Freg 16L-31R = ?? Some partition of temporary and preserved; assume
234: preserved for now.
235:
236:
237: */
238:
239: #define FIXED_REGISTERS \
240: {0, 0, 1, 1, 1, 0, 0, 0, \
241: 0, 0, 0, 0, 0, 0, 0, 0, \
242: 0, 0, 0, 0, 0, 0, 0, 0, \
243: 0, 0, 0, 1, 0, 0, 1, 1, \
244: /* 1.0 fp registers */ \
245: 1, 1, 1, 1, 0, 0, 0, 0, \
246: 0, 0, 0, 0, 0, 0, 0, 0, \
247: /* 1.1 fp registers */ \
248: 1, 1, 1, 1, 1, 1, 1, 1, \
249: 0, 0, 0, 0, 0, 0, 0, 0, \
250: 0, 0, 0, 0, 0, 0, 0, 0, \
251: 0, 0, 0, 0, 0, 0, 0, 0, \
252: 0, 0, 0, 0, 0, 0, 0, 0, \
253: 0, 0, 0, 0, 0, 0, 0, 0, \
254: 0, 0, 0, 0, 0, 0, 0, 0, \
255: 0, 0, 0, 0, 0, 0, 0, 0, \
256: 1}
257:
258: /* 1 for registers not available across function calls.
259: These must include the FIXED_REGISTERS and also any
260: registers that can be used without being saved.
261: The latter must include the registers where values are returned
262: and the register where structure-value addresses are passed.
263: Aside from that, you can include as many other registers as you like. */
264: #define CALL_USED_REGISTERS \
265: {1, 1, 1, 1, 1, 0, 0, 0, \
266: 0, 0, 0, 0, 0, 0, 0, 0, \
267: 0, 0, 0, 1, 1, 1, 1, 1, \
268: 1, 1, 1, 1, 1, 1, 1, 1, \
269: /* 1.0 fp registers */ \
270: 1, 1, 1, 1, 1, 1, 1, 1, \
271: 1, 1, 1, 1, 0, 0, 0, 0, \
272: /* 1.1 fp registers */ \
273: 1, 1, 1, 1, 1, 1, 1, 1, \
274: 1, 1, 1, 1, 1, 1, 1, 1, \
275: 1, 1, 1, 1, 1, 1, 1, 1, \
276: 0, 0, 0, 0, 0, 0, 0, 0, \
277: 0, 0, 0, 0, 0, 0, 0, 0, \
278: 0, 0, 0, 0, 1, 1, 1, 1, \
279: 1, 1, 1, 1, 1, 1, 1, 1, \
280: 1, 1, 1, 1, 1, 1, 1, 1, \
281: 1}
282:
283: /* Make sure everything's fine if we *don't* have a given processor.
284: This assumes that putting a register in fixed_regs will keep the
285: compiler's mitts completely off it. We don't bother to zero it out
1.1.1.2 ! root 286: of register classes.
! 287:
! 288: Make register 27 global for now. We'll undo this kludge after 2.1. */
1.1 root 289:
290: #define CONDITIONAL_REGISTER_USAGE \
291: { \
292: int i; \
293: HARD_REG_SET x; \
1.1.1.2 ! root 294: global_regs[27] = 1; \
1.1 root 295: if (!TARGET_SNAKE) \
296: { \
297: COPY_HARD_REG_SET (x, reg_class_contents[(int)SNAKE_FP_REGS]);\
298: for (i = 0; i < FIRST_PSEUDO_REGISTER; i++ ) \
299: if (TEST_HARD_REG_BIT (x, i)) \
300: fixed_regs[i] = call_used_regs[i] = 1; \
301: } \
302: else \
303: { \
304: COPY_HARD_REG_SET (x, reg_class_contents[(int)FP_REGS]); \
305: for (i = 0; i < FIRST_PSEUDO_REGISTER; i++ ) \
306: if (TEST_HARD_REG_BIT (x, i)) \
307: fixed_regs[i] = call_used_regs[i] = 1; \
308: } \
309: }
310:
311: /* Allocated the call used registers first. This should minimize
312: the number of registers that need to be saved (as call used
313: registers will generally not be allocated across a call).
314:
315: It is possible that it would be wise to allocate the floating point
316: registers before the regular ones, but I doubt it matters. Same
317: comment for parameters versus normal. */
318:
319: #define REG_ALLOC_ORDER \
320: {19, 20, 21, 22, 23, 24, 25, 26, \
321: 27, 28, 29, 30, 31, 40, 41, 42, \
322: 43, 36, 37, 38, 39, \
323: 56, 57, 58, 59, 60, 61, 62, 63, \
324: 64, 65, 66, 67, 68, 69, 70, 71, \
325: 72, 73, 74, 75, 76, 77, 78, 79, \
326: 80, 81, 82, 83, 84, 85, 86, 87, \
327: 88, 89, 90, 91, 92, 93, 94, 95, \
328: 96, 97, 98, 99, 100, 101, 102, 103, \
329: 104, 105, 106, 107, 108, 109, 110, 111,\
330: 5, 6, 7, \
331: 8, 9, 10, 11, 12, 13, 14, 15, \
332: 16, 17, 18, 44, 45, 46, 47, \
333: 48, 49, 50, 51, 52, 53, 54, 55, \
334: 1, \
335: 2, 3, 4, 32, 33, 34, 35, 0, \
336: 112}
337:
338:
339: /* Return number of consecutive hard regs needed starting at reg REGNO
340: to hold something of mode MODE.
341: This is ordinarily the length in words of a value of mode MODE
342: but can be less for certain modes in special long registers.
343:
344: On the hp9k800, ordinary registers hold 32 bits worth;
345: The floating point registers are 64 bits wide. Snake fp regs are 32
346: bits wide */
347: #define HARD_REGNO_NREGS(REGNO, MODE) \
348: (((REGNO) < 32 || (REGNO) >= 48) \
349: ? ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD) : 1)
350:
351: /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE.
352: On the hp9k800, the cpu registers can hold any mode. We
353: force this to be an even register is it cannot hold the full mode. */
354: #define HARD_REGNO_MODE_OK(REGNO, MODE) \
355: ((REGNO) == 0 ? (MODE) == CCmode || (MODE) == CCFPmode \
356: : (REGNO) < 32 ? ((GET_MODE_SIZE (MODE) <= 4) ? 1 : ((REGNO) & 1) == 0)\
357: : (REGNO) < 48 ? (GET_MODE_SIZE (MODE) >= 4) \
358: : (GET_MODE_SIZE (MODE) > 4 ? ((REGNO) & 1) == 0 \
359: : GET_MODE_SIZE (MODE) == 4))
360:
361: /* Value is 1 if it is a good idea to tie two pseudo registers
362: when one has mode MODE1 and one has mode MODE2.
363: If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
364: for any hard reg, then this must be 0 for correct output. */
365: #define MODES_TIEABLE_P(MODE1, MODE2) \
366: ((MODE1) == (MODE2) || GET_MODE_CLASS (MODE1) == GET_MODE_CLASS (MODE2))
367:
368: /* Specify the registers used for certain standard purposes.
369: The values of these macros are register numbers. */
370:
371: /* the hp9k800 pc isn't overloaded on a register that the compiler knows about. */
372: /* #define PC_REGNUM */
373:
374: /* Register to use for pushing function arguments. */
375: #define STACK_POINTER_REGNUM 30
376:
377: /* Base register for access to local variables of the function. */
378: #define FRAME_POINTER_REGNUM 4
379:
380: /* Value should be nonzero if functions must have frame pointers.
381: Zero means the frame pointer need not be set up (and parms
382: may be accessed via the stack pointer) in functions that seem suitable.
383: This is computed in `reload', in reload1.c. */
384: extern int leaf_function;
385:
386: #define FRAME_POINTER_REQUIRED (current_function_calls_alloca)
387:
388:
389: /* C statement to store the difference between the frame pointer
390: and the stack pointer values immediately after the function prologue.
391:
392: Note, we always pretend that this is a leaf function because if
393: it's not, there's no point in trying to eliminate the
394: frame pointer. If it is a leaf function, we guessed right! */
395: #define INITIAL_FRAME_POINTER_OFFSET(VAR) \
1.1.1.2 ! root 396: do { (VAR) = -compute_frame_size (get_frame_size (), 1) - 32; } while (0)
1.1 root 397:
398: /* Base register for access to arguments of the function. */
399: #define ARG_POINTER_REGNUM 4
400:
401: /* Register in which static-chain is passed to a function. */
402: /* ??? */
403: #define STATIC_CHAIN_REGNUM 29
404:
405: /* Register which holds offset table for position-independent
406: data references. */
407:
408: #define PIC_OFFSET_TABLE_REGNUM 18
409:
410: #define INITIALIZE_PIC initialize_pic ()
411: #define FINALIZE_PIC finalize_pic ()
412:
413: /* Register in which address to store a structure value
414: is passed to a function. */
415: #define STRUCT_VALUE_REGNUM 28
416:
417: /* Define the classes of registers for register constraints in the
418: machine description. Also define ranges of constants.
419:
420: One of the classes must always be named ALL_REGS and include all hard regs.
421: If there is more than one class, another class must be named NO_REGS
422: and contain no registers.
423:
424: The name GENERAL_REGS must be the name of a class (or an alias for
425: another name such as ALL_REGS). This is the class of registers
426: that is allowed by "g" or "r" in a register constraint.
427: Also, registers outside this class are allocated only when
428: instructions express preferences for them.
429:
430: The classes must be numbered in nondecreasing order; that is,
431: a larger-numbered class must never be contained completely
432: in a smaller-numbered class.
433:
434: For any two classes, it is very desirable that there be another
435: class that represents their union. */
436:
437: /* The hp9k800 has four kinds of registers: general regs, 1.0 fp regs,
438: 1.1 fp regs, and the high 1.1 fp regs, to which the operands of
439: fmpyadd and fmpysub are restricted. */
440:
441: enum reg_class { NO_REGS, R1_REGS, GENERAL_REGS, FP_REGS, HI_SNAKE_FP_REGS,
442: SNAKE_FP_REGS, FP_OR_SNAKE_FP_REGS, SHIFT_REGS, ALL_REGS, LIM_REG_CLASSES};
443:
444: #define N_REG_CLASSES (int) LIM_REG_CLASSES
445:
446: /* Give names of register classes as strings for dump file. */
447:
448: #define REG_CLASS_NAMES \
449: { "NO_REGS", "R1_REGS", "GENERAL_REGS", "FP_REGS", "HI_SNAKE_FP_REGS",\
450: "SNAKE_FP_REGS", "FP_OR_SNAKE_FP_REGS", "SHIFT_REGS", "ALL_REGS"}
451:
452: /* Define which registers fit in which classes.
453: This is an initializer for a vector of HARD_REG_SET
454: of length N_REG_CLASSES. Register 0, the "condition code" register,
455: is in no class. */
456:
457: #define REG_CLASS_CONTENTS \
458: { {0, 0, 0, 0}, /* NO_REGS */ \
459: {0x2, 0, 0, 0}, /* R1_REGS */ \
460: {-2, 0, 0, 0}, /* GENERAL_REGS */ \
461: {0, 0xffff, 0, 0}, /* FP_REGS */ \
462: {0, 0, 0xffff0000, 0xffff}, /* HI_SNAKE_FP_REGS */ \
463: {0, 0xffff0000, ~0, 0xffff}, /* SNAKE_FP_REGS */ \
464: {0, ~0, ~0, 0xffff}, /* FP_OR_SNAKE_FP_REGS */\
465: {0, 0, 0, 0x10000}, /* SHIFT_REGS */ \
466: {-2, ~0, ~0, 0x1ffff}} /* ALL_REGS */
467:
468: /* The same information, inverted:
469: Return the class number of the smallest class containing
470: reg number REGNO. This could be a conditional expression
471: or could index an array. */
472:
473: #define REGNO_REG_CLASS(REGNO) \
474: ((REGNO) == 0 ? NO_REGS \
475: : (REGNO) == 1 ? R1_REGS \
476: : (REGNO) < 32 ? GENERAL_REGS \
477: : (REGNO) < 48 ? FP_REGS \
478: : (REGNO) < 80 ? SNAKE_FP_REGS \
479: : (REGNO) < 112 ? HI_SNAKE_FP_REGS \
480: : SHIFT_REGS)
481:
482: /* The class value for index registers, and the one for base regs. */
483: #define INDEX_REG_CLASS GENERAL_REGS
484: #define BASE_REG_CLASS GENERAL_REGS
485:
486: /* Get reg_class from a letter such as appears in the machine description. */
487:
488: #define REG_CLASS_FROM_LETTER(C) \
489: ((C) == 'r' ? GENERAL_REGS : \
490: ((C) == 'f' ? (!TARGET_SNAKE ? FP_REGS : NO_REGS) : \
491: ((C) == 'x' ? (TARGET_SNAKE ? SNAKE_FP_REGS : NO_REGS) : \
492: ((C) == 'y' ? (TARGET_SNAKE ? HI_SNAKE_FP_REGS : NO_REGS) :\
493: ((C) == 'q' ? SHIFT_REGS : \
494: ((C) == 'a' ? R1_REGS : NO_REGS))))))
495:
496: /* The letters I, J, K, L and M in a register constraint string
497: can be used to stand for particular ranges of immediate operands.
498: This macro defines what the ranges are.
499: C is the letter, and VALUE is a constant value.
500: Return 1 if VALUE is in the range specified by C.
501:
502: HP9000/800 immediate field sizes:
503: 5 bits: scalar/floating short loads + stores; deposit; conditional branch
504: 11 bits: arithmetic immediate, compare immediate
505: 14 bits: loads and stores; load offset
506: 21 bits: load and add immediate long (but this isn't really used)
507: (there are also 13-bit and 26-bit immediates but only in system instructions)
508:
509: `I' is used for the 11 bit constants.
510: `J' is used for the 14 bit constants.
511: `K' is used for unsigned 5 bit constants (extract/deposit operands).
512: `L' is used for the 5 bit constants.
513: `M' is used for 0. */
514:
515: #define CONST_OK_FOR_LETTER_P(VALUE, C) \
516: ((C) == 'I' ? (unsigned) ((VALUE) + 0x400) < 0x800 \
517: : (C) == 'J' ? (unsigned) ((VALUE) + 0x2000) < 0x4000 \
518: : (C) == 'K' ? (unsigned) (VALUE) < 0x20 \
519: : (C) == 'L' ? (unsigned) ((VALUE) + 0x10) < 0x20 \
520: : (C) == 'M' ? (VALUE) == 0 \
521: : 0)
522:
523: /* Similar, but for floating constants, and defining letters G and H.
524: Here VALUE is the CONST_DOUBLE rtx itself. */
525:
526: #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
527: ((C) == 'G' && XINT (VALUE, 0) == 0 && XINT (VALUE, 1) == 0)
528:
529: /* Given an rtx X being reloaded into a reg required to be
530: in class CLASS, return the class of reg to actually use.
531: In general this is just CLASS; but on some machines
532: in some cases it is preferable to use a more restrictive class. */
533: #define PREFERRED_RELOAD_CLASS(X,CLASS) (CLASS)
534:
535: /* Return the register class of a scratch register needed to copy IN into
536: or out of a register in CLASS in MODE. If it can be done directly,
537: NO_REGS is returned. */
538:
539: #define SECONDARY_RELOAD_CLASS(CLASS,MODE,IN) \
540: secondary_reload_class (CLASS, MODE, IN)
541:
542: /* Return the maximum number of consecutive registers
543: needed to represent mode MODE in a register of class CLASS. */
544: #define CLASS_MAX_NREGS(CLASS, MODE) \
545: ((CLASS) == FP_REGS ? 1 : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))
546:
547: /* Stack layout; function entry, exit and calling. */
548:
549: /* Define this if pushing a word on the stack
550: makes the stack pointer a smaller address. */
551: /* #define STACK_GROWS_DOWNWARD */
552:
553: /* Believe it or not. */
554: #define ARGS_GROW_DOWNWARD
555:
556: /* Define this if the nominal address of the stack frame
557: is at the high-address end of the local variables;
558: that is, each additional local variable allocated
559: goes at a more negative offset in the frame. */
560: /* #define FRAME_GROWS_DOWNWARD */
561:
562: /* Offset within stack frame to start allocating local variables at.
563: If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
564: first local allocated. Otherwise, it is the offset to the BEGINNING
565: of the first local allocated. */
566: #define STARTING_FRAME_OFFSET 8
567:
568: /* If we generate an insn to push BYTES bytes,
569: this says how many the stack pointer really advances by.
570: On the hp9k800, don't define this because there are no push insns. */
571: /* #define PUSH_ROUNDING(BYTES) */
572:
573: /* Offset of first parameter from the argument pointer register value.
574: This value will be negated because the arguments grow down.
575: Also note that on STACK_GROWS_UPWARD machines (such as this one)
576: this is the distance from the frame pointer to the end of the first
577: argument, not it's beginning. To get the real offset of the first
578: argument, the size of the argument must be added.
579:
580: ??? Have to check on this.*/
581:
582: /* #define FIRST_PARM_OFFSET(FNDECL) 36 */
583: #define FIRST_PARM_OFFSET(FNDECL) -32
584:
585: /* Absolute value of offset from top-of-stack address to location to store the
586: function parameter if it can't go in a register.
587: Addresses for following parameters are computed relative to this one. */
588: /* #define FIRST_PARM_CALLER_OFFSET(FNDECL) 36 */
589: #define FIRST_PARM_CALLER_OFFSET(FNDECL) -32
590:
591:
592: /* When a parameter is passed in a register, stack space is still
593: allocated for it. */
594: #define REG_PARM_STACK_SPACE(DECL) 16
595:
596: /* Define this if the above stack space is to be considered part of the
597: space allocated by the caller. */
598: #define OUTGOING_REG_PARM_STACK_SPACE
599:
600: /* Keep the stack pointer constant throughout the function.
1.1.1.2 ! root 601: This is both an optimization and a necessity: longjmp
1.1 root 602: doesn't behave itself when the stack pointer moves within
603: the function! */
604: #define ACCUMULATE_OUTGOING_ARGS
605:
606: /* The weird HPPA calling conventions require a minimum of 48 bytes on
607: the stack: 16 bytes for register saves, and 32 bytes for magic.
608: This is the difference between the logical top of stack and the
609: actual sp. */
610: #define STACK_POINTER_OFFSET -32
611:
612: #define STACK_DYNAMIC_OFFSET(FNDECL) \
613: ((STACK_POINTER_OFFSET) - current_function_outgoing_args_size)
614:
615: /* Value is 1 if returning from a function call automatically
616: pops the arguments described by the number-of-args field in the call.
617: FUNTYPE is the data type of the function (as a tree),
618: or for a library call it is an identifier node for the subroutine name. */
619:
620: #define RETURN_POPS_ARGS(FUNTYPE,SIZE) 0
621:
622: /* Define how to find the value returned by a function.
623: VALTYPE is the data type of the value (as a tree).
624: If the precise function being called is known, FUNC is its FUNCTION_DECL;
625: otherwise, FUNC is 0. */
626:
627: /* On the hp9k800 the value is found in register(s) 28(-29), unless
628: the mode is SF or DF. Then the value is returned in fr4 (36, ) */
629:
630:
631: #define FUNCTION_VALUE(VALTYPE, FUNC) \
632: gen_rtx (REG, TYPE_MODE (VALTYPE), ((TYPE_MODE (VALTYPE) == SFmode ||\
633: TYPE_MODE (VALTYPE) == DFmode) ? \
634: (TARGET_SNAKE ? 56 : 36) : 28))
635:
636: #define FUNCTION_OUTGOING_VALUE(VALTYPE, FUNC) \
637: FUNCTION_VALUE(VALTYPE, FUNC)
638:
639: /* Define how to find the value returned by a library function
640: assuming the value has mode MODE. */
641:
642: #define LIBCALL_VALUE(MODE) \
643: gen_rtx (REG, MODE, (MODE == SFmode || MODE == DFmode ?\
644: (TARGET_SNAKE ? 56 : 36) : 28))
645:
646: /* 1 if N is a possible register number for a function value
647: as seen by the caller. */
648:
649: #define FUNCTION_VALUE_REGNO_P(N) ((N) == 28 || (N) == 36 || (N) == 56)
650:
651: /* 1 if N is a possible register number for function argument passing. */
652:
653: #define FUNCTION_ARG_REGNO_P(N) (((N) >= 23 && (N) <= 26) || \
654: ((N) >= 36 && (N) <= 39) || \
655: ((N) >= 56 && (N) <= 63))
656:
657: /* Define a data type for recording info about an argument list
658: during the scan of that argument list. This data type should
659: hold all necessary information about the function itself
660: and about the args processed so far, enough to enable macros
661: such as FUNCTION_ARG to determine where the next arg should go.
662:
663: On the hp9k800, this is a single integer, which is a number of words
664: of arguments scanned so far (including the invisible argument,
665: if any, which holds the structure-value-address).
666: Thus 4 or more means all following args should go on the stack. */
667:
668: #define CUMULATIVE_ARGS int
669:
670: /* Initialize a variable CUM of type CUMULATIVE_ARGS
671: for a call to a function whose data type is FNTYPE.
672: For a library call, FNTYPE is 0.
673: */
674:
675: #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME) ((CUM) = 0)
676:
677: /* Figure out the size in words of the function argument. */
678:
679: #define FUNCTION_ARG_SIZE(MODE, TYPE) \
680: ((((MODE) != BLKmode ? GET_MODE_SIZE (MODE) : int_size_in_bytes (TYPE))+3)/4)
681:
682: /* Update the data in CUM to advance over an argument
683: of mode MODE and data type TYPE.
684: (TYPE is null for libcalls where that information may not be available.) */
685:
686: #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
687: (((((CUM) & 01) && (TYPE) != 0 && TYPE_ALIGN (TYPE) > BITS_PER_WORD)\
688: && (CUM)++), (CUM) += FUNCTION_ARG_SIZE(MODE, TYPE))
689:
690: /* Determine where to put an argument to a function.
691: Value is zero to push the argument on the stack,
692: or a hard register in which to store the argument.
693:
694: MODE is the argument's machine mode.
695: TYPE is the data type of the argument (as a tree).
696: This is null for libcalls where that information may
697: not be available.
698: CUM is a variable of type CUMULATIVE_ARGS which gives info about
699: the preceding args and about the function being called.
700: NAMED is nonzero if this argument is a named parameter
701: (otherwise it is an extra parameter matching an ellipsis). */
702:
703: /* On the hp9k800 the first four words of args are normally in registers
704: and the rest are pushed. But any arg that won't entirely fit in regs
705: is pushed. */
706:
707: #define FUNCTION_ARG_PADDING(MODE, TYPE) function_arg_padding ((MODE), (TYPE))
708:
709: #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
710: (4 >= ((CUM) + FUNCTION_ARG_SIZE ((MODE), (TYPE))) \
711: ? gen_rtx (REG, \
712: (MODE), \
713: ((MODE) == SFmode ? \
714: (TARGET_SNAKE ? 56 + 2 * (CUM) : 36 + (CUM)) : \
715: ((MODE) == DFmode ? ((CUM) ? \
716: (TARGET_SNAKE ? 62 : 39) : \
717: (TARGET_SNAKE ? 58 : 37)) : \
718: (27 - (CUM) - FUNCTION_ARG_SIZE ((MODE), (TYPE)))))) \
719: : 0)
720:
721: /* Define where a function finds its arguments.
722: This would be different from FUNCTION_ARG if we had register windows. */
723:
724: #define FUNCTION_INCOMING_ARG(CUM, MODE, TYPE, NAMED) \
725: FUNCTION_ARG (CUM, MODE, TYPE, NAMED)
726:
727: /* For an arg passed partly in registers and partly in memory,
728: this is the number of registers used.
729: For args passed entirely in registers or entirely in memory, zero. */
730:
731: #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) 0
732:
733: /* If defined, a C expression that gives the alignment boundary, in
734: bits, of an argument with the specified mode and type. If it is
735: not defined, `PARM_BOUNDARY' is used for all arguments. */
736:
737: #define FUNCTION_ARG_BOUNDARY(MODE, TYPE) \
738: (((TYPE) != 0) \
739: ? ((TYPE_ALIGN(TYPE) <= PARM_BOUNDARY) \
740: ? PARM_BOUNDARY \
741: : TYPE_ALIGN(TYPE)) \
742: : ((GET_MODE_ALIGNMENT(MODE) <= PARM_BOUNDARY) \
743: ? PARM_BOUNDARY \
744: : GET_MODE_ALIGNMENT(MODE)))
745:
746: /* Arguments larger than eight bytes are passed by invisible reference */
747:
748: #define FUNCTION_ARG_PASS_BY_REFERENCE(CUM, MODE, TYPE, NAMED) \
749: ((TYPE) ? int_size_in_bytes (TYPE) > 8 : GET_MODE_SIZE (MODE) > 8)
750:
751: extern struct rtx_def *hppa_compare_op0, *hppa_compare_op1;
752: extern enum cmp_type hppa_branch_type;
753:
754: /* Output the label for a function definition. */
755: #ifdef hpux8
756: #define ASM_DOUBLE_ARG_DESCRIPTORS(FILE, ARG0, ARG1) \
757: do { fprintf (FILE, ",ARGW%d=FR", (ARG0)); \
758: fprintf (FILE, ",ARGW%d=FU", (ARG1));} while (0)
759: #else
760: #define ASM_DOUBLE_ARG_DESCRIPTORS(FILE, ARG0, ARG1) \
761: do { fprintf (FILE, ",ARGW%d=FU", (ARG0)); \
762: fprintf (FILE, ",ARGW%d=FR", (ARG1));} while (0)
763: #endif
764: #define ASM_DECLARE_FUNCTION_NAME(FILE, NAME, DECL) \
765: do { tree fntype = DECL_RESULT (DECL); \
766: tree tree_type = TREE_TYPE (DECL); \
767: tree parm; \
768: int i; \
1.1.1.2 ! root 769: if (TREE_PUBLIC (DECL)) \
1.1 root 770: { \
1.1.1.2 ! root 771: fputs ("\t.EXPORT ", FILE); assemble_name (FILE, NAME); \
! 772: fputs (",PRIV_LEV=3", FILE); \
! 773: for (parm = DECL_ARGUMENTS (DECL), i = 0; parm && i < 4; \
! 774: parm = TREE_CHAIN (parm), i++) \
1.1 root 775: { \
1.1.1.2 ! root 776: if (TYPE_MODE (DECL_ARG_TYPE (parm)) == SFmode) \
! 777: fprintf (FILE, ",ARGW%d=FR", i); \
! 778: else if (TYPE_MODE (DECL_ARG_TYPE (parm)) == DFmode) \
! 779: { \
! 780: if (i == 0 || i == 2) \
! 781: { \
! 782: ASM_DOUBLE_ARG_DESCRIPTORS (FILE, i++, i); \
! 783: } \
! 784: else if (i == 1) \
! 785: { \
! 786: ASM_DOUBLE_ARG_DESCRIPTORS (FILE, ++i, ++i); \
! 787: } \
! 788: } \
! 789: else \
! 790: fprintf (FILE, ",ARGW%d=GR", i); \
1.1 root 791: } \
1.1.1.2 ! root 792: /* anonymous args */ \
! 793: if (TYPE_ARG_TYPES (tree_type) != 0 \
! 794: && (TREE_VALUE (tree_last (TYPE_ARG_TYPES (tree_type)))\
! 795: != void_type_node)) \
! 796: { \
! 797: for (; i < 4; i++) \
! 798: fprintf (FILE, ",ARGW%d=GR", i); \
! 799: } \
! 800: if (TYPE_MODE (fntype) == DFmode) \
! 801: fprintf (FILE, ",RTNVAL=FR"); \
! 802: else if (TYPE_MODE (fntype) == SFmode) \
! 803: fprintf (FILE, ",RTNVAL=FU"); \
! 804: else if (fntype != void_type_node) \
! 805: fprintf (FILE, ",RTNVAL=GR"); \
! 806: fputs ("\n", FILE); \
1.1 root 807: } \
1.1.1.2 ! root 808: ASM_OUTPUT_LABEL (FILE, NAME);} while (0)
1.1 root 809:
810: /* Two views of the size of the current frame. */
811: extern int actual_fsize;
812: extern int apparent_fsize;
813:
814: /* This macro generates the assembly code for function entry.
815: FILE is a stdio stream to output the code to.
816: SIZE is an int: how many units of temporary storage to allocate.
817: Refer to the array `regs_ever_live' to determine which registers
818: to save; `regs_ever_live[I]' is nonzero if register number I
819: is ever used in the function. This macro is responsible for
820: knowing which registers should not be saved even if used. */
821:
1.1.1.2 ! root 822: /* On HP-PA, move-double insns between fpu and cpu need an 8-byte block
1.1 root 823: of memory. If any fpu reg is used in the function, we allocate
824: such a block here, at the bottom of the frame, just in case it's needed.
825:
826: If this function is a leaf procedure, then we may choose not
827: to do a "save" insn. The decision about whether or not
828: to do this is made in regclass.c. */
829:
830: #define FUNCTION_PROLOGUE(FILE, SIZE) \
831: output_function_prologue (FILE, SIZE, leaf_function)
832:
833: /* Output assembler code to FILE to increment profiler label # LABELNO
834: for profiling a function entry.
835:
836: Because HPUX _mcount is so different, we actually emit the
837: profiling code in function_prologue. This just stores LABELNO for
838: that. */
839:
840: #ifdef hp800 /* Don't have the proper libraries yet */
841: #define FUNCTION_PROFILER(FILE, LABELNO) {}
842: #else
843: #define PROFILE_BEFORE_PROLOGUE
844: #define FUNCTION_PROFILER(FILE, LABELNO) \
845: { extern int hp_profile_labelno; hp_profile_labelno = (LABELNO);}
846: #endif
847:
848: /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
849: the stack pointer does not matter. The value is tested only in
850: functions that have frame pointers.
851: No definition is equivalent to always zero. */
852:
853: extern int may_call_alloca;
854: extern int current_function_pretend_args_size;
855:
856: #define EXIT_IGNORE_STACK \
857: (get_frame_size () != 0 \
858: || current_function_calls_alloca || current_function_outgoing_args_size)
859:
860:
861: /* This macro generates the assembly code for function exit,
862: on machines that need it. If FUNCTION_EPILOGUE is not defined
863: then individual return instructions are generated for each
864: return statement. Args are same as for FUNCTION_PROLOGUE.
865:
866: The function epilogue should not depend on the current stack pointer!
867: It should use the frame pointer only. This is mandatory because
868: of alloca; we also take advantage of it to omit stack adjustments
869: before returning. */
870:
871: /* This declaration is needed due to traditional/ANSI
872: incompatibilities which cannot be #ifdefed away
873: because they occur inside of macros. Sigh. */
874: extern union tree_node *current_function_decl;
875:
876: #define FUNCTION_EPILOGUE(FILE, SIZE) \
877: output_function_epilogue (FILE, SIZE, leaf_function)
878: #define DELAY_SLOTS_FOR_EPILOGUE 1
879: #define ELIGIBLE_FOR_EPILOGUE_DELAY(trial, slots_filled) \
880: eligible_for_epilogue_delay (trial, slots_filled)
881:
882: /* Output assembler code for a block containing the constant parts
883: of a trampoline, leaving space for the variable parts. */
884:
885: #define TRAMPOLINE_TEMPLATE(FILE) {}
886:
887: /* Length in units of the trampoline for entering a nested function. */
888:
889: #define TRAMPOLINE_SIZE 0
890:
891: /* Emit RTL insns to initialize the variable parts of a trampoline.
892: FNADDR is an RTX for the address of the function's pure code.
893: CXT is an RTX for the static chain value for the function.
894:
895: This takes 16 insns: 2 shifts & 2 ands (to split up addresses), 4 sethi
896: (to load in opcodes), 4 iors (to merge address and opcodes), and 4 writes
897: (to store insns). This is a bit excessive. Perhaps a different
898: mechanism would be better here. */
899: #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) {}
900:
901: /* Emit code for a call to builtin_saveregs. We must emit USE insns which
902: reference the 4 integer arg registers and 4 fp arg registers.
903: Ordinarily they are not call used registers, but they are for
904: _builtin_saveregs, so we must make this explicit. */
905:
906:
1.1.1.2 ! root 907: #if 0
1.1 root 908: #define EXPAND_BUILTIN_SAVEREGS(ARGLIST) \
909: (emit_insn (gen_rtx (USE, VOIDmode, gen_rtx (REG, TImode, 23))), \
910: (TARGET_SNAKE ? \
911: (emit_insn (gen_rtx (USE, VOIDmode, gen_rtx (REG, DFmode, 56))), \
912: emit_insn (gen_rtx (USE, VOIDmode, gen_rtx (REG, DFmode, 58))), \
913: emit_insn (gen_rtx (USE, VOIDmode, gen_rtx (REG, DFmode, 60))), \
914: emit_insn (gen_rtx (USE, VOIDmode, gen_rtx (REG, DFmode, 62)))) : \
915: (emit_insn (gen_rtx (USE, VOIDmode, gen_rtx (REG, DFmode, 36))), \
916: emit_insn (gen_rtx (USE, VOIDmode, gen_rtx (REG, DFmode, 37))), \
917: emit_insn (gen_rtx (USE, VOIDmode, gen_rtx (REG, DFmode, 38))), \
918: emit_insn (gen_rtx (USE, VOIDmode, gen_rtx (REG, DFmode, 39))))))
1.1.1.2 ! root 919: #endif
! 920: #define EXPAND_BUILTIN_SAVEREGS(ARGLIST) (rtx)hppa_builtin_saveregs (ARGLIST)
1.1 root 921:
922:
923: /* Addressing modes, and classification of registers for them. */
924:
925: #define HAVE_POST_INCREMENT
926: #define HAVE_POST_DECREMENT
927:
928: #define HAVE_PRE_DECREMENT
929: #define HAVE_PRE_INCREMENT
930:
931: /* Macros to check register numbers against specific register classes. */
932:
933: /* These assume that REGNO is a hard or pseudo reg number.
934: They give nonzero only if REGNO is a hard reg of the suitable class
935: or a pseudo reg currently allocated to a suitable hard reg.
936: Since they use reg_renumber, they are safe only once reg_renumber
937: has been allocated, which happens in local-alloc.c. */
938:
939: #define REGNO_OK_FOR_INDEX_P(REGNO) \
940: ((REGNO) < 32 || (unsigned) reg_renumber[REGNO] < 32)
941: #define REGNO_OK_FOR_BASE_P(REGNO) \
942: ((REGNO) < 32 || (unsigned) reg_renumber[REGNO] < 32)
943: #define REGNO_OK_FOR_FP_P(REGNO) \
944: (((REGNO) >= 32 || reg_renumber[REGNO] >= 32)\
945: && ((REGNO) <= 111 || reg_renumber[REGNO] <= 111))
946:
947: /* Now macros that check whether X is a register and also,
948: strictly, whether it is in a specified class.
949:
950: These macros are specific to the the hp9k800, and may be used only
951: in code for printing assembler insns and in conditions for
952: define_optimization. */
953:
954: /* 1 if X is an fp register. */
955:
956: #define FP_REG_P(X) (REG_P (X) && REGNO_OK_FOR_FP_P (REGNO (X)))
957:
958: /* Maximum number of registers that can appear in a valid memory address. */
959:
960: #define MAX_REGS_PER_ADDRESS 2
961:
962: /* Recognize any constant value that is a valid address. */
963:
964: #define CONSTANT_ADDRESS_P(X) CONSTANT_P (X)
965:
966: /* Nonzero if the constant value X is a legitimate general operand.
967: It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE. */
968:
969: /*#define LEGITIMATE_CONSTANT_P(X) (1)*/
970: #define LEGITIMATE_CONSTANT_P(X) \
971: (GET_CODE (X) != CONST_DOUBLE)
972:
973: /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
974: and check its validity for a certain class.
975: We have two alternate definitions for each of them.
976: The usual definition accepts all pseudo regs; the other rejects
977: them unless they have been allocated suitable hard regs.
978: The symbol REG_OK_STRICT causes the latter definition to be used.
979:
980: Most source files want to accept pseudo regs in the hope that
981: they will get allocated to the class that the insn wants them to be in.
982: Source files for reload pass need to be strict.
983: After reload, it makes no difference, since pseudo regs have
984: been eliminated by then. */
985:
1.1.1.2 ! root 986: /* Optional extra constraints for this machine. Borrowed from sparc.h.
1.1 root 987:
988: For the HPPA, `Q' means that this is a memory operand but not a
989: symbolic memory operand. Note that an unassigned pseudo register
990: is such a memory operand. Needed because reload will generate
991: these things in insns and then not re-recognize the insns, causing
992: constrain_operands to fail.
993:
994: `R' handles the LO_SUM which can be an address for `Q'.
995:
996: `S' handles constraints for calls.
997:
998: `T' is for fp load and store addresses.*/
999:
1000: #ifndef REG_OK_STRICT
1001:
1002: /* Nonzero if X is a hard reg that can be used as an index
1003: or if it is a pseudo reg. */
1004: #define REG_OK_FOR_INDEX_P(X) ((unsigned) REGNO (X) - 32 >= 32)
1005: /* Nonzero if X is a hard reg that can be used as a base reg
1006: or if it is a pseudo reg. */
1007: #define REG_OK_FOR_BASE_P(X) ((unsigned) REGNO (X) - 32 >= 32)
1008:
1009: #define EXTRA_CONSTRAINT(OP, C) \
1010: ((C) == 'Q' ? \
1011: ((GET_CODE (OP) == MEM \
1012: && memory_address_p (GET_MODE (OP), XEXP (OP, 0)) \
1013: && ! symbolic_memory_operand (OP, VOIDmode))) \
1014: : ((C) == 'R' ? \
1015: (GET_CODE (OP) == LO_SUM \
1016: && GET_CODE (XEXP (OP, 0)) == REG \
1017: && REG_OK_FOR_BASE_P (XEXP (OP, 0))) \
1018: : ((C) == 'S' \
1019: ? CONSTANT_P (OP) || memory_address_p (Pmode, OP)\
1020: : ((C) == 'T' ? short_memory_operand (OP, VOIDmode) : 0))))\
1021:
1022:
1023: #else
1024:
1025: /* Nonzero if X is a hard reg that can be used as an index. */
1026: #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
1027: /* Nonzero if X is a hard reg that can be used as a base reg. */
1028: #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
1029:
1030: #define EXTRA_CONSTRAINT(OP, C) \
1031: (((C) == 'Q' || (C) == 'T') ? \
1032: (GET_CODE (OP) == REG ? \
1033: (REGNO (OP) >= FIRST_PSEUDO_REGISTER \
1034: && reg_renumber[REGNO (OP)] < 0) \
1035: : GET_CODE (OP) == MEM) \
1036: : ((C) == 'R' ? \
1037: (GET_CODE (OP) == LO_SUM \
1038: && GET_CODE (XEXP (OP, 0)) == REG \
1039: && REG_OK_FOR_BASE_P (XEXP (OP, 0))) \
1040: : (CONSTANT_P (OP) \
1041: || (GET_CODE (OP) == REG && reg_renumber[REGNO (OP)] > 0)\
1042: || strict_memory_address_p (Pmode, OP))))
1043:
1044: #endif
1045:
1046: /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
1047: that is a valid memory address for an instruction.
1048: The MODE argument is the machine mode for the MEM expression
1049: that wants to use this address.
1050:
1051: On the hp9k800, the actual legitimate addresses must be
1052: REG+REG, REG+(REG*SCALE) or REG+SMALLINT.
1053: But we can treat a SYMBOL_REF as legitimate if it is part of this
1054: function's constant-pool, because such addresses can actually
1055: be output as REG+SMALLINT. */
1056:
1057: #define VAL_5_BITS_P(X) ((unsigned)(X) + 0x10 < 0x20)
1058: #define INT_5_BITS(X) VAL_5_BITS_P (INTVAL (X))
1059:
1060: #define VAL_U5_BITS_P(X) ((unsigned)(X) < 0x20)
1061: #define INT_U5_BITS(X) VAL_U5_BITS_P (INTVAL (X))
1062:
1063: #define VAL_11_BITS_P(X) ((unsigned)(X) + 0x400 < 0x800)
1064: #define INT_11_BITS(X) VAL_11_BITS_P (INTVAL (X))
1065:
1066: #define VAL_14_BITS_P(X) ((unsigned)(X) + 0x2000 < 0x4000)
1067: #define INT_14_BITS(X) VAL_14_BITS_P (INTVAL (X))
1068:
1069: #define FITS_14_BITS(X) \
1070: (GET_CODE (X) == CONST_INT && INT_14_BITS (X))
1071:
1072: #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
1073: { \
1.1.1.2 ! root 1074: if ((REG_P (X) && REG_OK_FOR_BASE_P (X)) \
1.1 root 1075: || ((GET_CODE (X) == PRE_DEC || GET_CODE (X) == POST_DEC \
1076: || GET_CODE (X) == PRE_INC || GET_CODE (X) == POST_INC) \
1.1.1.2 ! root 1077: && REG_P (XEXP (X, 0)) \
! 1078: && REG_OK_FOR_BASE_P (XEXP (X, 0)))) \
1.1 root 1079: goto ADDR; \
1080: else if (GET_CODE (X) == PLUS) \
1081: { \
1082: rtx base = 0, index; \
1083: if (flag_pic && XEXP (X, 0) == pic_offset_table_rtx)\
1084: { \
1085: if (GET_CODE (XEXP (X, 1)) == REG \
1086: && REG_OK_FOR_BASE_P (XEXP (X, 1))) \
1087: goto ADDR; \
1088: else if (flag_pic == 1 \
1089: && GET_CODE (XEXP (X, 1)) != REG \
1090: && GET_CODE (XEXP (X, 1)) != LO_SUM \
1091: && GET_CODE (XEXP (X, 1)) != MEM) \
1092: goto ADDR; \
1093: } \
1094: else if (REG_P (XEXP (X, 0)) \
1095: && REG_OK_FOR_BASE_P (XEXP (X, 0))) \
1096: base = XEXP (X, 0), index = XEXP (X, 1); \
1097: else if (REG_P (XEXP (X, 1)) \
1098: && REG_OK_FOR_BASE_P (XEXP (X, 1))) \
1099: base = XEXP (X, 1), index = XEXP (X, 0); \
1100: if (base != 0) \
1101: if (GET_CODE (index) == CONST_INT \
1102: && ((INT_14_BITS (index) && (MODE) != SFmode && (MODE) != DFmode) \
1103: || INT_5_BITS (index))) \
1104: goto ADDR; \
1105: } \
1106: else if (GET_CODE (X) == LO_SUM \
1107: && GET_CODE (XEXP (X, 0)) == REG \
1108: && REG_OK_FOR_BASE_P (XEXP (X, 0)) \
1109: && CONSTANT_P (XEXP (X, 1)) \
1110: && (MODE) != SFmode \
1111: && (MODE) != DFmode) \
1112: goto ADDR; \
1113: else if (GET_CODE (X) == LO_SUM \
1114: && GET_CODE (XEXP (X, 0)) == SUBREG \
1115: && GET_CODE (SUBREG_REG (XEXP (X, 0))) == REG\
1116: && REG_OK_FOR_BASE_P (SUBREG_REG (XEXP (X, 0)))\
1117: && CONSTANT_P (XEXP (X, 1)) \
1118: && (MODE) != SFmode \
1119: && (MODE) != DFmode) \
1120: goto ADDR; \
1121: else if (GET_CODE (X) == LABEL_REF \
1122: || (GET_CODE (X) == CONST_INT \
1123: && INT_14_BITS (X))) \
1124: goto ADDR; \
1125: }
1126:
1127: /* Try machine-dependent ways of modifying an illegitimate address
1128: to be legitimate. If we find one, return the new, valid address.
1129: This macro is used in only one place: `memory_address' in explow.c.
1130:
1131: OLDX is the address as it was before break_out_memory_refs was called.
1132: In some cases it is useful to look at this to decide what needs to be done.
1133:
1134: MODE and WIN are passed so that this macro can use
1135: GO_IF_LEGITIMATE_ADDRESS.
1136:
1137: It is always safe for this macro to do nothing. It exists to recognize
1138: opportunities to optimize the output. */
1139:
1140: /* On the hp9k800, change REG+N into REG+REG, and REG+(X*Y) into REG+REG. */
1141:
1142: #define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) \
1143: { if (GET_CODE (X) == PLUS && CONSTANT_ADDRESS_P (XEXP (X, 1))) \
1144: (X) = gen_rtx (PLUS, SImode, XEXP (X, 0), \
1145: copy_to_mode_reg (SImode, XEXP (X, 1))); \
1146: if (GET_CODE (X) == PLUS && CONSTANT_ADDRESS_P (XEXP (X, 0))) \
1147: (X) = gen_rtx (PLUS, SImode, XEXP (X, 1), \
1148: copy_to_mode_reg (SImode, XEXP (X, 0))); \
1149: if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 0)) == MULT) \
1150: (X) = gen_rtx (PLUS, SImode, XEXP (X, 1), \
1151: force_operand (XEXP (X, 0), 0)); \
1152: if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == MULT) \
1153: (X) = gen_rtx (PLUS, SImode, XEXP (X, 0), \
1154: force_operand (XEXP (X, 1), 0)); \
1155: if (memory_address_p (MODE, X)) \
1156: goto WIN; \
1157: if (flag_pic) (X) = legitimize_pic_address (X, MODE, gen_reg_rtx (Pmode));\
1158: else if ((GET_CODE (X) == SYMBOL_REF & read_only_operand (X)) \
1.1.1.2 ! root 1159: || GET_CODE (X) == LABEL_REF) \
1.1 root 1160: (X) = gen_rtx (LO_SUM, Pmode, \
1161: copy_to_mode_reg (Pmode, gen_rtx (HIGH, Pmode, X)), X); \
1162: else if (GET_CODE (X) == SYMBOL_REF) \
1163: (X) = gen_rtx (LO_SUM, Pmode, \
1164: copy_to_mode_reg (Pmode, \
1165: gen_rtx (PLUS, Pmode, \
1166: copy_to_mode_reg (Pmode,\
1167: gen_rtx (HIGH, Pmode, X)),\
1168: gen_rtx (REG, Pmode, 27))),\
1169: X); \
1170: if (memory_address_p (MODE, X)) \
1171: goto WIN;}
1172:
1173: /* Go to LABEL if ADDR (a legitimate address expression)
1174: has an effect that depends on the machine mode it is used for. */
1175:
1176: #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) \
1177: if (GET_CODE (ADDR) == PRE_DEC \
1178: || GET_CODE (ADDR) == POST_DEC \
1179: || GET_CODE (ADDR) == PRE_INC \
1180: || GET_CODE (ADDR) == POST_INC) \
1181: goto LABEL
1182:
1183: /* Define this macro if references to a symbol must be treated
1184: differently depending on something about the variable or
1185: function named by the symbol (such as what section it is in).
1186:
1187: The macro definition, if any, is executed immediately after the
1.1.1.2 ! root 1188: rtl for DECL or other node is created.
1.1 root 1189: The value of the rtl will be a `mem' whose address is a
1190: `symbol_ref'.
1191:
1192: The usual thing for this macro to do is to a flag in the
1193: `symbol_ref' (such as `SYMBOL_REF_FLAG') or to store a modified
1194: name string in the `symbol_ref' (if one bit is not enough
1195: information).
1196:
1197: On the PA-RISC we use this to indicate if a symbol is in text or
1.1.1.2 ! root 1198: data space. */
1.1 root 1199:
1200: #define ENCODE_SECTION_INFO(DECL)\
1201: do \
1202: { \
1203: if (TREE_CODE (DECL) == FUNCTION_DECL) \
1204: SYMBOL_REF_FLAG (XEXP (DECL_RTL (DECL), 0)) = 1; \
1205: else \
1206: { \
1.1.1.2 ! root 1207: rtx rtl = (TREE_CODE_CLASS (TREE_CODE (DECL)) != 'd' \
! 1208: ? TREE_CST_RTL (DECL) : DECL_RTL (DECL)); \
! 1209: if (RTX_UNCHANGING_P (rtl) && !MEM_VOLATILE_P (rtl) \
1.1 root 1210: && !flag_pic) \
1.1.1.2 ! root 1211: SYMBOL_REF_FLAG (XEXP (rtl, 0)) = 1; \
1.1 root 1212: } \
1213: } \
1214: while (0)
1215:
1216:
1217: /* Specify the machine mode that this machine uses
1218: for the index in the tablejump instruction. */
1219: #define CASE_VECTOR_MODE SImode
1220:
1221: /* Define this if the tablejump instruction expects the table
1222: to contain offsets from the address of the table.
1223: Do not define this if the table should contain absolute addresses. */
1224: /* #define CASE_VECTOR_PC_RELATIVE */
1225:
1226: /* Specify the tree operation to be used to convert reals to integers. */
1227: #define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR
1228:
1229: /* This is the kind of divide that is easiest to do in the general case. */
1230: #define EASY_DIV_EXPR TRUNC_DIV_EXPR
1231:
1232: /* Define this as 1 if `char' should by default be signed; else as 0. */
1233: #define DEFAULT_SIGNED_CHAR 1
1234:
1235: /* Max number of bytes we can move from memory to memory
1236: in one reasonably fast instruction. */
1237: #define MOVE_MAX 8
1238:
1239: /* Define if normal loads of shorter-than-word items from memory clears
1240: the rest of the bigs in the register. */
1241: #define BYTE_LOADS_ZERO_EXTEND
1242:
1243: /* Nonzero if access to memory by bytes is slow and undesirable. */
1244: #define SLOW_BYTE_ACCESS 1
1245:
1246: /* Do not break .stabs pseudos into continuations. */
1247: #define DBX_CONTIN_LENGTH 0
1248:
1249: /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
1250: is done just by pretending it is already truncated. */
1251: #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
1252:
1253: /* We assume that the store-condition-codes instructions store 0 for false
1254: and some other value for true. This is the value stored for true. */
1255:
1256: #define STORE_FLAG_VALUE 1
1257:
1258: /* When a prototype says `char' or `short', really pass an `int'. */
1259: #define PROMOTE_PROTOTYPES
1260:
1261: /* Specify the machine mode that pointers have.
1262: After generation of rtl, the compiler makes no further distinction
1263: between pointers and any other objects of this machine mode. */
1264: #define Pmode SImode
1265:
1266: /* Add any extra modes needed to represent the condition code.
1267:
1268: HPPA floating comparisons produce condition codes. */
1269: #define EXTRA_CC_MODES CCFPmode
1270:
1271: /* Define the names for the modes specified above. */
1272: #define EXTRA_CC_NAMES "CCFP"
1273:
1274: /* Given a comparison code (EQ, NE, etc.) and the first operand of a COMPARE,
1275: return the mode to be used for the comparison. For floating-point, CCFPmode
1276: should be used. CC_NOOVmode should be used when the first operand is a
1277: PLUS, MINUS, or NEG. CCmode should be used when no special processing is
1278: needed. */
1279: #define SELECT_CC_MODE(OP,X) \
1280: (GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT ? CCFPmode : CCmode) \
1281:
1282: /* A function address in a call instruction
1283: is a byte address (for indexing purposes)
1284: so give the MEM rtx a byte's mode. */
1285: #define FUNCTION_MODE SImode
1286:
1287: /* Define this if addresses of constant functions
1288: shouldn't be put through pseudo regs where they can be cse'd.
1289: Desirable on machines where ordinary constants are expensive
1290: but a CALL with constant address is cheap. */
1291: #define NO_FUNCTION_CSE
1292:
1293: /* Compute the cost of computing a constant rtl expression RTX
1294: whose rtx-code is CODE. The body of this macro is a portion
1295: of a switch statement. If the code is computed here,
1296: return it with a return statement. Otherwise, break from the switch. */
1297:
1298: #define CONST_COSTS(RTX,CODE) \
1299: case CONST_INT: \
1300: if (INTVAL (RTX) == 0) return 0; \
1301: if (INT_14_BITS (RTX)) return 1; \
1302: case CONST: \
1303: case LABEL_REF: \
1304: case SYMBOL_REF: \
1305: return 2; \
1306: case CONST_DOUBLE: \
1307: return 4;
1308:
1309: #define ADDRESS_COST(RTX) \
1310: (GET_CODE (RTX) == REG ? 1 : hppa_address_cost (RTX))
1311:
1312: /* Compute extra cost of moving data between one register class
1313: and another. */
1314: #define REGISTER_MOVE_COST(CLASS1, CLASS2) \
1315: (((CLASS1 == FP_REGS && CLASS2 == GENERAL_REGS) \
1316: || (CLASS1 == GENERAL_REGS && CLASS2 == FP_REGS)) ? 6 : 2)
1317:
1.1.1.2 ! root 1318: /* Provide the costs of a rtl expression. This is in the body of a
! 1319: switch on CODE. The purpose for the cost of MULT is to encourage
! 1320: `synth_mult' to find a synthetic multiply when reasonable. */
! 1321:
! 1322: #define RTX_COSTS(X,CODE) \
! 1323: case MULT: \
! 1324: return COSTS_N_INSNS (20); \
! 1325: case DIV: \
! 1326: case UDIV: \
! 1327: case MOD: \
! 1328: case UMOD: \
! 1329: return COSTS_N_INSNS (60); \
! 1330: case PLUS: /* this includes shNadd insns */ \
! 1331: return COSTS_N_INSNS (1) + 2;
! 1332:
1.1 root 1333: /* Conditional branches with empty delay slots have a length of two. */
1334: #define ADJUST_INSN_LENGTH(INSN, LENGTH) \
1335: if (GET_CODE (INSN) == CALL_INSN \
1336: || (GET_CODE (INSN) == JUMP_INSN && ! simplejump_p (insn))) \
1337: LENGTH += 1;
1338:
1339: /* Control the assembler format that we output. */
1340:
1341: /* Output at beginning of assembler file. */
1342:
1343: #define ASM_FILE_START(FILE) \
1344: do { fprintf (FILE, "\t.SPACE $PRIVATE$\n\
1345: \t.SUBSPA $DATA$,QUAD=1,ALIGN=8,ACCESS=31\n\
1346: \t.SPACE $TEXT$\n\
1347: \t.SUBSPA $LIT$,QUAD=0,ALIGN=8,ACCESS=44\n\
1348: \t.SUBSPA $CODE$,QUAD=0,ALIGN=8,ACCESS=44,CODE_ONLY\n\
1349: \t.IMPORT $global$,DATA\n\
1350: \t.IMPORT $$dyncall,MILLICODE\n");\
1351: if (profile_flag)\
1352: fprintf (FILE, "\t.IMPORT __gcc_mcount, CODE\n");\
1353: } while (0)
1354:
1355: /* Output to assembler file text saying following lines
1356: may contain character constants, extra white space, comments, etc. */
1357:
1358: #define ASM_APP_ON ""
1359:
1360: /* Output to assembler file text saying following lines
1361: no longer contain unusual constructs. */
1362:
1363: #define ASM_APP_OFF ""
1364:
1365: /* We don't yet know how to identify GCC to HP series 800. */
1366: #define ASM_IDENTIFY_GCC(FILE) fprintf (FILE, "; gcc_compiled.:\n")
1367:
1368: /* Output before code. */
1369:
1.1.1.2 ! root 1370: /* Supposedly the assembler rejects the command if there is no tab! */
1.1 root 1371: #define TEXT_SECTION_ASM_OP "\t.SPACE $TEXT$\n\t.SUBSPA $CODE$\n"
1372:
1373: /* Output before writable data. */
1374:
1.1.1.2 ! root 1375: /* Supposedly the assembler rejects the command if there is no tab! */
1.1 root 1376: #define DATA_SECTION_ASM_OP "\t.SPACE $PRIVATE$\n\t.SUBSPA $DATA$\n"
1377:
1378: /* How to refer to registers in assembler output.
1379: This sequence is indexed by compiler's hard-register-number (see above). */
1380:
1381: #define REGISTER_NAMES \
1382: {"0", "1", "2", "3", "4", "5", "6", "7", "8", "9", \
1383: "10", "11", "12", "13", "14", "15", "16", "17", "18", "19", \
1384: "20", "21", "22", "23", "24", "25", "26", "27", "28", "29", \
1385: "30", "31", \
1386: "0", "1", "2", "3", "4", "5", "6", "7", \
1387: "8", "9", "10", "11", "12", "13", "14", "15", \
1388: "0", "0R", "1", "1R", "2", "2R", "3", "3R", \
1389: "4", "4R", "5", "5R", "6", "6R", "7", "7R", \
1390: "8", "8R", "9", "9R", "10", "10R", "11", "11R", \
1391: "12", "12R", "13", "13R", "14", "14R", "15", "15R", \
1392: "16", "16R", "17", "17R", "18", "18R", "19", "19R", \
1393: "20", "20R", "21", "21R", "22", "22R", "23", "23R", \
1394: "24", "24R", "25", "25R", "26", "26R", "27", "27R", \
1.1.1.2 ! root 1395: "28", "28R", "29", "29R", "30", "30R", "31", "31R", "SAR"}
1.1 root 1396:
1397: /* How to renumber registers for dbx and gdb. */
1398:
1399: #define DBX_REGISTER_NUMBER(REGNO) (REGNO)
1400:
1401: /* This is how to output the definition of a user-level label named NAME,
1402: such as the label on a static function or variable NAME. */
1403:
1404: #define ASM_OUTPUT_LABEL(FILE, NAME) \
1405: do { assemble_name (FILE, NAME); fputc ('\n', FILE); } while (0)
1406:
1407: /* This is how to output a command to make the user-level label named NAME
1408: defined for reference from other files. */
1409:
1410: #define ASM_OUTPUT_EXTERNAL(FILE, DECL, NAME) \
1411: do { fputs ("\t.IMPORT ", FILE); \
1412: assemble_name (FILE, NAME); \
1413: if (TREE_CODE (DECL) == VAR_DECL && ! TREE_READONLY (DECL)) \
1414: fputs (",DATA\n", FILE); \
1415: else \
1416: fputs (",CODE\n", FILE); \
1417: } while (0)
1418:
1419: /* hpux ld doesn't output the object file name, or anything useful at
1420: all, to indicate the start of an object file's symbols. This screws
1421: up gdb, so we'll output this magic cookie at the end of an object
1422: file with debugging symbols */
1423:
1424: #define ASM_FILE_END(FILE) \
1425: do { if (write_symbols == DBX_DEBUG)\
1426: { fputs (TEXT_SECTION_ASM_OP, FILE);\
1427: fputs (".stabs \"end_file.\",4,0,0,Ltext_end\nLtext_end:\n",\
1428: (FILE));\
1429: }\
1430: } while (0)
1431:
1432: /* The bogus HP assembler requires ALL external references to be
1433: "imported", even library calls. They look a bit different, so
1434: here's this macro. */
1435:
1436: #define ASM_OUTPUT_EXTERNAL_LIBCALL(FILE, RTL) \
1437: do { fputs ("\t.IMPORT ", FILE); \
1438: assemble_name (FILE, XSTR ((RTL), 0)); \
1439: fputs (",CODE\n", FILE); \
1440: } while (0)
1441:
1442: #define ASM_GLOBALIZE_LABEL(FILE, NAME) \
1443: do { fputs ("\t.EXPORT ", FILE); assemble_name (FILE, NAME); \
1444: fputs ("\n", FILE);} while (0)
1445:
1446: /* This is how to output a reference to a user-level label named NAME.
1447: `assemble_name' uses this. */
1448:
1449: #define ASM_OUTPUT_LABELREF(FILE,NAME) \
1450: fprintf (FILE, "%s", NAME)
1451:
1452: /* This is how to output an internal numbered label where
1453: PREFIX is the class of label and NUM is the number within the class. */
1454:
1455: #define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \
1456: fprintf (FILE, "%s$%04d\n", PREFIX, NUM)
1457:
1458: /* This is how to store into the string LABEL
1459: the symbol_ref name of an internal numbered label where
1460: PREFIX is the class of label and NUM is the number within the class.
1461: This is suitable for output with `assemble_name'. */
1462:
1463: #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \
1464: sprintf (LABEL, "*%s$%04d", PREFIX, NUM)
1465:
1466: /* This is how to output an assembler line defining a `double' constant. */
1467:
1468: #define ASM_OUTPUT_DOUBLE(FILE,VALUE) \
1469: do { union { double d; int i[2];} __u; \
1470: __u.d = (VALUE); \
1471: fprintf (FILE, "\t; .double %.20e\n\t.word %d ; = 0x%x\n\t.word %d ; = 0x%x\n", \
1472: __u.d, __u.i[0], __u.i[0], __u.i[1], __u.i[1]); \
1473: } while (0)
1474:
1475: /* This is how to output an assembler line defining a `float' constant. */
1476:
1477: #define ASM_OUTPUT_FLOAT(FILE,VALUE) \
1478: do { union { float f; int i;} __u; \
1479: __u.f = (VALUE); \
1480: fprintf (FILE, "\t; .float %.12e\n\t.word %d ; = 0x%x\n", __u.f, __u.i, __u.i); \
1481: } while (0)
1482:
1483: /* This is how to output an assembler line defining an `int' constant. */
1484:
1485: #define ASM_OUTPUT_INT(FILE,VALUE) \
1486: ( fprintf (FILE, "\t.word "), \
1487: output_addr_const (FILE, (VALUE)), \
1488: fprintf (FILE, "\n"))
1489:
1490: /* Likewise for `short' and `char' constants. */
1491:
1492: #define ASM_OUTPUT_SHORT(FILE,VALUE) \
1493: ( fprintf (FILE, "\t.half "), \
1494: output_addr_const (FILE, (VALUE)), \
1495: fprintf (FILE, "\n"))
1496:
1497: #define ASM_OUTPUT_CHAR(FILE,VALUE) \
1498: ( fprintf (FILE, "\t.byte "), \
1499: output_addr_const (FILE, (VALUE)), \
1500: fprintf (FILE, "\n"))
1501:
1502: /* This is how to output an assembler line for a numeric constant byte. */
1503:
1504: #define ASM_OUTPUT_BYTE(FILE,VALUE) \
1505: fprintf (FILE, "\t.byte 0x%x\n", (VALUE))
1506:
1507: #define ASM_OUTPUT_ASCII(FILE, P, SIZE) \
1508: output_ascii ((FILE), (P), (SIZE))
1509:
1510: #define ASM_OUTPUT_REG_PUSH(FILE,REGNO) \
1511: fprintf (FILE, "\tstws,mb %s,4(0,30)\n", reg_names[REGNO])
1512:
1513: /* This is how to output an insn to pop a register from the stack.
1514: It need not be very fast code. */
1515:
1516: #define ASM_OUTPUT_REG_POP(FILE,REGNO) \
1517: fprintf (FILE, "\tldws,ma -4(0,30),%s\n", reg_names[REGNO])
1518:
1519: /* This is how to output an element of a case-vector that is absolute.
1520: Note that this method makes filling these branch delay slots
1521: virtually impossible. */
1522:
1523: #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
1524: fprintf (FILE, "\tb L$%04d\n\tnop\n", VALUE)
1525:
1526: /* This is how to output an element of a case-vector that is relative.
1527: (the hp9k800 does not use such vectors,
1528: but we must define this macro anyway.) */
1529:
1530: #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, VALUE, REL) \
1531: fprintf (FILE, "\tword L%d-L%d\n", VALUE, REL)
1532:
1533: /* This is how to output an assembler line
1534: that says to advance the location counter
1535: to a multiple of 2**LOG bytes. */
1536:
1537: #define ASM_OUTPUT_ALIGN(FILE,LOG) \
1538: fprintf (FILE, "\t.align %d\n", (1<<(LOG)))
1539:
1540: #define ASM_OUTPUT_SKIP(FILE,SIZE) \
1541: fprintf (FILE, "\t.blockz %d\n", (SIZE))
1542:
1543: /* This says how to output an assembler line
1544: to define a global common symbol. */
1545:
1546: #define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \
1547: ( data_section (), \
1548: assemble_name ((FILE), (NAME)), \
1549: fputs ("\t.comm ", (FILE)), \
1550: fprintf ((FILE), "%d\n", (ROUNDED)))
1551:
1552: /* This says how to output an assembler line
1553: to define a local common symbol. */
1554:
1555: #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE, ROUNDED) \
1556: ( data_section (), \
1557: fprintf ((FILE), "\t.align %d\n", (SIZE) <= 4 ? 4 : 8), \
1558: assemble_name ((FILE), (NAME)), \
1559: fprintf ((FILE), "\n\t.blockz %d\n", (ROUNDED)))
1560:
1561: /* Store in OUTPUT a string (made with alloca) containing
1562: an assembler-name for a local static variable named NAME.
1563: LABELNO is an integer which is different for each call. */
1564:
1565: #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \
1566: ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 12), \
1567: sprintf ((OUTPUT), "%s___%d", (NAME), (LABELNO)))
1568:
1569: /* Define the parentheses used to group arithmetic operations
1570: in assembler code. */
1571:
1572: #define ASM_OPEN_PAREN "("
1573: #define ASM_CLOSE_PAREN ")"
1574:
1575: /* Define results of standard character escape sequences. */
1576: #define TARGET_BELL 007
1577: #define TARGET_BS 010
1578: #define TARGET_TAB 011
1579: #define TARGET_NEWLINE 012
1580: #define TARGET_VT 013
1581: #define TARGET_FF 014
1582: #define TARGET_CR 015
1583:
1584: #define PRINT_OPERAND_PUNCT_VALID_P(CHAR) \
1585: ((CHAR) == '@' || (CHAR) == '#' || (CHAR) == '*' || (CHAR) == '^')
1586:
1587: /* Print operand X (an rtx) in assembler syntax to file FILE.
1588: CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
1589: For `%' followed by punctuation, CODE is the punctuation and X is null.
1590:
1591: On the hp9k800, the CODE can be `r', meaning this is a register-only operand
1592: and an immediate zero should be represented as `r0'.
1593:
1594: Several % codes are defined:
1595: O an operation
1596: C compare conditions
1597: N extract conditions
1598: M modifier to handle preincrement addressing for memory refs.
1599: F modifier to handle preincrement addressing for fp memory refs */
1600:
1601: #define PRINT_OPERAND(FILE, X, CODE) print_operand (FILE, X, CODE)
1602:
1603:
1604: /* Print a memory address as an operand to reference that memory location. */
1605:
1606: #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \
1607: { register rtx addr = ADDR; \
1608: register rtx base; \
1609: int offset; \
1610: switch (GET_CODE (addr)) \
1611: { \
1612: case REG: \
1613: fprintf (FILE, "0(0,%s)", reg_names [REGNO (addr)]); \
1614: break; \
1615: case PLUS: \
1616: if (GET_CODE (XEXP (addr, 0)) == CONST_INT) \
1617: offset = INTVAL (XEXP (addr, 0)), base = XEXP (addr, 1); \
1618: else if (GET_CODE (XEXP (addr, 1)) == CONST_INT) \
1619: offset = INTVAL (XEXP (addr, 1)), base = XEXP (addr, 0); \
1620: else \
1621: abort (); \
1622: fprintf (FILE, "%d(0,%s)", offset, reg_names [REGNO (base)]); \
1623: break; \
1624: case LO_SUM: \
1625: fputs ("R'", FILE); \
1626: output_global_address (FILE, XEXP (addr, 1)); \
1627: fputs ("(", FILE); \
1628: output_operand (XEXP (addr, 0), 0); \
1629: fputs (")", FILE); \
1630: break; \
1631: default: \
1632: output_addr_const (FILE, addr); \
1633: }}
1634:
1635:
1636: #define SMALL_INT(OP) INT_14_BITS (OP)
1.1.1.2 ! root 1637: /* Define functions in hp800.c and used in insn-output.c. */
1.1 root 1638:
1639: extern char *output_move_double ();
1640: extern char *output_fp_move_double ();
1641: extern char *output_block_move ();
1642: extern char *output_scc_insn ();
1643: extern char *output_cbranch ();
1644: extern char *output_return ();
1645: extern char *output_floatsisf2 ();
1646: extern char *output_floatsidf2 ();
1647: extern char *output_mul_insn ();
1648: extern char *output_div_insn ();
1649: extern char *output_mod_insn ();
1650: extern void output_arg_descriptor ();
1651: extern void output_global_address ();
1652: extern struct rtx_def *legitimize_pic_address ();
This archive runs on limited infrastructure. Preserving old code on modern bandwidth. Automated agents are requested to crawl responsibly.