--- gcc/config/i386.h	2018/04/24 17:53:46	1.1.1.2
+++ gcc/config/i386.h	2018/04/24 17:58:31	1.1.1.3
@@ -57,6 +57,15 @@ extern int target_flags;
    and is not intended to be usable on this cpu.  */
 #define TARGET_REGPARM (target_flags & 020)
 
+/* Put uninitialized locals into bss, not data.
+   Meaningful only on svr3.  */
+#define TARGET_SVR3_SHLIB (target_flags & 040)
+
+/* Use IEEE floating point comparisons.  These handle correctly the cases
+   where the result of a comparison is unordered.  Normally SIGFPE is
+   generated in such cases, in which case this isn't needed.  */
+#define TARGET_IEEE_FP (target_flags & 0100)
+
 /* Macro to define tables used to set the flags.
    This is a list in braces of pairs in braces,
    each pair being { "NAME", VALUE }
@@ -73,6 +82,10 @@ extern int target_flags;
     { "nortd", -8},				\
     { "regparm", 020},				\
     { "noregparm", -020},			\
+    { "svr3-shlib", 040},			\
+    { "nosvr3-shlib", -040},			\
+    { "ieee-fp", 0100},				\
+    { "noieee-fp", -0100},			\
     { "", TARGET_DEFAULT}}
 
 /* target machine storage layout */
@@ -1087,14 +1100,19 @@ while (0)
 /* Provide the costs of a rtl expression.  This is in the body of a
    switch on CODE. */
 
-#define RTX_COSTS(X,CODE)				\
+#define RTX_COSTS(X,CODE,OUTER_CODE)			\
   case MULT:						\
     return COSTS_N_INSNS (10);				\
   case DIV:						\
   case UDIV:						\
   case MOD:						\
   case UMOD:						\
-    return COSTS_N_INSNS (40);
+    return COSTS_N_INSNS (40);				\
+  case PLUS:						\
+    if (GET_CODE (XEXP (X, 0)) == REG			\
+        && GET_CODE (XEXP (X, 1)) == CONST_INT)		\
+      return 1;						\
+    break;
 
 
 /* Compute the cost of computing a constant rtl expression RTX
@@ -1102,7 +1120,7 @@ while (0)
    of a switch statement.  If the code is computed here,
    return it with a return statement.  Otherwise, break from the switch.  */
 
-#define CONST_COSTS(RTX,CODE) \
+#define CONST_COSTS(RTX,CODE,OUTER_CODE) \
   case CONST_INT:						\
   case CONST:							\
   case LABEL_REF:						\
@@ -1114,11 +1132,7 @@ while (0)
       return code == 1 ? 0 :					\
 	     code == 2 ? 1 :					\
 			 2;					\
-    }								\
-  case PLUS:							\
-    if (GET_CODE (XEXP (RTX, 0)) == REG				\
-        && GET_CODE (XEXP (RTX, 1)) == CONST_INT)		\
-      return 1;
+    }
 
 /* Compute the cost of an address.  This is meant to approximate the size
    and/or execution delay of an insn using that address.  If the cost is
@@ -1140,6 +1154,33 @@ while (0)
    : REG_P (RTX) ? 1						\
    : 2)
 
+/* Add any extra modes needed to represent the condition code.
+
+   For the i386, we need separate modes when floating-point equality
+   comparisons are being done.  */
+
+#define EXTRA_CC_MODES CCFPEQmode
+
+/* Define the names for the modes specified above.  */
+#define EXTRA_CC_NAMES "CCFPEQ"
+
+/* Given a comparison code (EQ, NE, etc.) and the first operand of a COMPARE,
+   return the mode to be used for the comparison.
+
+   For floating-point equality comparisons, CCFPEQmode should be used.
+   VOIDmode should be used in all other cases.  */
+
+#define SELECT_CC_MODE(OP,X) \
+  (GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT			\
+   && ((OP) == EQ || (OP) == NE) ? CCFPEQmode : CCmode)
+
+/* Define the information needed to generate branch and scc insns.  This is
+   stored from the compare operation.  Note that we can't use "rtx" here
+   since it hasn't been defined!  */
+
+extern struct rtx_def *i386_compare_op0, *i386_compare_op1;
+extern struct rtx_def *(*i386_compare_gen)(), *(*i386_compare_gen_eq)();
+
 /* Tell final.c how to eliminate redundant test instructions.  */
 
 /* Here we define machine-dependent flags and fields in cc_status