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1.1 root 1: /* Definitions of target machine for GNU compiler for Intel 80386.
2: Copyright (C) 1988, 1992 Free Software Foundation, Inc.
3:
4: This file is part of GNU CC.
5:
6: GNU CC is free software; you can redistribute it and/or modify
7: it under the terms of the GNU General Public License as published by
8: the Free Software Foundation; either version 2, or (at your option)
9: any later version.
10:
11: GNU CC is distributed in the hope that it will be useful,
12: but WITHOUT ANY WARRANTY; without even the implied warranty of
13: MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14: GNU General Public License for more details.
15:
16: You should have received a copy of the GNU General Public License
17: along with GNU CC; see the file COPYING. If not, write to
18: the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
19:
20:
21: /* The purpose of this file is to define the characteristics of the i386,
1.1.1.2 ! root 22: independent of assembler syntax or operating system.
1.1 root 23:
24: Three other files build on this one to describe a specific assembler syntax:
25: bsd386.h, att386.h, and sun386.h.
26:
27: The actual tm.h file for a particular system should include
28: this file, and then the file for the appropriate assembler syntax.
29:
30: Many macros that specify assembler syntax are omitted entirely from
31: this file because they really belong in the files for particular
32: assemblers. These include AS1, AS2, AS3, RP, IP, LPREFIX, L_SIZE,
33: PUT_OP_SIZE, USE_STAR, ADDR_BEG, ADDR_END, PRINT_IREG, PRINT_SCALE,
34: PRINT_B_I_S, and many that start with ASM_ or end in ASM_OP. */
35:
36: /* Names to predefine in the preprocessor for this target machine. */
37:
38: #define I386 1
39:
40: /* Run-time compilation parameters selecting different hardware subsets. */
41:
42: extern int target_flags;
43:
44: /* Macros used in the machine description to test the flags. */
45:
46: /* Compile 80387 insns for floating point (not library calls). */
47: #define TARGET_80387 (target_flags & 1)
48: /* Compile code for an i486. */
49: #define TARGET_486 (target_flags & 2)
50: /* Compile using ret insn that pops args.
51: This will not work unless you use prototypes at least
52: for all functions that can take varying numbers of args. */
53: #define TARGET_RTD (target_flags & 8)
54: /* Compile passing first two args in regs 0 and 1.
55: This exists only to test compiler features that will
56: be needed for RISC chips. It is not usable
57: and is not intended to be usable on this cpu. */
58: #define TARGET_REGPARM (target_flags & 020)
59:
60: /* Macro to define tables used to set the flags.
61: This is a list in braces of pairs in braces,
62: each pair being { "NAME", VALUE }
63: where VALUE is the bits to set or minus the bits to clear.
64: An empty string NAME is used to identify the default VALUE. */
65:
66: #define TARGET_SWITCHES \
67: { { "80387", 1}, \
68: { "soft-float", -1}, \
69: { "486", 2}, \
70: { "no486", -2}, \
71: { "386", -2}, \
72: { "rtd", 8}, \
73: { "nortd", -8}, \
74: { "regparm", 020}, \
75: { "noregparm", -020}, \
76: { "", TARGET_DEFAULT}}
77:
78: /* target machine storage layout */
79:
80: /* Define this if most significant byte of a word is the lowest numbered. */
81: /* That is true on the 80386. */
82:
83: #define BITS_BIG_ENDIAN 0
84:
85: /* Define this if most significant byte of a word is the lowest numbered. */
86: /* That is not true on the 80386. */
87: #define BYTES_BIG_ENDIAN 0
88:
89: /* Define this if most significant word of a multiword number is the lowest
90: numbered. */
91: /* Not true for 80386 */
92: #define WORDS_BIG_ENDIAN 0
93:
1.1.1.2 ! root 94: /* number of bits in an addressable storage unit */
1.1 root 95: #define BITS_PER_UNIT 8
96:
97: /* Width in bits of a "word", which is the contents of a machine register.
98: Note that this is not necessarily the width of data type `int';
99: if using 16-bit ints on a 80386, this would still be 32.
100: But on a machine with 16-bit registers, this would be 16. */
101: #define BITS_PER_WORD 32
102:
103: /* Width of a word, in units (bytes). */
104: #define UNITS_PER_WORD 4
105:
106: /* Width in bits of a pointer.
107: See also the macro `Pmode' defined below. */
108: #define POINTER_SIZE 32
109:
110: /* Allocation boundary (in *bits*) for storing arguments in argument list. */
111: #define PARM_BOUNDARY 32
112:
113: /* Boundary (in *bits*) on which stack pointer should be aligned. */
114: #define STACK_BOUNDARY 32
115:
116: /* Allocation boundary (in *bits*) for the code of a function.
117: For i486, we get better performance by aligning to a cache
118: line (i.e. 16 byte) boundary. */
119: #define FUNCTION_BOUNDARY (TARGET_486 ? 128 : 32)
120:
121: /* Alignment of field after `int : 0' in a structure. */
122:
123: #define EMPTY_FIELD_BOUNDARY 32
124:
125: /* Minimum size in bits of the largest boundary to which any
126: and all fundamental data types supported by the hardware
127: might need to be aligned. No data type wants to be aligned
128: rounder than this. The i386 supports 64-bit floating point
129: quantities, but these can be aligned on any 32-bit boundary. */
130: #define BIGGEST_ALIGNMENT 32
131:
1.1.1.2 ! root 132: /* Set this non-zero if move instructions will actually fail to work
1.1 root 133: when given unaligned data. */
1.1.1.2 ! root 134: #define STRICT_ALIGNMENT 0
1.1 root 135:
136: /* If bit field type is int, don't let it cross an int,
137: and give entire struct the alignment of an int. */
138: /* Required on the 386 since it doesn't have bitfield insns. */
139: #define PCC_BITFIELD_TYPE_MATTERS 1
140:
141: /* Align loop starts for optimal branching. */
142: #define ASM_OUTPUT_LOOP_ALIGN(FILE) \
143: ASM_OUTPUT_ALIGN (FILE, 2)
144:
145: /* This is how to align an instruction for optimal branching.
146: On i486 we'll get better performance by aligning on a
147: cache line (i.e. 16 byte) boundary. */
148: #define ASM_OUTPUT_ALIGN_CODE(FILE) \
149: ASM_OUTPUT_ALIGN ((FILE), (TARGET_486 ? 4 : 2))
150:
151: /* Standard register usage. */
152:
153: /* This processor has special stack-like registers. See reg-stack.c
154: for details. */
155:
156: #define STACK_REGS
157:
158: /* Number of actual hardware registers.
159: The hardware registers are assigned numbers for the compiler
160: from 0 to just below FIRST_PSEUDO_REGISTER.
161: All registers that the compiler knows about must be given numbers,
162: even those that are not normally considered general registers.
163:
164: In the 80386 we give the 8 general purpose registers the numbers 0-7.
165: We number the floating point registers 8-15.
166: Note that registers 0-7 can be accessed as a short or int,
167: while only 0-3 may be used with byte `mov' instructions.
168:
169: Reg 16 does not correspond to any hardware register, but instead
170: appears in the RTL as an argument pointer prior to reload, and is
171: eliminated during reloading in favor of either the stack or frame
172: pointer. */
173:
174: #define FIRST_PSEUDO_REGISTER 17
175:
176: /* 1 for registers that have pervasive standard uses
177: and are not available for the register allocator.
178: On the 80386, the stack pointer is such, as is the arg pointer. */
179: #define FIXED_REGISTERS \
180: /*ax,dx,cx,bx,si,di,bp,sp,st,st1,st2,st3,st4,st5,st6,st7,arg*/ \
181: { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1 }
182:
183: /* 1 for registers not available across function calls.
184: These must include the FIXED_REGISTERS and also any
185: registers that can be used without being saved.
186: The latter must include the registers where values are returned
187: and the register where structure-value addresses are passed.
188: Aside from that, you can include as many other registers as you like. */
189:
190: #define CALL_USED_REGISTERS \
191: /*ax,dx,cx,bx,si,di,bp,sp,st,st1,st2,st3,st4,st5,st6,st7,arg*/ \
192: { 1, 1, 1, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 }
193:
194: /* Macro to conditionally modify fixed_regs/call_used_regs. */
195: #define CONDITIONAL_REGISTER_USAGE \
196: { \
197: if (flag_pic) \
198: { \
199: fixed_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \
200: call_used_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \
201: } \
202: }
203:
204: /* Return number of consecutive hard regs needed starting at reg REGNO
205: to hold something of mode MODE.
206: This is ordinarily the length in words of a value of mode MODE
207: but can be less for certain modes in special long registers.
208:
209: Actually there are no two word move instructions for consecutive
210: registers. And only registers 0-3 may have mov byte instructions
211: applied to them.
212: */
213:
214: #define HARD_REGNO_NREGS(REGNO, MODE) \
215: (FP_REGNO_P (REGNO) ? 1 \
216: : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))
217:
218: /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE.
219: On the 80386, the first 4 cpu registers can hold any mode
220: while the floating point registers may hold only floating point.
221: Make it clear that the fp regs could not hold a 16-byte float. */
222:
223: #define HARD_REGNO_MODE_OK(REGNO, MODE) \
224: ((REGNO) < 2 ? 1 \
225: : (REGNO) < 4 ? 1 \
226: : (REGNO) >= 8 ? ((GET_MODE_CLASS (MODE) == MODE_FLOAT \
227: || GET_MODE_CLASS (MODE) == MODE_COMPLEX_FLOAT) \
228: && GET_MODE_UNIT_SIZE (MODE) <= 8) \
229: : (MODE) != QImode)
230:
231: /* Value is 1 if it is a good idea to tie two pseudo registers
232: when one has mode MODE1 and one has mode MODE2.
233: If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
234: for any hard reg, then this must be 0 for correct output. */
235:
236: #define MODES_TIEABLE_P(MODE1, MODE2) ((MODE1) == (MODE2))
237:
238: /* A C expression returning the cost of moving data from a register of class
239: CLASS1 to one of CLASS2.
240:
241: On the i386, copying between floating-point and fixed-point
242: registers is expensive. */
243:
244: #define REGISTER_MOVE_COST(CLASS1, CLASS2) \
245: ((((CLASS1) == FLOAT_REGS && (CLASS2) != FLOAT_REGS) \
246: || ((CLASS2) == FLOAT_REGS && (CLASS1) != FLOAT_REGS)) \
247: ? 10 : 2)
248:
249: /* Specify the registers used for certain standard purposes.
250: The values of these macros are register numbers. */
251:
252: /* on the 386 the pc register is %eip, and is not usable as a general
253: register. The ordinary mov instructions won't work */
254: /* #define PC_REGNUM */
255:
256: /* Register to use for pushing function arguments. */
257: #define STACK_POINTER_REGNUM 7
258:
259: /* Base register for access to local variables of the function. */
260: #define FRAME_POINTER_REGNUM 6
261:
262: /* First floating point reg */
263: #define FIRST_FLOAT_REG 8
264:
265: /* First & last stack-like regs */
266: #define FIRST_STACK_REG FIRST_FLOAT_REG
267: #define LAST_STACK_REG (FIRST_FLOAT_REG + 7)
268:
269: /* Value should be nonzero if functions must have frame pointers.
270: Zero means the frame pointer need not be set up (and parms
271: may be accessed via the stack pointer) in functions that seem suitable.
272: This is computed in `reload', in reload1.c. */
273: #define FRAME_POINTER_REQUIRED 0
274:
275: /* Base register for access to arguments of the function. */
276: #define ARG_POINTER_REGNUM 16
277:
278: /* Register in which static-chain is passed to a function. */
279: #define STATIC_CHAIN_REGNUM 2
280:
281: /* Register to hold the addressing base for position independent
282: code access to data items. */
283: #define PIC_OFFSET_TABLE_REGNUM 3
284:
285: /* Register in which address to store a structure value
286: arrives in the function. On the 386, the prologue
287: copies this from the stack to register %eax. */
288: #define STRUCT_VALUE_INCOMING 0
289:
290: /* Place in which caller passes the structure value address.
291: 0 means push the value on the stack like an argument. */
292: #define STRUCT_VALUE 0
293:
294: /* Define the classes of registers for register constraints in the
295: machine description. Also define ranges of constants.
296:
297: One of the classes must always be named ALL_REGS and include all hard regs.
298: If there is more than one class, another class must be named NO_REGS
299: and contain no registers.
300:
301: The name GENERAL_REGS must be the name of a class (or an alias for
302: another name such as ALL_REGS). This is the class of registers
303: that is allowed by "g" or "r" in a register constraint.
304: Also, registers outside this class are allocated only when
305: instructions express preferences for them.
306:
307: The classes must be numbered in nondecreasing order; that is,
308: a larger-numbered class must never be contained completely
309: in a smaller-numbered class.
310:
311: For any two classes, it is very desirable that there be another
1.1.1.2 ! root 312: class that represents their union.
! 313:
! 314: It might seem that class BREG is unnecessary, since no useful 386
! 315: opcode needs reg %ebx. But some systems pass args to the OS in ebx,
! 316: and the "b" register constraint is useful in asms for syscalls. */
1.1 root 317:
318: enum reg_class
319: {
320: NO_REGS,
1.1.1.2 ! root 321: AREG, DREG, CREG, BREG,
1.1 root 322: Q_REGS, /* %eax %ebx %ecx %edx */
323: SIREG, DIREG,
324: INDEX_REGS, /* %eax %ebx %ecx %edx %esi %edi %ebp */
325: GENERAL_REGS, /* %eax %ebx %ecx %edx %esi %edi %ebp %esp */
326: FP_TOP_REG, FP_SECOND_REG, /* %st(0) %st(1) */
327: FLOAT_REGS,
328: ALL_REGS, LIM_REG_CLASSES
329: };
330:
331: #define N_REG_CLASSES (int) LIM_REG_CLASSES
332:
333: /* Give names of register classes as strings for dump file. */
334:
335: #define REG_CLASS_NAMES \
336: { "NO_REGS", \
1.1.1.2 ! root 337: "AREG", "DREG", "CREG", "BREG", \
1.1 root 338: "Q_REGS", \
339: "SIREG", "DIREG", \
340: "INDEX_REGS", \
341: "GENERAL_REGS", \
342: "FP_TOP_REG", "FP_SECOND_REG", \
343: "FLOAT_REGS", \
344: "ALL_REGS" }
345:
346: /* Define which registers fit in which classes.
347: This is an initializer for a vector of HARD_REG_SET
348: of length N_REG_CLASSES. */
349:
350: #define REG_CLASS_CONTENTS \
351: { 0, \
1.1.1.2 ! root 352: 0x1, 0x2, 0x4, 0x8, /* AREG, DREG, CREG, BREG */ \
1.1 root 353: 0xf, /* Q_REGS */ \
354: 0x10, 0x20, /* SIREG, DIREG */ \
355: 0x1007f, /* INDEX_REGS */ \
356: 0x100ff, /* GENERAL_REGS */ \
357: 0x0100, 0x0200, /* FP_TOP_REG, FP_SECOND_REG */ \
358: 0xff00, /* FLOAT_REGS */ \
359: 0x1ffff }
360:
361: /* The same information, inverted:
362: Return the class number of the smallest class containing
363: reg number REGNO. This could be a conditional expression
364: or could index an array. */
365:
366: extern enum reg_class regclass_map[FIRST_PSEUDO_REGISTER];
367: #define REGNO_REG_CLASS(REGNO) (regclass_map[REGNO])
368:
369: /* When defined, the compiler allows registers explicitly used in the
370: rtl to be used as spill registers but prevents the compiler from
371: extending the lifetime of these registers. */
372:
373: #define SMALL_REGISTER_CLASSES
374:
375: #define QI_REG_P(X) \
376: (REG_P (X) && REGNO (X) < 4)
377: #define NON_QI_REG_P(X) \
378: (REG_P (X) && REGNO (X) >= 4 && REGNO (X) < FIRST_PSEUDO_REGISTER)
379:
380: #define FP_REG_P(X) (REG_P (X) && FP_REGNO_P (REGNO (X)))
381: #define FP_REGNO_P(n) ((n) >= FIRST_STACK_REG && (n) <= LAST_STACK_REG)
382:
383: #define STACK_REG_P(xop) (REG_P (xop) && \
384: REGNO (xop) >= FIRST_STACK_REG && \
385: REGNO (xop) <= LAST_STACK_REG)
386:
387: #define NON_STACK_REG_P(xop) (REG_P (xop) && ! STACK_REG_P (xop))
388:
389: #define STACK_TOP_P(xop) (REG_P (xop) && REGNO (xop) == FIRST_STACK_REG)
390:
391: /* Try to maintain the accuracy of the death notes for regs satisfying the
392: following. Important for stack like regs, to know when to pop. */
393:
394: /* #define PRESERVE_DEATH_INFO_REGNO_P(x) FP_REGNO_P(x) */
395:
396: /* 1 if register REGNO can magically overlap other regs.
397: Note that nonzero values work only in very special circumstances. */
398:
399: /* #define OVERLAPPING_REGNO_P(REGNO) FP_REGNO_P (REGNO) */
400:
401: /* The class value for index registers, and the one for base regs. */
402:
403: #define INDEX_REG_CLASS INDEX_REGS
404: #define BASE_REG_CLASS GENERAL_REGS
405:
406: /* Get reg_class from a letter such as appears in the machine description. */
407:
408: #define REG_CLASS_FROM_LETTER(C) \
409: ((C) == 'r' ? GENERAL_REGS : \
410: (C) == 'q' ? Q_REGS : \
411: (C) == 'f' ? FLOAT_REGS : \
412: (C) == 't' ? FP_TOP_REG : \
413: (C) == 'u' ? FP_SECOND_REG : \
414: (C) == 'a' ? AREG : \
1.1.1.2 ! root 415: (C) == 'b' ? BREG : \
1.1 root 416: (C) == 'c' ? CREG : \
417: (C) == 'd' ? DREG : \
418: (C) == 'D' ? DIREG : \
419: (C) == 'S' ? SIREG : NO_REGS)
420:
421: /* The letters I, J, K, L and M in a register constraint string
422: can be used to stand for particular ranges of immediate operands.
423: This macro defines what the ranges are.
424: C is the letter, and VALUE is a constant value.
425: Return 1 if VALUE is in the range specified by C.
426:
427: I is for non-DImode shifts.
428: J is for DImode shifts.
429: K and L are for an `andsi' optimization.
430: M is for shifts that can be executed by the "lea" opcode.
431: */
432:
433: #define CONST_OK_FOR_LETTER_P(VALUE, C) \
434: ((C) == 'I' ? (VALUE) >= 0 && (VALUE) <= 31 : \
435: (C) == 'J' ? (VALUE) >= 0 && (VALUE) <= 63 : \
436: (C) == 'K' ? (VALUE) == 0xff : \
437: (C) == 'L' ? (VALUE) == 0xffff : \
438: (C) == 'M' ? (VALUE) >= 0 && (VALUE) <= 3 : \
439: 0)
440:
441: /* Similar, but for floating constants, and defining letters G and H.
1.1.1.2 ! root 442: Here VALUE is the CONST_DOUBLE rtx itself. We allow constants even if
! 443: TARGET_387 isn't set, because the stack register converter may need to
! 444: load 0.0 into the function value register. */
1.1 root 445:
446: #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
1.1.1.2 ! root 447: ((C) == 'G' ? standard_80387_constant_p (VALUE) : 0)
1.1 root 448:
449: /* Place additional restrictions on the register class to use when it
450: is necessary to be able to hold a value of mode @var{mode} in a reload
451: register for which class @var{class} would ordinarily be used. */
452:
453: #define LIMIT_RELOAD_CLASS(MODE, CLASS) \
454: ((MODE) == QImode && ((CLASS) == ALL_REGS || (CLASS) == GENERAL_REGS) \
455: ? Q_REGS : (CLASS))
456:
457: /* Given an rtx X being reloaded into a reg required to be
458: in class CLASS, return the class of reg to actually use.
459: In general this is just CLASS; but on some machines
460: in some cases it is preferable to use a more restrictive class.
461: On the 80386 series, we prevent floating constants from being
462: reloaded into floating registers (since no move-insn can do that)
463: and we ensure that QImodes aren't reloaded into the esi or edi reg. */
464:
465: /* Don't put CONST_DOUBLE into FLOAT_REGS.
466: QImode must go into class Q_REGS.
467: MODE_INT must not go into FLOAT_REGS. */
468:
469: #define PREFERRED_RELOAD_CLASS(X,CLASS) \
470: (GET_CODE (X) == CONST_DOUBLE \
471: ? (reg_class_subset_p ((CLASS), GENERAL_REGS) || (CLASS) == ALL_REGS \
472: ? (CLASS) : NO_REGS) \
473: : GET_MODE (X) == QImode \
474: ? (! reg_class_subset_p ((CLASS), Q_REGS) ? Q_REGS : (CLASS)) \
475: : (GET_MODE_CLASS (GET_MODE (X)) == MODE_INT && (CLASS) == FLOAT_REGS ? \
476: GENERAL_REGS : (CLASS)))
477:
478: /* Return the maximum number of consecutive registers
479: needed to represent mode MODE in a register of class CLASS. */
480: /* On the 80386, this is the size of MODE in words,
481: except in the FP regs, where a single reg is always enough. */
482: #define CLASS_MAX_NREGS(CLASS, MODE) \
483: ((CLASS) == FLOAT_REGS ? 1 : \
484: (CLASS) == FP_TOP_REG ? 1 : \
485: (CLASS) == FP_SECOND_REG ? 1 : \
486: ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))
487:
488: /* Stack layout; function entry, exit and calling. */
489:
490: /* Define this if pushing a word on the stack
491: makes the stack pointer a smaller address. */
492: #define STACK_GROWS_DOWNWARD
493:
494: /* Define this if the nominal address of the stack frame
495: is at the high-address end of the local variables;
496: that is, each additional local variable allocated
497: goes at a more negative offset in the frame. */
498: #define FRAME_GROWS_DOWNWARD
499:
500: /* Offset within stack frame to start allocating local variables at.
501: If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
502: first local allocated. Otherwise, it is the offset to the BEGINNING
503: of the first local allocated. */
504: #define STARTING_FRAME_OFFSET 0
505:
506: /* If we generate an insn to push BYTES bytes,
507: this says how many the stack pointer really advances by.
508: On 386 pushw decrements by exactly 2 no matter what the position was.
509: On the 386 there is no pushb; we use pushw instead, and this
510: has the effect of rounding up to 2. */
511:
512: #define PUSH_ROUNDING(BYTES) (((BYTES) + 1) & (-2))
513:
514: /* Offset of first parameter from the argument pointer register value. */
515: #define FIRST_PARM_OFFSET(FNDECL) 0
516:
517: /* Value is the number of bytes of arguments automatically
518: popped when returning from a subroutine call.
519: FUNTYPE is the data type of the function (as a tree),
520: or for a library call it is an identifier node for the subroutine name.
521: SIZE is the number of bytes of arguments passed on the stack.
522:
523: On the 80386, the RTD insn may be used to pop them if the number
524: of args is fixed, but if the number is variable then the caller
525: must pop them all. RTD can't be used for library calls now
526: because the library is compiled with the Unix compiler.
527: Use of RTD is a selectable option, since it is incompatible with
528: standard Unix calling sequences. If the option is not selected,
529: the caller must always pop the args. */
530:
531: #define RETURN_POPS_ARGS(FUNTYPE,SIZE) \
532: (TREE_CODE (FUNTYPE) == IDENTIFIER_NODE ? 0 \
533: : (TARGET_RTD \
534: && (TYPE_ARG_TYPES (FUNTYPE) == 0 \
535: || (TREE_VALUE (tree_last (TYPE_ARG_TYPES (FUNTYPE))) \
536: == void_type_node))) ? (SIZE) \
537: : (aggregate_value_p (FUNTYPE)) ? GET_MODE_SIZE (Pmode) : 0)
538:
539: #define FUNCTION_VALUE(VALTYPE, FUNC) \
540: gen_rtx (REG, TYPE_MODE (VALTYPE), \
541: VALUE_REGNO (TYPE_MODE (VALTYPE)))
542:
543: /* Define how to find the value returned by a library function
544: assuming the value has mode MODE. */
545:
546: #define LIBCALL_VALUE(MODE) \
547: gen_rtx (REG, MODE, VALUE_REGNO (MODE))
548:
549: /* 1 if N is a possible register number for function argument passing.
550: On the 80386, no registers are used in this way.
551: *NOTE* -mregparm does not work.
552: It exists only to test register calling conventions. */
553:
554: #define FUNCTION_ARG_REGNO_P(N) 0
555:
556: /* Define a data type for recording info about an argument list
557: during the scan of that argument list. This data type should
558: hold all necessary information about the function itself
559: and about the args processed so far, enough to enable macros
560: such as FUNCTION_ARG to determine where the next arg should go.
561:
562: On the 80386, this is a single integer, which is a number of bytes
563: of arguments scanned so far. */
564:
565: #define CUMULATIVE_ARGS int
566:
567: /* Initialize a variable CUM of type CUMULATIVE_ARGS
568: for a call to a function whose data type is FNTYPE.
569: For a library call, FNTYPE is 0.
570:
571: On the 80386, the offset starts at 0. */
572:
573: #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME) \
574: ((CUM) = 0)
575:
576: /* Update the data in CUM to advance over an argument
577: of mode MODE and data type TYPE.
578: (TYPE is null for libcalls where that information may not be available.) */
579:
580: #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
581: ((CUM) += ((MODE) != BLKmode \
582: ? (GET_MODE_SIZE (MODE) + 3) & ~3 \
583: : (int_size_in_bytes (TYPE) + 3) & ~3))
584:
585: /* Define where to put the arguments to a function.
586: Value is zero to push the argument on the stack,
587: or a hard register in which to store the argument.
588:
589: MODE is the argument's machine mode.
590: TYPE is the data type of the argument (as a tree).
591: This is null for libcalls where that information may
592: not be available.
593: CUM is a variable of type CUMULATIVE_ARGS which gives info about
594: the preceding args and about the function being called.
595: NAMED is nonzero if this argument is a named parameter
596: (otherwise it is an extra parameter matching an ellipsis). */
597:
598:
599: /* On the 80386 all args are pushed, except if -mregparm is specified
600: then the first two words of arguments are passed in EAX, EDX.
601: *NOTE* -mregparm does not work.
602: It exists only to test register calling conventions. */
603:
604: #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
605: ((TARGET_REGPARM && (CUM) < 8) ? gen_rtx (REG, (MODE), (CUM) / 4) : 0)
606:
607: /* For an arg passed partly in registers and partly in memory,
608: this is the number of registers used.
609: For args passed entirely in registers or entirely in memory, zero. */
610:
611:
612: #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) \
613: ((TARGET_REGPARM && (CUM) < 8 \
614: && 8 < ((CUM) + ((MODE) == BLKmode \
615: ? int_size_in_bytes (TYPE) \
616: : GET_MODE_SIZE (MODE)))) \
617: ? 2 - (CUM) / 4 : 0)
618:
619: /* This macro generates the assembly code for function entry.
620: FILE is a stdio stream to output the code to.
621: SIZE is an int: how many units of temporary storage to allocate.
622: Refer to the array `regs_ever_live' to determine which registers
623: to save; `regs_ever_live[I]' is nonzero if register number I
624: is ever used in the function. This macro is responsible for
625: knowing which registers should not be saved even if used. */
626:
627: #define FUNCTION_PROLOGUE(FILE, SIZE) \
628: function_prologue (FILE, SIZE)
629:
630: /* Output assembler code to FILE to increment profiler label # LABELNO
631: for profiling a function entry. */
632:
633: #define FUNCTION_PROFILER(FILE, LABELNO) \
634: { \
635: if (flag_pic) \
636: { \
637: fprintf (FILE, "\tleal %sP%d@GOTOFF(%%ebx),%%edx\n", \
638: LPREFIX, (LABELNO)); \
639: fprintf (FILE, "\tcall *_mcount@GOT(%%ebx)\n"); \
640: } \
641: else \
642: { \
643: fprintf (FILE, "\tmovl $%sP%d,%%edx\n", LPREFIX, (LABELNO)); \
644: fprintf (FILE, "\tcall _mcount\n"); \
645: } \
646: }
647:
648: /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
649: the stack pointer does not matter. The value is tested only in
650: functions that have frame pointers.
651: No definition is equivalent to always zero. */
652: /* Note on the 386 it might be more efficient not to define this since
653: we have to restore it ourselves from the frame pointer, in order to
654: use pop */
655:
656: #define EXIT_IGNORE_STACK 1
657:
658: /* This macro generates the assembly code for function exit,
659: on machines that need it. If FUNCTION_EPILOGUE is not defined
660: then individual return instructions are generated for each
661: return statement. Args are same as for FUNCTION_PROLOGUE.
662:
663: The function epilogue should not depend on the current stack pointer!
664: It should use the frame pointer only. This is mandatory because
665: of alloca; we also take advantage of it to omit stack adjustments
666: before returning.
667:
668: If the last non-note insn in the function is a BARRIER, then there
669: is no need to emit a function prologue, because control does not fall
670: off the end. This happens if the function ends in an "exit" call, or
671: if a `return' insn is emitted directly into the function. */
672:
673: #define FUNCTION_EPILOGUE(FILE, SIZE) \
674: do { \
675: rtx last = get_last_insn (); \
676: if (last && GET_CODE (last) == NOTE) \
677: last = prev_nonnote_insn (last); \
678: if (! last || GET_CODE (last) != BARRIER) \
679: function_epilogue (FILE, SIZE); \
680: } while (0)
681:
682: /* Output assembler code for a block containing the constant parts
683: of a trampoline, leaving space for the variable parts. */
684:
685: /* On the 386, the trampoline contains three instructions:
686: mov #STATIC,ecx
687: mov #FUNCTION,eax
688: jmp @eax */
689: #define TRAMPOLINE_TEMPLATE(FILE) \
690: { \
691: ASM_OUTPUT_CHAR (FILE, gen_rtx (CONST_INT, VOIDmode, 0xb9)); \
692: ASM_OUTPUT_SHORT (FILE, const0_rtx); \
693: ASM_OUTPUT_SHORT (FILE, const0_rtx); \
694: ASM_OUTPUT_CHAR (FILE, gen_rtx (CONST_INT, VOIDmode, 0xb8)); \
695: ASM_OUTPUT_SHORT (FILE, const0_rtx); \
696: ASM_OUTPUT_SHORT (FILE, const0_rtx); \
697: ASM_OUTPUT_CHAR (FILE, gen_rtx (CONST_INT, VOIDmode, 0xff)); \
698: ASM_OUTPUT_CHAR (FILE, gen_rtx (CONST_INT, VOIDmode, 0xe0)); \
699: }
700:
701: /* Length in units of the trampoline for entering a nested function. */
702:
703: #define TRAMPOLINE_SIZE 12
704:
705: /* Emit RTL insns to initialize the variable parts of a trampoline.
706: FNADDR is an RTX for the address of the function's pure code.
707: CXT is an RTX for the static chain value for the function. */
708:
709: #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
710: { \
711: emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 1)), CXT); \
712: emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 6)), FNADDR); \
713: }
714:
715: /* Definitions for register eliminations.
716:
717: This is an array of structures. Each structure initializes one pair
718: of eliminable registers. The "from" register number is given first,
719: followed by "to". Eliminations of the same "from" register are listed
720: in order of preference.
721:
722: We have two registers that can be eliminated on the i386. First, the
723: frame pointer register can often be eliminated in favor of the stack
724: pointer register. Secondly, the argument pointer register can always be
725: eliminated; it is replaced with either the stack or frame pointer. */
726:
727: #define ELIMINABLE_REGS \
728: {{ ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
729: { ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM}, \
730: { FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}}
731:
732: /* Given FROM and TO register numbers, say whether this elimination is allowed.
733: Frame pointer elimination is automatically handled.
734:
735: For the i386, if frame pointer elimination is being done, we would like to
736: convert ap into sp, not fp.
737:
738: All other eliminations are valid. */
739:
740: #define CAN_ELIMINATE(FROM, TO) \
741: ((FROM) == ARG_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM \
742: ? ! frame_pointer_needed \
743: : 1)
744:
745: /* Define the offset between two registers, one to be eliminated, and the other
746: its replacement, at the start of a routine. */
747:
748: #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
749: { \
750: if ((FROM) == ARG_POINTER_REGNUM && (TO) == FRAME_POINTER_REGNUM) \
751: (OFFSET) = 8; /* Skip saved PC and previous frame pointer */ \
752: else \
753: { \
754: int regno; \
755: int offset = 0; \
756: \
757: for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++) \
758: if ((regs_ever_live[regno] && ! call_used_regs[regno]) \
759: || (current_function_uses_pic_offset_table \
760: && regno == PIC_OFFSET_TABLE_REGNUM)) \
761: offset += 4; \
762: \
763: (OFFSET) = offset + get_frame_size (); \
764: \
765: if ((FROM) == ARG_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM) \
766: (OFFSET) += 4; /* Skip saved PC */ \
767: } \
768: }
769:
770: /* Addressing modes, and classification of registers for them. */
771:
772: /* #define HAVE_POST_INCREMENT */
773: /* #define HAVE_POST_DECREMENT */
774:
775: /* #define HAVE_PRE_DECREMENT */
776: /* #define HAVE_PRE_INCREMENT */
777:
778: /* Macros to check register numbers against specific register classes. */
779:
780: /* These assume that REGNO is a hard or pseudo reg number.
781: They give nonzero only if REGNO is a hard reg of the suitable class
782: or a pseudo reg currently allocated to a suitable hard reg.
783: Since they use reg_renumber, they are safe only once reg_renumber
784: has been allocated, which happens in local-alloc.c. */
785:
786: #define REGNO_OK_FOR_INDEX_P(REGNO) \
787: ((REGNO) < STACK_POINTER_REGNUM \
788: || (unsigned) reg_renumber[REGNO] < STACK_POINTER_REGNUM)
789:
790: #define REGNO_OK_FOR_BASE_P(REGNO) \
791: ((REGNO) <= STACK_POINTER_REGNUM \
792: || (REGNO) == ARG_POINTER_REGNUM \
793: || (unsigned) reg_renumber[REGNO] <= STACK_POINTER_REGNUM)
794:
795: #define REGNO_OK_FOR_SIREG_P(REGNO) ((REGNO) == 4 || reg_renumber[REGNO] == 4)
796: #define REGNO_OK_FOR_DIREG_P(REGNO) ((REGNO) == 5 || reg_renumber[REGNO] == 5)
797:
798: /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
799: and check its validity for a certain class.
800: We have two alternate definitions for each of them.
801: The usual definition accepts all pseudo regs; the other rejects
802: them unless they have been allocated suitable hard regs.
803: The symbol REG_OK_STRICT causes the latter definition to be used.
804:
805: Most source files want to accept pseudo regs in the hope that
806: they will get allocated to the class that the insn wants them to be in.
807: Source files for reload pass need to be strict.
808: After reload, it makes no difference, since pseudo regs have
809: been eliminated by then. */
810:
811: #ifndef REG_OK_STRICT
812:
813: /* Nonzero if X is a hard reg that can be used as an index or if
814: it is a pseudo reg. */
815:
816: #define REG_OK_FOR_INDEX_P(X) \
817: (REGNO (X) < STACK_POINTER_REGNUM \
818: || REGNO (X) >= FIRST_PSEUDO_REGISTER)
819:
820: /* Nonzero if X is a hard reg that can be used as a base reg
821: of if it is a pseudo reg. */
822: /* ?wfs */
823:
824: #define REG_OK_FOR_BASE_P(X) \
825: (REGNO (X) <= STACK_POINTER_REGNUM \
826: || REGNO (X) == ARG_POINTER_REGNUM \
827: || REGNO(X) >= FIRST_PSEUDO_REGISTER)
828:
829: #define REG_OK_FOR_STRREG_P(X) \
830: (REGNO (X) == 4 || REGNO (X) == 5 || REGNO (X) >= FIRST_PSEUDO_REGISTER)
831:
832: #else
833:
834: /* Nonzero if X is a hard reg that can be used as an index. */
835: #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
836: /* Nonzero if X is a hard reg that can be used as a base reg. */
837: #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
838: #define REG_OK_FOR_STRREG_P(X) \
839: (REGNO_OK_FOR_DIREG_P (REGNO (X)) || REGNO_OK_FOR_SIREG_P (REGNO (X)))
840:
841: #endif
842:
843: /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
844: that is a valid memory address for an instruction.
845: The MODE argument is the machine mode for the MEM expression
846: that wants to use this address.
847:
848: The other macros defined here are used only in GO_IF_LEGITIMATE_ADDRESS,
849: except for CONSTANT_ADDRESS_P which is usually machine-independent.
850:
851: See legitimize_pic_address in i386.c for details as to what
852: constitutes a legitimate address when -fpic is used. */
853:
854: #define MAX_REGS_PER_ADDRESS 2
855:
856: #define CONSTANT_ADDRESS_P(X) CONSTANT_P (X)
857:
858: /* Nonzero if the constant value X is a legitimate general operand.
859: It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE. */
860:
861: #define LEGITIMATE_CONSTANT_P(X) 1
862:
863: #define GO_IF_INDEXABLE_BASE(X, ADDR) \
864: if (GET_CODE (X) == REG && REG_OK_FOR_BASE_P (X)) goto ADDR
865:
866: #define LEGITIMATE_INDEX_REG_P(X) \
867: (GET_CODE (X) == REG && REG_OK_FOR_INDEX_P (X))
868:
869: /* Return 1 if X is an index or an index times a scale. */
870:
871: #define LEGITIMATE_INDEX_P(X) \
872: (LEGITIMATE_INDEX_REG_P (X) \
873: || (GET_CODE (X) == MULT \
874: && LEGITIMATE_INDEX_REG_P (XEXP (X, 0)) \
875: && GET_CODE (XEXP (X, 1)) == CONST_INT \
876: && (INTVAL (XEXP (X, 1)) == 2 \
877: || INTVAL (XEXP (X, 1)) == 4 \
878: || INTVAL (XEXP (X, 1)) == 8)))
879:
880: /* Go to ADDR if X is an index term, a base reg, or a sum of those. */
881:
882: #define GO_IF_INDEXING(X, ADDR) \
883: { if (LEGITIMATE_INDEX_P (X)) goto ADDR; \
884: GO_IF_INDEXABLE_BASE (X, ADDR); \
885: if (GET_CODE (X) == PLUS && LEGITIMATE_INDEX_P (XEXP (X, 0))) \
886: { GO_IF_INDEXABLE_BASE (XEXP (X, 1), ADDR); } \
887: if (GET_CODE (X) == PLUS && LEGITIMATE_INDEX_P (XEXP (X, 1))) \
888: { GO_IF_INDEXABLE_BASE (XEXP (X, 0), ADDR); } }
889:
890: /* We used to allow this, but it isn't ever used.
891: || ((GET_CODE (X) == POST_DEC || GET_CODE (X) == POST_INC) \
892: && REG_P (XEXP (X, 0)) \
893: && REG_OK_FOR_STRREG_P (XEXP (X, 0))) \
894: */
895:
896: #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
897: { \
898: if (CONSTANT_ADDRESS_P (X) \
899: && (! flag_pic || LEGITIMATE_PIC_OPERAND_P (X))) \
900: goto ADDR; \
901: GO_IF_INDEXING (X, ADDR); \
902: if (GET_CODE (X) == PLUS && CONSTANT_ADDRESS_P (XEXP (X, 1))) \
903: { \
904: rtx x0 = XEXP (X, 0); \
905: if (! flag_pic || ! SYMBOLIC_CONST (XEXP (X, 1))) \
906: { GO_IF_INDEXING (x0, ADDR); } \
907: else if (x0 == pic_offset_table_rtx) \
908: goto ADDR; \
909: else if (GET_CODE (x0) == PLUS) \
910: { \
911: if (XEXP (x0, 0) == pic_offset_table_rtx) \
912: { GO_IF_INDEXABLE_BASE (XEXP (x0, 1), ADDR); } \
913: if (XEXP (x0, 1) == pic_offset_table_rtx) \
914: { GO_IF_INDEXABLE_BASE (XEXP (x0, 0), ADDR); } \
915: } \
916: } \
917: }
918:
919: /* Try machine-dependent ways of modifying an illegitimate address
920: to be legitimate. If we find one, return the new, valid address.
921: This macro is used in only one place: `memory_address' in explow.c.
922:
923: OLDX is the address as it was before break_out_memory_refs was called.
924: In some cases it is useful to look at this to decide what needs to be done.
925:
926: MODE and WIN are passed so that this macro can use
927: GO_IF_LEGITIMATE_ADDRESS.
928:
929: It is always safe for this macro to do nothing. It exists to recognize
930: opportunities to optimize the output.
931:
932: For the 80386, we handle X+REG by loading X into a register R and
933: using R+REG. R will go in a general reg and indexing will be used.
934: However, if REG is a broken-out memory address or multiplication,
935: nothing needs to be done because REG can certainly go in a general reg.
936:
937: When -fpic is used, special handling is needed for symbolic references.
938: See comments by legitimize_pic_address in i386.c for details. */
939:
940: #define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) \
941: { extern rtx legitimize_pic_address (); \
942: int ch = (X) != (OLDX); \
943: if (flag_pic && SYMBOLIC_CONST (X)) \
944: { \
945: (X) = legitimize_pic_address (X, 0); \
946: if (memory_address_p (MODE, X)) \
947: goto WIN; \
948: } \
949: if (GET_CODE (X) == PLUS) \
950: { if (GET_CODE (XEXP (X, 0)) == MULT) \
951: ch = 1, XEXP (X, 0) = force_operand (XEXP (X, 0), 0); \
952: if (GET_CODE (XEXP (X, 1)) == MULT) \
953: ch = 1, XEXP (X, 1) = force_operand (XEXP (X, 1), 0); \
954: if (ch && GET_CODE (XEXP (X, 1)) == REG \
955: && GET_CODE (XEXP (X, 0)) == REG) \
956: goto WIN; \
957: if (flag_pic && SYMBOLIC_CONST (XEXP (X, 1))) \
958: ch = 1, (X) = legitimize_pic_address (X, 0); \
959: if (ch) { GO_IF_LEGITIMATE_ADDRESS (MODE, X, WIN); } \
960: if (GET_CODE (XEXP (X, 0)) == REG) \
961: { register rtx temp = gen_reg_rtx (Pmode); \
962: register rtx val = force_operand (XEXP (X, 1), temp); \
963: if (val != temp) emit_move_insn (temp, val, 0); \
964: XEXP (X, 1) = temp; \
965: goto WIN; } \
966: else if (GET_CODE (XEXP (X, 1)) == REG) \
967: { register rtx temp = gen_reg_rtx (Pmode); \
968: register rtx val = force_operand (XEXP (X, 0), temp); \
969: if (val != temp) emit_move_insn (temp, val, 0); \
970: XEXP (X, 0) = temp; \
971: goto WIN; }}}
972:
973: /* Nonzero if the constant value X is a legitimate general operand
974: when generating PIC code. It is given that flag_pic is on and
975: that X satisfies CONSTANT_P or is a CONST_DOUBLE. */
976:
977: #define LEGITIMATE_PIC_OPERAND_P(X) \
978: (! SYMBOLIC_CONST (X) \
979: || (GET_CODE (X) == SYMBOL_REF && CONSTANT_POOL_ADDRESS_P (X)))
980:
981: #define SYMBOLIC_CONST(X) \
982: (GET_CODE (X) == SYMBOL_REF \
983: || GET_CODE (X) == LABEL_REF \
984: || (GET_CODE (X) == CONST && symbolic_reference_mentioned_p (X)))
985:
986: /* Go to LABEL if ADDR (a legitimate address expression)
987: has an effect that depends on the machine mode it is used for.
988: On the 80386, only postdecrement and postincrement address depend thus
989: (the amount of decrement or increment being the length of the operand). */
990: #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) \
991: if (GET_CODE (ADDR) == POST_INC || GET_CODE (ADDR) == POST_DEC) goto LABEL
992:
993: /* Define this macro if references to a symbol must be treated
994: differently depending on something about the variable or
995: function named by the symbol (such as what section it is in).
996:
1.1.1.2 ! root 997: On i386, if using PIC, mark a SYMBOL_REF for a non-global symbol
1.1 root 998: so that we may access it directly in the GOT. */
999:
1000: #define ENCODE_SECTION_INFO(DECL) \
1001: do \
1002: { \
1003: if (flag_pic) \
1004: { \
1.1.1.2 ! root 1005: rtx rtl = (TREE_CODE_CLASS (TREE_CODE (DECL)) != 'd' \
! 1006: ? TREE_CST_RTL (DECL) : DECL_RTL (DECL)); \
! 1007: SYMBOL_REF_FLAG (XEXP (rtl, 0)) \
! 1008: = (TREE_CODE_CLASS (TREE_CODE (DECL)) != 'd' \
! 1009: || ! TREE_PUBLIC (DECL)); \
1.1 root 1010: } \
1011: } \
1012: while (0)
1013:
1014: /* Specify the machine mode that this machine uses
1015: for the index in the tablejump instruction. */
1016: #define CASE_VECTOR_MODE Pmode
1017:
1018: /* Define this if the tablejump instruction expects the table
1019: to contain offsets from the address of the table.
1020: Do not define this if the table should contain absolute addresses. */
1021: /* #define CASE_VECTOR_PC_RELATIVE */
1022:
1023: /* Specify the tree operation to be used to convert reals to integers.
1024: This should be changed to take advantage of fist --wfs ??
1025: */
1026: #define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR
1027:
1028: /* This is the kind of divide that is easiest to do in the general case. */
1029: #define EASY_DIV_EXPR TRUNC_DIV_EXPR
1030:
1031: /* Define this as 1 if `char' should by default be signed; else as 0. */
1032: #define DEFAULT_SIGNED_CHAR 1
1033:
1034: /* Max number of bytes we can move from memory to memory
1035: in one reasonably fast instruction. */
1036: #define MOVE_MAX 4
1037:
1038: /* MOVE_RATIO is the number of move instructions that is better than a
1039: block move. Make this large on i386, since the block move is very
1040: inefficient with small blocks, and the hard register needs of the
1041: block move require much reload work. */
1042: #define MOVE_RATIO 5
1043:
1044: /* Define this if zero-extension is slow (more than one real instruction). */
1045: /* #define SLOW_ZERO_EXTEND */
1046:
1047: /* Nonzero if access to memory by bytes is slow and undesirable. */
1048: #define SLOW_BYTE_ACCESS 0
1049:
1050: /* Define if shifts truncate the shift count
1051: which implies one can omit a sign-extension or zero-extension
1052: of a shift count. */
1053: /* One i386, shifts do truncate the count. But bit opcodes don't. */
1054:
1055: /* #define SHIFT_COUNT_TRUNCATED */
1056:
1057: /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
1058: is done just by pretending it is already truncated. */
1059: #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
1060:
1061: /* We assume that the store-condition-codes instructions store 0 for false
1062: and some other value for true. This is the value stored for true. */
1063:
1064: #define STORE_FLAG_VALUE 1
1065:
1066: /* When a prototype says `char' or `short', really pass an `int'.
1067: (The 386 can't easily push less than an int.) */
1068:
1069: #define PROMOTE_PROTOTYPES
1070:
1071: /* Specify the machine mode that pointers have.
1072: After generation of rtl, the compiler makes no further distinction
1073: between pointers and any other objects of this machine mode. */
1074: #define Pmode SImode
1075:
1076: /* A function address in a call instruction
1077: is a byte address (for indexing purposes)
1078: so give the MEM rtx a byte's mode. */
1079: #define FUNCTION_MODE QImode
1080:
1081: /* Define this if addresses of constant functions
1082: shouldn't be put through pseudo regs where they can be cse'd.
1083: Desirable on the 386 because a CALL with a constant address is
1084: not much slower than one with a register address. */
1085: #define NO_FUNCTION_CSE
1086:
1087: /* Provide the costs of a rtl expression. This is in the body of a
1088: switch on CODE. */
1089:
1090: #define RTX_COSTS(X,CODE) \
1091: case MULT: \
1092: return COSTS_N_INSNS (10); \
1093: case DIV: \
1094: case UDIV: \
1095: case MOD: \
1096: case UMOD: \
1097: return COSTS_N_INSNS (40);
1098:
1099:
1100: /* Compute the cost of computing a constant rtl expression RTX
1101: whose rtx-code is CODE. The body of this macro is a portion
1102: of a switch statement. If the code is computed here,
1103: return it with a return statement. Otherwise, break from the switch. */
1104:
1105: #define CONST_COSTS(RTX,CODE) \
1106: case CONST_INT: \
1107: case CONST: \
1108: case LABEL_REF: \
1109: case SYMBOL_REF: \
1110: return flag_pic && SYMBOLIC_CONST (RTX) ? 2 : 0; \
1111: case CONST_DOUBLE: \
1112: { \
1113: int code = standard_80387_constant_p (RTX); \
1114: return code == 1 ? 0 : \
1115: code == 2 ? 1 : \
1116: 2; \
1117: } \
1118: case PLUS: \
1119: if (GET_CODE (XEXP (RTX, 0)) == REG \
1120: && GET_CODE (XEXP (RTX, 1)) == CONST_INT) \
1121: return 1;
1122:
1123: /* Compute the cost of an address. This is meant to approximate the size
1124: and/or execution delay of an insn using that address. If the cost is
1125: approximated by the RTL complexity, including CONST_COSTS above, as
1126: is usually the case for CISC machines, this macro should not be defined.
1127: For aggressively RISCy machines, only one insn format is allowed, so
1128: this macro should be a constant. The value of this macro only matters
1129: for valid addresses.
1130:
1131: For i386, it is better to use a complex address than let gcc copy
1132: the address into a reg and make a new pseudo. But not if the address
1133: requires to two regs - that would mean more pseudos with longer
1134: lifetimes. */
1135:
1136: #define ADDRESS_COST(RTX) \
1137: ((CONSTANT_P (RTX) \
1138: || (GET_CODE (RTX) == PLUS && CONSTANT_P (XEXP (RTX, 1)) \
1139: && REG_P (XEXP (RTX, 0)))) ? 0 \
1140: : REG_P (RTX) ? 1 \
1141: : 2)
1142:
1143: /* Tell final.c how to eliminate redundant test instructions. */
1144:
1145: /* Here we define machine-dependent flags and fields in cc_status
1146: (see `conditions.h'). */
1147:
1148: /* Set if the cc value is actually in the 80387, so a floating point
1149: conditional branch must be output. */
1150: #define CC_IN_80387 04000
1151:
1152: /* Set if the CC value was stored in a nonstandard way, so that
1153: the state of equality is indicated by zero in the carry bit. */
1154: #define CC_Z_IN_NOT_C 010000
1155:
1156: /* Store in cc_status the expressions
1157: that the condition codes will describe
1158: after execution of an instruction whose pattern is EXP.
1159: Do not alter them if the instruction would not alter the cc's. */
1160:
1161: #define NOTICE_UPDATE_CC(EXP, INSN) \
1162: notice_update_cc((EXP))
1163:
1164: /* Output a signed jump insn. Use template NORMAL ordinarily, or
1165: FLOAT following a floating point comparison.
1166: Use NO_OV following an arithmetic insn that set the cc's
1167: before a test insn that was deleted.
1168: NO_OV may be zero, meaning final should reinsert the test insn
1169: because the jump cannot be handled properly without it. */
1170:
1171: #define OUTPUT_JUMP(NORMAL, FLOAT, NO_OV) \
1172: { \
1173: if (cc_prev_status.flags & CC_IN_80387) \
1174: return FLOAT; \
1175: if (cc_prev_status.flags & CC_NO_OVERFLOW) \
1176: return NO_OV; \
1177: return NORMAL; \
1178: }
1179:
1180: /* Control the assembler format that we output, to the extent
1181: this does not vary between assemblers. */
1182:
1183: /* How to refer to registers in assembler output.
1184: This sequence is indexed by compiler's hard-register-number (see above). */
1185:
1186: /* In order to refer to the first 8 regs as 32 bit regs prefix an "e"
1187: For non floating point regs, the following are the HImode names.
1188:
1189: For float regs, the stack top is sometimes referred to as "%st(0)"
1190: instead of just "%st". PRINT_REG in i386.c handles with with the
1191: "y" code. */
1192:
1193: #define HI_REGISTER_NAMES \
1194: {"ax","dx","cx","bx","si","di","bp","sp", \
1195: "st","st(1)","st(2)","st(3)","st(4)","st(5)","st(6)","st(7)","" }
1196:
1197: #define REGISTER_NAMES HI_REGISTER_NAMES
1198:
1199: /* Table of additional register names to use in user input. */
1200:
1201: #define ADDITIONAL_REGISTER_NAMES \
1202: { "eax", 0, "edx", 1, "ecx", 2, "ebx", 3, \
1203: "esi", 4, "edi", 5, "ebp", 6, "esp", 7, \
1204: "al", 0, "dl", 1, "cl", 2, "bl", 3, \
1205: "ah", 0, "dh", 1, "ch", 2, "bh", 3 }
1206:
1207: /* Note we are omitting these since currently I don't know how
1208: to get gcc to use these, since they want the same but different
1209: number as al, and ax.
1210: */
1211:
1.1.1.2 ! root 1212: /* note the last four are not really qi_registers, but
1.1 root 1213: the md will have to never output movb into one of them
1214: only a movw . There is no movb into the last four regs */
1215:
1216: #define QI_REGISTER_NAMES \
1217: {"al", "dl", "cl", "bl", "si", "di", "bp", "sp",}
1218:
1219: /* These parallel the array above, and can be used to access bits 8:15
1220: of regs 0 through 3. */
1221:
1222: #define QI_HIGH_REGISTER_NAMES \
1223: {"ah", "dh", "ch", "bh", }
1224:
1225: /* How to renumber registers for dbx and gdb. */
1226:
1227: /* {0,2,1,3,6,7,4,5,12,13,14,15,16,17} */
1228: #define DBX_REGISTER_NUMBER(n) \
1229: ((n) == 0 ? 0 : \
1230: (n) == 1 ? 2 : \
1231: (n) == 2 ? 1 : \
1232: (n) == 3 ? 3 : \
1233: (n) == 4 ? 6 : \
1234: (n) == 5 ? 7 : \
1235: (n) == 6 ? 4 : \
1236: (n) == 7 ? 5 : \
1237: (n) + 4)
1238:
1239: /* This is how to output the definition of a user-level label named NAME,
1240: such as the label on a static function or variable NAME. */
1241:
1242: #define ASM_OUTPUT_LABEL(FILE,NAME) \
1243: (assemble_name (FILE, NAME), fputs (":\n", FILE))
1244:
1245: /* This is how to output an assembler line defining a `double' constant. */
1246:
1247: #define ASM_OUTPUT_DOUBLE(FILE,VALUE) \
1248: fprintf (FILE, "%s %.22e\n", ASM_DOUBLE, (VALUE))
1249:
1250:
1251: /* This is how to output an assembler line defining a `float' constant. */
1252:
1253: #define ASM_OUTPUT_FLOAT(FILE,VALUE) \
1254: do { union { float f; long l;} tem; \
1255: tem.f = (VALUE); \
1256: fprintf((FILE), "%s 0x%x\n", ASM_LONG, tem.l); \
1257: } while (0)
1258:
1259:
1260: /* Store in OUTPUT a string (made with alloca) containing
1261: an assembler-name for a local static variable named NAME.
1262: LABELNO is an integer which is different for each call. */
1263:
1264: #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \
1265: ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \
1266: sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO)))
1267:
1268:
1269:
1270: /* This is how to output an assembler line defining an `int' constant. */
1271:
1272: #define ASM_OUTPUT_INT(FILE,VALUE) \
1273: ( fprintf (FILE, "%s ", ASM_LONG), \
1274: output_addr_const (FILE,(VALUE)), \
1275: putc('\n',FILE))
1276:
1277: /* Likewise for `char' and `short' constants. */
1278: /* is this supposed to do align too?? */
1279:
1280: #define ASM_OUTPUT_SHORT(FILE,VALUE) \
1281: ( fprintf (FILE, "%s ", ASM_SHORT), \
1282: output_addr_const (FILE,(VALUE)), \
1283: putc('\n',FILE))
1284:
1285: /*
1286: #define ASM_OUTPUT_SHORT(FILE,VALUE) \
1287: ( fprintf (FILE, "%s ", ASM_BYTE_OP), \
1288: output_addr_const (FILE,(VALUE)), \
1289: fputs (",", FILE), \
1290: output_addr_const (FILE,(VALUE)), \
1291: fputs (" >> 8\n",FILE))
1292: */
1293:
1294:
1295: #define ASM_OUTPUT_CHAR(FILE,VALUE) \
1296: ( fprintf (FILE, "%s ", ASM_BYTE_OP), \
1297: output_addr_const (FILE, (VALUE)), \
1298: putc ('\n', FILE))
1299:
1300: /* This is how to output an assembler line for a numeric constant byte. */
1301:
1302: #define ASM_OUTPUT_BYTE(FILE,VALUE) \
1303: fprintf ((FILE), "%s 0x%x\n", ASM_BYTE_OP, (VALUE))
1304:
1305: /* This is how to output an insn to push a register on the stack.
1306: It need not be very fast code. */
1307:
1308: #define ASM_OUTPUT_REG_PUSH(FILE,REGNO) \
1309: fprintf (FILE, "\tpushl e%s\n", reg_names[REGNO])
1310:
1311: /* This is how to output an insn to pop a register from the stack.
1312: It need not be very fast code. */
1313:
1314: #define ASM_OUTPUT_REG_POP(FILE,REGNO) \
1315: fprintf (FILE, "\tpopl e%s\n", reg_names[REGNO])
1316:
1317: /* This is how to output an element of a case-vector that is absolute.
1318: */
1319:
1320: #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
1321: fprintf (FILE, "%s %s%d\n", ASM_LONG, LPREFIX, VALUE)
1322:
1323: /* This is how to output an element of a case-vector that is relative.
1324: We don't use these on the 386 yet, because the ATT assembler can't do
1325: forward reference the differences.
1326: */
1327:
1328: #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, VALUE, REL) \
1329: fprintf (FILE, "\t.word %s%d-%s%d\n",LPREFIX, VALUE,LPREFIX, REL)
1330:
1331: /* Define the parentheses used to group arithmetic operations
1332: in assembler code. */
1333:
1334: #define ASM_OPEN_PAREN ""
1335: #define ASM_CLOSE_PAREN ""
1336:
1337: /* Define results of standard character escape sequences. */
1338: #define TARGET_BELL 007
1339: #define TARGET_BS 010
1340: #define TARGET_TAB 011
1341: #define TARGET_NEWLINE 012
1342: #define TARGET_VT 013
1343: #define TARGET_FF 014
1344: #define TARGET_CR 015
1345:
1346: /* Print operand X (an rtx) in assembler syntax to file FILE.
1347: CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
1348: The CODE z takes the size of operand from the following digit, and
1349: outputs b,w,or l respectively.
1350:
1351: On the 80386, we use several such letters:
1352: f -- float insn (print a CONST_DOUBLE as a float rather than in hex).
1353: L,W,B,Q,S -- print the opcode suffix for specified size of operand.
1354: R -- print the prefix for register names.
1355: z -- print the opcode suffix for the size of the current operand.
1356: * -- print a star (in certain assembler syntax)
1357: w -- print the operand as if it's a "word" (HImode) even if it isn't.
1358: b -- print the operand as if it's a byte (QImode) even if it isn't.
1359: c -- don't print special prefixes before constant operands. */
1360:
1361: #define PRINT_OPERAND_PUNCT_VALID_P(CODE) \
1362: ((CODE) == '*')
1363:
1364: #define PRINT_OPERAND(FILE, X, CODE) \
1365: print_operand (FILE, X, CODE)
1366:
1367:
1368: #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \
1369: print_operand_address (FILE, ADDR)
1370:
1371: /* Output the prefix for an immediate operand, or for an offset operand. */
1372: #define PRINT_IMMED_PREFIX(FILE) fputs (IP, (FILE))
1373: #define PRINT_OFFSET_PREFIX(FILE) fputs (IP, (FILE))
1374:
1375: /* Routines in libgcc that return floats must return them in an fp reg,
1376: just as other functions do which return such values.
1377: These macros make that happen. */
1378:
1379: #define FLOAT_VALUE_TYPE float
1380: #define INTIFY(FLOATVAL) FLOATVAL
1381:
1382: /* Nonzero if INSN magically clobbers register REGNO. */
1383:
1384: /* #define INSN_CLOBBERS_REGNO_P(INSN, REGNO) \
1385: (FP_REGNO_P (REGNO) \
1386: && (GET_CODE (INSN) == JUMP_INSN || GET_CODE (INSN) == BARRIER))
1387: */
1388:
1389: /* a letter which is not needed by the normal asm syntax, which
1390: we can use for operand syntax in the extended asm */
1391:
1392: #define ASM_OPERAND_LETTER '#'
1393:
1394: #define RET return ""
1395: #define AT_SP(mode) (gen_rtx (MEM, (mode), stack_pointer_rtx))
1396:
1397: /*
1398: Local variables:
1399: version-control: t
1400: End:
1401: */
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