![[BACK]](/cvsweb/icons/back.gif){kind=icon}
Return to i386.h CVS log ![[TXT]](/cvsweb/icons/text.gif){kind=icon}
![[DIR]](/cvsweb/icons/dir.gif){kind=icon}
Up to [GCC 2.x] / gcc / config|
Return to i386.h CVS log | Up to [GCC 2.x] / gcc / config |
1.1 root 1: /* Definitions of target machine for GNU compiler for Intel 80386.
2: Copyright (C) 1988, 1992 Free Software Foundation, Inc.
3:
4: This file is part of GNU CC.
5:
6: GNU CC is free software; you can redistribute it and/or modify
7: it under the terms of the GNU General Public License as published by
8: the Free Software Foundation; either version 2, or (at your option)
9: any later version.
10:
11: GNU CC is distributed in the hope that it will be useful,
12: but WITHOUT ANY WARRANTY; without even the implied warranty of
13: MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14: GNU General Public License for more details.
15:
16: You should have received a copy of the GNU General Public License
17: along with GNU CC; see the file COPYING. If not, write to
18: the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
19:
20:
21: /* The purpose of this file is to define the characteristics of the i386,
1.1.1.2 root 22: independent of assembler syntax or operating system.
1.1 root 23:
24: Three other files build on this one to describe a specific assembler syntax:
25: bsd386.h, att386.h, and sun386.h.
26:
27: The actual tm.h file for a particular system should include
28: this file, and then the file for the appropriate assembler syntax.
29:
30: Many macros that specify assembler syntax are omitted entirely from
31: this file because they really belong in the files for particular
32: assemblers. These include AS1, AS2, AS3, RP, IP, LPREFIX, L_SIZE,
33: PUT_OP_SIZE, USE_STAR, ADDR_BEG, ADDR_END, PRINT_IREG, PRINT_SCALE,
34: PRINT_B_I_S, and many that start with ASM_ or end in ASM_OP. */
35:
36: /* Names to predefine in the preprocessor for this target machine. */
37:
38: #define I386 1
39:
1.1.1.4 ! root 40: /* Stubs for half-pic support if not OSF/1 reference platform. */
! 41:
! 42: #ifndef HALF_PIC_P
! 43: #define HALF_PIC_P() 0
! 44: #define HALF_PIC_NUMBER_PTRS 0
! 45: #define HALF_PIC_NUMBER_REFS 0
! 46: #define HALF_PIC_ENCODE(DECL)
! 47: #define HALF_PIC_DECLARE(NAME)
! 48: #define HALF_PIC_INIT() error ("half-pic init called on systems that don't support it.")
! 49: #define HALF_PIC_ADDRESS_P(X) 0
! 50: #define HALF_PIC_PTR(X) X
! 51: #define HALF_PIC_FINISH(STREAM)
! 52: #endif
! 53:
1.1 root 54: /* Run-time compilation parameters selecting different hardware subsets. */
55:
56: extern int target_flags;
57:
58: /* Macros used in the machine description to test the flags. */
59:
1.1.1.4 ! root 60: /* configure can arrage to make this 2, to force a 486. */
! 61: #ifndef TARGET_CPU_DEFAULT
! 62: #define TARGET_CPU_DEFAULT 0
! 63: #endif
! 64:
1.1 root 65: /* Compile 80387 insns for floating point (not library calls). */
66: #define TARGET_80387 (target_flags & 1)
67: /* Compile code for an i486. */
68: #define TARGET_486 (target_flags & 2)
69: /* Compile using ret insn that pops args.
70: This will not work unless you use prototypes at least
71: for all functions that can take varying numbers of args. */
72: #define TARGET_RTD (target_flags & 8)
73: /* Compile passing first two args in regs 0 and 1.
74: This exists only to test compiler features that will
75: be needed for RISC chips. It is not usable
76: and is not intended to be usable on this cpu. */
77: #define TARGET_REGPARM (target_flags & 020)
78:
1.1.1.3 root 79: /* Put uninitialized locals into bss, not data.
80: Meaningful only on svr3. */
81: #define TARGET_SVR3_SHLIB (target_flags & 040)
82:
83: /* Use IEEE floating point comparisons. These handle correctly the cases
84: where the result of a comparison is unordered. Normally SIGFPE is
85: generated in such cases, in which case this isn't needed. */
86: #define TARGET_IEEE_FP (target_flags & 0100)
87:
1.1.1.4 ! root 88: /* Functions that return a floating point value may return that value
! 89: in the 387 FPU or in 386 integer registers. If set, this flag causes
! 90: the 387 to be used, which is compatible with most calling conventions. */
! 91: #define TARGET_FLOAT_RETURNS_IN_80387 (target_flags & 0200)
! 92:
1.1 root 93: /* Macro to define tables used to set the flags.
94: This is a list in braces of pairs in braces,
95: each pair being { "NAME", VALUE }
96: where VALUE is the bits to set or minus the bits to clear.
97: An empty string NAME is used to identify the default VALUE. */
98:
99: #define TARGET_SWITCHES \
100: { { "80387", 1}, \
1.1.1.4 ! root 101: { "no-80387", -1}, \
1.1 root 102: { "soft-float", -1}, \
1.1.1.4 ! root 103: { "no-soft-float", 1}, \
1.1 root 104: { "486", 2}, \
1.1.1.4 ! root 105: { "no-486", -2}, \
1.1 root 106: { "386", -2}, \
107: { "rtd", 8}, \
1.1.1.4 ! root 108: { "no-rtd", -8}, \
1.1 root 109: { "regparm", 020}, \
1.1.1.4 ! root 110: { "no-regparm", -020}, \
1.1.1.3 root 111: { "svr3-shlib", 040}, \
1.1.1.4 ! root 112: { "no-svr3-shlib", -040}, \
1.1.1.3 root 113: { "ieee-fp", 0100}, \
1.1.1.4 ! root 114: { "no-ieee-fp", -0100}, \
! 115: { "fp-ret-in-387", 0200}, \
! 116: { "no-fp-ret-in-387", -0200}, \
! 117: SUBTARGET_SWITCHES \
! 118: { "", TARGET_DEFAULT | TARGET_CPU_DEFAULT}}
! 119:
! 120: /* This is meant to be redefined in the host dependent files */
! 121: #define SUBTARGET_SWITCHES
! 122:
1.1 root 123:
124: /* target machine storage layout */
125:
126: /* Define this if most significant byte of a word is the lowest numbered. */
127: /* That is true on the 80386. */
128:
129: #define BITS_BIG_ENDIAN 0
130:
131: /* Define this if most significant byte of a word is the lowest numbered. */
132: /* That is not true on the 80386. */
133: #define BYTES_BIG_ENDIAN 0
134:
135: /* Define this if most significant word of a multiword number is the lowest
136: numbered. */
137: /* Not true for 80386 */
138: #define WORDS_BIG_ENDIAN 0
139:
1.1.1.2 root 140: /* number of bits in an addressable storage unit */
1.1 root 141: #define BITS_PER_UNIT 8
142:
143: /* Width in bits of a "word", which is the contents of a machine register.
144: Note that this is not necessarily the width of data type `int';
145: if using 16-bit ints on a 80386, this would still be 32.
146: But on a machine with 16-bit registers, this would be 16. */
147: #define BITS_PER_WORD 32
148:
149: /* Width of a word, in units (bytes). */
150: #define UNITS_PER_WORD 4
151:
152: /* Width in bits of a pointer.
153: See also the macro `Pmode' defined below. */
154: #define POINTER_SIZE 32
155:
156: /* Allocation boundary (in *bits*) for storing arguments in argument list. */
157: #define PARM_BOUNDARY 32
158:
159: /* Boundary (in *bits*) on which stack pointer should be aligned. */
160: #define STACK_BOUNDARY 32
161:
162: /* Allocation boundary (in *bits*) for the code of a function.
163: For i486, we get better performance by aligning to a cache
164: line (i.e. 16 byte) boundary. */
165: #define FUNCTION_BOUNDARY (TARGET_486 ? 128 : 32)
166:
167: /* Alignment of field after `int : 0' in a structure. */
168:
169: #define EMPTY_FIELD_BOUNDARY 32
170:
171: /* Minimum size in bits of the largest boundary to which any
172: and all fundamental data types supported by the hardware
173: might need to be aligned. No data type wants to be aligned
174: rounder than this. The i386 supports 64-bit floating point
175: quantities, but these can be aligned on any 32-bit boundary. */
176: #define BIGGEST_ALIGNMENT 32
177:
1.1.1.2 root 178: /* Set this non-zero if move instructions will actually fail to work
1.1 root 179: when given unaligned data. */
1.1.1.2 root 180: #define STRICT_ALIGNMENT 0
1.1 root 181:
182: /* If bit field type is int, don't let it cross an int,
183: and give entire struct the alignment of an int. */
184: /* Required on the 386 since it doesn't have bitfield insns. */
185: #define PCC_BITFIELD_TYPE_MATTERS 1
186:
187: /* Align loop starts for optimal branching. */
188: #define ASM_OUTPUT_LOOP_ALIGN(FILE) \
189: ASM_OUTPUT_ALIGN (FILE, 2)
190:
191: /* This is how to align an instruction for optimal branching.
192: On i486 we'll get better performance by aligning on a
193: cache line (i.e. 16 byte) boundary. */
194: #define ASM_OUTPUT_ALIGN_CODE(FILE) \
195: ASM_OUTPUT_ALIGN ((FILE), (TARGET_486 ? 4 : 2))
196:
197: /* Standard register usage. */
198:
199: /* This processor has special stack-like registers. See reg-stack.c
200: for details. */
201:
202: #define STACK_REGS
203:
204: /* Number of actual hardware registers.
205: The hardware registers are assigned numbers for the compiler
206: from 0 to just below FIRST_PSEUDO_REGISTER.
207: All registers that the compiler knows about must be given numbers,
208: even those that are not normally considered general registers.
209:
210: In the 80386 we give the 8 general purpose registers the numbers 0-7.
211: We number the floating point registers 8-15.
212: Note that registers 0-7 can be accessed as a short or int,
213: while only 0-3 may be used with byte `mov' instructions.
214:
215: Reg 16 does not correspond to any hardware register, but instead
216: appears in the RTL as an argument pointer prior to reload, and is
217: eliminated during reloading in favor of either the stack or frame
218: pointer. */
219:
220: #define FIRST_PSEUDO_REGISTER 17
221:
222: /* 1 for registers that have pervasive standard uses
223: and are not available for the register allocator.
224: On the 80386, the stack pointer is such, as is the arg pointer. */
225: #define FIXED_REGISTERS \
226: /*ax,dx,cx,bx,si,di,bp,sp,st,st1,st2,st3,st4,st5,st6,st7,arg*/ \
227: { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1 }
228:
229: /* 1 for registers not available across function calls.
230: These must include the FIXED_REGISTERS and also any
231: registers that can be used without being saved.
232: The latter must include the registers where values are returned
233: and the register where structure-value addresses are passed.
234: Aside from that, you can include as many other registers as you like. */
235:
236: #define CALL_USED_REGISTERS \
237: /*ax,dx,cx,bx,si,di,bp,sp,st,st1,st2,st3,st4,st5,st6,st7,arg*/ \
238: { 1, 1, 1, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 }
239:
240: /* Macro to conditionally modify fixed_regs/call_used_regs. */
241: #define CONDITIONAL_REGISTER_USAGE \
242: { \
243: if (flag_pic) \
244: { \
245: fixed_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \
246: call_used_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \
247: } \
1.1.1.4 ! root 248: if (! TARGET_80387 && ! TARGET_FLOAT_RETURNS_IN_80387) \
! 249: { \
! 250: int i; \
! 251: HARD_REG_SET x; \
! 252: COPY_HARD_REG_SET (x, reg_class_contents[(int)FLOAT_REGS]); \
! 253: for (i = 0; i < FIRST_PSEUDO_REGISTER; i++ ) \
! 254: if (TEST_HARD_REG_BIT (x, i)) \
! 255: fixed_regs[i] = call_used_regs[i] = 1; \
! 256: } \
1.1 root 257: }
258:
259: /* Return number of consecutive hard regs needed starting at reg REGNO
260: to hold something of mode MODE.
261: This is ordinarily the length in words of a value of mode MODE
262: but can be less for certain modes in special long registers.
263:
264: Actually there are no two word move instructions for consecutive
265: registers. And only registers 0-3 may have mov byte instructions
266: applied to them.
267: */
268:
269: #define HARD_REGNO_NREGS(REGNO, MODE) \
270: (FP_REGNO_P (REGNO) ? 1 \
271: : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))
272:
273: /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE.
274: On the 80386, the first 4 cpu registers can hold any mode
275: while the floating point registers may hold only floating point.
276: Make it clear that the fp regs could not hold a 16-byte float. */
277:
278: #define HARD_REGNO_MODE_OK(REGNO, MODE) \
1.1.1.4 ! root 279: ((REGNO) < 2 ? 1 \
! 280: : (REGNO) < 4 ? 1 \
! 281: : FP_REGNO_P ((REGNO)) \
! 282: ? ((GET_MODE_CLASS (MODE) == MODE_FLOAT \
! 283: || GET_MODE_CLASS (MODE) == MODE_COMPLEX_FLOAT) \
! 284: && GET_MODE_UNIT_SIZE (MODE) <= 8) \
1.1 root 285: : (MODE) != QImode)
286:
287: /* Value is 1 if it is a good idea to tie two pseudo registers
288: when one has mode MODE1 and one has mode MODE2.
289: If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
290: for any hard reg, then this must be 0 for correct output. */
291:
292: #define MODES_TIEABLE_P(MODE1, MODE2) ((MODE1) == (MODE2))
293:
294: /* A C expression returning the cost of moving data from a register of class
295: CLASS1 to one of CLASS2.
296:
297: On the i386, copying between floating-point and fixed-point
298: registers is expensive. */
299:
300: #define REGISTER_MOVE_COST(CLASS1, CLASS2) \
301: ((((CLASS1) == FLOAT_REGS && (CLASS2) != FLOAT_REGS) \
302: || ((CLASS2) == FLOAT_REGS && (CLASS1) != FLOAT_REGS)) \
303: ? 10 : 2)
304:
305: /* Specify the registers used for certain standard purposes.
306: The values of these macros are register numbers. */
307:
308: /* on the 386 the pc register is %eip, and is not usable as a general
309: register. The ordinary mov instructions won't work */
310: /* #define PC_REGNUM */
311:
312: /* Register to use for pushing function arguments. */
313: #define STACK_POINTER_REGNUM 7
314:
315: /* Base register for access to local variables of the function. */
316: #define FRAME_POINTER_REGNUM 6
317:
318: /* First floating point reg */
319: #define FIRST_FLOAT_REG 8
320:
321: /* First & last stack-like regs */
322: #define FIRST_STACK_REG FIRST_FLOAT_REG
323: #define LAST_STACK_REG (FIRST_FLOAT_REG + 7)
324:
325: /* Value should be nonzero if functions must have frame pointers.
326: Zero means the frame pointer need not be set up (and parms
327: may be accessed via the stack pointer) in functions that seem suitable.
328: This is computed in `reload', in reload1.c. */
329: #define FRAME_POINTER_REQUIRED 0
330:
331: /* Base register for access to arguments of the function. */
332: #define ARG_POINTER_REGNUM 16
333:
334: /* Register in which static-chain is passed to a function. */
335: #define STATIC_CHAIN_REGNUM 2
336:
337: /* Register to hold the addressing base for position independent
338: code access to data items. */
339: #define PIC_OFFSET_TABLE_REGNUM 3
340:
341: /* Register in which address to store a structure value
342: arrives in the function. On the 386, the prologue
343: copies this from the stack to register %eax. */
344: #define STRUCT_VALUE_INCOMING 0
345:
346: /* Place in which caller passes the structure value address.
347: 0 means push the value on the stack like an argument. */
348: #define STRUCT_VALUE 0
349:
350: /* Define the classes of registers for register constraints in the
351: machine description. Also define ranges of constants.
352:
353: One of the classes must always be named ALL_REGS and include all hard regs.
354: If there is more than one class, another class must be named NO_REGS
355: and contain no registers.
356:
357: The name GENERAL_REGS must be the name of a class (or an alias for
358: another name such as ALL_REGS). This is the class of registers
359: that is allowed by "g" or "r" in a register constraint.
360: Also, registers outside this class are allocated only when
361: instructions express preferences for them.
362:
363: The classes must be numbered in nondecreasing order; that is,
364: a larger-numbered class must never be contained completely
365: in a smaller-numbered class.
366:
367: For any two classes, it is very desirable that there be another
1.1.1.2 root 368: class that represents their union.
369:
370: It might seem that class BREG is unnecessary, since no useful 386
371: opcode needs reg %ebx. But some systems pass args to the OS in ebx,
372: and the "b" register constraint is useful in asms for syscalls. */
1.1 root 373:
374: enum reg_class
375: {
376: NO_REGS,
1.1.1.2 root 377: AREG, DREG, CREG, BREG,
1.1 root 378: Q_REGS, /* %eax %ebx %ecx %edx */
379: SIREG, DIREG,
380: INDEX_REGS, /* %eax %ebx %ecx %edx %esi %edi %ebp */
381: GENERAL_REGS, /* %eax %ebx %ecx %edx %esi %edi %ebp %esp */
382: FP_TOP_REG, FP_SECOND_REG, /* %st(0) %st(1) */
383: FLOAT_REGS,
384: ALL_REGS, LIM_REG_CLASSES
385: };
386:
387: #define N_REG_CLASSES (int) LIM_REG_CLASSES
388:
389: /* Give names of register classes as strings for dump file. */
390:
391: #define REG_CLASS_NAMES \
392: { "NO_REGS", \
1.1.1.2 root 393: "AREG", "DREG", "CREG", "BREG", \
1.1 root 394: "Q_REGS", \
395: "SIREG", "DIREG", \
396: "INDEX_REGS", \
397: "GENERAL_REGS", \
398: "FP_TOP_REG", "FP_SECOND_REG", \
399: "FLOAT_REGS", \
400: "ALL_REGS" }
401:
402: /* Define which registers fit in which classes.
403: This is an initializer for a vector of HARD_REG_SET
404: of length N_REG_CLASSES. */
405:
406: #define REG_CLASS_CONTENTS \
407: { 0, \
1.1.1.2 root 408: 0x1, 0x2, 0x4, 0x8, /* AREG, DREG, CREG, BREG */ \
1.1 root 409: 0xf, /* Q_REGS */ \
410: 0x10, 0x20, /* SIREG, DIREG */ \
411: 0x1007f, /* INDEX_REGS */ \
412: 0x100ff, /* GENERAL_REGS */ \
413: 0x0100, 0x0200, /* FP_TOP_REG, FP_SECOND_REG */ \
414: 0xff00, /* FLOAT_REGS */ \
415: 0x1ffff }
416:
417: /* The same information, inverted:
418: Return the class number of the smallest class containing
419: reg number REGNO. This could be a conditional expression
420: or could index an array. */
421:
422: extern enum reg_class regclass_map[FIRST_PSEUDO_REGISTER];
423: #define REGNO_REG_CLASS(REGNO) (regclass_map[REGNO])
424:
425: /* When defined, the compiler allows registers explicitly used in the
426: rtl to be used as spill registers but prevents the compiler from
427: extending the lifetime of these registers. */
428:
429: #define SMALL_REGISTER_CLASSES
430:
431: #define QI_REG_P(X) \
432: (REG_P (X) && REGNO (X) < 4)
433: #define NON_QI_REG_P(X) \
434: (REG_P (X) && REGNO (X) >= 4 && REGNO (X) < FIRST_PSEUDO_REGISTER)
435:
436: #define FP_REG_P(X) (REG_P (X) && FP_REGNO_P (REGNO (X)))
437: #define FP_REGNO_P(n) ((n) >= FIRST_STACK_REG && (n) <= LAST_STACK_REG)
438:
439: #define STACK_REG_P(xop) (REG_P (xop) && \
440: REGNO (xop) >= FIRST_STACK_REG && \
441: REGNO (xop) <= LAST_STACK_REG)
442:
443: #define NON_STACK_REG_P(xop) (REG_P (xop) && ! STACK_REG_P (xop))
444:
445: #define STACK_TOP_P(xop) (REG_P (xop) && REGNO (xop) == FIRST_STACK_REG)
446:
447: /* Try to maintain the accuracy of the death notes for regs satisfying the
448: following. Important for stack like regs, to know when to pop. */
449:
450: /* #define PRESERVE_DEATH_INFO_REGNO_P(x) FP_REGNO_P(x) */
451:
452: /* 1 if register REGNO can magically overlap other regs.
453: Note that nonzero values work only in very special circumstances. */
454:
455: /* #define OVERLAPPING_REGNO_P(REGNO) FP_REGNO_P (REGNO) */
456:
457: /* The class value for index registers, and the one for base regs. */
458:
459: #define INDEX_REG_CLASS INDEX_REGS
460: #define BASE_REG_CLASS GENERAL_REGS
461:
462: /* Get reg_class from a letter such as appears in the machine description. */
463:
464: #define REG_CLASS_FROM_LETTER(C) \
1.1.1.4 ! root 465: ((C) == 'r' ? GENERAL_REGS : \
! 466: (C) == 'q' ? Q_REGS : \
! 467: (C) == 'f' ? (TARGET_80387 || TARGET_FLOAT_RETURNS_IN_80387 \
! 468: ? FLOAT_REGS \
! 469: : NO_REGS) : \
! 470: (C) == 't' ? (TARGET_80387 || TARGET_FLOAT_RETURNS_IN_80387 \
! 471: ? FP_TOP_REG \
! 472: : NO_REGS) : \
! 473: (C) == 'u' ? (TARGET_80387 || TARGET_FLOAT_RETURNS_IN_80387 \
! 474: ? FP_SECOND_REG \
! 475: : NO_REGS) : \
! 476: (C) == 'a' ? AREG : \
! 477: (C) == 'b' ? BREG : \
! 478: (C) == 'c' ? CREG : \
! 479: (C) == 'd' ? DREG : \
! 480: (C) == 'D' ? DIREG : \
1.1 root 481: (C) == 'S' ? SIREG : NO_REGS)
482:
483: /* The letters I, J, K, L and M in a register constraint string
484: can be used to stand for particular ranges of immediate operands.
485: This macro defines what the ranges are.
486: C is the letter, and VALUE is a constant value.
487: Return 1 if VALUE is in the range specified by C.
488:
489: I is for non-DImode shifts.
490: J is for DImode shifts.
491: K and L are for an `andsi' optimization.
492: M is for shifts that can be executed by the "lea" opcode.
493: */
494:
495: #define CONST_OK_FOR_LETTER_P(VALUE, C) \
496: ((C) == 'I' ? (VALUE) >= 0 && (VALUE) <= 31 : \
497: (C) == 'J' ? (VALUE) >= 0 && (VALUE) <= 63 : \
498: (C) == 'K' ? (VALUE) == 0xff : \
499: (C) == 'L' ? (VALUE) == 0xffff : \
500: (C) == 'M' ? (VALUE) >= 0 && (VALUE) <= 3 : \
501: 0)
502:
503: /* Similar, but for floating constants, and defining letters G and H.
1.1.1.2 root 504: Here VALUE is the CONST_DOUBLE rtx itself. We allow constants even if
505: TARGET_387 isn't set, because the stack register converter may need to
506: load 0.0 into the function value register. */
1.1 root 507:
508: #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
1.1.1.2 root 509: ((C) == 'G' ? standard_80387_constant_p (VALUE) : 0)
1.1 root 510:
511: /* Place additional restrictions on the register class to use when it
512: is necessary to be able to hold a value of mode @var{mode} in a reload
513: register for which class @var{class} would ordinarily be used. */
514:
515: #define LIMIT_RELOAD_CLASS(MODE, CLASS) \
516: ((MODE) == QImode && ((CLASS) == ALL_REGS || (CLASS) == GENERAL_REGS) \
517: ? Q_REGS : (CLASS))
518:
519: /* Given an rtx X being reloaded into a reg required to be
520: in class CLASS, return the class of reg to actually use.
521: In general this is just CLASS; but on some machines
522: in some cases it is preferable to use a more restrictive class.
523: On the 80386 series, we prevent floating constants from being
524: reloaded into floating registers (since no move-insn can do that)
525: and we ensure that QImodes aren't reloaded into the esi or edi reg. */
526:
527: /* Don't put CONST_DOUBLE into FLOAT_REGS.
528: QImode must go into class Q_REGS.
529: MODE_INT must not go into FLOAT_REGS. */
530:
531: #define PREFERRED_RELOAD_CLASS(X,CLASS) \
532: (GET_CODE (X) == CONST_DOUBLE \
533: ? (reg_class_subset_p ((CLASS), GENERAL_REGS) || (CLASS) == ALL_REGS \
534: ? (CLASS) : NO_REGS) \
535: : GET_MODE (X) == QImode \
536: ? (! reg_class_subset_p ((CLASS), Q_REGS) ? Q_REGS : (CLASS)) \
537: : (GET_MODE_CLASS (GET_MODE (X)) == MODE_INT && (CLASS) == FLOAT_REGS ? \
538: GENERAL_REGS : (CLASS)))
539:
540: /* Return the maximum number of consecutive registers
541: needed to represent mode MODE in a register of class CLASS. */
542: /* On the 80386, this is the size of MODE in words,
543: except in the FP regs, where a single reg is always enough. */
544: #define CLASS_MAX_NREGS(CLASS, MODE) \
545: ((CLASS) == FLOAT_REGS ? 1 : \
546: (CLASS) == FP_TOP_REG ? 1 : \
547: (CLASS) == FP_SECOND_REG ? 1 : \
548: ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))
549:
550: /* Stack layout; function entry, exit and calling. */
551:
552: /* Define this if pushing a word on the stack
553: makes the stack pointer a smaller address. */
554: #define STACK_GROWS_DOWNWARD
555:
556: /* Define this if the nominal address of the stack frame
557: is at the high-address end of the local variables;
558: that is, each additional local variable allocated
559: goes at a more negative offset in the frame. */
560: #define FRAME_GROWS_DOWNWARD
561:
562: /* Offset within stack frame to start allocating local variables at.
563: If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
564: first local allocated. Otherwise, it is the offset to the BEGINNING
565: of the first local allocated. */
566: #define STARTING_FRAME_OFFSET 0
567:
568: /* If we generate an insn to push BYTES bytes,
569: this says how many the stack pointer really advances by.
570: On 386 pushw decrements by exactly 2 no matter what the position was.
571: On the 386 there is no pushb; we use pushw instead, and this
572: has the effect of rounding up to 2. */
573:
574: #define PUSH_ROUNDING(BYTES) (((BYTES) + 1) & (-2))
575:
576: /* Offset of first parameter from the argument pointer register value. */
577: #define FIRST_PARM_OFFSET(FNDECL) 0
578:
579: /* Value is the number of bytes of arguments automatically
580: popped when returning from a subroutine call.
581: FUNTYPE is the data type of the function (as a tree),
582: or for a library call it is an identifier node for the subroutine name.
583: SIZE is the number of bytes of arguments passed on the stack.
584:
585: On the 80386, the RTD insn may be used to pop them if the number
586: of args is fixed, but if the number is variable then the caller
587: must pop them all. RTD can't be used for library calls now
588: because the library is compiled with the Unix compiler.
589: Use of RTD is a selectable option, since it is incompatible with
590: standard Unix calling sequences. If the option is not selected,
591: the caller must always pop the args. */
592:
593: #define RETURN_POPS_ARGS(FUNTYPE,SIZE) \
594: (TREE_CODE (FUNTYPE) == IDENTIFIER_NODE ? 0 \
595: : (TARGET_RTD \
596: && (TYPE_ARG_TYPES (FUNTYPE) == 0 \
597: || (TREE_VALUE (tree_last (TYPE_ARG_TYPES (FUNTYPE))) \
598: == void_type_node))) ? (SIZE) \
599: : (aggregate_value_p (FUNTYPE)) ? GET_MODE_SIZE (Pmode) : 0)
600:
1.1.1.4 ! root 601: /* Define how to find the value returned by a function.
! 602: VALTYPE is the data type of the value (as a tree).
! 603: If the precise function being called is known, FUNC is its FUNCTION_DECL;
! 604: otherwise, FUNC is 0. */
1.1 root 605: #define FUNCTION_VALUE(VALTYPE, FUNC) \
606: gen_rtx (REG, TYPE_MODE (VALTYPE), \
607: VALUE_REGNO (TYPE_MODE (VALTYPE)))
608:
609: /* Define how to find the value returned by a library function
610: assuming the value has mode MODE. */
611:
612: #define LIBCALL_VALUE(MODE) \
613: gen_rtx (REG, MODE, VALUE_REGNO (MODE))
614:
615: /* 1 if N is a possible register number for function argument passing.
616: On the 80386, no registers are used in this way.
617: *NOTE* -mregparm does not work.
618: It exists only to test register calling conventions. */
619:
620: #define FUNCTION_ARG_REGNO_P(N) 0
621:
622: /* Define a data type for recording info about an argument list
623: during the scan of that argument list. This data type should
624: hold all necessary information about the function itself
625: and about the args processed so far, enough to enable macros
626: such as FUNCTION_ARG to determine where the next arg should go.
627:
628: On the 80386, this is a single integer, which is a number of bytes
629: of arguments scanned so far. */
630:
631: #define CUMULATIVE_ARGS int
632:
633: /* Initialize a variable CUM of type CUMULATIVE_ARGS
634: for a call to a function whose data type is FNTYPE.
635: For a library call, FNTYPE is 0.
636:
637: On the 80386, the offset starts at 0. */
638:
639: #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME) \
640: ((CUM) = 0)
641:
642: /* Update the data in CUM to advance over an argument
643: of mode MODE and data type TYPE.
644: (TYPE is null for libcalls where that information may not be available.) */
645:
646: #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
647: ((CUM) += ((MODE) != BLKmode \
648: ? (GET_MODE_SIZE (MODE) + 3) & ~3 \
649: : (int_size_in_bytes (TYPE) + 3) & ~3))
650:
651: /* Define where to put the arguments to a function.
652: Value is zero to push the argument on the stack,
653: or a hard register in which to store the argument.
654:
655: MODE is the argument's machine mode.
656: TYPE is the data type of the argument (as a tree).
657: This is null for libcalls where that information may
658: not be available.
659: CUM is a variable of type CUMULATIVE_ARGS which gives info about
660: the preceding args and about the function being called.
661: NAMED is nonzero if this argument is a named parameter
662: (otherwise it is an extra parameter matching an ellipsis). */
663:
664:
665: /* On the 80386 all args are pushed, except if -mregparm is specified
666: then the first two words of arguments are passed in EAX, EDX.
667: *NOTE* -mregparm does not work.
668: It exists only to test register calling conventions. */
669:
670: #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
671: ((TARGET_REGPARM && (CUM) < 8) ? gen_rtx (REG, (MODE), (CUM) / 4) : 0)
672:
673: /* For an arg passed partly in registers and partly in memory,
674: this is the number of registers used.
675: For args passed entirely in registers or entirely in memory, zero. */
676:
677:
678: #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) \
679: ((TARGET_REGPARM && (CUM) < 8 \
680: && 8 < ((CUM) + ((MODE) == BLKmode \
681: ? int_size_in_bytes (TYPE) \
682: : GET_MODE_SIZE (MODE)))) \
683: ? 2 - (CUM) / 4 : 0)
684:
685: /* This macro generates the assembly code for function entry.
686: FILE is a stdio stream to output the code to.
687: SIZE is an int: how many units of temporary storage to allocate.
688: Refer to the array `regs_ever_live' to determine which registers
689: to save; `regs_ever_live[I]' is nonzero if register number I
690: is ever used in the function. This macro is responsible for
691: knowing which registers should not be saved even if used. */
692:
693: #define FUNCTION_PROLOGUE(FILE, SIZE) \
694: function_prologue (FILE, SIZE)
695:
696: /* Output assembler code to FILE to increment profiler label # LABELNO
697: for profiling a function entry. */
698:
699: #define FUNCTION_PROFILER(FILE, LABELNO) \
700: { \
701: if (flag_pic) \
702: { \
703: fprintf (FILE, "\tleal %sP%d@GOTOFF(%%ebx),%%edx\n", \
704: LPREFIX, (LABELNO)); \
705: fprintf (FILE, "\tcall *_mcount@GOT(%%ebx)\n"); \
706: } \
707: else \
708: { \
709: fprintf (FILE, "\tmovl $%sP%d,%%edx\n", LPREFIX, (LABELNO)); \
710: fprintf (FILE, "\tcall _mcount\n"); \
711: } \
712: }
713:
714: /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
715: the stack pointer does not matter. The value is tested only in
716: functions that have frame pointers.
717: No definition is equivalent to always zero. */
718: /* Note on the 386 it might be more efficient not to define this since
719: we have to restore it ourselves from the frame pointer, in order to
720: use pop */
721:
722: #define EXIT_IGNORE_STACK 1
723:
724: /* This macro generates the assembly code for function exit,
725: on machines that need it. If FUNCTION_EPILOGUE is not defined
726: then individual return instructions are generated for each
727: return statement. Args are same as for FUNCTION_PROLOGUE.
728:
729: The function epilogue should not depend on the current stack pointer!
730: It should use the frame pointer only. This is mandatory because
731: of alloca; we also take advantage of it to omit stack adjustments
732: before returning.
733:
734: If the last non-note insn in the function is a BARRIER, then there
735: is no need to emit a function prologue, because control does not fall
736: off the end. This happens if the function ends in an "exit" call, or
737: if a `return' insn is emitted directly into the function. */
738:
739: #define FUNCTION_EPILOGUE(FILE, SIZE) \
740: do { \
741: rtx last = get_last_insn (); \
742: if (last && GET_CODE (last) == NOTE) \
743: last = prev_nonnote_insn (last); \
744: if (! last || GET_CODE (last) != BARRIER) \
745: function_epilogue (FILE, SIZE); \
746: } while (0)
747:
748: /* Output assembler code for a block containing the constant parts
749: of a trampoline, leaving space for the variable parts. */
750:
751: /* On the 386, the trampoline contains three instructions:
752: mov #STATIC,ecx
753: mov #FUNCTION,eax
754: jmp @eax */
1.1.1.4 ! root 755: #define TRAMPOLINE_TEMPLATE(FILE) \
! 756: { \
! 757: ASM_OUTPUT_CHAR (FILE, GEN_INT (0xb9)); \
! 758: ASM_OUTPUT_SHORT (FILE, const0_rtx); \
! 759: ASM_OUTPUT_SHORT (FILE, const0_rtx); \
! 760: ASM_OUTPUT_CHAR (FILE, GEN_INT (0xb8)); \
! 761: ASM_OUTPUT_SHORT (FILE, const0_rtx); \
! 762: ASM_OUTPUT_SHORT (FILE, const0_rtx); \
! 763: ASM_OUTPUT_CHAR (FILE, GEN_INT (0xff)); \
! 764: ASM_OUTPUT_CHAR (FILE, GEN_INT (0xe0)); \
1.1 root 765: }
766:
767: /* Length in units of the trampoline for entering a nested function. */
768:
769: #define TRAMPOLINE_SIZE 12
770:
771: /* Emit RTL insns to initialize the variable parts of a trampoline.
772: FNADDR is an RTX for the address of the function's pure code.
773: CXT is an RTX for the static chain value for the function. */
774:
775: #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
776: { \
777: emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 1)), CXT); \
778: emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 6)), FNADDR); \
779: }
780:
781: /* Definitions for register eliminations.
782:
783: This is an array of structures. Each structure initializes one pair
784: of eliminable registers. The "from" register number is given first,
785: followed by "to". Eliminations of the same "from" register are listed
786: in order of preference.
787:
788: We have two registers that can be eliminated on the i386. First, the
789: frame pointer register can often be eliminated in favor of the stack
790: pointer register. Secondly, the argument pointer register can always be
791: eliminated; it is replaced with either the stack or frame pointer. */
792:
793: #define ELIMINABLE_REGS \
794: {{ ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
795: { ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM}, \
796: { FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}}
797:
798: /* Given FROM and TO register numbers, say whether this elimination is allowed.
799: Frame pointer elimination is automatically handled.
800:
801: For the i386, if frame pointer elimination is being done, we would like to
802: convert ap into sp, not fp.
803:
804: All other eliminations are valid. */
805:
806: #define CAN_ELIMINATE(FROM, TO) \
807: ((FROM) == ARG_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM \
808: ? ! frame_pointer_needed \
809: : 1)
810:
811: /* Define the offset between two registers, one to be eliminated, and the other
812: its replacement, at the start of a routine. */
813:
814: #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
815: { \
816: if ((FROM) == ARG_POINTER_REGNUM && (TO) == FRAME_POINTER_REGNUM) \
817: (OFFSET) = 8; /* Skip saved PC and previous frame pointer */ \
818: else \
819: { \
820: int regno; \
821: int offset = 0; \
822: \
823: for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++) \
824: if ((regs_ever_live[regno] && ! call_used_regs[regno]) \
825: || (current_function_uses_pic_offset_table \
826: && regno == PIC_OFFSET_TABLE_REGNUM)) \
827: offset += 4; \
828: \
829: (OFFSET) = offset + get_frame_size (); \
830: \
831: if ((FROM) == ARG_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM) \
832: (OFFSET) += 4; /* Skip saved PC */ \
833: } \
834: }
835:
836: /* Addressing modes, and classification of registers for them. */
837:
838: /* #define HAVE_POST_INCREMENT */
839: /* #define HAVE_POST_DECREMENT */
840:
841: /* #define HAVE_PRE_DECREMENT */
842: /* #define HAVE_PRE_INCREMENT */
843:
844: /* Macros to check register numbers against specific register classes. */
845:
846: /* These assume that REGNO is a hard or pseudo reg number.
847: They give nonzero only if REGNO is a hard reg of the suitable class
848: or a pseudo reg currently allocated to a suitable hard reg.
849: Since they use reg_renumber, they are safe only once reg_renumber
850: has been allocated, which happens in local-alloc.c. */
851:
852: #define REGNO_OK_FOR_INDEX_P(REGNO) \
853: ((REGNO) < STACK_POINTER_REGNUM \
854: || (unsigned) reg_renumber[REGNO] < STACK_POINTER_REGNUM)
855:
856: #define REGNO_OK_FOR_BASE_P(REGNO) \
857: ((REGNO) <= STACK_POINTER_REGNUM \
858: || (REGNO) == ARG_POINTER_REGNUM \
859: || (unsigned) reg_renumber[REGNO] <= STACK_POINTER_REGNUM)
860:
861: #define REGNO_OK_FOR_SIREG_P(REGNO) ((REGNO) == 4 || reg_renumber[REGNO] == 4)
862: #define REGNO_OK_FOR_DIREG_P(REGNO) ((REGNO) == 5 || reg_renumber[REGNO] == 5)
863:
864: /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
865: and check its validity for a certain class.
866: We have two alternate definitions for each of them.
867: The usual definition accepts all pseudo regs; the other rejects
868: them unless they have been allocated suitable hard regs.
869: The symbol REG_OK_STRICT causes the latter definition to be used.
870:
871: Most source files want to accept pseudo regs in the hope that
872: they will get allocated to the class that the insn wants them to be in.
873: Source files for reload pass need to be strict.
874: After reload, it makes no difference, since pseudo regs have
875: been eliminated by then. */
876:
877: #ifndef REG_OK_STRICT
878:
879: /* Nonzero if X is a hard reg that can be used as an index or if
880: it is a pseudo reg. */
881:
882: #define REG_OK_FOR_INDEX_P(X) \
883: (REGNO (X) < STACK_POINTER_REGNUM \
884: || REGNO (X) >= FIRST_PSEUDO_REGISTER)
885:
886: /* Nonzero if X is a hard reg that can be used as a base reg
887: of if it is a pseudo reg. */
888: /* ?wfs */
889:
890: #define REG_OK_FOR_BASE_P(X) \
891: (REGNO (X) <= STACK_POINTER_REGNUM \
892: || REGNO (X) == ARG_POINTER_REGNUM \
893: || REGNO(X) >= FIRST_PSEUDO_REGISTER)
894:
895: #define REG_OK_FOR_STRREG_P(X) \
896: (REGNO (X) == 4 || REGNO (X) == 5 || REGNO (X) >= FIRST_PSEUDO_REGISTER)
897:
898: #else
899:
900: /* Nonzero if X is a hard reg that can be used as an index. */
901: #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
902: /* Nonzero if X is a hard reg that can be used as a base reg. */
903: #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
904: #define REG_OK_FOR_STRREG_P(X) \
905: (REGNO_OK_FOR_DIREG_P (REGNO (X)) || REGNO_OK_FOR_SIREG_P (REGNO (X)))
906:
907: #endif
908:
909: /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
910: that is a valid memory address for an instruction.
911: The MODE argument is the machine mode for the MEM expression
912: that wants to use this address.
913:
914: The other macros defined here are used only in GO_IF_LEGITIMATE_ADDRESS,
915: except for CONSTANT_ADDRESS_P which is usually machine-independent.
916:
917: See legitimize_pic_address in i386.c for details as to what
918: constitutes a legitimate address when -fpic is used. */
919:
920: #define MAX_REGS_PER_ADDRESS 2
921:
922: #define CONSTANT_ADDRESS_P(X) CONSTANT_P (X)
923:
924: /* Nonzero if the constant value X is a legitimate general operand.
925: It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE. */
926:
927: #define LEGITIMATE_CONSTANT_P(X) 1
928:
929: #define GO_IF_INDEXABLE_BASE(X, ADDR) \
930: if (GET_CODE (X) == REG && REG_OK_FOR_BASE_P (X)) goto ADDR
931:
932: #define LEGITIMATE_INDEX_REG_P(X) \
933: (GET_CODE (X) == REG && REG_OK_FOR_INDEX_P (X))
934:
935: /* Return 1 if X is an index or an index times a scale. */
936:
937: #define LEGITIMATE_INDEX_P(X) \
938: (LEGITIMATE_INDEX_REG_P (X) \
939: || (GET_CODE (X) == MULT \
940: && LEGITIMATE_INDEX_REG_P (XEXP (X, 0)) \
941: && GET_CODE (XEXP (X, 1)) == CONST_INT \
942: && (INTVAL (XEXP (X, 1)) == 2 \
943: || INTVAL (XEXP (X, 1)) == 4 \
944: || INTVAL (XEXP (X, 1)) == 8)))
945:
946: /* Go to ADDR if X is an index term, a base reg, or a sum of those. */
947:
948: #define GO_IF_INDEXING(X, ADDR) \
949: { if (LEGITIMATE_INDEX_P (X)) goto ADDR; \
950: GO_IF_INDEXABLE_BASE (X, ADDR); \
951: if (GET_CODE (X) == PLUS && LEGITIMATE_INDEX_P (XEXP (X, 0))) \
952: { GO_IF_INDEXABLE_BASE (XEXP (X, 1), ADDR); } \
953: if (GET_CODE (X) == PLUS && LEGITIMATE_INDEX_P (XEXP (X, 1))) \
954: { GO_IF_INDEXABLE_BASE (XEXP (X, 0), ADDR); } }
955:
956: /* We used to allow this, but it isn't ever used.
957: || ((GET_CODE (X) == POST_DEC || GET_CODE (X) == POST_INC) \
958: && REG_P (XEXP (X, 0)) \
959: && REG_OK_FOR_STRREG_P (XEXP (X, 0))) \
960: */
961:
962: #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
963: { \
964: if (CONSTANT_ADDRESS_P (X) \
965: && (! flag_pic || LEGITIMATE_PIC_OPERAND_P (X))) \
966: goto ADDR; \
967: GO_IF_INDEXING (X, ADDR); \
968: if (GET_CODE (X) == PLUS && CONSTANT_ADDRESS_P (XEXP (X, 1))) \
969: { \
970: rtx x0 = XEXP (X, 0); \
971: if (! flag_pic || ! SYMBOLIC_CONST (XEXP (X, 1))) \
972: { GO_IF_INDEXING (x0, ADDR); } \
973: else if (x0 == pic_offset_table_rtx) \
974: goto ADDR; \
975: else if (GET_CODE (x0) == PLUS) \
976: { \
977: if (XEXP (x0, 0) == pic_offset_table_rtx) \
978: { GO_IF_INDEXABLE_BASE (XEXP (x0, 1), ADDR); } \
979: if (XEXP (x0, 1) == pic_offset_table_rtx) \
980: { GO_IF_INDEXABLE_BASE (XEXP (x0, 0), ADDR); } \
981: } \
982: } \
983: }
984:
985: /* Try machine-dependent ways of modifying an illegitimate address
986: to be legitimate. If we find one, return the new, valid address.
987: This macro is used in only one place: `memory_address' in explow.c.
988:
989: OLDX is the address as it was before break_out_memory_refs was called.
990: In some cases it is useful to look at this to decide what needs to be done.
991:
992: MODE and WIN are passed so that this macro can use
993: GO_IF_LEGITIMATE_ADDRESS.
994:
995: It is always safe for this macro to do nothing. It exists to recognize
996: opportunities to optimize the output.
997:
998: For the 80386, we handle X+REG by loading X into a register R and
999: using R+REG. R will go in a general reg and indexing will be used.
1000: However, if REG is a broken-out memory address or multiplication,
1001: nothing needs to be done because REG can certainly go in a general reg.
1002:
1003: When -fpic is used, special handling is needed for symbolic references.
1004: See comments by legitimize_pic_address in i386.c for details. */
1005:
1006: #define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) \
1007: { extern rtx legitimize_pic_address (); \
1008: int ch = (X) != (OLDX); \
1009: if (flag_pic && SYMBOLIC_CONST (X)) \
1010: { \
1011: (X) = legitimize_pic_address (X, 0); \
1012: if (memory_address_p (MODE, X)) \
1013: goto WIN; \
1014: } \
1015: if (GET_CODE (X) == PLUS) \
1016: { if (GET_CODE (XEXP (X, 0)) == MULT) \
1017: ch = 1, XEXP (X, 0) = force_operand (XEXP (X, 0), 0); \
1018: if (GET_CODE (XEXP (X, 1)) == MULT) \
1019: ch = 1, XEXP (X, 1) = force_operand (XEXP (X, 1), 0); \
1020: if (ch && GET_CODE (XEXP (X, 1)) == REG \
1021: && GET_CODE (XEXP (X, 0)) == REG) \
1022: goto WIN; \
1023: if (flag_pic && SYMBOLIC_CONST (XEXP (X, 1))) \
1024: ch = 1, (X) = legitimize_pic_address (X, 0); \
1025: if (ch) { GO_IF_LEGITIMATE_ADDRESS (MODE, X, WIN); } \
1026: if (GET_CODE (XEXP (X, 0)) == REG) \
1027: { register rtx temp = gen_reg_rtx (Pmode); \
1028: register rtx val = force_operand (XEXP (X, 1), temp); \
1.1.1.4 ! root 1029: if (val != temp) emit_move_insn (temp, val); \
1.1 root 1030: XEXP (X, 1) = temp; \
1031: goto WIN; } \
1032: else if (GET_CODE (XEXP (X, 1)) == REG) \
1033: { register rtx temp = gen_reg_rtx (Pmode); \
1034: register rtx val = force_operand (XEXP (X, 0), temp); \
1.1.1.4 ! root 1035: if (val != temp) emit_move_insn (temp, val); \
1.1 root 1036: XEXP (X, 0) = temp; \
1037: goto WIN; }}}
1038:
1039: /* Nonzero if the constant value X is a legitimate general operand
1040: when generating PIC code. It is given that flag_pic is on and
1041: that X satisfies CONSTANT_P or is a CONST_DOUBLE. */
1042:
1043: #define LEGITIMATE_PIC_OPERAND_P(X) \
1044: (! SYMBOLIC_CONST (X) \
1045: || (GET_CODE (X) == SYMBOL_REF && CONSTANT_POOL_ADDRESS_P (X)))
1046:
1047: #define SYMBOLIC_CONST(X) \
1048: (GET_CODE (X) == SYMBOL_REF \
1049: || GET_CODE (X) == LABEL_REF \
1050: || (GET_CODE (X) == CONST && symbolic_reference_mentioned_p (X)))
1051:
1052: /* Go to LABEL if ADDR (a legitimate address expression)
1053: has an effect that depends on the machine mode it is used for.
1054: On the 80386, only postdecrement and postincrement address depend thus
1055: (the amount of decrement or increment being the length of the operand). */
1056: #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) \
1057: if (GET_CODE (ADDR) == POST_INC || GET_CODE (ADDR) == POST_DEC) goto LABEL
1058:
1059: /* Define this macro if references to a symbol must be treated
1060: differently depending on something about the variable or
1061: function named by the symbol (such as what section it is in).
1062:
1.1.1.2 root 1063: On i386, if using PIC, mark a SYMBOL_REF for a non-global symbol
1.1 root 1064: so that we may access it directly in the GOT. */
1065:
1066: #define ENCODE_SECTION_INFO(DECL) \
1067: do \
1068: { \
1069: if (flag_pic) \
1070: { \
1.1.1.2 root 1071: rtx rtl = (TREE_CODE_CLASS (TREE_CODE (DECL)) != 'd' \
1072: ? TREE_CST_RTL (DECL) : DECL_RTL (DECL)); \
1073: SYMBOL_REF_FLAG (XEXP (rtl, 0)) \
1074: = (TREE_CODE_CLASS (TREE_CODE (DECL)) != 'd' \
1075: || ! TREE_PUBLIC (DECL)); \
1.1 root 1076: } \
1077: } \
1078: while (0)
1079:
1080: /* Specify the machine mode that this machine uses
1081: for the index in the tablejump instruction. */
1082: #define CASE_VECTOR_MODE Pmode
1083:
1084: /* Define this if the tablejump instruction expects the table
1085: to contain offsets from the address of the table.
1086: Do not define this if the table should contain absolute addresses. */
1087: /* #define CASE_VECTOR_PC_RELATIVE */
1088:
1089: /* Specify the tree operation to be used to convert reals to integers.
1090: This should be changed to take advantage of fist --wfs ??
1091: */
1092: #define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR
1093:
1094: /* This is the kind of divide that is easiest to do in the general case. */
1095: #define EASY_DIV_EXPR TRUNC_DIV_EXPR
1096:
1097: /* Define this as 1 if `char' should by default be signed; else as 0. */
1098: #define DEFAULT_SIGNED_CHAR 1
1099:
1100: /* Max number of bytes we can move from memory to memory
1101: in one reasonably fast instruction. */
1102: #define MOVE_MAX 4
1103:
1104: /* MOVE_RATIO is the number of move instructions that is better than a
1105: block move. Make this large on i386, since the block move is very
1106: inefficient with small blocks, and the hard register needs of the
1107: block move require much reload work. */
1108: #define MOVE_RATIO 5
1109:
1110: /* Define this if zero-extension is slow (more than one real instruction). */
1111: /* #define SLOW_ZERO_EXTEND */
1112:
1113: /* Nonzero if access to memory by bytes is slow and undesirable. */
1114: #define SLOW_BYTE_ACCESS 0
1115:
1116: /* Define if shifts truncate the shift count
1117: which implies one can omit a sign-extension or zero-extension
1118: of a shift count. */
1119: /* One i386, shifts do truncate the count. But bit opcodes don't. */
1120:
1121: /* #define SHIFT_COUNT_TRUNCATED */
1122:
1123: /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
1124: is done just by pretending it is already truncated. */
1125: #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
1126:
1127: /* We assume that the store-condition-codes instructions store 0 for false
1128: and some other value for true. This is the value stored for true. */
1129:
1130: #define STORE_FLAG_VALUE 1
1131:
1132: /* When a prototype says `char' or `short', really pass an `int'.
1133: (The 386 can't easily push less than an int.) */
1134:
1135: #define PROMOTE_PROTOTYPES
1136:
1137: /* Specify the machine mode that pointers have.
1138: After generation of rtl, the compiler makes no further distinction
1139: between pointers and any other objects of this machine mode. */
1140: #define Pmode SImode
1141:
1142: /* A function address in a call instruction
1143: is a byte address (for indexing purposes)
1144: so give the MEM rtx a byte's mode. */
1145: #define FUNCTION_MODE QImode
1146:
1147: /* Define this if addresses of constant functions
1148: shouldn't be put through pseudo regs where they can be cse'd.
1149: Desirable on the 386 because a CALL with a constant address is
1150: not much slower than one with a register address. */
1151: #define NO_FUNCTION_CSE
1152:
1153: /* Provide the costs of a rtl expression. This is in the body of a
1154: switch on CODE. */
1155:
1.1.1.3 root 1156: #define RTX_COSTS(X,CODE,OUTER_CODE) \
1.1 root 1157: case MULT: \
1158: return COSTS_N_INSNS (10); \
1159: case DIV: \
1160: case UDIV: \
1161: case MOD: \
1162: case UMOD: \
1.1.1.3 root 1163: return COSTS_N_INSNS (40); \
1164: case PLUS: \
1165: if (GET_CODE (XEXP (X, 0)) == REG \
1166: && GET_CODE (XEXP (X, 1)) == CONST_INT) \
1167: return 1; \
1168: break;
1.1 root 1169:
1170:
1171: /* Compute the cost of computing a constant rtl expression RTX
1172: whose rtx-code is CODE. The body of this macro is a portion
1173: of a switch statement. If the code is computed here,
1174: return it with a return statement. Otherwise, break from the switch. */
1175:
1.1.1.3 root 1176: #define CONST_COSTS(RTX,CODE,OUTER_CODE) \
1.1 root 1177: case CONST_INT: \
1178: case CONST: \
1179: case LABEL_REF: \
1180: case SYMBOL_REF: \
1181: return flag_pic && SYMBOLIC_CONST (RTX) ? 2 : 0; \
1182: case CONST_DOUBLE: \
1183: { \
1184: int code = standard_80387_constant_p (RTX); \
1185: return code == 1 ? 0 : \
1186: code == 2 ? 1 : \
1187: 2; \
1.1.1.3 root 1188: }
1.1 root 1189:
1190: /* Compute the cost of an address. This is meant to approximate the size
1191: and/or execution delay of an insn using that address. If the cost is
1192: approximated by the RTL complexity, including CONST_COSTS above, as
1193: is usually the case for CISC machines, this macro should not be defined.
1194: For aggressively RISCy machines, only one insn format is allowed, so
1195: this macro should be a constant. The value of this macro only matters
1196: for valid addresses.
1197:
1198: For i386, it is better to use a complex address than let gcc copy
1199: the address into a reg and make a new pseudo. But not if the address
1200: requires to two regs - that would mean more pseudos with longer
1201: lifetimes. */
1202:
1203: #define ADDRESS_COST(RTX) \
1204: ((CONSTANT_P (RTX) \
1205: || (GET_CODE (RTX) == PLUS && CONSTANT_P (XEXP (RTX, 1)) \
1206: && REG_P (XEXP (RTX, 0)))) ? 0 \
1207: : REG_P (RTX) ? 1 \
1208: : 2)
1209:
1.1.1.3 root 1210: /* Add any extra modes needed to represent the condition code.
1211:
1212: For the i386, we need separate modes when floating-point equality
1213: comparisons are being done. */
1214:
1215: #define EXTRA_CC_MODES CCFPEQmode
1216:
1217: /* Define the names for the modes specified above. */
1218: #define EXTRA_CC_NAMES "CCFPEQ"
1219:
1220: /* Given a comparison code (EQ, NE, etc.) and the first operand of a COMPARE,
1221: return the mode to be used for the comparison.
1222:
1223: For floating-point equality comparisons, CCFPEQmode should be used.
1224: VOIDmode should be used in all other cases. */
1225:
1.1.1.4 ! root 1226: #define SELECT_CC_MODE(OP,X,Y) \
1.1.1.3 root 1227: (GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT \
1228: && ((OP) == EQ || (OP) == NE) ? CCFPEQmode : CCmode)
1229:
1230: /* Define the information needed to generate branch and scc insns. This is
1231: stored from the compare operation. Note that we can't use "rtx" here
1232: since it hasn't been defined! */
1233:
1234: extern struct rtx_def *i386_compare_op0, *i386_compare_op1;
1235: extern struct rtx_def *(*i386_compare_gen)(), *(*i386_compare_gen_eq)();
1236:
1.1 root 1237: /* Tell final.c how to eliminate redundant test instructions. */
1238:
1239: /* Here we define machine-dependent flags and fields in cc_status
1240: (see `conditions.h'). */
1241:
1242: /* Set if the cc value is actually in the 80387, so a floating point
1243: conditional branch must be output. */
1244: #define CC_IN_80387 04000
1245:
1246: /* Set if the CC value was stored in a nonstandard way, so that
1247: the state of equality is indicated by zero in the carry bit. */
1248: #define CC_Z_IN_NOT_C 010000
1249:
1250: /* Store in cc_status the expressions
1251: that the condition codes will describe
1252: after execution of an instruction whose pattern is EXP.
1253: Do not alter them if the instruction would not alter the cc's. */
1254:
1255: #define NOTICE_UPDATE_CC(EXP, INSN) \
1256: notice_update_cc((EXP))
1257:
1258: /* Output a signed jump insn. Use template NORMAL ordinarily, or
1259: FLOAT following a floating point comparison.
1260: Use NO_OV following an arithmetic insn that set the cc's
1261: before a test insn that was deleted.
1262: NO_OV may be zero, meaning final should reinsert the test insn
1263: because the jump cannot be handled properly without it. */
1264:
1265: #define OUTPUT_JUMP(NORMAL, FLOAT, NO_OV) \
1266: { \
1267: if (cc_prev_status.flags & CC_IN_80387) \
1268: return FLOAT; \
1269: if (cc_prev_status.flags & CC_NO_OVERFLOW) \
1270: return NO_OV; \
1271: return NORMAL; \
1272: }
1273:
1274: /* Control the assembler format that we output, to the extent
1275: this does not vary between assemblers. */
1276:
1277: /* How to refer to registers in assembler output.
1278: This sequence is indexed by compiler's hard-register-number (see above). */
1279:
1280: /* In order to refer to the first 8 regs as 32 bit regs prefix an "e"
1281: For non floating point regs, the following are the HImode names.
1282:
1283: For float regs, the stack top is sometimes referred to as "%st(0)"
1.1.1.4 ! root 1284: instead of just "%st". PRINT_REG handles this with the "y" code. */
1.1 root 1285:
1286: #define HI_REGISTER_NAMES \
1287: {"ax","dx","cx","bx","si","di","bp","sp", \
1288: "st","st(1)","st(2)","st(3)","st(4)","st(5)","st(6)","st(7)","" }
1289:
1290: #define REGISTER_NAMES HI_REGISTER_NAMES
1291:
1292: /* Table of additional register names to use in user input. */
1293:
1294: #define ADDITIONAL_REGISTER_NAMES \
1295: { "eax", 0, "edx", 1, "ecx", 2, "ebx", 3, \
1296: "esi", 4, "edi", 5, "ebp", 6, "esp", 7, \
1297: "al", 0, "dl", 1, "cl", 2, "bl", 3, \
1298: "ah", 0, "dh", 1, "ch", 2, "bh", 3 }
1299:
1300: /* Note we are omitting these since currently I don't know how
1301: to get gcc to use these, since they want the same but different
1302: number as al, and ax.
1303: */
1304:
1.1.1.2 root 1305: /* note the last four are not really qi_registers, but
1.1 root 1306: the md will have to never output movb into one of them
1307: only a movw . There is no movb into the last four regs */
1308:
1309: #define QI_REGISTER_NAMES \
1310: {"al", "dl", "cl", "bl", "si", "di", "bp", "sp",}
1311:
1312: /* These parallel the array above, and can be used to access bits 8:15
1313: of regs 0 through 3. */
1314:
1315: #define QI_HIGH_REGISTER_NAMES \
1316: {"ah", "dh", "ch", "bh", }
1317:
1318: /* How to renumber registers for dbx and gdb. */
1319:
1320: /* {0,2,1,3,6,7,4,5,12,13,14,15,16,17} */
1321: #define DBX_REGISTER_NUMBER(n) \
1322: ((n) == 0 ? 0 : \
1323: (n) == 1 ? 2 : \
1324: (n) == 2 ? 1 : \
1325: (n) == 3 ? 3 : \
1326: (n) == 4 ? 6 : \
1327: (n) == 5 ? 7 : \
1328: (n) == 6 ? 4 : \
1329: (n) == 7 ? 5 : \
1330: (n) + 4)
1331:
1332: /* This is how to output the definition of a user-level label named NAME,
1333: such as the label on a static function or variable NAME. */
1334:
1335: #define ASM_OUTPUT_LABEL(FILE,NAME) \
1336: (assemble_name (FILE, NAME), fputs (":\n", FILE))
1337:
1338: /* This is how to output an assembler line defining a `double' constant. */
1339:
1340: #define ASM_OUTPUT_DOUBLE(FILE,VALUE) \
1341: fprintf (FILE, "%s %.22e\n", ASM_DOUBLE, (VALUE))
1342:
1343:
1344: /* This is how to output an assembler line defining a `float' constant. */
1345:
1346: #define ASM_OUTPUT_FLOAT(FILE,VALUE) \
1347: do { union { float f; long l;} tem; \
1348: tem.f = (VALUE); \
1349: fprintf((FILE), "%s 0x%x\n", ASM_LONG, tem.l); \
1350: } while (0)
1351:
1352:
1353: /* Store in OUTPUT a string (made with alloca) containing
1354: an assembler-name for a local static variable named NAME.
1355: LABELNO is an integer which is different for each call. */
1356:
1357: #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \
1358: ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \
1359: sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO)))
1360:
1361:
1362:
1363: /* This is how to output an assembler line defining an `int' constant. */
1364:
1365: #define ASM_OUTPUT_INT(FILE,VALUE) \
1366: ( fprintf (FILE, "%s ", ASM_LONG), \
1367: output_addr_const (FILE,(VALUE)), \
1368: putc('\n',FILE))
1369:
1370: /* Likewise for `char' and `short' constants. */
1371: /* is this supposed to do align too?? */
1372:
1373: #define ASM_OUTPUT_SHORT(FILE,VALUE) \
1374: ( fprintf (FILE, "%s ", ASM_SHORT), \
1375: output_addr_const (FILE,(VALUE)), \
1376: putc('\n',FILE))
1377:
1378: /*
1379: #define ASM_OUTPUT_SHORT(FILE,VALUE) \
1380: ( fprintf (FILE, "%s ", ASM_BYTE_OP), \
1381: output_addr_const (FILE,(VALUE)), \
1382: fputs (",", FILE), \
1383: output_addr_const (FILE,(VALUE)), \
1384: fputs (" >> 8\n",FILE))
1385: */
1386:
1387:
1388: #define ASM_OUTPUT_CHAR(FILE,VALUE) \
1389: ( fprintf (FILE, "%s ", ASM_BYTE_OP), \
1390: output_addr_const (FILE, (VALUE)), \
1391: putc ('\n', FILE))
1392:
1393: /* This is how to output an assembler line for a numeric constant byte. */
1394:
1395: #define ASM_OUTPUT_BYTE(FILE,VALUE) \
1396: fprintf ((FILE), "%s 0x%x\n", ASM_BYTE_OP, (VALUE))
1397:
1398: /* This is how to output an insn to push a register on the stack.
1399: It need not be very fast code. */
1400:
1401: #define ASM_OUTPUT_REG_PUSH(FILE,REGNO) \
1402: fprintf (FILE, "\tpushl e%s\n", reg_names[REGNO])
1403:
1404: /* This is how to output an insn to pop a register from the stack.
1405: It need not be very fast code. */
1406:
1407: #define ASM_OUTPUT_REG_POP(FILE,REGNO) \
1408: fprintf (FILE, "\tpopl e%s\n", reg_names[REGNO])
1409:
1410: /* This is how to output an element of a case-vector that is absolute.
1411: */
1412:
1413: #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
1414: fprintf (FILE, "%s %s%d\n", ASM_LONG, LPREFIX, VALUE)
1415:
1416: /* This is how to output an element of a case-vector that is relative.
1417: We don't use these on the 386 yet, because the ATT assembler can't do
1418: forward reference the differences.
1419: */
1420:
1421: #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, VALUE, REL) \
1422: fprintf (FILE, "\t.word %s%d-%s%d\n",LPREFIX, VALUE,LPREFIX, REL)
1423:
1424: /* Define the parentheses used to group arithmetic operations
1425: in assembler code. */
1426:
1427: #define ASM_OPEN_PAREN ""
1428: #define ASM_CLOSE_PAREN ""
1429:
1430: /* Define results of standard character escape sequences. */
1431: #define TARGET_BELL 007
1432: #define TARGET_BS 010
1433: #define TARGET_TAB 011
1434: #define TARGET_NEWLINE 012
1435: #define TARGET_VT 013
1436: #define TARGET_FF 014
1437: #define TARGET_CR 015
1.1.1.4 ! root 1438:
1.1 root 1439: /* Print operand X (an rtx) in assembler syntax to file FILE.
1440: CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
1441: The CODE z takes the size of operand from the following digit, and
1442: outputs b,w,or l respectively.
1443:
1444: On the 80386, we use several such letters:
1445: f -- float insn (print a CONST_DOUBLE as a float rather than in hex).
1446: L,W,B,Q,S -- print the opcode suffix for specified size of operand.
1447: R -- print the prefix for register names.
1448: z -- print the opcode suffix for the size of the current operand.
1449: * -- print a star (in certain assembler syntax)
1450: w -- print the operand as if it's a "word" (HImode) even if it isn't.
1451: b -- print the operand as if it's a byte (QImode) even if it isn't.
1452: c -- don't print special prefixes before constant operands. */
1453:
1454: #define PRINT_OPERAND_PUNCT_VALID_P(CODE) \
1455: ((CODE) == '*')
1456:
1.1.1.4 ! root 1457: /* Print the name of a register based on its machine mode and number.
! 1458: If CODE is 'w', pretend the mode is HImode.
! 1459: If CODE is 'b', pretend the mode is QImode.
! 1460: If CODE is 'k', pretend the mode is SImode.
! 1461: If CODE is 'h', pretend the reg is the `high' byte register.
! 1462: If CODE is 'y', print "st(0)" instead of "st", if the reg is stack op. */
! 1463:
! 1464: extern char *hi_reg_name[];
! 1465: extern char *qi_reg_name[];
! 1466: extern char *qi_high_reg_name[];
! 1467:
! 1468: #define PRINT_REG(X, CODE, FILE) \
! 1469: do { if (REGNO (X) == ARG_POINTER_REGNUM) \
! 1470: abort (); \
! 1471: fprintf (FILE, "%s", RP); \
! 1472: switch ((CODE == 'w' ? 2 \
! 1473: : CODE == 'b' ? 1 \
! 1474: : CODE == 'k' ? 4 \
! 1475: : CODE == 'y' ? 3 \
! 1476: : CODE == 'h' ? 0 \
! 1477: : GET_MODE_SIZE (GET_MODE (X)))) \
! 1478: { \
! 1479: case 3: \
! 1480: if (STACK_TOP_P (X)) \
! 1481: { \
! 1482: fputs ("st(0)", FILE); \
! 1483: break; \
! 1484: } \
! 1485: case 4: \
! 1486: case 8: \
! 1487: if (! FP_REG_P (X)) fputs ("e", FILE); \
! 1488: case 2: \
! 1489: fputs (hi_reg_name[REGNO (X)], FILE); \
! 1490: break; \
! 1491: case 1: \
! 1492: fputs (qi_reg_name[REGNO (X)], FILE); \
! 1493: break; \
! 1494: case 0: \
! 1495: fputs (qi_high_reg_name[REGNO (X)], FILE); \
! 1496: break; \
! 1497: } \
! 1498: } while (0)
! 1499:
1.1 root 1500: #define PRINT_OPERAND(FILE, X, CODE) \
1501: print_operand (FILE, X, CODE)
1502:
1503: #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \
1504: print_operand_address (FILE, ADDR)
1505:
1.1.1.4 ! root 1506: /* Print the name of a register for based on its machine mode and number.
! 1507: This macro is used to print debugging output.
! 1508: This macro is different from PRINT_REG in that it may be used in
! 1509: programs that are not linked with aux-output.o. */
! 1510:
! 1511: #define DEBUG_PRINT_REG(X, CODE, FILE) \
! 1512: do { static char *hi_name[] = HI_REGISTER_NAMES; \
! 1513: static char *qi_name[] = QI_REGISTER_NAMES; \
! 1514: fprintf (FILE, "%s", RP); \
! 1515: if (REGNO (X) == ARG_POINTER_REGNUM) \
! 1516: { fputs ("argp", FILE); break; } \
! 1517: if (STACK_TOP_P (X)) \
! 1518: { fputs ("st(0)", FILE); break; } \
! 1519: switch (GET_MODE_SIZE (GET_MODE (X))) \
! 1520: { \
! 1521: case 8: \
! 1522: case 4: \
! 1523: if (! FP_REG_P (X)) fputs ("e", FILE); \
! 1524: case 2: \
! 1525: fputs (hi_name[REGNO (X)], FILE); \
! 1526: break; \
! 1527: case 1: \
! 1528: fputs (qi_name[REGNO (X)], FILE); \
! 1529: break; \
! 1530: } \
! 1531: } while (0)
! 1532:
1.1 root 1533: /* Output the prefix for an immediate operand, or for an offset operand. */
1534: #define PRINT_IMMED_PREFIX(FILE) fputs (IP, (FILE))
1535: #define PRINT_OFFSET_PREFIX(FILE) fputs (IP, (FILE))
1536:
1537: /* Routines in libgcc that return floats must return them in an fp reg,
1538: just as other functions do which return such values.
1539: These macros make that happen. */
1540:
1541: #define FLOAT_VALUE_TYPE float
1542: #define INTIFY(FLOATVAL) FLOATVAL
1543:
1544: /* Nonzero if INSN magically clobbers register REGNO. */
1545:
1546: /* #define INSN_CLOBBERS_REGNO_P(INSN, REGNO) \
1547: (FP_REGNO_P (REGNO) \
1548: && (GET_CODE (INSN) == JUMP_INSN || GET_CODE (INSN) == BARRIER))
1549: */
1550:
1551: /* a letter which is not needed by the normal asm syntax, which
1552: we can use for operand syntax in the extended asm */
1553:
1554: #define ASM_OPERAND_LETTER '#'
1555:
1556: #define RET return ""
1557: #define AT_SP(mode) (gen_rtx (MEM, (mode), stack_pointer_rtx))
1558:
1559: /*
1560: Local variables:
1561: version-control: t
1562: End:
1563: */
This archive runs on limited infrastructure. Preserving old code on modern bandwidth. Automated agents are requested to crawl responsibly.