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1.1 root 1: /* Definitions for AT&T assembler syntax for the Intel 80386.
1.1.1.2 root 2: Copyright (C) 1993 Free Software Foundation, Inc.
1.1 root 3:
4: This file is part of GNU CC.
5:
6: GNU CC is free software; you can redistribute it and/or modify
7: it under the terms of the GNU General Public License as published by
8: the Free Software Foundation; either version 2, or (at your option)
9: any later version.
10:
11: GNU CC is distributed in the hope that it will be useful,
12: but WITHOUT ANY WARRANTY; without even the implied warranty of
13: MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14: GNU General Public License for more details.
15:
16: You should have received a copy of the GNU General Public License
17: along with GNU CC; see the file COPYING. If not, write to
1.1.1.3 ! root 18: the Free Software Foundation, 59 Temple Place - Suite 330,
! 19: Boston, MA 02111-1307, USA. */
1.1 root 20:
21: /* Defines to be able to build libgcc.a with GCC. */
22:
23: /* It might seem that these are not important, since gcc 2 will never
24: call libgcc for these functions. But programs might be linked with
25: code compiled by gcc 1, and then these will be used. */
26:
27: /* The arg names used to be a and b, but `a' appears inside strings
28: and that confuses non-ANSI cpp. */
29:
30: #define perform_udivsi3(arg0,arg1) \
31: { \
32: register int dx asm("dx"); \
33: register int ax asm("ax"); \
34: \
35: dx = 0; \
36: ax = arg0; \
37: asm ("divl %3" : "=a" (ax), "=d" (dx) : "a" (ax), "g" (arg1), "d" (dx)); \
38: return ax; \
39: }
40:
41: #define perform_divsi3(arg0,arg1) \
42: { \
43: register int dx asm("dx"); \
44: register int ax asm("ax"); \
1.1.1.2 root 45: register int cx asm("cx"); \
1.1 root 46: \
47: ax = arg0; \
1.1.1.2 root 48: cx = arg1; \
49: asm ("cltd\n\tidivl %3" : "=a" (ax), "=&d" (dx) : "a" (ax), "c" (cx)); \
1.1 root 50: return ax; \
51: }
52:
53: #define perform_umodsi3(arg0,arg1) \
54: { \
55: register int dx asm("dx"); \
56: register int ax asm("ax"); \
57: \
58: dx = 0; \
59: ax = arg0; \
60: asm ("divl %3" : "=a" (ax), "=d" (dx) : "a" (ax), "g" (arg1), "d" (dx)); \
61: return dx; \
62: }
63:
64: #define perform_modsi3(arg0,arg1) \
65: { \
66: register int dx asm("dx"); \
67: register int ax asm("ax"); \
1.1.1.2 root 68: register int cx asm("cx"); \
1.1 root 69: \
70: ax = arg0; \
1.1.1.2 root 71: cx = arg1; \
72: asm ("cltd\n\tidivl %3" : "=a" (ax), "=&d" (dx) : "a" (ax), "c" (cx)); \
1.1 root 73: return dx; \
74: }
75:
76: #define perform_fixdfsi(arg0) \
77: { \
78: auto unsigned short ostatus; \
79: auto unsigned short nstatus; \
80: auto int ret; \
81: auto double tmp; \
82: \
83: &ostatus; /* guarantee these land in memory */ \
84: &nstatus; \
85: &ret; \
86: &tmp; \
87: \
88: asm volatile ("fnstcw %0" : "=m" (ostatus)); \
89: nstatus = ostatus | 0x0c00; \
90: asm volatile ("fldcw %0" : /* no outputs */ : "m" (nstatus)); \
91: tmp = arg0; \
92: asm volatile ("fldl %0" : /* no outputs */ : "m" (tmp)); \
93: asm volatile ("fistpl %0" : "=m" (ret)); \
94: asm volatile ("fldcw %0" : /* no outputs */ : "m" (ostatus)); \
95: \
96: return ret; \
97: }
98:
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