--- gcc/config/i860.md	2018/04/24 16:56:41	1.1.1.3
+++ gcc/config/i860.md	2018/04/24 17:01:59	1.1.1.4
@@ -209,7 +209,8 @@
 {
   cc_status.flags &= ~ CC_CONDITION_MASK;
   cc_status.flags |= CC_ONLY_LE;
-  return \"pfle.ss %r1,%r0,f0\";
+  cc_status.flags |= CC_NEGATED;	/* added by markb */
+  return \"pfle.ss %r0,%r1,f0\";
 }")
 
 (define_insn "cmpgesf"
@@ -220,7 +221,8 @@
 {
   cc_status.flags &= ~ CC_CONDITION_MASK;
   cc_status.flags |= CC_ONLY_LE;
-  return \"pfle.ss %r0,%r1,f0\";
+  cc_status.flags |= CC_NEGATED;	/* added by markb */
+  return \"pfle.ss %r1,%r0,f0\";
 }")
 
 (define_insn "cmpeqdf"
@@ -264,7 +266,8 @@
 {
   cc_status.flags &= ~ CC_CONDITION_MASK;
   cc_status.flags |= CC_ONLY_LE;
-  return \"pfle.dd %r1,%r0,f0\";
+  cc_status.flags |= CC_NEGATED;	/* added by markb */
+  return \"pfle.dd %r0,%r1,f0\";
 }")
 
 (define_insn "cmpgedf"
@@ -275,7 +278,8 @@
 {
   cc_status.flags &= ~ CC_CONDITION_MASK;
   cc_status.flags |= CC_ONLY_LE;
-  return \"pfle.dd %r0,%r1,f0\";
+  cc_status.flags |= CC_NEGATED;	/* added by markb */
+  return \"pfle.dd %r1,%r0,f0\";
 }")
 
 (define_insn ""
@@ -824,7 +828,7 @@
     return \"ixfr %1,%0\";
   return \"mov %1,%0\";
 }")
- 
+
 (define_insn "movhi"
   [(set (match_operand:HI 0 "general_operand" "=r,m,!*f,!r")
 	(match_operand:HI 1 "general_operand" "rmi,rJ,rJ*f,*f"))]
@@ -1024,9 +1028,13 @@
         return \"fmov.ss f0,%0\";
       if (CONSTANT_ADDRESS_P (XEXP (operands[1], 0)))
 	{
+	  if (! ((cc_prev_status.flags & CC_KNOW_HI_R31)
+		 && (cc_prev_status.flags & CC_HI_R31_ADJ)
+		 && cc_prev_status.mdep == XEXP(operands[1],0)))
+	    output_asm_insn(\"orh ha%%%m1,r0,r31\",operands);
 	  cc_status.flags |= CC_KNOW_HI_R31 | CC_HI_R31_ADJ;
 	  cc_status.mdep = XEXP (operands[1], 0);
-	  return \"orh ha%%%m1,r0,r31\;fld.l l%%%m1(r31),%0\";
+	  return \"fld.l l%%%m1(r31),%0\";
 	}
       return \"fld.l %1,%0\";
     }
@@ -1379,7 +1387,7 @@
 
 ;; next two patterns are good for bitfields coming from memory
 ;; (via pseudo-register) or from a register, though this optimization
-;; is only good for values contained wholly within the bottom 13 bits
+;; is only good for values contained wholly within the bottom 16 bits
 (define_insn ""
   [(set (cc0)
 	(eq 
@@ -1580,7 +1588,7 @@
   ""
   "fmlow.dd %2,%1,%0")
 
-;;- and instructions (with compliment also)			   
+;;- and instructions (with complement also)			   
 (define_insn "andsi3"
   [(set (match_operand:SI 0 "register_operand" "=r")
 	(and:SI (match_operand:SI 1 "nonmemory_operand" "%r")