--- gcc/config/i860/i860.h	2018/04/24 18:10:24	1.1
+++ gcc/config/i860/i860.h	2018/04/24 18:15:00	1.1.1.2
@@ -29,7 +29,7 @@ the Free Software Foundation, 675 Mass A
 
 /* Names to predefine in the preprocessor for this target machine.  */
 
-#define CPP_PREDEFINES "-Di860 -Dunix"
+#define CPP_PREDEFINES "-Di860 -Dunix -Asystem(unix) -Asystem(svr4) -Acpu(i860) -Amachine(i860)"
 
 /* Print subsidiary information on the compiler version in use.  */
 #define TARGET_VERSION fprintf (stderr, " (i860)");
@@ -379,7 +379,7 @@ enum reg_class { NO_REGS, GENERAL_REGS,
    returned.  */
 
 #define SECONDARY_INPUT_RELOAD_CLASS(CLASS,MODE,IN) \
-  ((CLASS) == FP_REGS && GET_CODE (IN) == CONST_INT ? GENERAL_REGS : NO_REGS)
+  ((CLASS) == FP_REGS && CONSTANT_P (IN) ? GENERAL_REGS : NO_REGS)
 
 /* Return the maximum number of consecutive registers
    needed to represent mode MODE in a register of class CLASS.  */
@@ -474,7 +474,7 @@ struct cumulative_args { int ints, float
    invisible first argument.  */
 
 #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME)	\
- ((CUM).ints = ((FNTYPE) != 0 && aggregate_value_p ((FNTYPE)) \
+ ((CUM).ints = ((FNTYPE) != 0 && aggregate_value_p (TREE_TYPE ((FNTYPE))) \
 		? 4 : 0),			\
   (CUM).floats = 0)
 
@@ -1397,12 +1397,7 @@ extern unsigned long sfmode_constant_to_
    Instead, it allows the table built by `genrecog' to be more
    compact and efficient, thus speeding up the compiler.  The most
    important predicates to include in the list specified by this
-   macro are thoses used in the most insn patterns.
-
-   Note that for the i860 we have one more predicate, i.e.
-   `single_insn_src_operand', however this is used only
-   infrequently, so we don't put in the PREDICATE_CODES list.
-*/
+   macro are thoses used in the most insn patterns.  */
 
 #define PREDICATE_CODES							\
    {"reg_or_0_operand",		{REG, SUBREG, CONST_INT}},		\
@@ -1414,7 +1409,10 @@ extern unsigned long sfmode_constant_to_
    {"logic_const_operand",	{CONST_INT}},				\
    {"bte_operand",		{REG, SUBREG, CONST_INT}},		\
    {"indexed_operand",		{MEM}},					\
-   {"load_operand",		{MEM}},
+   {"load_operand",		{MEM}},					\
+   {"small_int",		{CONST_INT}},				\
+   {"logic_int",		{CONST_INT}},				\
+   {"call_insn_operand",	{MEM}},
 
 /* Define the information needed to generate branch insns.  This is stored
    from the compare operation.  Note that we can't use "rtx" here since it