--- gcc/config/i860/i860.h 2018/04/24 18:10:24 1.1.1.1 +++ gcc/config/i860/i860.h 2018/04/24 18:28:45 1.1.1.4 @@ -1,9 +1,6 @@ /* Definitions of target machine for GNU compiler, for Intel 860. - Copyright (C) 1989, 1991, 1993 Free Software Foundation, Inc. - - Written by Richard Stallman (rms@ai.mit.edu). - - Hacked substantially by Ron Guilmette (rfg@ncd.com) to cater to + Copyright (C) 1989, 1991, 1993, 1995 Free Software Foundation, Inc. + Hacked substantially by Ron Guilmette (rfg@segfault.us.com) to cater to the whims of the System V Release 4 assembler. This file is part of GNU CC. @@ -20,7 +17,8 @@ GNU General Public License for more deta You should have received a copy of the GNU General Public License along with GNU CC; see the file COPYING. If not, write to -the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */ +the Free Software Foundation, 59 Temple Place - Suite 330, +Boston, MA 02111-1307, USA. */ /* Note that some other tm.h files include this one and then override @@ -29,7 +27,7 @@ the Free Software Foundation, 675 Mass A /* Names to predefine in the preprocessor for this target machine. */ -#define CPP_PREDEFINES "-Di860 -Dunix" +#define CPP_PREDEFINES "-Di860 -Dunix -Asystem(unix) -Asystem(svr4) -Acpu(i860) -Amachine(i860)" /* Print subsidiary information on the compiler version in use. */ #define TARGET_VERSION fprintf (stderr, " (i860)"); @@ -379,7 +377,7 @@ enum reg_class { NO_REGS, GENERAL_REGS, returned. */ #define SECONDARY_INPUT_RELOAD_CLASS(CLASS,MODE,IN) \ - ((CLASS) == FP_REGS && GET_CODE (IN) == CONST_INT ? GENERAL_REGS : NO_REGS) + ((CLASS) == FP_REGS && CONSTANT_P (IN) ? GENERAL_REGS : NO_REGS) /* Return the maximum number of consecutive registers needed to represent mode MODE in a register of class CLASS. */ @@ -415,11 +413,12 @@ enum reg_class { NO_REGS, GENERAL_REGS, /* Value is the number of bytes of arguments automatically popped when returning from a subroutine call. + FUNDECL is the declaration node of the function (as a tree), FUNTYPE is the data type of the function (as a tree), or for a library call it is an identifier node for the subroutine name. SIZE is the number of bytes of arguments passed on the stack. */ -#define RETURN_POPS_ARGS(FUNTYPE,SIZE) 0 +#define RETURN_POPS_ARGS(FUNDECL,FUNTYPE,SIZE) 0 /* Define how to find the value returned by a function. VALTYPE is the data type of the value (as a tree). @@ -474,7 +473,7 @@ struct cumulative_args { int ints, float invisible first argument. */ #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME) \ - ((CUM).ints = ((FNTYPE) != 0 && aggregate_value_p ((FNTYPE)) \ + ((CUM).ints = ((FNTYPE) != 0 && aggregate_value_p (TREE_TYPE ((FNTYPE))) \ ? 4 : 0), \ (CUM).floats = 0) @@ -1397,12 +1396,7 @@ extern unsigned long sfmode_constant_to_ Instead, it allows the table built by `genrecog' to be more compact and efficient, thus speeding up the compiler. The most important predicates to include in the list specified by this - macro are thoses used in the most insn patterns. - - Note that for the i860 we have one more predicate, i.e. - `single_insn_src_operand', however this is used only - infrequently, so we don't put in the PREDICATE_CODES list. -*/ + macro are thoses used in the most insn patterns. */ #define PREDICATE_CODES \ {"reg_or_0_operand", {REG, SUBREG, CONST_INT}}, \ @@ -1414,7 +1408,10 @@ extern unsigned long sfmode_constant_to_ {"logic_const_operand", {CONST_INT}}, \ {"bte_operand", {REG, SUBREG, CONST_INT}}, \ {"indexed_operand", {MEM}}, \ - {"load_operand", {MEM}}, + {"load_operand", {MEM}}, \ + {"small_int", {CONST_INT}}, \ + {"logic_int", {CONST_INT}}, \ + {"call_insn_operand", {MEM}}, /* Define the information needed to generate branch insns. This is stored from the compare operation. Note that we can't use "rtx" here since it