--- gcc/config/i960/i960.h	2018/04/24 18:10:26	1.1
+++ gcc/config/i960/i960.h	2018/04/24 18:22:41	1.1.1.3
@@ -1,5 +1,5 @@
 /* Definitions of target machine for GNU compiler, for Intel 80960
-   Copyright (C) 1992 Free Software Foundation, Inc.
+   Copyright (C) 1992, 1993 Free Software Foundation, Inc.
    Contributed by Steven McGeady, Intel Corp.
    Additional Work by Glenn Colon-Bonet, Jonathan Shapiro, Andy Wilson
    Converted to GCC 2.0 by Jim Wilson and Michael Tiemann, Cygnus Support.
@@ -24,7 +24,7 @@ the Free Software Foundation, 675 Mass A
    many of the definitions that relate to assembler syntax.  */
 
 /* Names to predefine in the preprocessor for this target machine.  */
-#define CPP_PREDEFINES "-Di960 -Di80960 -DI960 -DI80960"
+#define CPP_PREDEFINES "-Di960 -Di80960 -DI960 -DI80960 -Acpu(i960) -Amachine(i960)"
 
 /* Name to predefine in the preprocessor for processor variations.  */
 #define	CPP_SPEC "%{mic*:-D__i960\
@@ -45,9 +45,13 @@ the Free Software Foundation, 675 Mass A
 		%{!mcc:%{!mcf:-D__i960_KB -D__i960KB__ %{mic*:-D__i960KB}}}}}}}}}"
 
 /* -mic* options make characters signed by default.  */
-#define SIGNED_CHAR_SPEC  \
-  (DEFAULT_SIGNED_CHAR ? "%{funsigned-char:-D__CHAR_UNSIGNED__}"	\
-   : "%{!fsigned-char:%{!mic*:-D__CHAR_UNSIGNED__}}")
+/* Use #if rather than ?: because MIPS C compiler rejects ?: in
+   initializers.  */
+#if DEFAULT_SIGNED_CHAR
+#define SIGNED_CHAR_SPEC "%{funsigned-char:-D__CHAR_UNSIGNED__}"
+#else
+#define SIGNED_CHAR_SPEC "%{!fsigned-char:%{!mic*:-D__CHAR_UNSIGNED__}}"
+#endif
 
 /* Specs for the compiler, to handle processor variations.  */
 #define CC1_SPEC \
@@ -63,7 +67,7 @@ the Free Software Foundation, 675 Mass A
 	"%{mka:-AKA}%{mkb:-AKB}%{msa:-ASA}%{msb:-ASB}\
 	%{mmc:-AMC}%{mca:-ACA}%{mcc:-ACC}%{mcf:-ACF}\
 	%{!mka:%{!mkb:%{!msa:%{!msb:%{!mmc:%{!mca:%{!mcc:%{!mcf:-AKB}}}}}}}}\
-	%{mlink-relax:-link-relax}"
+	%{mlink-relax:-linkrelax}"
 
 /* Specs for the linker, to handle processor variations.
    For compatibility with Intel's gnu960 tool chain, pass -F and -A options
@@ -80,12 +84,14 @@ the Free Software Foundation, 675 Mass A
 #define LIB_SPEC "%{!nostdlib:-lcg %{p:-lprof}%{pg:-lgprof}\
 	  %{mka:-lfpg}%{msa:-lfpg}%{mca:-lfpg}%{mcf:-lfpg} -lgnu}"
 
-/* Omit frame pointer at -O2.  Inline functions at -O3.  */
+/* Show we can debug even without a frame pointer.  */
+#define CAN_DEBUG_WITHOUT_FP
+
+/* Do leaf procedure and tail call optimizations for -O2 and higher.  */
 #define OPTIMIZATION_OPTIONS(LEVEL)		\
 {						\
   if ((LEVEL) >= 2)				\
     {						\
-      flag_omit_frame_pointer = 1;		\
       target_flags |= TARGET_FLAG_LEAFPROC;	\
       target_flags |= TARGET_FLAG_TAILCALL;	\
     }						\
@@ -103,8 +109,11 @@ the Free Software Foundation, 675 Mass A
 /* Generate DBX_DEBUGGING_INFO by default.  */
 #define PREFERRED_DEBUGGING_TYPE DBX_DEBUG
 
-/* Redefine this to print in hex like iC960.  */
-#define PUT_SDB_TYPE(A) fprintf (asm_out_file, "\t.type\t0x%x;", A)
+/* Redefine this to print in hex and adjust values like GNU960.  The extra
+   bit is used to handle the type long double.  Gcc does not support long
+   double in sdb output, but we do support the non-standard format.  */
+#define PUT_SDB_TYPE(A) \
+  fprintf (asm_out_file, "\t.type\t0x%x;", (A & 0xf) + 2 * (A & ~0xf))
 
 /* Run-time compilation parameters selecting different hardware subsets.  */
 
@@ -498,13 +507,20 @@ extern unsigned int hard_regno_mode_ok[F
    Zero means the frame pointer need not be set up (and parms
    may be accessed via the stack pointer) in functions that seem suitable.
    This is computed in `reload', in reload1.c.  */
+/* ??? It isn't clear to me why this is here.  Perhaps because of a bug (since
+   fixed) in the definition of INITIAL_FRAME_POINTER_OFFSET which would have
+   caused this to fail.  */
 #define FRAME_POINTER_REQUIRED (! leaf_function_p ())
 
 /* C statement to store the difference between the frame pointer
-   and the stack pointer values immediately after the function prologue.  */
+   and the stack pointer values immediately after the function prologue.
+
+   Since the stack grows upward on the i960, this must be a negative number.
+   This includes the 64 byte hardware register save area and the size of
+   the frame.  */
 
 #define INITIAL_FRAME_POINTER_OFFSET(VAR) \
-  do { (VAR) = compute_frame_size (get_frame_size ()); } while (0)
+  do { (VAR) = - (64 + compute_frame_size (get_frame_size ())); } while (0)
 
 /* Base register for access to arguments of the function.  */
 #define ARG_POINTER_REGNUM 14
@@ -1048,9 +1064,15 @@ extern struct rtx_def *legitimize_addres
    in one reasonably fast instruction.  */
 #define MOVE_MAX 16
 
-/* Define if normal loads of shorter-than-word items from memory clears
-   the rest of the bigs in the register.  */
-#define BYTE_LOADS_ZERO_EXTEND
+/* Define if operations between registers always perform the operation
+   on the full register even if a narrower mode is specified.  */
+#define WORD_REGISTER_OPERATIONS
+
+/* Define if loading in MODE, an integral mode narrower than BITS_PER_WORD
+   will either zero-extend or sign-extend.  The value of this macro should
+   be the code that says which one of the two operations is implicitly
+   done, NIL if none.  */
+#define LOAD_EXTEND_OP(MODE) ZERO_EXTEND
 
 /* Nonzero if access to memory by bytes is no faster than for words.
    Defining this results in worse code on the i960.  */
@@ -1062,10 +1084,9 @@ extern struct rtx_def *legitimize_addres
 
 #define STORE_FLAG_VALUE 1
 
-/* Define if shifts truncate the shift count
-   which implies one can omit a sign-extension or zero-extension
-   of a shift count.  */
-#define SHIFT_COUNT_TRUNCATED
+/* Define this to be nonzero if shift instructions ignore all but the low-order
+   few bits. */
+#define SHIFT_COUNT_TRUNCATED 1
 
 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
    is done just by pretending it is already truncated.  */
@@ -1316,7 +1337,7 @@ extern struct rtx_def *gen_compare_reg (
       assemble_name ((FILE), (NAME)),			\
       fputs ("\n.comm ", (FILE)),			\
       assemble_name ((FILE), (NAME)),			\
-      fprintf ((FILE), ",%d\n", (ROUNDED));		\
+      fprintf ((FILE), ",%d\n", (SIZE));		\
     }							\
 }
 
@@ -1469,7 +1490,8 @@ extern enum insn_types i960_last_insn_ty
   {"eq_or_neq", {EQ, NE}},						\
   {"arith32_operand", {SUBREG, REG, LABEL_REF, SYMBOL_REF, CONST_INT,	\
 		       CONST_DOUBLE, CONST}},				\
-  {"power2_operand", {CONST_INT}},
+  {"power2_operand", {CONST_INT}},					\
+  {"cmplpower2_operand", {CONST_INT}},
 
 /* Define functions in i960.c and used in insn-output.c.  */