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1.1 root 1: /* Definitions of target machine for GNU compiler. Sun 68000/68020 version.
2: Copyright (C) 1987, 1988 Free Software Foundation, Inc.
3:
4: This file is part of GNU CC.
5:
6: GNU CC is free software; you can redistribute it and/or modify
7: it under the terms of the GNU General Public License as published by
8: the Free Software Foundation; either version 2, or (at your option)
9: any later version.
10:
11: GNU CC is distributed in the hope that it will be useful,
12: but WITHOUT ANY WARRANTY; without even the implied warranty of
13: MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14: GNU General Public License for more details.
15:
16: You should have received a copy of the GNU General Public License
17: along with GNU CC; see the file COPYING. If not, write to
18: the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
19:
20:
21: /* Note that some other tm.h files include this one and then override
22: many of the definitions that relate to assembler syntax. */
23:
24:
25: /* Names to predefine in the preprocessor for this target machine. */
26:
27: /* See sun3.h, sun2.h, isi.h for different CPP_PREDEFINES. */
28:
29: /* Print subsidiary information on the compiler version in use. */
30: #ifdef MOTOROLA
31: #define TARGET_VERSION fprintf (stderr, " (68k, Motorola syntax)");
32: #else
33: #define TARGET_VERSION fprintf (stderr, " (68k, MIT syntax)");
34: #endif
35:
36: /* Define SUPPORT_SUN_FPA to include support for generating code for
37: the Sun Floating Point Accelerator, an optional product for Sun 3
38: machines. By default, it is not defined. Avoid defining it unless
39: you need to output code for the Sun3+FPA architecture, as it has the
40: effect of slowing down the register set operations in hard-reg-set.h
41: (total number of registers will exceed number of bits in a long,
42: if defined, causing the set operations to expand to loops).
43: SUPPORT_SUN_FPA is typically defined in sun3.h. */
44:
45: /* Run-time compilation parameters selecting different hardware subsets. */
46:
47: extern int target_flags;
48:
49: /* Macros used in the machine description to test the flags. */
50:
51: /* Compile for a 68020 (not a 68000 or 68010). */
52: #define TARGET_68020 (target_flags & 1)
53:
54: /* Compile 68881 insns for floating point (not library calls). */
55: #define TARGET_68881 (target_flags & 2)
56:
57: /* Compile using 68020 bitfield insns. */
58: #define TARGET_BITFIELD (target_flags & 4)
59:
60: /* Compile using rtd insn calling sequence.
61: This will not work unless you use prototypes at least
62: for all functions that can take varying numbers of args. */
63: #define TARGET_RTD (target_flags & 8)
64:
65: /* Compile passing first two args in regs 0 and 1.
66: This exists only to test compiler features that will
67: be needed for RISC chips. It is not usable
68: and is not intended to be usable on this cpu. */
69: #define TARGET_REGPARM (target_flags & 020)
70:
71: /* Compile with 16-bit `int'. */
72: #define TARGET_SHORT (target_flags & 040)
73:
74: /* Compile with special insns for Sun FPA. */
75: #ifdef SUPPORT_SUN_FPA
76: #define TARGET_FPA (target_flags & 0100)
77: #else
78: #define TARGET_FPA 0
79: #endif
80:
81: /* Compile (actually, link) for Sun SKY board. */
82: #define TARGET_SKY (target_flags & 0200)
83:
84: /* Optimize for 68040.
85: The 68040 will execute all 68030 and 68881/2 instrcutions, but some
86: of them must be emulated in software by the OS. When TARGET_68040 is
87: turned on, these instructions won't be used. This code will still
88: run on a 68030 and 68881/2. */
89: #define TARGET_68040 (target_flags & 0400)
90:
91: /* Support 68040 fp instructions. */
92: #define TARGET_68040_ONLY (target_flags & 01000)
93:
94: /* Macro to define tables used to set the flags.
95: This is a list in braces of pairs in braces,
96: each pair being { "NAME", VALUE }
97: where VALUE is the bits to set or minus the bits to clear.
98: An empty string NAME is used to identify the default VALUE. */
99:
100: #define TARGET_SWITCHES \
101: { { "68020", 5}, \
102: { "c68020", 5}, \
103: { "68881", 2}, \
104: { "bitfield", 4}, \
105: { "68000", -5}, \
106: { "c68000", -5}, \
107: { "soft-float", -0102}, \
108: { "nobitfield", -4}, \
109: { "rtd", 8}, \
110: { "nortd", -8}, \
111: { "short", 040}, \
112: { "noshort", -040}, \
113: { "fpa", 0100}, \
114: { "nofpa", -0100}, \
115: { "sky", 0200}, \
116: { "nosky", -0200}, \
117: { "68040", 0407}, \
118: { "68030", -01400}, \
119: { "68030", 7}, \
120: { "68040-only", 01000}, \
121: { "", TARGET_DEFAULT}}
122: /* TARGET_DEFAULT is defined in sun*.h and isi.h, etc. */
123:
124: #ifdef SUPPORT_SUN_FPA
125: /* Blow away 68881 flag silently on TARGET_FPA (since we can't clear
126: any bits in TARGET_SWITCHES above) */
127: #define OVERRIDE_OPTIONS \
128: { \
129: if (TARGET_FPA) target_flags &= ~2; \
130: if (! TARGET_68020 && flag_pic == 2) \
131: error("-fPIC is not currently supported on the 68000 or 68010\n"); \
132: }
133: #else
134: #define OVERRIDE_OPTIONS \
135: { \
136: if (! TARGET_68020 && flag_pic == 2) \
137: error("-fPIC is not currently supported on the 68000 or 68010\n"); \
138: }
139: #endif /* defined SUPPORT_SUN_FPA */
140:
141: /* target machine storage layout */
142:
143: /* Define this if most significant bit is lowest numbered
144: in instructions that operate on numbered bit-fields.
145: This is true for 68020 insns such as bfins and bfexts.
146: We make it true always by avoiding using the single-bit insns
147: except in special cases with constant bit numbers. */
148: #define BITS_BIG_ENDIAN 1
149:
150: /* Define this if most significant byte of a word is the lowest numbered. */
151: /* That is true on the 68000. */
152: #define BYTES_BIG_ENDIAN 1
153:
154: /* Define this if most significant word of a multiword number is the lowest
155: numbered. */
156: /* For 68000 we can decide arbitrarily
157: since there are no machine instructions for them.
158: So let's be consistent. */
159: #define WORDS_BIG_ENDIAN 1
160:
161: /* number of bits in an addressible storage unit */
162: #define BITS_PER_UNIT 8
163:
164: /* Width in bits of a "word", which is the contents of a machine register.
165: Note that this is not necessarily the width of data type `int';
166: if using 16-bit ints on a 68000, this would still be 32.
167: But on a machine with 16-bit registers, this would be 16. */
168: #define BITS_PER_WORD 32
169:
170: /* Width of a word, in units (bytes). */
171: #define UNITS_PER_WORD 4
172:
173: /* Width in bits of a pointer.
174: See also the macro `Pmode' defined below. */
175: #define POINTER_SIZE 32
176:
177: /* Allocation boundary (in *bits*) for storing arguments in argument list. */
178: #define PARM_BOUNDARY (TARGET_SHORT ? 16 : 32)
179:
180: /* Boundary (in *bits*) on which stack pointer should be aligned. */
181: #define STACK_BOUNDARY 16
182:
183: /* Allocation boundary (in *bits*) for the code of a function. */
184: #define FUNCTION_BOUNDARY 16
185:
186: /* Alignment of field after `int : 0' in a structure. */
187: #define EMPTY_FIELD_BOUNDARY 16
188:
189: /* No data type wants to be aligned rounder than this. */
190: #define BIGGEST_ALIGNMENT 16
191:
192: /* Define this if move instructions will actually fail to work
193: when given unaligned data. */
194: #define STRICT_ALIGNMENT
195:
196: #define SELECT_RTX_SECTION(MODE, X) \
197: { \
198: if (!flag_pic) \
199: readonly_data_section(); \
200: else if (LEGITIMATE_PIC_OPERAND_P (X)) \
201: readonly_data_section(); \
202: else \
203: data_section(); \
204: }
205:
206: /* Define number of bits in most basic integer type.
207: (If undefined, default is BITS_PER_WORD). */
208:
209: #define INT_TYPE_SIZE (TARGET_SHORT ? 16 : 32)
210:
211: /* Define these to avoid dependence on meaning of `int'.
212: Note that WCHAR_TYPE_SIZE is used in cexp.y,
213: where TARGET_SHORT is not available. */
214:
215: #define WCHAR_TYPE "long int"
216: #define WCHAR_TYPE_SIZE 32
217:
218: /* Standard register usage. */
219:
220: /* Number of actual hardware registers.
221: The hardware registers are assigned numbers for the compiler
222: from 0 to just below FIRST_PSEUDO_REGISTER.
223: All registers that the compiler knows about must be given numbers,
224: even those that are not normally considered general registers.
225: For the 68000, we give the data registers numbers 0-7,
226: the address registers numbers 010-017,
227: and the 68881 floating point registers numbers 020-027. */
228: #ifndef SUPPORT_SUN_FPA
229: #define FIRST_PSEUDO_REGISTER 24
230: #else
231: #define FIRST_PSEUDO_REGISTER 56
232: #endif
233:
234: /* This defines the register which is used to hold the offset table for PIC. */
235: #define PIC_OFFSET_TABLE_REGNUM 13
236:
237: /* Used to output a (use pic_offset_table_rtx) so that we
238: always save/restore a5 in functions that use PIC relocation
239: at *any* time during the compilation process. */
240: #define FINALIZE_PIC finalize_pic()
241:
242: #ifndef SUPPORT_SUN_FPA
243:
244: /* 1 for registers that have pervasive standard uses
245: and are not available for the register allocator.
246: On the 68000, only the stack pointer is such. */
247:
248: #define FIXED_REGISTERS \
249: {/* Data registers. */ \
250: 0, 0, 0, 0, 0, 0, 0, 0, \
251: \
252: /* Address registers. */ \
253: 0, 0, 0, 0, 0, 0, 0, 1, \
254: \
255: /* Floating point registers \
256: (if available). */ \
257: 0, 0, 0, 0, 0, 0, 0, 0 }
258:
259: /* 1 for registers not available across function calls.
260: These must include the FIXED_REGISTERS and also any
261: registers that can be used without being saved.
262: The latter must include the registers where values are returned
263: and the register where structure-value addresses are passed.
264: Aside from that, you can include as many other registers as you like. */
265: #define CALL_USED_REGISTERS \
266: {1, 1, 0, 0, 0, 0, 0, 0, \
267: 1, 1, 0, 0, 0, 0, 0, 1, \
268: 1, 1, 0, 0, 0, 0, 0, 0 }
269:
270: #else /* SUPPORT_SUN_FPA */
271:
272: /* 1 for registers that have pervasive standard uses
273: and are not available for the register allocator.
274: On the 68000, only the stack pointer is such. */
275:
276: /* fpa0 is also reserved so that it can be used to move shit back and
277: forth between high fpa regs and everything else. */
278:
279: #define FIXED_REGISTERS \
280: {/* Data registers. */ \
281: 0, 0, 0, 0, 0, 0, 0, 0, \
282: \
283: /* Address registers. */ \
284: 0, 0, 0, 0, 0, 0, 0, 1, \
285: \
286: /* Floating point registers \
287: (if available). */ \
288: 0, 0, 0, 0, 0, 0, 0, 0, \
289: \
290: /* Sun3 FPA registers. */ \
291: 1, 0, 0, 0, 0, 0, 0, 0, \
292: 0, 0, 0, 0, 0, 0, 0, 0, \
293: 0, 0, 0, 0, 0, 0, 0, 0, \
294: 0, 0, 0, 0, 0, 0, 0, 0 }
295:
296: /* 1 for registers not available across function calls.
297: These must include the FIXED_REGISTERS and also any
298: registers that can be used without being saved.
299: The latter must include the registers where values are returned
300: and the register where structure-value addresses are passed.
301: Aside from that, you can include as many other registers as you like. */
302: #define CALL_USED_REGISTERS \
303: {1, 1, 0, 0, 0, 0, 0, 0, \
304: 1, 1, 0, 0, 0, 0, 0, 1, \
305: 1, 1, 0, 0, 0, 0, 0, 0, \
306: /* FPA registers. */ \
307: 1, 1, 1, 1, 0, 0, 0, 0, \
308: 0, 0, 0, 0, 0, 0, 0, 0, \
309: 0, 0, 0, 0, 0, 0, 0, 0, \
310: 0, 0, 0, 0, 0, 0, 0, 0 }
311:
312: #endif /* defined SUPPORT_SUN_FPA */
313:
314:
315: /* Make sure everything's fine if we *don't* have a given processor.
316: This assumes that putting a register in fixed_regs will keep the
317: compiler's mitts completely off it. We don't bother to zero it out
318: of register classes. If neither TARGET_FPA or TARGET_68881 is set,
319: the compiler won't touch since no instructions that use these
320: registers will be valid.
321:
322: Reserve PIC_OFFSET_TABLE_REGNUM (a5) for doing PIC relocation if
323: position independent code is being generated by making it a
324: fixed register */
325:
326: #ifndef SUPPORT_SUN_FPA
327:
328: #define CONDITIONAL_REGISTER_USAGE \
329: { \
330: if (flag_pic) \
331: fixed_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \
332: }
333:
334: #else /* defined SUPPORT_SUN_FPA */
335:
336: #define CONDITIONAL_REGISTER_USAGE \
337: { \
338: int i; \
339: HARD_REG_SET x; \
340: if (!TARGET_FPA) \
341: { \
342: COPY_HARD_REG_SET (x, reg_class_contents[(int)FPA_REGS]); \
343: for (i = 0; i < FIRST_PSEUDO_REGISTER; i++ ) \
344: if (TEST_HARD_REG_BIT (x, i)) \
345: fixed_regs[i] = call_used_regs[i] = 1; \
346: } \
347: if (TARGET_FPA) \
348: { \
349: COPY_HARD_REG_SET (x, reg_class_contents[(int)FP_REGS]); \
350: for (i = 0; i < FIRST_PSEUDO_REGISTER; i++ ) \
351: if (TEST_HARD_REG_BIT (x, i)) \
352: fixed_regs[i] = call_used_regs[i] = 1; \
353: } \
354: if (flag_pic) \
355: fixed_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \
356: }
357:
358: #endif /* defined SUPPORT_SUN_FPA */
359:
360: /* Return number of consecutive hard regs needed starting at reg REGNO
361: to hold something of mode MODE.
362: This is ordinarily the length in words of a value of mode MODE
363: but can be less for certain modes in special long registers.
364:
365: On the 68000, ordinary registers hold 32 bits worth;
366: for the 68881 registers, a single register is always enough for
367: anything that can be stored in them at all. */
368: #define HARD_REGNO_NREGS(REGNO, MODE) \
369: ((REGNO) >= 16 ? GET_MODE_NUNITS (MODE) \
370: : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))
371:
372: #ifndef SUPPORT_SUN_FPA
373:
374: /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE.
375: On the 68000, the cpu registers can hold any mode but the 68881 registers
376: can hold only SFmode or DFmode. The 68881 registers can't hold anything
377: if 68881 use is disabled. */
378:
379: #define HARD_REGNO_MODE_OK(REGNO, MODE) \
380: (((REGNO) < 16) \
381: || ((REGNO) < 24 \
382: && TARGET_68881 \
383: && (GET_MODE_CLASS (MODE) == MODE_FLOAT \
384: || GET_MODE_CLASS (MODE) == MODE_COMPLEX_FLOAT)))
385:
386: #else /* defined SUPPORT_SUN_FPA */
387:
388: /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE.
389: On the 68000, the cpu registers can hold any mode but the 68881 registers
390: can hold only SFmode or DFmode. And the 68881 registers can't hold anything
391: if 68881 use is disabled. However, the Sun FPA register can
392: (apparently) hold whatever you feel like putting in them.
393: If using the fpa, don't put a double in d7/a0. */
394:
395: #define HARD_REGNO_MODE_OK(REGNO, MODE) \
396: (((REGNO) < 16 \
397: && !(TARGET_FPA \
398: && GET_MODE_CLASS ((MODE)) != MODE_INT \
399: && GET_MODE_UNIT_SIZE ((MODE)) > 4 \
400: && (REGNO) < 8 && (REGNO) + GET_MODE_SIZE ((MODE)) / 4 > 8 \
401: && (REGNO) % (GET_MODE_UNIT_SIZE ((MODE)) / 4) != 0)) \
402: || ((REGNO) < 24 \
403: ? TARGET_68881 && (GET_MODE_CLASS (MODE) == MODE_FLOAT \
404: || GET_MODE_CLASS (MODE) == MODE_COMPLEX_FLOAT) \
405: : ((REGNO) < 56 ? TARGET_FPA : 0)))
406:
407: #endif /* defined SUPPORT_SUN_FPA */
408:
409: /* Value is 1 if it is a good idea to tie two pseudo registers
410: when one has mode MODE1 and one has mode MODE2.
411: If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
412: for any hard reg, then this must be 0 for correct output. */
413: #define MODES_TIEABLE_P(MODE1, MODE2) \
414: (! TARGET_68881 \
415: || ((GET_MODE_CLASS (MODE1) == MODE_FLOAT \
416: || GET_MODE_CLASS (MODE1) == MODE_COMPLEX_FLOAT) \
417: == (GET_MODE_CLASS (MODE2) == MODE_FLOAT \
418: || GET_MODE_CLASS (MODE2) == MODE_COMPLEX_FLOAT)))
419:
420: /* Specify the registers used for certain standard purposes.
421: The values of these macros are register numbers. */
422:
423: /* m68000 pc isn't overloaded on a register. */
424: /* #define PC_REGNUM */
425:
426: /* Register to use for pushing function arguments. */
427: #define STACK_POINTER_REGNUM 15
428:
429: /* Base register for access to local variables of the function. */
430: #define FRAME_POINTER_REGNUM 14
431:
432: /* Value should be nonzero if functions must have frame pointers.
433: Zero means the frame pointer need not be set up (and parms
434: may be accessed via the stack pointer) in functions that seem suitable.
435: This is computed in `reload', in reload1.c. */
436: #define FRAME_POINTER_REQUIRED 0
437:
438: /* Base register for access to arguments of the function. */
439: #define ARG_POINTER_REGNUM 14
440:
441: /* Register in which static-chain is passed to a function. */
442: #define STATIC_CHAIN_REGNUM 8
443:
444: /* Register in which address to store a structure value
445: is passed to a function. */
446: #define STRUCT_VALUE_REGNUM 9
447:
448: /* Define the classes of registers for register constraints in the
449: machine description. Also define ranges of constants.
450:
451: One of the classes must always be named ALL_REGS and include all hard regs.
452: If there is more than one class, another class must be named NO_REGS
453: and contain no registers.
454:
455: The name GENERAL_REGS must be the name of a class (or an alias for
456: another name such as ALL_REGS). This is the class of registers
457: that is allowed by "g" or "r" in a register constraint.
458: Also, registers outside this class are allocated only when
459: instructions express preferences for them.
460:
461: The classes must be numbered in nondecreasing order; that is,
462: a larger-numbered class must never be contained completely
463: in a smaller-numbered class.
464:
465: For any two classes, it is very desirable that there be another
466: class that represents their union. */
467:
468: /* The 68000 has three kinds of registers, so eight classes would be
469: a complete set. One of them is not needed. */
470:
471: #ifndef SUPPORT_SUN_FPA
472:
473: enum reg_class {
474: NO_REGS, DATA_REGS,
475: ADDR_REGS, FP_REGS,
476: GENERAL_REGS, DATA_OR_FP_REGS,
477: ADDR_OR_FP_REGS, ALL_REGS,
478: LIM_REG_CLASSES };
479:
480: #define N_REG_CLASSES (int) LIM_REG_CLASSES
481:
482: /* Give names of register classes as strings for dump file. */
483:
484: #define REG_CLASS_NAMES \
485: { "NO_REGS", "DATA_REGS", \
486: "ADDR_REGS", "FP_REGS", \
487: "GENERAL_REGS", "DATA_OR_FP_REGS", \
488: "ADDR_OR_FP_REGS", "ALL_REGS" }
489:
490: /* Define which registers fit in which classes.
491: This is an initializer for a vector of HARD_REG_SET
492: of length N_REG_CLASSES. */
493:
494: #define REG_CLASS_CONTENTS \
495: { \
496: 0x00000000, /* NO_REGS */ \
497: 0x000000ff, /* DATA_REGS */ \
498: 0x0000ff00, /* ADDR_REGS */ \
499: 0x00ff0000, /* FP_REGS */ \
500: 0x0000ffff, /* GENERAL_REGS */ \
501: 0x00ff00ff, /* DATA_OR_FP_REGS */ \
502: 0x00ffff00, /* ADDR_OR_FP_REGS */ \
503: 0x00ffffff, /* ALL_REGS */ \
504: }
505:
506: /* The same information, inverted:
507: Return the class number of the smallest class containing
508: reg number REGNO. This could be a conditional expression
509: or could index an array. */
510:
511: #define REGNO_REG_CLASS(REGNO) (((REGNO)>>3)+1)
512:
513: #else /* defined SUPPORT_SUN_FPA */
514:
515: /*
516: * Notes on final choices:
517: *
518: * 1) Didn't feel any need to union-ize LOW_FPA_REGS with anything
519: * else.
520: * 2) Removed all unions that involve address registers with
521: * floating point registers (left in unions of address and data with
522: * floating point).
523: * 3) Defined GENERAL_REGS as ADDR_OR_DATA_REGS.
524: * 4) Defined ALL_REGS as FPA_OR_FP_OR_GENERAL_REGS.
525: * 4) Left in everything else.
526: */
527: enum reg_class { NO_REGS, LO_FPA_REGS, FPA_REGS, FP_REGS,
528: FP_OR_FPA_REGS, DATA_REGS, DATA_OR_FPA_REGS, DATA_OR_FP_REGS,
529: DATA_OR_FP_OR_FPA_REGS, ADDR_REGS, GENERAL_REGS,
530: GENERAL_OR_FPA_REGS, GENERAL_OR_FP_REGS, ALL_REGS,
531: LIM_REG_CLASSES };
532:
533: #define N_REG_CLASSES (int) LIM_REG_CLASSES
534:
535: /* Give names of register classes as strings for dump file. */
536:
537: #define REG_CLASS_NAMES \
538: { "NO_REGS", "LO_FPA_REGS", "FPA_REGS", "FP_REGS", \
539: "FP_OR_FPA_REGS", "DATA_REGS", "DATA_OR_FPA_REGS", "DATA_OR_FP_REGS", \
540: "DATA_OR_FP_OR_FPA_REGS", "ADDR_REGS", "GENERAL_REGS", \
541: "GENERAL_OR_FPA_REGS", "GENERAL_OR_FP_REGS", "ALL_REGS" }
542:
543: /* Define which registers fit in which classes.
544: This is an initializer for a vector of HARD_REG_SET
545: of length N_REG_CLASSES. */
546:
547: #define REG_CLASS_CONTENTS \
548: { \
549: {0, 0}, /* NO_REGS */ \
550: {0xff000000, 0x000000ff}, /* LO_FPA_REGS */ \
551: {0xff000000, 0x00ffffff}, /* FPA_REGS */ \
552: {0x00ff0000, 0x00000000}, /* FP_REGS */ \
553: {0xffff0000, 0x00ffffff}, /* FP_OR_FPA_REGS */ \
554: {0x000000ff, 0x00000000}, /* DATA_REGS */ \
555: {0xff0000ff, 0x00ffffff}, /* DATA_OR_FPA_REGS */ \
556: {0x00ff00ff, 0x00000000}, /* DATA_OR_FP_REGS */ \
557: {0xffff00ff, 0x00ffffff}, /* DATA_OR_FP_OR_FPA_REGS */\
558: {0x0000ff00, 0x00000000}, /* ADDR_REGS */ \
559: {0x0000ffff, 0x00000000}, /* GENERAL_REGS */ \
560: {0xff00ffff, 0x00ffffff}, /* GENERAL_OR_FPA_REGS */\
561: {0x00ffffff, 0x00000000}, /* GENERAL_OR_FP_REGS */\
562: {0xffffffff, 0x00ffffff}, /* ALL_REGS */ \
563: }
564:
565: /* The same information, inverted:
566: Return the class number of the smallest class containing
567: reg number REGNO. This could be a conditional expression
568: or could index an array. */
569:
570: extern enum reg_class regno_reg_class[];
571: #define REGNO_REG_CLASS(REGNO) (regno_reg_class[(REGNO)>>3])
572:
573: #endif /* SUPPORT_SUN_FPA */
574:
575: /* The class value for index registers, and the one for base regs. */
576:
577: #define INDEX_REG_CLASS GENERAL_REGS
578: #define BASE_REG_CLASS ADDR_REGS
579:
580: /* Get reg_class from a letter such as appears in the machine description.
581: We do a trick here to modify the effective constraints on the
582: machine description; we zorch the constraint letters that aren't
583: appropriate for a specific target. This allows us to guarantee
584: that a specific kind of register will not be used for a given target
585: without fiddling with the register classes above. */
586:
587: #ifndef SUPPORT_SUN_FPA
588:
589: #define REG_CLASS_FROM_LETTER(C) \
590: ((C) == 'a' ? ADDR_REGS : \
591: ((C) == 'd' ? DATA_REGS : \
592: ((C) == 'f' ? (TARGET_68881 ? FP_REGS : \
593: NO_REGS) : \
594: NO_REGS)))
595:
596: #else /* defined SUPPORT_SUN_FPA */
597:
598: #define REG_CLASS_FROM_LETTER(C) \
599: ((C) == 'a' ? ADDR_REGS : \
600: ((C) == 'd' ? DATA_REGS : \
601: ((C) == 'f' ? (TARGET_68881 ? FP_REGS : \
602: NO_REGS) : \
603: ((C) == 'x' ? (TARGET_FPA ? FPA_REGS : \
604: NO_REGS) : \
605: ((C) == 'y' ? (TARGET_FPA ? LO_FPA_REGS : \
606: NO_REGS) : \
607: NO_REGS)))))
608:
609: #endif /* defined SUPPORT_SUN_FPA */
610:
611: /* The letters I, J, K, L and M in a register constraint string
612: can be used to stand for particular ranges of immediate operands.
613: This macro defines what the ranges are.
614: C is the letter, and VALUE is a constant value.
615: Return 1 if VALUE is in the range specified by C.
616:
617: For the 68000, `I' is used for the range 1 to 8
618: allowed as immediate shift counts and in addq.
619: `J' is used for the range of signed numbers that fit in 16 bits.
620: `K' is for numbers that moveq can't handle.
621: `L' is for range -8 to -1, range of values that can be added with subq. */
622:
623: #define CONST_OK_FOR_LETTER_P(VALUE, C) \
624: ((C) == 'I' ? (VALUE) > 0 && (VALUE) <= 8 : \
625: (C) == 'J' ? (VALUE) >= -0x8000 && (VALUE) <= 0x7FFF : \
626: (C) == 'K' ? (VALUE) < -0x80 || (VALUE) >= 0x80 : \
627: (C) == 'L' ? (VALUE) < 0 && (VALUE) >= -8 : 0)
628:
629: /*
630: * A small bit of explanation:
631: * "G" defines all of the floating constants that are *NOT* 68881
632: * constants. this is so 68881 constants get reloaded and the
633: * fpmovecr is used. "H" defines *only* the class of constants that
634: * the fpa can use, because these can be gotten at in any fpa
635: * instruction and there is no need to force reloads.
636: */
637: #ifndef SUPPORT_SUN_FPA
638: #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
639: ((C) == 'G' ? ! (TARGET_68881 && standard_68881_constant_p (VALUE)) : 0 )
640: #else /* defined SUPPORT_SUN_FPA */
641: #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
642: ((C) == 'G' ? ! (TARGET_68881 && standard_68881_constant_p (VALUE)) : \
643: (C) == 'H' ? (TARGET_FPA && standard_sun_fpa_constant_p (VALUE)) : 0)
644: #endif /* defined SUPPORT_SUN_FPA */
645:
646: /* Given an rtx X being reloaded into a reg required to be
647: in class CLASS, return the class of reg to actually use.
648: In general this is just CLASS; but on some machines
649: in some cases it is preferable to use a more restrictive class.
650: On the 68000 series, use a data reg if possible when the
651: value is a constant in the range where moveq could be used
652: and we ensure that QImodes are reloaded into data regs.
653: Also, if a floating constant needs reloading, put it in memory
654: if possible. */
655:
656: #define PREFERRED_RELOAD_CLASS(X,CLASS) \
657: ((GET_CODE (X) == CONST_INT \
658: && (unsigned) (INTVAL (X) + 0x80) < 0x100 \
659: && (CLASS) != ADDR_REGS) \
660: ? DATA_REGS \
661: : (GET_MODE (X) == QImode && (CLASS) != ADDR_REGS) \
662: ? DATA_REGS \
663: : (GET_CODE (X) == CONST_DOUBLE \
664: && GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT) \
665: ? NO_REGS \
666: : (CLASS))
667:
668: /* Return the maximum number of consecutive registers
669: needed to represent mode MODE in a register of class CLASS. */
670: /* On the 68000, this is the size of MODE in words,
671: except in the FP regs, where a single reg is always enough. */
672: #ifndef SUPPORT_SUN_FPA
673:
674: #define CLASS_MAX_NREGS(CLASS, MODE) \
675: ((CLASS) == FP_REGS ? 1 \
676: : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))
677:
678: /* Moves between fp regs and other regs are two insns. */
679: #define REGISTER_MOVE_COST(CLASS1, CLASS2) \
680: (((CLASS1) == FP_REGS && (CLASS2) != FP_REGS) \
681: || ((CLASS2) == FP_REGS && (CLASS1) != FP_REGS) \
682: ? 4 : 2)
683:
684: #else /* defined SUPPORT_SUN_FPA */
685:
686: #define CLASS_MAX_NREGS(CLASS, MODE) \
687: ((CLASS) == FP_REGS || (CLASS) == FPA_REGS || (CLASS) == LO_FPA_REGS ? 1 \
688: : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))
689:
690: /* Moves between fp regs and other regs are two insns. */
691: /* Likewise for high fpa regs and other regs. */
692: #define REGISTER_MOVE_COST(CLASS1, CLASS2) \
693: ((((CLASS1) == FP_REGS && (CLASS2) != FP_REGS) \
694: || ((CLASS2) == FP_REGS && (CLASS1) != FP_REGS) \
695: || ((CLASS1) == FPA_REGS && (CLASS2) != FPA_REGS) \
696: || ((CLASS2) == FPA_REGS && (CLASS1) != FPA_REGS)) \
697: ? 4 : 2)
698:
699: #endif /* define SUPPORT_SUN_FPA */
700:
701: /* Stack layout; function entry, exit and calling. */
702:
703: /* Define this if pushing a word on the stack
704: makes the stack pointer a smaller address. */
705: #define STACK_GROWS_DOWNWARD
706:
707: /* Nonzero if we need to generate stack-probe insns.
708: On most systems they are not needed.
709: When they are needed, define this as the stack offset to probe at. */
710: #define NEED_PROBE 0
711:
712: /* Define this if the nominal address of the stack frame
713: is at the high-address end of the local variables;
714: that is, each additional local variable allocated
715: goes at a more negative offset in the frame. */
716: #define FRAME_GROWS_DOWNWARD
717:
718: /* Offset within stack frame to start allocating local variables at.
719: If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
720: first local allocated. Otherwise, it is the offset to the BEGINNING
721: of the first local allocated. */
722: #define STARTING_FRAME_OFFSET 0
723:
724: /* If we generate an insn to push BYTES bytes,
725: this says how many the stack pointer really advances by.
726: On the 68000, sp@- in a byte insn really pushes a word. */
727: #define PUSH_ROUNDING(BYTES) (((BYTES) + 1) & ~1)
728:
729: /* Offset of first parameter from the argument pointer register value. */
730: #define FIRST_PARM_OFFSET(FNDECL) 8
731:
732: /* Value is the number of byte of arguments automatically
733: popped when returning from a subroutine call.
734: FUNTYPE is the data type of the function (as a tree),
735: or for a library call it is an identifier node for the subroutine name.
736: SIZE is the number of bytes of arguments passed on the stack.
737:
738: On the 68000, the RTS insn cannot pop anything.
739: On the 68010, the RTD insn may be used to pop them if the number
740: of args is fixed, but if the number is variable then the caller
741: must pop them all. RTD can't be used for library calls now
742: because the library is compiled with the Unix compiler.
743: Use of RTD is a selectable option, since it is incompatible with
744: standard Unix calling sequences. If the option is not selected,
745: the caller must always pop the args. */
746:
747: #define RETURN_POPS_ARGS(FUNTYPE,SIZE) \
748: ((TARGET_RTD && TREE_CODE (FUNTYPE) != IDENTIFIER_NODE \
749: && (TYPE_ARG_TYPES (FUNTYPE) == 0 \
750: || (TREE_VALUE (tree_last (TYPE_ARG_TYPES (FUNTYPE))) \
751: == void_type_node))) \
752: ? (SIZE) : 0)
753:
754: /* Define how to find the value returned by a function.
755: VALTYPE is the data type of the value (as a tree).
756: If the precise function being called is known, FUNC is its FUNCTION_DECL;
757: otherwise, FUNC is 0. */
758:
759: /* On the 68000 the return value is in D0 regardless. */
760:
761: #define FUNCTION_VALUE(VALTYPE, FUNC) \
762: gen_rtx (REG, TYPE_MODE (VALTYPE), 0)
763:
764: /* Define how to find the value returned by a library function
765: assuming the value has mode MODE. */
766:
767: /* On the 68000 the return value is in D0 regardless. */
768:
769: #define LIBCALL_VALUE(MODE) gen_rtx (REG, MODE, 0)
770:
771: /* 1 if N is a possible register number for a function value.
772: On the 68000, d0 is the only register thus used. */
773:
774: #define FUNCTION_VALUE_REGNO_P(N) ((N) == 0)
775:
776: /* Define this if PCC uses the nonreentrant convention for returning
777: structure and union values. */
778:
779: #define PCC_STATIC_STRUCT_RETURN
780:
781: /* 1 if N is a possible register number for function argument passing.
782: On the 68000, no registers are used in this way. */
783:
784: #define FUNCTION_ARG_REGNO_P(N) 0
785:
786: /* Define a data type for recording info about an argument list
787: during the scan of that argument list. This data type should
788: hold all necessary information about the function itself
789: and about the args processed so far, enough to enable macros
790: such as FUNCTION_ARG to determine where the next arg should go.
791:
792: On the m68k, this is a single integer, which is a number of bytes
793: of arguments scanned so far. */
794:
795: #define CUMULATIVE_ARGS int
796:
797: /* Initialize a variable CUM of type CUMULATIVE_ARGS
798: for a call to a function whose data type is FNTYPE.
799: For a library call, FNTYPE is 0.
800:
801: On the m68k, the offset starts at 0. */
802:
803: #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME) \
804: ((CUM) = 0)
805:
806: /* Update the data in CUM to advance over an argument
807: of mode MODE and data type TYPE.
808: (TYPE is null for libcalls where that information may not be available.) */
809:
810: #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
811: ((CUM) += ((MODE) != BLKmode \
812: ? (GET_MODE_SIZE (MODE) + 3) & ~3 \
813: : (int_size_in_bytes (TYPE) + 3) & ~3))
814:
815: /* Define where to put the arguments to a function.
816: Value is zero to push the argument on the stack,
817: or a hard register in which to store the argument.
818:
819: MODE is the argument's machine mode.
820: TYPE is the data type of the argument (as a tree).
821: This is null for libcalls where that information may
822: not be available.
823: CUM is a variable of type CUMULATIVE_ARGS which gives info about
824: the preceding args and about the function being called.
825: NAMED is nonzero if this argument is a named parameter
826: (otherwise it is an extra parameter matching an ellipsis). */
827:
828: /* On the 68000 all args are pushed, except if -mregparm is specified
829: then the first two words of arguments are passed in d0, d1.
830: *NOTE* -mregparm does not work.
831: It exists only to test register calling conventions. */
832:
833: #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
834: ((TARGET_REGPARM && (CUM) < 8) ? gen_rtx (REG, (MODE), (CUM) / 4) : 0)
835:
836: /* For an arg passed partly in registers and partly in memory,
837: this is the number of registers used.
838: For args passed entirely in registers or entirely in memory, zero. */
839:
840: #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) \
841: ((TARGET_REGPARM && (CUM) < 8 \
842: && 8 < ((CUM) + ((MODE) == BLKmode \
843: ? int_size_in_bytes (TYPE) \
844: : GET_MODE_SIZE (MODE)))) \
845: ? 2 - (CUM) / 4 : 0)
846:
847: /* Generate the assembly code for function entry. */
848: #define FUNCTION_PROLOGUE(FILE, SIZE) output_function_prologue(FILE, SIZE)
849:
850: /* Output assembler code to FILE to increment profiler label # LABELNO
851: for profiling a function entry. */
852:
853: #define FUNCTION_PROFILER(FILE, LABELNO) \
854: asm_fprintf (FILE, "\tlea %LLP%d,%Ra0\n\tjsr mcount\n", (LABELNO))
855:
856: /* Output assembler code to FILE to initialize this source file's
857: basic block profiling info, if that has not already been done. */
858:
859: #define FUNCTION_BLOCK_PROFILER(FILE, LABELNO) \
860: asm_fprintf (FILE, "\ttstl %LLPBX0\n\tbne %LLPI%d\n\tpea %LLPBX0\n\tjsr %U__bb_init_func\n\taddql %I4,%Rsp\n%LLPI%d:\n", \
861: LABELNO, LABELNO);
862:
863: /* Output assembler code to FILE to increment the entry-count for
864: the BLOCKNO'th basic block in this source file. */
865:
866: #define BLOCK_PROFILER(FILE, BLOCKNO) \
867: asm_fprintf (FILE, "\taddql %I1,%LLPBX2+%d\n", 4 * BLOCKNO)
868:
869: /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
870: the stack pointer does not matter. The value is tested only in
871: functions that have frame pointers.
872: No definition is equivalent to always zero. */
873:
874: #define EXIT_IGNORE_STACK 1
875:
876: /* Generate the assembly code for function exit. */
877: #define FUNCTION_EPILOGUE(FILE, SIZE) output_function_epilogue (FILE, SIZE)
878:
879: /* This is a hook for other tm files to change. */
880: /* #define FUNCTION_EXTRA_EPILOGUE(FILE, SIZE) */
881:
882: /* Determine if the epilogue should be output as RTL.
883: You should override this if you define FUNCTION_EXTRA_EPILOGUE. */
884: #define USE_RETURN_INSN use_return_insn ()
885:
886: /* Store in the variable DEPTH the initial difference between the
887: frame pointer reg contents and the stack pointer reg contents,
888: as of the start of the function body. This depends on the layout
889: of the fixed parts of the stack frame and on how registers are saved.
890:
891: On the 68k, if we have a frame, we must add one word to its length
892: to allow for the place that a6 is stored when we do have a frame pointer.
893: Otherwise, we would need to compute the offset from the frame pointer
894: of a local variable as a function of frame_pointer_needed, which
895: is hard. */
896:
897: #define INITIAL_FRAME_POINTER_OFFSET(DEPTH) \
898: { int regno; \
899: int offset = -4; \
900: for (regno = 16; regno < FIRST_PSEUDO_REGISTER; regno++) \
901: if (regs_ever_live[regno] && ! call_used_regs[regno]) \
902: offset += 12; \
903: for (regno = 0; regno < 16; regno++) \
904: if (regs_ever_live[regno] && ! call_used_regs[regno]) \
905: offset += 4; \
906: (DEPTH) = (offset + ((get_frame_size () + 3) & -4) \
907: + (get_frame_size () == 0 ? 0 : 4)); \
908: }
909:
910: /* Output assembler code for a block containing the constant parts
911: of a trampoline, leaving space for the variable parts. */
912:
913: /* On the 68k, the trampoline looks like this:
914: mov @#.,a0
915: jsr @#__trampoline
916: jsr @#__trampoline
917: .long STATIC
918: .long FUNCTION
919: The reason for having three jsr insns is so that an entire line
920: of the instruction cache is filled in a predictable way
921: that will always be the same. */
922:
923: #define TRAMPOLINE_TEMPLATE(FILE) \
924: { \
925: ASM_OUTPUT_SHORT (FILE, gen_rtx (CONST_INT, VOIDmode, 0x207c)); \
926: ASM_OUTPUT_SHORT (FILE, const0_rtx); \
927: ASM_OUTPUT_SHORT (FILE, const0_rtx); \
928: ASM_OUTPUT_SHORT (FILE, gen_rtx (CONST_INT, VOIDmode, 0x4ef9)); \
929: ASM_OUTPUT_INT (FILE, gen_rtx (SYMBOL_REF, SImode, "__trampoline")); \
930: ASM_OUTPUT_SHORT (FILE, gen_rtx (CONST_INT, VOIDmode, 0x4ef9)); \
931: ASM_OUTPUT_INT (FILE, gen_rtx (SYMBOL_REF, SImode, "__trampoline")); \
932: ASM_OUTPUT_SHORT (FILE, const0_rtx); \
933: ASM_OUTPUT_SHORT (FILE, const0_rtx); \
934: ASM_OUTPUT_SHORT (FILE, const0_rtx); \
935: ASM_OUTPUT_SHORT (FILE, const0_rtx); \
936: }
937:
938: /* Length in units of the trampoline for entering a nested function. */
939:
940: #define TRAMPOLINE_SIZE 26
941:
942: /* Alignment required for a trampoline. 16 is used to find the
943: beginning of a line in the instruction cache. */
944:
945: #define TRAMPOLINE_ALIGN 16
946:
947: /* Emit RTL insns to initialize the variable parts of a trampoline.
948: FNADDR is an RTX for the address of the function's pure code.
949: CXT is an RTX for the static chain value for the function. */
950:
951: #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
952: { \
953: emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 2)), TRAMP); \
954: emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 18)), CXT); \
955: emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 22)), FNADDR); \
956: }
957:
958: /* This is the library routine that is used
959: to transfer control from the trampoline
960: to the actual nested function. */
961:
962: /* A colon is used with no explicit operands
963: to cause the template string to be scanned for %-constructs. */
964: /* The function name __transfer_from_trampoline is not actually used.
965: The function definition just permits use of "asm with operands"
966: (though the operand list is empty). */
967: #define TRANSFER_FROM_TRAMPOLINE \
968: void \
969: __transfer_from_trampoline () \
970: { \
971: register char *a0 asm ("%a0"); \
972: asm ("___trampoline:"); \
973: asm volatile ("mov%.l %0,%@" : : "m" (a0[22])); \
974: asm volatile ("mov%.l %1,%0" : "=a" (a0) : "m" (a0[18])); \
975: asm ("rts":); \
976: }
977:
978: /* Addressing modes, and classification of registers for them. */
979:
980: #define HAVE_POST_INCREMENT
981: /* #define HAVE_POST_DECREMENT */
982:
983: #define HAVE_PRE_DECREMENT
984: /* #define HAVE_PRE_INCREMENT */
985:
986: /* Macros to check register numbers against specific register classes. */
987:
988: /* These assume that REGNO is a hard or pseudo reg number.
989: They give nonzero only if REGNO is a hard reg of the suitable class
990: or a pseudo reg currently allocated to a suitable hard reg.
991: Since they use reg_renumber, they are safe only once reg_renumber
992: has been allocated, which happens in local-alloc.c. */
993:
994: #define REGNO_OK_FOR_INDEX_P(REGNO) \
995: ((REGNO) < 16 || (unsigned) reg_renumber[REGNO] < 16)
996: #define REGNO_OK_FOR_BASE_P(REGNO) \
997: (((REGNO) ^ 010) < 8 || (unsigned) (reg_renumber[REGNO] ^ 010) < 8)
998: #define REGNO_OK_FOR_DATA_P(REGNO) \
999: ((REGNO) < 8 || (unsigned) reg_renumber[REGNO] < 8)
1000: #define REGNO_OK_FOR_FP_P(REGNO) \
1001: (((REGNO) ^ 020) < 8 || (unsigned) (reg_renumber[REGNO] ^ 020) < 8)
1002: #ifdef SUPPORT_SUN_FPA
1003: #define REGNO_OK_FOR_FPA_P(REGNO) \
1004: (((REGNO) >= 24 && (REGNO) < 56) || (reg_renumber[REGNO] >= 24 && reg_renumber[REGNO] < 56))
1005: #endif
1006:
1007: /* Now macros that check whether X is a register and also,
1008: strictly, whether it is in a specified class.
1009:
1010: These macros are specific to the 68000, and may be used only
1011: in code for printing assembler insns and in conditions for
1012: define_optimization. */
1013:
1014: /* 1 if X is a data register. */
1015:
1016: #define DATA_REG_P(X) (REG_P (X) && REGNO_OK_FOR_DATA_P (REGNO (X)))
1017:
1018: /* 1 if X is an fp register. */
1019:
1020: #define FP_REG_P(X) (REG_P (X) && REGNO_OK_FOR_FP_P (REGNO (X)))
1021:
1022: /* 1 if X is an address register */
1023:
1024: #define ADDRESS_REG_P(X) (REG_P (X) && REGNO_OK_FOR_BASE_P (REGNO (X)))
1025:
1026: #ifdef SUPPORT_SUN_FPA
1027: /* 1 if X is a register in the Sun FPA. */
1028: #define FPA_REG_P(X) (REG_P (X) && REGNO_OK_FOR_FPA_P (REGNO (X)))
1029: #else
1030: /* Answer must be no if we don't have an FPA. */
1031: #define FPA_REG_P(X) 0
1032: #endif
1033:
1034: /* Maximum number of registers that can appear in a valid memory address. */
1035:
1036: #define MAX_REGS_PER_ADDRESS 2
1037:
1038: /* Recognize any constant value that is a valid address. */
1039:
1040: #define CONSTANT_ADDRESS_P(X) CONSTANT_P (X)
1041:
1042: /* Nonzero if the constant value X is a legitimate general operand.
1043: It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE. */
1044:
1045: #define LEGITIMATE_CONSTANT_P(X) 1
1046:
1047: /* Nonzero if the constant value X is a legitimate general operand
1048: when generating PIC code. It is given that flag_pic is on and
1049: that X satisfies CONSTANT_P or is a CONST_DOUBLE. */
1050:
1051: #define LEGITIMATE_PIC_OPERAND_P(X) \
1052: (! symbolic_operand (X, VOIDmode))
1053:
1054: /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
1055: and check its validity for a certain class.
1056: We have two alternate definitions for each of them.
1057: The usual definition accepts all pseudo regs; the other rejects
1058: them unless they have been allocated suitable hard regs.
1059: The symbol REG_OK_STRICT causes the latter definition to be used.
1060:
1061: Most source files want to accept pseudo regs in the hope that
1062: they will get allocated to the class that the insn wants them to be in.
1063: Source files for reload pass need to be strict.
1064: After reload, it makes no difference, since pseudo regs have
1065: been eliminated by then. */
1066:
1067: #ifndef REG_OK_STRICT
1068:
1069: /* Nonzero if X is a hard reg that can be used as an index
1070: or if it is a pseudo reg. */
1071: #define REG_OK_FOR_INDEX_P(X) ((REGNO (X) ^ 020) >= 8)
1072: /* Nonzero if X is a hard reg that can be used as a base reg
1073: or if it is a pseudo reg. */
1074: #define REG_OK_FOR_BASE_P(X) ((REGNO (X) & ~027) != 0)
1075:
1076: #else
1077:
1078: /* Nonzero if X is a hard reg that can be used as an index. */
1079: #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
1080: /* Nonzero if X is a hard reg that can be used as a base reg. */
1081: #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
1082:
1083: #endif
1084:
1085: /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
1086: that is a valid memory address for an instruction.
1087: The MODE argument is the machine mode for the MEM expression
1088: that wants to use this address.
1089:
1090: When generating PIC, an address involving a SYMBOL_REF is legitimate
1091: if and only if it is the sum of pic_offset_table_rtx and the SYMBOL_REF.
1092: We use LEGITIMATE_PIC_OPERAND_P to throw out the illegitimate addresses,
1093: and we explicitly check for the sum of pic_offset_table_rtx and a SYMBOL_REF.
1094:
1095: Likewise for a LABEL_REF when generating PIC.
1096:
1097: The other macros defined here are used only in GO_IF_LEGITIMATE_ADDRESS. */
1098:
1099: #define INDIRECTABLE_1_ADDRESS_P(X) \
1100: ((CONSTANT_ADDRESS_P (X) && (!flag_pic || LEGITIMATE_PIC_OPERAND_P (X))) \
1101: || (GET_CODE (X) == REG && REG_OK_FOR_BASE_P (X)) \
1102: || ((GET_CODE (X) == PRE_DEC || GET_CODE (X) == POST_INC) \
1103: && REG_P (XEXP (X, 0)) \
1104: && REG_OK_FOR_BASE_P (XEXP (X, 0))) \
1105: || (GET_CODE (X) == PLUS \
1106: && REG_P (XEXP (X, 0)) && REG_OK_FOR_BASE_P (XEXP (X, 0)) \
1107: && GET_CODE (XEXP (X, 1)) == CONST_INT \
1108: && ((unsigned) INTVAL (XEXP (X, 1)) + 0x8000) < 0x10000) \
1109: || (GET_CODE (X) == PLUS && XEXP (X, 0) == pic_offset_table_rtx \
1110: && flag_pic && GET_CODE (XEXP (X, 1)) == SYMBOL_REF) \
1111: || (GET_CODE (X) == PLUS && XEXP (X, 0) == pic_offset_table_rtx \
1112: && flag_pic && GET_CODE (XEXP (X, 1)) == LABEL_REF)) \
1113:
1114: #if 0
1115: /* This should replace the last two (non-pic) lines
1116: except that Sun's assembler does not seem to handle such operands. */
1117: && (TARGET_68020 ? CONSTANT_ADDRESS_P (XEXP (X, 1)) \
1118: : (GET_CODE (XEXP (X, 1)) == CONST_INT \
1119: && ((unsigned) INTVAL (XEXP (X, 1)) + 0x8000) < 0x10000))))
1120: #endif
1121:
1122:
1123: #define GO_IF_NONINDEXED_ADDRESS(X, ADDR) \
1124: { if (INDIRECTABLE_1_ADDRESS_P (X)) goto ADDR; }
1125:
1126: #define GO_IF_INDEXABLE_BASE(X, ADDR) \
1127: { if (GET_CODE (X) == LABEL_REF) goto ADDR; \
1128: if (GET_CODE (X) == REG && REG_OK_FOR_BASE_P (X)) goto ADDR; }
1129:
1130: #define GO_IF_INDEXING(X, ADDR) \
1131: { if (GET_CODE (X) == PLUS && LEGITIMATE_INDEX_P (XEXP (X, 0))) \
1132: { GO_IF_INDEXABLE_BASE (XEXP (X, 1), ADDR); } \
1133: if (GET_CODE (X) == PLUS && LEGITIMATE_INDEX_P (XEXP (X, 1))) \
1134: { GO_IF_INDEXABLE_BASE (XEXP (X, 0), ADDR); } }
1135:
1136: #define GO_IF_INDEXED_ADDRESS(X, ADDR) \
1137: { GO_IF_INDEXING (X, ADDR); \
1138: if (GET_CODE (X) == PLUS) \
1139: { if (GET_CODE (XEXP (X, 1)) == CONST_INT \
1140: && (unsigned) INTVAL (XEXP (X, 1)) + 0x80 < 0x100) \
1141: { rtx go_temp = XEXP (X, 0); GO_IF_INDEXING (go_temp, ADDR); } \
1142: if (GET_CODE (XEXP (X, 0)) == CONST_INT \
1143: && (unsigned) INTVAL (XEXP (X, 0)) + 0x80 < 0x100) \
1144: { rtx go_temp = XEXP (X, 1); GO_IF_INDEXING (go_temp, ADDR); } } }
1145:
1146: #define LEGITIMATE_INDEX_REG_P(X) \
1147: ((GET_CODE (X) == REG && REG_OK_FOR_INDEX_P (X)) \
1148: || (GET_CODE (X) == SIGN_EXTEND \
1149: && GET_CODE (XEXP (X, 0)) == REG \
1150: && GET_MODE (XEXP (X, 0)) == HImode \
1151: && REG_OK_FOR_INDEX_P (XEXP (X, 0))))
1152:
1153: #define LEGITIMATE_INDEX_P(X) \
1154: (LEGITIMATE_INDEX_REG_P (X) \
1155: || (TARGET_68020 && GET_CODE (X) == MULT \
1156: && LEGITIMATE_INDEX_REG_P (XEXP (X, 0)) \
1157: && GET_CODE (XEXP (X, 1)) == CONST_INT \
1158: && (INTVAL (XEXP (X, 1)) == 2 \
1159: || INTVAL (XEXP (X, 1)) == 4 \
1160: || INTVAL (XEXP (X, 1)) == 8)))
1161:
1162: #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
1163: { GO_IF_NONINDEXED_ADDRESS (X, ADDR); \
1164: GO_IF_INDEXED_ADDRESS (X, ADDR); }
1165:
1166: /* Try machine-dependent ways of modifying an illegitimate address
1167: to be legitimate. If we find one, return the new, valid address.
1168: This macro is used in only one place: `memory_address' in explow.c.
1169:
1170: OLDX is the address as it was before break_out_memory_refs was called.
1171: In some cases it is useful to look at this to decide what needs to be done.
1172:
1173: MODE and WIN are passed so that this macro can use
1174: GO_IF_LEGITIMATE_ADDRESS.
1175:
1176: It is always safe for this macro to do nothing. It exists to recognize
1177: opportunities to optimize the output.
1178:
1179: For the 68000, we handle X+REG by loading X into a register R and
1180: using R+REG. R will go in an address reg and indexing will be used.
1181: However, if REG is a broken-out memory address or multiplication,
1182: nothing needs to be done because REG can certainly go in an address reg. */
1183:
1184: #define COPY_ONCE(Y) if (!copied) { Y = copy_rtx (Y); copied = ch = 1; }
1185: #define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) \
1186: { register int ch = (X) != (OLDX); \
1187: if (GET_CODE (X) == PLUS) \
1188: { int copied = 0; \
1189: if (GET_CODE (XEXP (X, 0)) == MULT) \
1190: { COPY_ONCE (X); XEXP (X, 0) = force_operand (XEXP (X, 0), 0);} \
1191: if (GET_CODE (XEXP (X, 1)) == MULT) \
1192: { COPY_ONCE (X); XEXP (X, 1) = force_operand (XEXP (X, 1), 0);} \
1193: if (ch && GET_CODE (XEXP (X, 1)) == REG \
1194: && GET_CODE (XEXP (X, 0)) == REG) \
1195: goto WIN; \
1196: if (ch) { GO_IF_LEGITIMATE_ADDRESS (MODE, X, WIN); } \
1197: if (GET_CODE (XEXP (X, 0)) == REG \
1198: || (GET_CODE (XEXP (X, 0)) == SIGN_EXTEND \
1199: && GET_CODE (XEXP (XEXP (X, 0), 0)) == REG \
1200: && GET_MODE (XEXP (XEXP (X, 0), 0)) == HImode)) \
1201: { register rtx temp = gen_reg_rtx (Pmode); \
1202: register rtx val = force_operand (XEXP (X, 1), 0); \
1203: emit_move_insn (temp, val); \
1204: COPY_ONCE (X); \
1205: XEXP (X, 1) = temp; \
1206: goto WIN; } \
1207: else if (GET_CODE (XEXP (X, 1)) == REG \
1208: || (GET_CODE (XEXP (X, 1)) == SIGN_EXTEND \
1209: && GET_CODE (XEXP (XEXP (X, 1), 0)) == REG \
1210: && GET_MODE (XEXP (XEXP (X, 1), 0)) == HImode)) \
1211: { register rtx temp = gen_reg_rtx (Pmode); \
1212: register rtx val = force_operand (XEXP (X, 0), 0); \
1213: emit_move_insn (temp, val); \
1214: COPY_ONCE (X); \
1215: XEXP (X, 0) = temp; \
1216: goto WIN; }}}
1217:
1218: /* Go to LABEL if ADDR (a legitimate address expression)
1219: has an effect that depends on the machine mode it is used for.
1220: On the 68000, only predecrement and postincrement address depend thus
1221: (the amount of decrement or increment being the length of the operand). */
1222:
1223: #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) \
1224: if (GET_CODE (ADDR) == POST_INC || GET_CODE (ADDR) == PRE_DEC) goto LABEL
1225:
1226: /* Specify the machine mode that this machine uses
1227: for the index in the tablejump instruction. */
1228: #define CASE_VECTOR_MODE HImode
1229:
1230: /* Define this if the tablejump instruction expects the table
1231: to contain offsets from the address of the table.
1232: Do not define this if the table should contain absolute addresses. */
1233: #define CASE_VECTOR_PC_RELATIVE
1234:
1235: /* Specify the tree operation to be used to convert reals to integers. */
1236: #define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR
1237:
1238: /* This is the kind of divide that is easiest to do in the general case. */
1239: #define EASY_DIV_EXPR TRUNC_DIV_EXPR
1240:
1241: /* Define this as 1 if `char' should by default be signed; else as 0. */
1242: #define DEFAULT_SIGNED_CHAR 1
1243:
1244: /* Don't cse the address of the function being compiled. */
1245: #define NO_RECURSIVE_FUNCTION_CSE
1246:
1247: /* Max number of bytes we can move from memory to memory
1248: in one reasonably fast instruction. */
1249: #define MOVE_MAX 4
1250:
1251: /* Define this if zero-extension is slow (more than one real instruction). */
1252: #define SLOW_ZERO_EXTEND
1253:
1254: /* Nonzero if access to memory by bytes is slow and undesirable. */
1255: #define SLOW_BYTE_ACCESS 0
1256:
1257: /* Define if shifts truncate the shift count
1258: which implies one can omit a sign-extension or zero-extension
1259: of a shift count. */
1260: #define SHIFT_COUNT_TRUNCATED
1261:
1262: /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
1263: is done just by pretending it is already truncated. */
1264: #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
1265:
1266: /* We assume that the store-condition-codes instructions store 0 for false
1267: and some other value for true. This is the value stored for true. */
1268:
1269: #define STORE_FLAG_VALUE -1
1270:
1271: /* When a prototype says `char' or `short', really pass an `int'. */
1272: #define PROMOTE_PROTOTYPES
1273:
1274: /* Specify the machine mode that pointers have.
1275: After generation of rtl, the compiler makes no further distinction
1276: between pointers and any other objects of this machine mode. */
1277: #define Pmode SImode
1278:
1279: /* A function address in a call instruction
1280: is a byte address (for indexing purposes)
1281: so give the MEM rtx a byte's mode. */
1282: #define FUNCTION_MODE QImode
1283:
1284: /* Compute the cost of computing a constant rtl expression RTX
1285: whose rtx-code is CODE. The body of this macro is a portion
1286: of a switch statement. If the code is computed here,
1287: return it with a return statement. Otherwise, break from the switch. */
1288:
1289: #define CONST_COSTS(RTX,CODE) \
1290: case CONST_INT: \
1291: /* Constant zero is super cheap due to clr instruction. */ \
1292: if (RTX == const0_rtx) return 0; \
1293: /* Constants between -128 and 127 are cheap due to moveq */ \
1294: if (INTVAL (RTX) >= -128 && INTVAL (RTX) <= 127) return 1; \
1295: /* Constants between -136 and 254 are easily generated */ \
1296: /* by intelligent uses of moveq, add[q], and subq */ \
1297: if (INTVAL (RTX) >= -136 && INTVAL (RTX) <= 254) return 2; \
1298: case CONST: \
1299: case LABEL_REF: \
1300: case SYMBOL_REF: \
1301: return 3; \
1302: case CONST_DOUBLE: \
1303: return 5;
1304:
1305: /* Compute the cost of various arithmetic operations.
1306: These are vaguely right for a 68020. */
1307: /* The costs for long multiply have been adjusted to
1308: work properly in synth_mult on the 68020,
1309: relative to an average of the time for add and the time for shift,
1310: taking away a little more because sometimes move insns are needed. */
1311:
1312: #define RTX_COSTS(X,CODE) \
1313: case PLUS: \
1314: /* An lea costs about three times as much as a simple add. */ \
1315: if (GET_MODE (X) == SImode \
1316: && GET_CODE (XEXP (X, 0)) == REG \
1317: && GET_CODE (XEXP (X, 1)) == MULT \
1318: && GET_CODE (XEXP (XEXP (X, 1), 0)) == REG \
1319: && GET_CODE (XEXP (XEXP (X, 1), 1)) == CONST_INT \
1320: && (INTVAL (XEXP (XEXP (X, 1), 1)) == 2 \
1321: || INTVAL (XEXP (XEXP (X, 1), 1)) == 4 \
1322: || INTVAL (XEXP (XEXP (X, 1), 1)) == 8)) \
1323: return COSTS_N_INSNS (3); /* lea an@(dx:l:i),am */ \
1324: break; \
1325: case ASHIFT: \
1326: case ASHIFTRT: \
1327: case LSHIFT: \
1328: case LSHIFTRT: \
1329: /* A shift by a big integer takes an extra instruction. */ \
1330: if (GET_CODE (XEXP (X, 1)) == CONST_INT \
1331: && !(INTVAL (XEXP (X, 1)) > 0 \
1332: && INTVAL (XEXP (X, 1)) <= 8)) \
1333: return COSTS_N_INSNS (3); /* lsr #i,dn */ \
1334: break; \
1335: case MULT: \
1336: if (GET_CODE (XEXP (x, 1)) == CONST_INT \
1337: && exact_log2 (INTVAL (XEXP (x, 1))) >= 0) \
1338: total = 2; \
1339: else if (GET_MODE (X) == QImode || GET_MODE (X) == HImode) \
1340: return COSTS_N_INSNS (8); /* mul.w */ \
1341: else \
1342: return COSTS_N_INSNS (13); /* mul.l */ \
1343: break; \
1344: case DIV: \
1345: case UDIV: \
1346: case MOD: \
1347: case UMOD: \
1348: if (GET_MODE (X) == QImode || GET_MODE (X) == HImode) \
1349: return COSTS_N_INSNS (27); /* div.w */ \
1350: return COSTS_N_INSNS (43); /* div.l */
1351:
1352: /* Tell final.c how to eliminate redundant test instructions. */
1353:
1354: /* Here we define machine-dependent flags and fields in cc_status
1355: (see `conditions.h'). */
1356:
1357: /* Set if the cc value is actually in the 68881, so a floating point
1358: conditional branch must be output. */
1359: #define CC_IN_68881 04000
1360:
1361: /* Store in cc_status the expressions that the condition codes will
1362: describe after execution of an instruction whose pattern is EXP.
1363: Do not alter them if the instruction would not alter the cc's. */
1364:
1365: /* On the 68000, all the insns to store in an address register fail to
1366: set the cc's. However, in some cases these instructions can make it
1367: possibly invalid to use the saved cc's. In those cases we clear out
1368: some or all of the saved cc's so they won't be used. */
1369:
1370: #define NOTICE_UPDATE_CC(EXP,INSN) notice_update_cc (EXP, INSN)
1371:
1372: #define OUTPUT_JUMP(NORMAL, FLOAT, NO_OV) \
1373: { if (cc_prev_status.flags & CC_IN_68881) \
1374: return FLOAT; \
1375: if (cc_prev_status.flags & CC_NO_OVERFLOW) \
1376: return NO_OV; \
1377: return NORMAL; }
1378:
1379: /* Control the assembler format that we output. */
1380:
1381: /* Output at beginning of assembler file. */
1382:
1383: #define ASM_FILE_START(FILE) \
1384: fprintf (FILE, "#NO_APP\n");
1385:
1386: /* Output to assembler file text saying following lines
1387: may contain character constants, extra white space, comments, etc. */
1388:
1389: #define ASM_APP_ON "#APP\n"
1390:
1391: /* Output to assembler file text saying following lines
1392: no longer contain unusual constructs. */
1393:
1394: #define ASM_APP_OFF "#NO_APP\n"
1395:
1396: /* Output before read-only data. */
1397:
1398: #define TEXT_SECTION_ASM_OP ".text"
1399:
1400: /* Output before writable data. */
1401:
1402: #define DATA_SECTION_ASM_OP ".data"
1403:
1404: /* Here are four prefixes that are used by asm_fprintf to
1405: facilitate customization for alternate assembler syntaxes.
1406: Machines with no likelihood of an alternate syntax need not
1407: define these and need not use asm_fprintf. */
1408:
1409: /* The prefix for register names. Note that REGISTER_NAMES
1410: is supposed to include this prefix. */
1411:
1412: #define REGISTER_PREFIX ""
1413:
1414: /* The prefix for local labels. You should be able to define this as
1415: an empty string, or any arbitrary string (such as ".", ".L%", etc)
1416: without having to make any other changes to account for the specific
1417: definition. Note it is a string literal, not interpreted by printf
1418: and friends. */
1419:
1420: #define LOCAL_LABEL_PREFIX ""
1421:
1422: /* The prefix to add to user-visible assembler symbols. */
1423:
1424: #define USER_LABEL_PREFIX "_"
1425:
1426: /* The prefix for immediate operands. */
1427:
1428: #define IMMEDIATE_PREFIX "#"
1429:
1430: /* How to refer to registers in assembler output.
1431: This sequence is indexed by compiler's hard-register-number (see above). */
1432:
1433: #ifndef SUPPORT_SUN_FPA
1434:
1435: #define REGISTER_NAMES \
1436: {"d0", "d1", "d2", "d3", "d4", "d5", "d6", "d7", \
1437: "a0", "a1", "a2", "a3", "a4", "a5", "a6", "sp", \
1438: "fp0", "fp1", "fp2", "fp3", "fp4", "fp5", "fp6", "fp7" }
1439:
1440: #else /* SUPPORTED_SUN_FPA */
1441:
1442: #define REGISTER_NAMES \
1443: {"d0", "d1", "d2", "d3", "d4", "d5", "d6", "d7", \
1444: "a0", "a1", "a2", "a3", "a4", "a5", "a6", "sp", \
1445: "fp0", "fp1", "fp2", "fp3", "fp4", "fp5", "fp6", "fp7", \
1446: "fpa0", "fpa1", "fpa2", "fpa3", "fpa4", "fpa5", "fpa6", "fpa7", \
1447: "fpa8", "fpa9", "fpa10", "fpa11", "fpa12", "fpa13", "fpa14", "fpa15", \
1448: "fpa16", "fpa17", "fpa18", "fpa19", "fpa20", "fpa21", "fpa22", "fpa23", \
1449: "fpa24", "fpa25", "fpa26", "fpa27", "fpa28", "fpa29", "fpa30", "fpa31" }
1450:
1451: #endif /* defined SUPPORT_SUN_FPA */
1452:
1453: /* How to renumber registers for dbx and gdb.
1454: On the Sun-3, the floating point registers have numbers
1455: 18 to 25, not 16 to 23 as they do in the compiler. */
1456:
1457: #define DBX_REGISTER_NUMBER(REGNO) ((REGNO) < 16 ? (REGNO) : (REGNO) + 2)
1458:
1459: /* This is how to output the definition of a user-level label named NAME,
1460: such as the label on a static function or variable NAME. */
1461:
1462: #define ASM_OUTPUT_LABEL(FILE,NAME) \
1463: do { assemble_name (FILE, NAME); fputs (":\n", FILE); } while (0)
1464:
1465: /* This is how to output a command to make the user-level label named NAME
1466: defined for reference from other files. */
1467:
1468: #define ASM_GLOBALIZE_LABEL(FILE,NAME) \
1469: do { fputs (".globl ", FILE); assemble_name (FILE, NAME); fputs ("\n", FILE);} while (0)
1470:
1471: /* This is how to output a reference to a user-level label named NAME.
1472: `assemble_name' uses this. */
1473:
1474: #define ASM_OUTPUT_LABELREF(FILE,NAME) \
1475: asm_fprintf (FILE, "%U%s", NAME)
1476:
1477: /* This is how to output an internal numbered label where
1478: PREFIX is the class of label and NUM is the number within the class. */
1479:
1480: #define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \
1481: asm_fprintf (FILE, "%L%s%d:\n", PREFIX, NUM)
1482:
1483: /* This is how to store into the string LABEL
1484: the symbol_ref name of an internal numbered label where
1485: PREFIX is the class of label and NUM is the number within the class.
1486: This is suitable for output with `assemble_name'. */
1487:
1488: #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \
1489: sprintf (LABEL, "*%s%s%d", LOCAL_LABEL_PREFIX, PREFIX, NUM)
1490:
1491: /* This is how to output an assembler line defining a `double' constant. */
1492:
1493: #define ASM_OUTPUT_DOUBLE(FILE,VALUE) \
1494: fprintf (FILE, "\t.double 0r%.20g\n", (VALUE))
1495:
1496: /* This is how to output an assembler line defining a `float' constant. */
1497:
1498: /* Sun's assembler can't handle floating constants written as floating.
1499: However, when cross-compiling, always use that in case format differs. */
1500:
1501: #ifdef CROSS_COMPILE
1502:
1503: #define ASM_OUTPUT_FLOAT(FILE,VALUE) \
1504: fprintf (FILE, "\t.float 0r%.10g\n", (VALUE))
1505:
1506: #else
1507:
1508: #define ASM_OUTPUT_FLOAT(FILE,VALUE) \
1509: do { union { float f; long l;} tem; \
1510: tem.f = (VALUE); \
1511: fprintf (FILE, "\t.long 0x%x\n", tem.l); \
1512: } while (0)
1513:
1514: #endif /* not CROSS_COMPILER */
1515:
1516: /* This is how to output an assembler line defining an `int' constant. */
1517:
1518: #define ASM_OUTPUT_INT(FILE,VALUE) \
1519: ( fprintf (FILE, "\t.long "), \
1520: output_addr_const (FILE, (VALUE)), \
1521: fprintf (FILE, "\n"))
1522:
1523: /* Likewise for `char' and `short' constants. */
1524:
1525: #define ASM_OUTPUT_SHORT(FILE,VALUE) \
1526: ( fprintf (FILE, "\t.word "), \
1527: output_addr_const (FILE, (VALUE)), \
1528: fprintf (FILE, "\n"))
1529:
1530: #define ASM_OUTPUT_CHAR(FILE,VALUE) \
1531: ( fprintf (FILE, "\t.byte "), \
1532: output_addr_const (FILE, (VALUE)), \
1533: fprintf (FILE, "\n"))
1534:
1535: /* This is how to output an assembler line for a numeric constant byte. */
1536:
1537: #define ASM_OUTPUT_BYTE(FILE,VALUE) \
1538: fprintf (FILE, "\t.byte 0x%x\n", (VALUE))
1539:
1540: /* This is how to output an insn to push a register on the stack.
1541: It need not be very fast code. */
1542:
1543: #define ASM_OUTPUT_REG_PUSH(FILE,REGNO) \
1544: asm_fprintf (FILE, "\tmovel %s,%Rsp@-\n", reg_names[REGNO])
1545:
1546: /* This is how to output an insn to pop a register from the stack.
1547: It need not be very fast code. */
1548:
1549: #define ASM_OUTPUT_REG_POP(FILE,REGNO) \
1550: asm_fprintf (FILE, "\tmovel %Rsp@+,%s\n", reg_names[REGNO])
1551:
1552: /* This is how to output an element of a case-vector that is absolute.
1553: (The 68000 does not use such vectors,
1554: but we must define this macro anyway.) */
1555:
1556: #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
1557: asm_fprintf (FILE, "\t.long %LL%d\n", VALUE)
1558:
1559: /* This is how to output an element of a case-vector that is relative. */
1560:
1561: #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, VALUE, REL) \
1562: asm_fprintf (FILE, "\t.word %LL%d-%LL%d\n", VALUE, REL)
1563:
1564: /* This is how to output an assembler line
1565: that says to advance the location counter
1566: to a multiple of 2**LOG bytes. */
1567:
1568: #define ASM_OUTPUT_ALIGN(FILE,LOG) \
1569: if ((LOG) == 1) \
1570: fprintf (FILE, "\t.even\n"); \
1571: else if ((LOG) != 0) \
1572: abort ();
1573:
1574: #define ASM_OUTPUT_SKIP(FILE,SIZE) \
1575: fprintf (FILE, "\t.skip %u\n", (SIZE))
1576:
1577: /* This says how to output an assembler line
1578: to define a global common symbol. */
1579:
1580: #define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \
1581: ( fputs (".comm ", (FILE)), \
1582: assemble_name ((FILE), (NAME)), \
1583: fprintf ((FILE), ",%u\n", (ROUNDED)))
1584:
1585: /* This says how to output an assembler line
1586: to define a local common symbol. */
1587:
1588: #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE, ROUNDED) \
1589: ( fputs (".lcomm ", (FILE)), \
1590: assemble_name ((FILE), (NAME)), \
1591: fprintf ((FILE), ",%u\n", (ROUNDED)))
1592:
1593: /* Store in OUTPUT a string (made with alloca) containing
1594: an assembler-name for a local static variable named NAME.
1595: LABELNO is an integer which is different for each call. */
1596:
1597: #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \
1598: ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \
1599: sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO)))
1600:
1601: /* Define the parentheses used to group arithmetic operations
1602: in assembler code. */
1603:
1604: #define ASM_OPEN_PAREN "("
1605: #define ASM_CLOSE_PAREN ")"
1606:
1607: /* Define results of standard character escape sequences. */
1608: #define TARGET_BELL 007
1609: #define TARGET_BS 010
1610: #define TARGET_TAB 011
1611: #define TARGET_NEWLINE 012
1612: #define TARGET_VT 013
1613: #define TARGET_FF 014
1614: #define TARGET_CR 015
1615:
1616: /* Output a float value (represented as a C double) as an immediate operand.
1617: This macro is a 68k-specific macro. */
1618: #define ASM_OUTPUT_FLOAT_OPERAND(FILE,VALUE) \
1619: asm_fprintf (FILE, "%I0r%.9g", (VALUE))
1620:
1621: /* Output a double value (represented as a C double) as an immediate operand.
1622: This macro is a 68k-specific macro. */
1623: #define ASM_OUTPUT_DOUBLE_OPERAND(FILE,VALUE) \
1624: asm_fprintf (FILE, "%I0r%.20g", (VALUE))
1625:
1626: /* Print operand X (an rtx) in assembler syntax to file FILE.
1627: CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
1628: For `%' followed by punctuation, CODE is the punctuation and X is null.
1629:
1630: On the 68000, we use several CODE characters:
1631: '.' for dot needed in Motorola-style opcode names.
1632: '-' for an operand pushing on the stack:
1633: sp@-, -(sp) or -(%sp) depending on the style of syntax.
1634: '+' for an operand pushing on the stack:
1635: sp@+, (sp)+ or (%sp)+ depending on the style of syntax.
1636: '@' for a reference to the top word on the stack:
1637: sp@, (sp) or (%sp) depending on the style of syntax.
1638: '#' for an immediate operand prefix (# in MIT and Motorola syntax
1639: but & in SGS syntax).
1640: '!' for the cc register (used in an `and to cc' insn).
1641: '$' for the letter `s' in an op code, but only on the 68040.
1642: '&' for the letter `d' in an op code, but only on the 68040.
1643:
1644: 'b' for byte insn (no effect, on the Sun; this is for the ISI).
1645: 'd' to force memory addressing to be absolute, not relative.
1646: 'f' for float insn (print a CONST_DOUBLE as a float rather than in hex)
1647: 'w' for FPA insn (print a CONST_DOUBLE as a SunFPA constant rather
1648: than directly). Second part of 'y' below.
1649: 'x' for float insn (print a CONST_DOUBLE as a float rather than in hex),
1650: or print pair of registers as rx:ry.
1651: 'y' for a FPA insn (print pair of registers as rx:ry). This also outputs
1652: CONST_DOUBLE's as SunFPA constant RAM registers if
1653: possible, so it should not be used except for the SunFPA. */
1654:
1655: #define PRINT_OPERAND_PUNCT_VALID_P(CODE) \
1656: ((CODE) == '.' || (CODE) == '#' || (CODE) == '-' \
1657: || (CODE) == '+' || (CODE) == '@' || (CODE) == '!' \
1658: || (CODE) == '$' || (CODE) == '&')
1659:
1660: #ifdef HOST_WORDS_BIG_ENDIAN
1661: #define PRINT_OPERAND_EXTRACT_FLOAT(X) \
1662: u.i[0] = CONST_DOUBLE_LOW (X); u.i[1] = CONST_DOUBLE_HIGH (X);
1663: #else
1664: #define PRINT_OPERAND_EXTRACT_FLOAT(X) \
1665: u.i[0] = CONST_DOUBLE_HIGH (X); u.i[1] = CONST_DOUBLE_LOW (X);
1666: #endif
1667:
1668: #ifdef CROSS_COMPILER
1669: #define PRINT_OPERAND_PRINT_FLOAT(CODE, FILE) \
1670: ASM_OUTPUT_FLOAT_OPERAND (FILE, u1.f);
1671: #else
1672: #define PRINT_OPERAND_PRINT_FLOAT(CODE, FILE) \
1673: { if (CODE == 'f') \
1674: ASM_OUTPUT_FLOAT_OPERAND (FILE, u1.f); \
1675: else \
1676: asm_fprintf (FILE, "%I0x%x", u1.i); }
1677: #endif
1678:
1679: /* A C compound statement to output to stdio stream STREAM the
1680: assembler syntax for an instruction operand X. X is an RTL
1681: expression.
1682:
1683: CODE is a value that can be used to specify one of several ways
1684: of printing the operand. It is used when identical operands
1685: must be printed differently depending on the context. CODE
1686: comes from the `%' specification that was used to request
1687: printing of the operand. If the specification was just `%DIGIT'
1688: then CODE is 0; if the specification was `%LTR DIGIT' then CODE
1689: is the ASCII code for LTR.
1690:
1691: If X is a register, this macro should print the register's name.
1692: The names can be found in an array `reg_names' whose type is
1693: `char *[]'. `reg_names' is initialized from `REGISTER_NAMES'.
1694:
1695: When the machine description has a specification `%PUNCT' (a `%'
1696: followed by a punctuation character), this macro is called with
1697: a null pointer for X and the punctuation character for CODE.
1698:
1699: See m68k.c for the m68k specific codes. */
1700:
1701: #define PRINT_OPERAND(FILE, X, CODE) print_operand (FILE, X, CODE)
1702:
1703: /* A C compound statement to output to stdio stream STREAM the
1704: assembler syntax for an instruction operand that is a memory
1705: reference whose address is ADDR. ADDR is an RTL expression.
1706:
1707: On some machines, the syntax for a symbolic address depends on
1708: the section that the address refers to. On these machines,
1709: define the macro `ENCODE_SECTION_INFO' to store the information
1710: into the `symbol_ref', and then check for it here. */
1711:
1712: #define PRINT_OPERAND_ADDRESS(FILE, ADDR) print_operand_address (FILE, ADDR)
1713:
1714:
1715: /* Define functions defined in aux-output.c and used in templates. */
1716:
1717: extern char *output_move_double ();
1718: extern char *output_move_const_single ();
1719: extern char *output_move_const_double ();
1720: extern char *output_btst ();
1721:
1722: /*
1723: Local variables:
1724: version-control: t
1725: End:
1726: */
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