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1.1 root 1: /* Definitions of target machine for GNU compiler. Sun 68000/68020 version.
2: Copyright (C) 1987, 1988, 1993 Free Software Foundation, Inc.
3:
4: This file is part of GNU CC.
5:
6: GNU CC is free software; you can redistribute it and/or modify
7: it under the terms of the GNU General Public License as published by
8: the Free Software Foundation; either version 2, or (at your option)
9: any later version.
10:
11: GNU CC is distributed in the hope that it will be useful,
12: but WITHOUT ANY WARRANTY; without even the implied warranty of
13: MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14: GNU General Public License for more details.
15:
16: You should have received a copy of the GNU General Public License
17: along with GNU CC; see the file COPYING. If not, write to
18: the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
19:
20:
21: /* Note that some other tm.h files include this one and then override
22: many of the definitions that relate to assembler syntax. */
23:
24:
25: /* Names to predefine in the preprocessor for this target machine. */
26:
27: /* See sun3.h, sun2.h, isi.h for different CPP_PREDEFINES. */
28:
29: /* Print subsidiary information on the compiler version in use. */
30: #ifdef MOTOROLA
31: #define TARGET_VERSION fprintf (stderr, " (68k, Motorola syntax)");
32: #else
33: #define TARGET_VERSION fprintf (stderr, " (68k, MIT syntax)");
34: #endif
35:
36: /* Define SUPPORT_SUN_FPA to include support for generating code for
37: the Sun Floating Point Accelerator, an optional product for Sun 3
38: machines. By default, it is not defined. Avoid defining it unless
39: you need to output code for the Sun3+FPA architecture, as it has the
40: effect of slowing down the register set operations in hard-reg-set.h
41: (total number of registers will exceed number of bits in a long,
42: if defined, causing the set operations to expand to loops).
43: SUPPORT_SUN_FPA is typically defined in sun3.h. */
44:
45: /* Run-time compilation parameters selecting different hardware subsets. */
46:
47: extern int target_flags;
48:
49: /* Macros used in the machine description to test the flags. */
50:
51: /* Compile for a 68020 (not a 68000 or 68010). */
52: #define TARGET_68020 (target_flags & 1)
53:
54: /* Compile 68881 insns for floating point (not library calls). */
55: #define TARGET_68881 (target_flags & 2)
56:
57: /* Compile using 68020 bitfield insns. */
58: #define TARGET_BITFIELD (target_flags & 4)
59:
60: /* Compile using rtd insn calling sequence.
61: This will not work unless you use prototypes at least
62: for all functions that can take varying numbers of args. */
63: #define TARGET_RTD (target_flags & 8)
64:
65: /* Compile passing first two args in regs 0 and 1.
66: This exists only to test compiler features that will
67: be needed for RISC chips. It is not usable
68: and is not intended to be usable on this cpu. */
69: #define TARGET_REGPARM (target_flags & 020)
70:
71: /* Compile with 16-bit `int'. */
72: #define TARGET_SHORT (target_flags & 040)
73:
74: /* Compile with special insns for Sun FPA. */
75: #ifdef SUPPORT_SUN_FPA
76: #define TARGET_FPA (target_flags & 0100)
77: #else
78: #define TARGET_FPA 0
79: #endif
80:
81: /* Compile (actually, link) for Sun SKY board. */
82: #define TARGET_SKY (target_flags & 0200)
83:
84: /* Optimize for 68040, but still allow execution on 68020
85: (-m68020-40 or -m68040).
86: The 68040 will execute all 68030 and 68881/2 instructions, but some
87: of them must be emulated in software by the OS. When TARGET_68040 is
88: turned on, these instructions won't be used. This code will still
89: run on a 68030 and 68881/2. */
90: #define TARGET_68040 (target_flags & 01400)
91:
92: /* Use the 68040-only fp instructions (-m68040). */
93: #define TARGET_68040_ONLY (target_flags & 01000)
94:
95: /* Macro to define tables used to set the flags.
96: This is a list in braces of pairs in braces,
97: each pair being { "NAME", VALUE }
98: where VALUE is the bits to set or minus the bits to clear.
99: An empty string NAME is used to identify the default VALUE. */
100:
101: #define TARGET_SWITCHES \
102: { { "68020", -01400}, \
103: { "c68020", -01400}, \
104: { "68020", 5}, \
105: { "c68020", 5}, \
106: { "68881", 2}, \
107: { "bitfield", 4}, \
108: { "68000", -01405}, \
109: { "c68000", -01405}, \
110: { "soft-float", -01102}, \
111: { "nobitfield", -4}, \
112: { "rtd", 8}, \
113: { "nortd", -8}, \
114: { "short", 040}, \
115: { "noshort", -040}, \
116: { "fpa", 0100}, \
117: { "nofpa", -0100}, \
118: { "sky", 0200}, \
119: { "nosky", -0200}, \
120: { "68020-40", 0407}, \
121: { "68030", -01400}, \
122: { "68030", 5}, \
123: { "68040", 01007}, \
124: { "", TARGET_DEFAULT}}
125: /* TARGET_DEFAULT is defined in sun*.h and isi.h, etc. */
126:
127: #ifdef SUPPORT_SUN_FPA
128: /* Blow away 68881 flag silently on TARGET_FPA (since we can't clear
129: any bits in TARGET_SWITCHES above) */
130: #define OVERRIDE_OPTIONS \
131: { \
132: if (TARGET_FPA) target_flags &= ~2; \
133: if (! TARGET_68020 && flag_pic == 2) \
134: error("-fPIC is not currently supported on the 68000 or 68010\n"); \
135: }
136: #else
137: #define OVERRIDE_OPTIONS \
138: { \
139: if (! TARGET_68020 && flag_pic == 2) \
140: error("-fPIC is not currently supported on the 68000 or 68010\n"); \
141: }
142: #endif /* defined SUPPORT_SUN_FPA */
143:
144: /* target machine storage layout */
145:
146: /* Define for XFmode extended real floating point support.
147: This will automatically cause REAL_ARITHMETIC to be defined. */
148: #define LONG_DOUBLE_TYPE_SIZE 96
149:
150: /* Define if you don't want extended real, but do want to use the
151: software floating point emulator for REAL_ARITHMETIC and
152: decimal <-> binary conversion. */
153: /* #define REAL_ARITHMETIC */
154:
155: /* Define this if most significant bit is lowest numbered
156: in instructions that operate on numbered bit-fields.
157: This is true for 68020 insns such as bfins and bfexts.
158: We make it true always by avoiding using the single-bit insns
159: except in special cases with constant bit numbers. */
160: #define BITS_BIG_ENDIAN 1
161:
162: /* Define this if most significant byte of a word is the lowest numbered. */
163: /* That is true on the 68000. */
164: #define BYTES_BIG_ENDIAN 1
165:
166: /* Define this if most significant word of a multiword number is the lowest
167: numbered. */
168: /* For 68000 we can decide arbitrarily
169: since there are no machine instructions for them.
170: So let's be consistent. */
171: #define WORDS_BIG_ENDIAN 1
172:
173: /* number of bits in an addressable storage unit */
174: #define BITS_PER_UNIT 8
175:
176: /* Width in bits of a "word", which is the contents of a machine register.
177: Note that this is not necessarily the width of data type `int';
178: if using 16-bit ints on a 68000, this would still be 32.
179: But on a machine with 16-bit registers, this would be 16. */
180: #define BITS_PER_WORD 32
181:
182: /* Width of a word, in units (bytes). */
183: #define UNITS_PER_WORD 4
184:
185: /* Width in bits of a pointer.
186: See also the macro `Pmode' defined below. */
187: #define POINTER_SIZE 32
188:
189: /* Allocation boundary (in *bits*) for storing arguments in argument list. */
190: #define PARM_BOUNDARY (TARGET_SHORT ? 16 : 32)
191:
192: /* Boundary (in *bits*) on which stack pointer should be aligned. */
193: #define STACK_BOUNDARY 16
194:
195: /* Allocation boundary (in *bits*) for the code of a function. */
196: #define FUNCTION_BOUNDARY 16
197:
198: /* Alignment of field after `int : 0' in a structure. */
199: #define EMPTY_FIELD_BOUNDARY 16
200:
201: /* No data type wants to be aligned rounder than this. */
202: #define BIGGEST_ALIGNMENT 16
203:
204: /* Set this nonzero if move instructions will actually fail to work
205: when given unaligned data. */
206: #define STRICT_ALIGNMENT 1
207:
208: #define SELECT_RTX_SECTION(MODE, X) \
209: { \
210: if (!flag_pic) \
211: readonly_data_section(); \
212: else if (LEGITIMATE_PIC_OPERAND_P (X)) \
213: readonly_data_section(); \
214: else \
215: data_section(); \
216: }
217:
218: /* Define number of bits in most basic integer type.
219: (If undefined, default is BITS_PER_WORD). */
220:
221: #define INT_TYPE_SIZE (TARGET_SHORT ? 16 : 32)
222:
223: /* Define these to avoid dependence on meaning of `int'.
224: Note that WCHAR_TYPE_SIZE is used in cexp.y,
225: where TARGET_SHORT is not available. */
226:
227: #define WCHAR_TYPE "long int"
228: #define WCHAR_TYPE_SIZE 32
229:
230: /* Standard register usage. */
231:
232: /* Number of actual hardware registers.
233: The hardware registers are assigned numbers for the compiler
234: from 0 to just below FIRST_PSEUDO_REGISTER.
235: All registers that the compiler knows about must be given numbers,
236: even those that are not normally considered general registers.
237: For the 68000, we give the data registers numbers 0-7,
238: the address registers numbers 010-017,
239: and the 68881 floating point registers numbers 020-027. */
240: #ifndef SUPPORT_SUN_FPA
241: #define FIRST_PSEUDO_REGISTER 24
242: #else
243: #define FIRST_PSEUDO_REGISTER 56
244: #endif
245:
246: /* This defines the register which is used to hold the offset table for PIC. */
247: #define PIC_OFFSET_TABLE_REGNUM 13
248:
249: /* Used to output a (use pic_offset_table_rtx) so that we
250: always save/restore a5 in functions that use PIC relocation
251: at *any* time during the compilation process. */
252: #define FINALIZE_PIC finalize_pic()
253:
254: #ifndef SUPPORT_SUN_FPA
255:
256: /* 1 for registers that have pervasive standard uses
257: and are not available for the register allocator.
258: On the 68000, only the stack pointer is such. */
259:
260: #define FIXED_REGISTERS \
261: {/* Data registers. */ \
262: 0, 0, 0, 0, 0, 0, 0, 0, \
263: \
264: /* Address registers. */ \
265: 0, 0, 0, 0, 0, 0, 0, 1, \
266: \
267: /* Floating point registers \
268: (if available). */ \
269: 0, 0, 0, 0, 0, 0, 0, 0 }
270:
271: /* 1 for registers not available across function calls.
272: These must include the FIXED_REGISTERS and also any
273: registers that can be used without being saved.
274: The latter must include the registers where values are returned
275: and the register where structure-value addresses are passed.
276: Aside from that, you can include as many other registers as you like. */
277: #define CALL_USED_REGISTERS \
278: {1, 1, 0, 0, 0, 0, 0, 0, \
279: 1, 1, 0, 0, 0, 0, 0, 1, \
280: 1, 1, 0, 0, 0, 0, 0, 0 }
281:
282: #else /* SUPPORT_SUN_FPA */
283:
284: /* 1 for registers that have pervasive standard uses
285: and are not available for the register allocator.
286: On the 68000, only the stack pointer is such. */
287:
288: /* fpa0 is also reserved so that it can be used to move shit back and
289: forth between high fpa regs and everything else. */
290:
291: #define FIXED_REGISTERS \
292: {/* Data registers. */ \
293: 0, 0, 0, 0, 0, 0, 0, 0, \
294: \
295: /* Address registers. */ \
296: 0, 0, 0, 0, 0, 0, 0, 1, \
297: \
298: /* Floating point registers \
299: (if available). */ \
300: 0, 0, 0, 0, 0, 0, 0, 0, \
301: \
302: /* Sun3 FPA registers. */ \
303: 1, 0, 0, 0, 0, 0, 0, 0, \
304: 0, 0, 0, 0, 0, 0, 0, 0, \
305: 0, 0, 0, 0, 0, 0, 0, 0, \
306: 0, 0, 0, 0, 0, 0, 0, 0 }
307:
308: /* 1 for registers not available across function calls.
309: These must include the FIXED_REGISTERS and also any
310: registers that can be used without being saved.
311: The latter must include the registers where values are returned
312: and the register where structure-value addresses are passed.
313: Aside from that, you can include as many other registers as you like. */
314: #define CALL_USED_REGISTERS \
315: {1, 1, 0, 0, 0, 0, 0, 0, \
316: 1, 1, 0, 0, 0, 0, 0, 1, \
317: 1, 1, 0, 0, 0, 0, 0, 0, \
318: /* FPA registers. */ \
319: 1, 1, 1, 1, 0, 0, 0, 0, \
320: 0, 0, 0, 0, 0, 0, 0, 0, \
321: 0, 0, 0, 0, 0, 0, 0, 0, \
322: 0, 0, 0, 0, 0, 0, 0, 0 }
323:
324: #endif /* defined SUPPORT_SUN_FPA */
325:
326:
327: /* Make sure everything's fine if we *don't* have a given processor.
328: This assumes that putting a register in fixed_regs will keep the
329: compiler's mitts completely off it. We don't bother to zero it out
330: of register classes. If neither TARGET_FPA or TARGET_68881 is set,
331: the compiler won't touch since no instructions that use these
332: registers will be valid.
333:
334: Reserve PIC_OFFSET_TABLE_REGNUM (a5) for doing PIC relocation if
335: position independent code is being generated by making it a
336: fixed register */
337:
338: #ifndef SUPPORT_SUN_FPA
339:
340: #define CONDITIONAL_REGISTER_USAGE \
341: { \
342: if (flag_pic) \
343: fixed_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \
344: }
345:
346: #else /* defined SUPPORT_SUN_FPA */
347:
348: #define CONDITIONAL_REGISTER_USAGE \
349: { \
350: int i; \
351: HARD_REG_SET x; \
352: if (!TARGET_FPA) \
353: { \
354: COPY_HARD_REG_SET (x, reg_class_contents[(int)FPA_REGS]); \
355: for (i = 0; i < FIRST_PSEUDO_REGISTER; i++ ) \
356: if (TEST_HARD_REG_BIT (x, i)) \
357: fixed_regs[i] = call_used_regs[i] = 1; \
358: } \
359: if (TARGET_FPA) \
360: { \
361: COPY_HARD_REG_SET (x, reg_class_contents[(int)FP_REGS]); \
362: for (i = 0; i < FIRST_PSEUDO_REGISTER; i++ ) \
363: if (TEST_HARD_REG_BIT (x, i)) \
364: fixed_regs[i] = call_used_regs[i] = 1; \
365: } \
366: if (flag_pic) \
367: fixed_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \
368: }
369:
370: #endif /* defined SUPPORT_SUN_FPA */
371:
372: /* Return number of consecutive hard regs needed starting at reg REGNO
373: to hold something of mode MODE.
374: This is ordinarily the length in words of a value of mode MODE
375: but can be less for certain modes in special long registers.
376:
377: On the 68000, ordinary registers hold 32 bits worth;
378: for the 68881 registers, a single register is always enough for
379: anything that can be stored in them at all. */
380: #define HARD_REGNO_NREGS(REGNO, MODE) \
381: ((REGNO) >= 16 ? GET_MODE_NUNITS (MODE) \
382: : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))
383:
384: #ifndef SUPPORT_SUN_FPA
385:
386: /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE.
387: On the 68000, the cpu registers can hold any mode but the 68881 registers
388: can hold only SFmode or DFmode. The 68881 registers can't hold anything
389: if 68881 use is disabled. */
390:
391: #define HARD_REGNO_MODE_OK(REGNO, MODE) \
392: (((REGNO) < 16) \
393: || ((REGNO) < 24 \
394: && TARGET_68881 \
395: && (GET_MODE_CLASS (MODE) == MODE_FLOAT \
396: || GET_MODE_CLASS (MODE) == MODE_COMPLEX_FLOAT)))
397:
398: #else /* defined SUPPORT_SUN_FPA */
399:
400: /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE.
401: On the 68000, the cpu registers can hold any mode but the 68881 registers
402: can hold only SFmode or DFmode. And the 68881 registers can't hold anything
403: if 68881 use is disabled. However, the Sun FPA register can
404: (apparently) hold whatever you feel like putting in them.
405: If using the fpa, don't put a double in d7/a0. */
406:
407: #define HARD_REGNO_MODE_OK(REGNO, MODE) \
408: (((REGNO) < 16 \
409: && !(TARGET_FPA \
410: && GET_MODE_CLASS ((MODE)) != MODE_INT \
411: && GET_MODE_UNIT_SIZE ((MODE)) > 4 \
412: && (REGNO) < 8 && (REGNO) + GET_MODE_SIZE ((MODE)) / 4 > 8 \
413: && (REGNO) % (GET_MODE_UNIT_SIZE ((MODE)) / 4) != 0)) \
414: || ((REGNO) < 24 \
415: ? TARGET_68881 && (GET_MODE_CLASS (MODE) == MODE_FLOAT \
416: || GET_MODE_CLASS (MODE) == MODE_COMPLEX_FLOAT) \
417: : ((REGNO) < 56 ? TARGET_FPA : 0)))
418:
419: #endif /* defined SUPPORT_SUN_FPA */
420:
421: /* Value is 1 if it is a good idea to tie two pseudo registers
422: when one has mode MODE1 and one has mode MODE2.
423: If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
424: for any hard reg, then this must be 0 for correct output. */
425: #define MODES_TIEABLE_P(MODE1, MODE2) \
426: (! TARGET_68881 \
427: || ((GET_MODE_CLASS (MODE1) == MODE_FLOAT \
428: || GET_MODE_CLASS (MODE1) == MODE_COMPLEX_FLOAT) \
429: == (GET_MODE_CLASS (MODE2) == MODE_FLOAT \
430: || GET_MODE_CLASS (MODE2) == MODE_COMPLEX_FLOAT)))
431:
432: /* Specify the registers used for certain standard purposes.
433: The values of these macros are register numbers. */
434:
435: /* m68000 pc isn't overloaded on a register. */
436: /* #define PC_REGNUM */
437:
438: /* Register to use for pushing function arguments. */
439: #define STACK_POINTER_REGNUM 15
440:
441: /* Base register for access to local variables of the function. */
442: #define FRAME_POINTER_REGNUM 14
443:
444: /* Value should be nonzero if functions must have frame pointers.
445: Zero means the frame pointer need not be set up (and parms
446: may be accessed via the stack pointer) in functions that seem suitable.
447: This is computed in `reload', in reload1.c. */
448: #define FRAME_POINTER_REQUIRED 0
449:
450: /* Base register for access to arguments of the function. */
451: #define ARG_POINTER_REGNUM 14
452:
453: /* Register in which static-chain is passed to a function. */
454: #define STATIC_CHAIN_REGNUM 8
455:
456: /* Register in which address to store a structure value
457: is passed to a function. */
458: #define STRUCT_VALUE_REGNUM 9
459:
460: /* Define the classes of registers for register constraints in the
461: machine description. Also define ranges of constants.
462:
463: One of the classes must always be named ALL_REGS and include all hard regs.
464: If there is more than one class, another class must be named NO_REGS
465: and contain no registers.
466:
467: The name GENERAL_REGS must be the name of a class (or an alias for
468: another name such as ALL_REGS). This is the class of registers
469: that is allowed by "g" or "r" in a register constraint.
470: Also, registers outside this class are allocated only when
471: instructions express preferences for them.
472:
473: The classes must be numbered in nondecreasing order; that is,
474: a larger-numbered class must never be contained completely
475: in a smaller-numbered class.
476:
477: For any two classes, it is very desirable that there be another
478: class that represents their union. */
479:
480: /* The 68000 has three kinds of registers, so eight classes would be
481: a complete set. One of them is not needed. */
482:
483: #ifndef SUPPORT_SUN_FPA
484:
485: enum reg_class {
486: NO_REGS, DATA_REGS,
487: ADDR_REGS, FP_REGS,
488: GENERAL_REGS, DATA_OR_FP_REGS,
489: ADDR_OR_FP_REGS, ALL_REGS,
490: LIM_REG_CLASSES };
491:
492: #define N_REG_CLASSES (int) LIM_REG_CLASSES
493:
494: /* Give names of register classes as strings for dump file. */
495:
496: #define REG_CLASS_NAMES \
497: { "NO_REGS", "DATA_REGS", \
498: "ADDR_REGS", "FP_REGS", \
499: "GENERAL_REGS", "DATA_OR_FP_REGS", \
500: "ADDR_OR_FP_REGS", "ALL_REGS" }
501:
502: /* Define which registers fit in which classes.
503: This is an initializer for a vector of HARD_REG_SET
504: of length N_REG_CLASSES. */
505:
506: #define REG_CLASS_CONTENTS \
507: { \
508: 0x00000000, /* NO_REGS */ \
509: 0x000000ff, /* DATA_REGS */ \
510: 0x0000ff00, /* ADDR_REGS */ \
511: 0x00ff0000, /* FP_REGS */ \
512: 0x0000ffff, /* GENERAL_REGS */ \
513: 0x00ff00ff, /* DATA_OR_FP_REGS */ \
514: 0x00ffff00, /* ADDR_OR_FP_REGS */ \
515: 0x00ffffff, /* ALL_REGS */ \
516: }
517:
518: /* The same information, inverted:
519: Return the class number of the smallest class containing
520: reg number REGNO. This could be a conditional expression
521: or could index an array. */
522:
523: #define REGNO_REG_CLASS(REGNO) (((REGNO)>>3)+1)
524:
525: #else /* defined SUPPORT_SUN_FPA */
526:
527: /*
528: * Notes on final choices:
529: *
530: * 1) Didn't feel any need to union-ize LOW_FPA_REGS with anything
531: * else.
532: * 2) Removed all unions that involve address registers with
533: * floating point registers (left in unions of address and data with
534: * floating point).
535: * 3) Defined GENERAL_REGS as ADDR_OR_DATA_REGS.
536: * 4) Defined ALL_REGS as FPA_OR_FP_OR_GENERAL_REGS.
537: * 4) Left in everything else.
538: */
539: enum reg_class { NO_REGS, LO_FPA_REGS, FPA_REGS, FP_REGS,
540: FP_OR_FPA_REGS, DATA_REGS, DATA_OR_FPA_REGS, DATA_OR_FP_REGS,
541: DATA_OR_FP_OR_FPA_REGS, ADDR_REGS, GENERAL_REGS,
542: GENERAL_OR_FPA_REGS, GENERAL_OR_FP_REGS, ALL_REGS,
543: LIM_REG_CLASSES };
544:
545: #define N_REG_CLASSES (int) LIM_REG_CLASSES
546:
547: /* Give names of register classes as strings for dump file. */
548:
549: #define REG_CLASS_NAMES \
550: { "NO_REGS", "LO_FPA_REGS", "FPA_REGS", "FP_REGS", \
551: "FP_OR_FPA_REGS", "DATA_REGS", "DATA_OR_FPA_REGS", "DATA_OR_FP_REGS", \
552: "DATA_OR_FP_OR_FPA_REGS", "ADDR_REGS", "GENERAL_REGS", \
553: "GENERAL_OR_FPA_REGS", "GENERAL_OR_FP_REGS", "ALL_REGS" }
554:
555: /* Define which registers fit in which classes.
556: This is an initializer for a vector of HARD_REG_SET
557: of length N_REG_CLASSES. */
558:
559: #define REG_CLASS_CONTENTS \
560: { \
561: {0, 0}, /* NO_REGS */ \
562: {0xff000000, 0x000000ff}, /* LO_FPA_REGS */ \
563: {0xff000000, 0x00ffffff}, /* FPA_REGS */ \
564: {0x00ff0000, 0x00000000}, /* FP_REGS */ \
565: {0xffff0000, 0x00ffffff}, /* FP_OR_FPA_REGS */ \
566: {0x000000ff, 0x00000000}, /* DATA_REGS */ \
567: {0xff0000ff, 0x00ffffff}, /* DATA_OR_FPA_REGS */ \
568: {0x00ff00ff, 0x00000000}, /* DATA_OR_FP_REGS */ \
569: {0xffff00ff, 0x00ffffff}, /* DATA_OR_FP_OR_FPA_REGS */\
570: {0x0000ff00, 0x00000000}, /* ADDR_REGS */ \
571: {0x0000ffff, 0x00000000}, /* GENERAL_REGS */ \
572: {0xff00ffff, 0x00ffffff}, /* GENERAL_OR_FPA_REGS */\
573: {0x00ffffff, 0x00000000}, /* GENERAL_OR_FP_REGS */\
574: {0xffffffff, 0x00ffffff}, /* ALL_REGS */ \
575: }
576:
577: /* The same information, inverted:
578: Return the class number of the smallest class containing
579: reg number REGNO. This could be a conditional expression
580: or could index an array. */
581:
582: extern enum reg_class regno_reg_class[];
583: #define REGNO_REG_CLASS(REGNO) (regno_reg_class[(REGNO)>>3])
584:
585: #endif /* SUPPORT_SUN_FPA */
586:
587: /* The class value for index registers, and the one for base regs. */
588:
589: #define INDEX_REG_CLASS GENERAL_REGS
590: #define BASE_REG_CLASS ADDR_REGS
591:
592: /* Get reg_class from a letter such as appears in the machine description.
593: We do a trick here to modify the effective constraints on the
594: machine description; we zorch the constraint letters that aren't
595: appropriate for a specific target. This allows us to guarantee
596: that a specific kind of register will not be used for a given target
597: without fiddling with the register classes above. */
598:
599: #ifndef SUPPORT_SUN_FPA
600:
601: #define REG_CLASS_FROM_LETTER(C) \
602: ((C) == 'a' ? ADDR_REGS : \
603: ((C) == 'd' ? DATA_REGS : \
604: ((C) == 'f' ? (TARGET_68881 ? FP_REGS : \
605: NO_REGS) : \
606: NO_REGS)))
607:
608: #else /* defined SUPPORT_SUN_FPA */
609:
610: #define REG_CLASS_FROM_LETTER(C) \
611: ((C) == 'a' ? ADDR_REGS : \
612: ((C) == 'd' ? DATA_REGS : \
613: ((C) == 'f' ? (TARGET_68881 ? FP_REGS : \
614: NO_REGS) : \
615: ((C) == 'x' ? (TARGET_FPA ? FPA_REGS : \
616: NO_REGS) : \
617: ((C) == 'y' ? (TARGET_FPA ? LO_FPA_REGS : \
618: NO_REGS) : \
619: NO_REGS)))))
620:
621: #endif /* defined SUPPORT_SUN_FPA */
622:
623: /* The letters I, J, K, L and M in a register constraint string
624: can be used to stand for particular ranges of immediate operands.
625: This macro defines what the ranges are.
626: C is the letter, and VALUE is a constant value.
627: Return 1 if VALUE is in the range specified by C.
628:
629: For the 68000, `I' is used for the range 1 to 8
630: allowed as immediate shift counts and in addq.
631: `J' is used for the range of signed numbers that fit in 16 bits.
632: `K' is for numbers that moveq can't handle.
633: `L' is for range -8 to -1, range of values that can be added with subq. */
634:
635: #define CONST_OK_FOR_LETTER_P(VALUE, C) \
636: ((C) == 'I' ? (VALUE) > 0 && (VALUE) <= 8 : \
637: (C) == 'J' ? (VALUE) >= -0x8000 && (VALUE) <= 0x7FFF : \
638: (C) == 'K' ? (VALUE) < -0x80 || (VALUE) >= 0x80 : \
639: (C) == 'L' ? (VALUE) < 0 && (VALUE) >= -8 : 0)
640:
641: /*
642: * A small bit of explanation:
643: * "G" defines all of the floating constants that are *NOT* 68881
644: * constants. this is so 68881 constants get reloaded and the
645: * fpmovecr is used. "H" defines *only* the class of constants that
646: * the fpa can use, because these can be gotten at in any fpa
647: * instruction and there is no need to force reloads.
648: */
649: #ifndef SUPPORT_SUN_FPA
650: #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
651: ((C) == 'G' ? ! (TARGET_68881 && standard_68881_constant_p (VALUE)) : 0 )
652: #else /* defined SUPPORT_SUN_FPA */
653: #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
654: ((C) == 'G' ? ! (TARGET_68881 && standard_68881_constant_p (VALUE)) : \
655: (C) == 'H' ? (TARGET_FPA && standard_sun_fpa_constant_p (VALUE)) : 0)
656: #endif /* defined SUPPORT_SUN_FPA */
657:
658: /* Given an rtx X being reloaded into a reg required to be
659: in class CLASS, return the class of reg to actually use.
660: In general this is just CLASS; but on some machines
661: in some cases it is preferable to use a more restrictive class.
662: On the 68000 series, use a data reg if possible when the
663: value is a constant in the range where moveq could be used
664: and we ensure that QImodes are reloaded into data regs.
665: Also, if a floating constant needs reloading, put it in memory
666: if possible. */
667:
668: #define PREFERRED_RELOAD_CLASS(X,CLASS) \
669: ((GET_CODE (X) == CONST_INT \
670: && (unsigned) (INTVAL (X) + 0x80) < 0x100 \
671: && (CLASS) != ADDR_REGS) \
672: ? DATA_REGS \
673: : (GET_MODE (X) == QImode && (CLASS) != ADDR_REGS) \
674: ? DATA_REGS \
675: : (GET_CODE (X) == CONST_DOUBLE \
676: && GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT) \
677: ? NO_REGS \
678: : (CLASS))
679:
680: /* Return the maximum number of consecutive registers
681: needed to represent mode MODE in a register of class CLASS. */
682: /* On the 68000, this is the size of MODE in words,
683: except in the FP regs, where a single reg is always enough. */
684: #ifndef SUPPORT_SUN_FPA
685:
686: #define CLASS_MAX_NREGS(CLASS, MODE) \
687: ((CLASS) == FP_REGS ? 1 \
688: : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))
689:
690: /* Moves between fp regs and other regs are two insns. */
691: #define REGISTER_MOVE_COST(CLASS1, CLASS2) \
692: (((CLASS1) == FP_REGS && (CLASS2) != FP_REGS) \
693: || ((CLASS2) == FP_REGS && (CLASS1) != FP_REGS) \
694: ? 4 : 2)
695:
696: #else /* defined SUPPORT_SUN_FPA */
697:
698: #define CLASS_MAX_NREGS(CLASS, MODE) \
699: ((CLASS) == FP_REGS || (CLASS) == FPA_REGS || (CLASS) == LO_FPA_REGS ? 1 \
700: : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))
701:
702: /* Moves between fp regs and other regs are two insns. */
703: /* Likewise for high fpa regs and other regs. */
704: #define REGISTER_MOVE_COST(CLASS1, CLASS2) \
705: ((((CLASS1) == FP_REGS && (CLASS2) != FP_REGS) \
706: || ((CLASS2) == FP_REGS && (CLASS1) != FP_REGS) \
707: || ((CLASS1) == FPA_REGS && (CLASS2) != FPA_REGS) \
708: || ((CLASS2) == FPA_REGS && (CLASS1) != FPA_REGS)) \
709: ? 4 : 2)
710:
711: #endif /* define SUPPORT_SUN_FPA */
712:
713: /* Stack layout; function entry, exit and calling. */
714:
715: /* Define this if pushing a word on the stack
716: makes the stack pointer a smaller address. */
717: #define STACK_GROWS_DOWNWARD
718:
719: /* Nonzero if we need to generate stack-probe insns.
720: On most systems they are not needed.
721: When they are needed, define this as the stack offset to probe at. */
722: #define NEED_PROBE 0
723:
724: /* Define this if the nominal address of the stack frame
725: is at the high-address end of the local variables;
726: that is, each additional local variable allocated
727: goes at a more negative offset in the frame. */
728: #define FRAME_GROWS_DOWNWARD
729:
730: /* Offset within stack frame to start allocating local variables at.
731: If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
732: first local allocated. Otherwise, it is the offset to the BEGINNING
733: of the first local allocated. */
734: #define STARTING_FRAME_OFFSET 0
735:
736: /* If we generate an insn to push BYTES bytes,
737: this says how many the stack pointer really advances by.
738: On the 68000, sp@- in a byte insn really pushes a word. */
739: #define PUSH_ROUNDING(BYTES) (((BYTES) + 1) & ~1)
740:
741: /* Offset of first parameter from the argument pointer register value. */
742: #define FIRST_PARM_OFFSET(FNDECL) 8
743:
744: /* Value is the number of byte of arguments automatically
745: popped when returning from a subroutine call.
746: FUNTYPE is the data type of the function (as a tree),
747: or for a library call it is an identifier node for the subroutine name.
748: SIZE is the number of bytes of arguments passed on the stack.
749:
750: On the 68000, the RTS insn cannot pop anything.
751: On the 68010, the RTD insn may be used to pop them if the number
752: of args is fixed, but if the number is variable then the caller
753: must pop them all. RTD can't be used for library calls now
754: because the library is compiled with the Unix compiler.
755: Use of RTD is a selectable option, since it is incompatible with
756: standard Unix calling sequences. If the option is not selected,
757: the caller must always pop the args. */
758:
759: #define RETURN_POPS_ARGS(FUNTYPE,SIZE) \
760: ((TARGET_RTD && TREE_CODE (FUNTYPE) != IDENTIFIER_NODE \
761: && (TYPE_ARG_TYPES (FUNTYPE) == 0 \
762: || (TREE_VALUE (tree_last (TYPE_ARG_TYPES (FUNTYPE))) \
763: == void_type_node))) \
764: ? (SIZE) : 0)
765:
766: /* Define how to find the value returned by a function.
767: VALTYPE is the data type of the value (as a tree).
768: If the precise function being called is known, FUNC is its FUNCTION_DECL;
769: otherwise, FUNC is 0. */
770:
771: /* On the 68000 the return value is in D0 regardless. */
772:
773: #define FUNCTION_VALUE(VALTYPE, FUNC) \
774: gen_rtx (REG, TYPE_MODE (VALTYPE), 0)
775:
776: /* Define how to find the value returned by a library function
777: assuming the value has mode MODE. */
778:
779: /* On the 68000 the return value is in D0 regardless. */
780:
781: #define LIBCALL_VALUE(MODE) gen_rtx (REG, MODE, 0)
782:
783: /* 1 if N is a possible register number for a function value.
784: On the 68000, d0 is the only register thus used. */
785:
786: #define FUNCTION_VALUE_REGNO_P(N) ((N) == 0)
787:
788: /* Define this to be true when FUNCTION_VALUE_REGNO_P is true for
789: more than one register. */
790:
791: #define NEEDS_UNTYPED_CALL 0
792:
793: /* Define this if PCC uses the nonreentrant convention for returning
794: structure and union values. */
795:
796: #define PCC_STATIC_STRUCT_RETURN
797:
798: /* 1 if N is a possible register number for function argument passing.
799: On the 68000, no registers are used in this way. */
800:
801: #define FUNCTION_ARG_REGNO_P(N) 0
802:
803: /* Define a data type for recording info about an argument list
804: during the scan of that argument list. This data type should
805: hold all necessary information about the function itself
806: and about the args processed so far, enough to enable macros
807: such as FUNCTION_ARG to determine where the next arg should go.
808:
809: On the m68k, this is a single integer, which is a number of bytes
810: of arguments scanned so far. */
811:
812: #define CUMULATIVE_ARGS int
813:
814: /* Initialize a variable CUM of type CUMULATIVE_ARGS
815: for a call to a function whose data type is FNTYPE.
816: For a library call, FNTYPE is 0.
817:
818: On the m68k, the offset starts at 0. */
819:
820: #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME) \
821: ((CUM) = 0)
822:
823: /* Update the data in CUM to advance over an argument
824: of mode MODE and data type TYPE.
825: (TYPE is null for libcalls where that information may not be available.) */
826:
827: #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
828: ((CUM) += ((MODE) != BLKmode \
829: ? (GET_MODE_SIZE (MODE) + 3) & ~3 \
830: : (int_size_in_bytes (TYPE) + 3) & ~3))
831:
832: /* Define where to put the arguments to a function.
833: Value is zero to push the argument on the stack,
834: or a hard register in which to store the argument.
835:
836: MODE is the argument's machine mode.
837: TYPE is the data type of the argument (as a tree).
838: This is null for libcalls where that information may
839: not be available.
840: CUM is a variable of type CUMULATIVE_ARGS which gives info about
841: the preceding args and about the function being called.
842: NAMED is nonzero if this argument is a named parameter
843: (otherwise it is an extra parameter matching an ellipsis). */
844:
845: /* On the 68000 all args are pushed, except if -mregparm is specified
846: then the first two words of arguments are passed in d0, d1.
847: *NOTE* -mregparm does not work.
848: It exists only to test register calling conventions. */
849:
850: #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
851: ((TARGET_REGPARM && (CUM) < 8) ? gen_rtx (REG, (MODE), (CUM) / 4) : 0)
852:
853: /* For an arg passed partly in registers and partly in memory,
854: this is the number of registers used.
855: For args passed entirely in registers or entirely in memory, zero. */
856:
857: #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) \
858: ((TARGET_REGPARM && (CUM) < 8 \
859: && 8 < ((CUM) + ((MODE) == BLKmode \
860: ? int_size_in_bytes (TYPE) \
861: : GET_MODE_SIZE (MODE)))) \
862: ? 2 - (CUM) / 4 : 0)
863:
864: /* Generate the assembly code for function entry. */
865: #define FUNCTION_PROLOGUE(FILE, SIZE) output_function_prologue(FILE, SIZE)
866:
867: /* Output assembler code to FILE to increment profiler label # LABELNO
868: for profiling a function entry. */
869:
870: #define FUNCTION_PROFILER(FILE, LABELNO) \
871: asm_fprintf (FILE, "\tlea %LLP%d,%Ra0\n\tjsr mcount\n", (LABELNO))
872:
873: /* Output assembler code to FILE to initialize this source file's
874: basic block profiling info, if that has not already been done. */
875:
876: #define FUNCTION_BLOCK_PROFILER(FILE, LABELNO) \
877: asm_fprintf (FILE, "\ttstl %LLPBX0\n\tbne %LLPI%d\n\tpea %LLPBX0\n\tjsr %U__bb_init_func\n\taddql %I4,%Rsp\n%LLPI%d:\n", \
878: LABELNO, LABELNO);
879:
880: /* Output assembler code to FILE to increment the entry-count for
881: the BLOCKNO'th basic block in this source file. */
882:
883: #define BLOCK_PROFILER(FILE, BLOCKNO) \
884: asm_fprintf (FILE, "\taddql %I1,%LLPBX2+%d\n", 4 * BLOCKNO)
885:
886: /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
887: the stack pointer does not matter. The value is tested only in
888: functions that have frame pointers.
889: No definition is equivalent to always zero. */
890:
891: #define EXIT_IGNORE_STACK 1
892:
893: /* Generate the assembly code for function exit. */
894: #define FUNCTION_EPILOGUE(FILE, SIZE) output_function_epilogue (FILE, SIZE)
895:
896: /* This is a hook for other tm files to change. */
897: /* #define FUNCTION_EXTRA_EPILOGUE(FILE, SIZE) */
898:
899: /* Determine if the epilogue should be output as RTL.
900: You should override this if you define FUNCTION_EXTRA_EPILOGUE. */
901: #define USE_RETURN_INSN use_return_insn ()
902:
903: /* Store in the variable DEPTH the initial difference between the
904: frame pointer reg contents and the stack pointer reg contents,
905: as of the start of the function body. This depends on the layout
906: of the fixed parts of the stack frame and on how registers are saved.
907:
908: On the 68k, if we have a frame, we must add one word to its length
909: to allow for the place that a6 is stored when we do have a frame pointer.
910: Otherwise, we would need to compute the offset from the frame pointer
911: of a local variable as a function of frame_pointer_needed, which
912: is hard. */
913:
914: #define INITIAL_FRAME_POINTER_OFFSET(DEPTH) \
915: { int regno; \
916: int offset = -4; \
917: for (regno = 16; regno < FIRST_PSEUDO_REGISTER; regno++) \
918: if (regs_ever_live[regno] && ! call_used_regs[regno]) \
919: offset += 12; \
920: for (regno = 0; regno < 16; regno++) \
921: if (regs_ever_live[regno] && ! call_used_regs[regno]) \
922: offset += 4; \
923: (DEPTH) = (offset + ((get_frame_size () + 3) & -4) \
924: + (get_frame_size () == 0 ? 0 : 4)); \
925: }
926:
927: /* Output assembler code for a block containing the constant parts
928: of a trampoline, leaving space for the variable parts. */
929:
930: /* On the 68k, the trampoline looks like this:
931: mov @#.,a0
932: jsr @#___trampoline
933: jsr @#___trampoline
934: .long STATIC
935: .long FUNCTION
936: The reason for having three jsr insns is so that an entire line
937: of the instruction cache is filled in a predictable way
938: that will always be the same.
939:
940: We always use the assembler label ___trampoline
941: regardless of whether the system adds underscores. */
942:
943: #define TRAMPOLINE_TEMPLATE(FILE) \
944: { \
945: ASM_OUTPUT_SHORT (FILE, gen_rtx (CONST_INT, VOIDmode, 0x207c)); \
946: ASM_OUTPUT_SHORT (FILE, const0_rtx); \
947: ASM_OUTPUT_SHORT (FILE, const0_rtx); \
948: ASM_OUTPUT_SHORT (FILE, gen_rtx (CONST_INT, VOIDmode, 0x4eb9)); \
949: ASM_OUTPUT_INT (FILE, gen_rtx (SYMBOL_REF, SImode, "*___trampoline"));\
950: ASM_OUTPUT_SHORT (FILE, gen_rtx (CONST_INT, VOIDmode, 0x4eb9)); \
951: ASM_OUTPUT_INT (FILE, gen_rtx (SYMBOL_REF, SImode, "*___trampoline"));\
952: ASM_OUTPUT_SHORT (FILE, const0_rtx); \
953: ASM_OUTPUT_SHORT (FILE, const0_rtx); \
954: ASM_OUTPUT_SHORT (FILE, const0_rtx); \
955: ASM_OUTPUT_SHORT (FILE, const0_rtx); \
956: }
957:
958: /* Length in units of the trampoline for entering a nested function. */
959:
960: #define TRAMPOLINE_SIZE 26
961:
962: /* Alignment required for a trampoline. 16 is used to find the
963: beginning of a line in the instruction cache. */
964:
965: #define TRAMPOLINE_ALIGN 16
966:
967: /* Emit RTL insns to initialize the variable parts of a trampoline.
968: FNADDR is an RTX for the address of the function's pure code.
969: CXT is an RTX for the static chain value for the function. */
970:
971: #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
972: { \
973: emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 2)), TRAMP); \
974: emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 18)), CXT); \
975: emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 22)), FNADDR); \
976: }
977:
978: /* This is the library routine that is used
979: to transfer control from the trampoline
980: to the actual nested function. */
981:
982: /* A colon is used with no explicit operands
983: to cause the template string to be scanned for %-constructs. */
984: /* The function name __transfer_from_trampoline is not actually used.
985: The function definition just permits use of "asm with operands"
986: (though the operand list is empty). */
987: #define TRANSFER_FROM_TRAMPOLINE \
988: void \
989: __transfer_from_trampoline () \
990: { \
991: register char *a0 asm ("%a0"); \
992: asm (GLOBAL_ASM_OP " ___trampoline"); \
993: asm ("___trampoline:"); \
994: asm volatile ("move%.l %0,%@" : : "m" (a0[22])); \
995: asm volatile ("move%.l %1,%0" : "=a" (a0) : "m" (a0[18])); \
996: asm ("rts":); \
997: }
998:
999: /* Addressing modes, and classification of registers for them. */
1000:
1001: #define HAVE_POST_INCREMENT
1002: /* #define HAVE_POST_DECREMENT */
1003:
1004: #define HAVE_PRE_DECREMENT
1005: /* #define HAVE_PRE_INCREMENT */
1006:
1007: /* Macros to check register numbers against specific register classes. */
1008:
1009: /* These assume that REGNO is a hard or pseudo reg number.
1010: They give nonzero only if REGNO is a hard reg of the suitable class
1011: or a pseudo reg currently allocated to a suitable hard reg.
1012: Since they use reg_renumber, they are safe only once reg_renumber
1013: has been allocated, which happens in local-alloc.c. */
1014:
1015: #define REGNO_OK_FOR_INDEX_P(REGNO) \
1016: ((REGNO) < 16 || (unsigned) reg_renumber[REGNO] < 16)
1017: #define REGNO_OK_FOR_BASE_P(REGNO) \
1018: (((REGNO) ^ 010) < 8 || (unsigned) (reg_renumber[REGNO] ^ 010) < 8)
1019: #define REGNO_OK_FOR_DATA_P(REGNO) \
1020: ((REGNO) < 8 || (unsigned) reg_renumber[REGNO] < 8)
1021: #define REGNO_OK_FOR_FP_P(REGNO) \
1022: (((REGNO) ^ 020) < 8 || (unsigned) (reg_renumber[REGNO] ^ 020) < 8)
1023: #ifdef SUPPORT_SUN_FPA
1024: #define REGNO_OK_FOR_FPA_P(REGNO) \
1025: (((REGNO) >= 24 && (REGNO) < 56) || (reg_renumber[REGNO] >= 24 && reg_renumber[REGNO] < 56))
1026: #endif
1027:
1028: /* Now macros that check whether X is a register and also,
1029: strictly, whether it is in a specified class.
1030:
1031: These macros are specific to the 68000, and may be used only
1032: in code for printing assembler insns and in conditions for
1033: define_optimization. */
1034:
1035: /* 1 if X is a data register. */
1036:
1037: #define DATA_REG_P(X) (REG_P (X) && REGNO_OK_FOR_DATA_P (REGNO (X)))
1038:
1039: /* 1 if X is an fp register. */
1040:
1041: #define FP_REG_P(X) (REG_P (X) && REGNO_OK_FOR_FP_P (REGNO (X)))
1042:
1043: /* 1 if X is an address register */
1044:
1045: #define ADDRESS_REG_P(X) (REG_P (X) && REGNO_OK_FOR_BASE_P (REGNO (X)))
1046:
1047: #ifdef SUPPORT_SUN_FPA
1048: /* 1 if X is a register in the Sun FPA. */
1049: #define FPA_REG_P(X) (REG_P (X) && REGNO_OK_FOR_FPA_P (REGNO (X)))
1050: #else
1051: /* Answer must be no if we don't have an FPA. */
1052: #define FPA_REG_P(X) 0
1053: #endif
1054:
1055: /* Maximum number of registers that can appear in a valid memory address. */
1056:
1057: #define MAX_REGS_PER_ADDRESS 2
1058:
1059: /* Recognize any constant value that is a valid address. */
1060:
1061: #define CONSTANT_ADDRESS_P(X) \
1062: (GET_CODE (X) == LABEL_REF || GET_CODE (X) == SYMBOL_REF \
1063: || GET_CODE (X) == CONST_INT || GET_CODE (X) == CONST \
1064: || GET_CODE (X) == HIGH)
1065:
1066: /* Nonzero if the constant value X is a legitimate general operand.
1067: It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE. */
1068:
1069: #define LEGITIMATE_CONSTANT_P(X) 1
1070:
1071: /* Nonzero if the constant value X is a legitimate general operand
1072: when generating PIC code. It is given that flag_pic is on and
1073: that X satisfies CONSTANT_P or is a CONST_DOUBLE. */
1074:
1075: #define LEGITIMATE_PIC_OPERAND_P(X) \
1076: (! symbolic_operand (X, VOIDmode))
1077:
1078: /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
1079: and check its validity for a certain class.
1080: We have two alternate definitions for each of them.
1081: The usual definition accepts all pseudo regs; the other rejects
1082: them unless they have been allocated suitable hard regs.
1083: The symbol REG_OK_STRICT causes the latter definition to be used.
1084:
1085: Most source files want to accept pseudo regs in the hope that
1086: they will get allocated to the class that the insn wants them to be in.
1087: Source files for reload pass need to be strict.
1088: After reload, it makes no difference, since pseudo regs have
1089: been eliminated by then. */
1090:
1091: #ifndef REG_OK_STRICT
1092:
1093: /* Nonzero if X is a hard reg that can be used as an index
1094: or if it is a pseudo reg. */
1095: #define REG_OK_FOR_INDEX_P(X) ((REGNO (X) ^ 020) >= 8)
1096: /* Nonzero if X is a hard reg that can be used as a base reg
1097: or if it is a pseudo reg. */
1098: #define REG_OK_FOR_BASE_P(X) ((REGNO (X) & ~027) != 0)
1099:
1100: #else
1101:
1102: /* Nonzero if X is a hard reg that can be used as an index. */
1103: #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
1104: /* Nonzero if X is a hard reg that can be used as a base reg. */
1105: #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
1106:
1107: #endif
1108:
1109: /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
1110: that is a valid memory address for an instruction.
1111: The MODE argument is the machine mode for the MEM expression
1112: that wants to use this address.
1113:
1114: When generating PIC, an address involving a SYMBOL_REF is legitimate
1115: if and only if it is the sum of pic_offset_table_rtx and the SYMBOL_REF.
1116: We use LEGITIMATE_PIC_OPERAND_P to throw out the illegitimate addresses,
1117: and we explicitly check for the sum of pic_offset_table_rtx and a SYMBOL_REF.
1118:
1119: Likewise for a LABEL_REF when generating PIC.
1120:
1121: The other macros defined here are used only in GO_IF_LEGITIMATE_ADDRESS. */
1122:
1123: #define INDIRECTABLE_1_ADDRESS_P(X) \
1124: ((CONSTANT_ADDRESS_P (X) && (!flag_pic || LEGITIMATE_PIC_OPERAND_P (X))) \
1125: || (GET_CODE (X) == REG && REG_OK_FOR_BASE_P (X)) \
1126: || ((GET_CODE (X) == PRE_DEC || GET_CODE (X) == POST_INC) \
1127: && REG_P (XEXP (X, 0)) \
1128: && REG_OK_FOR_BASE_P (XEXP (X, 0))) \
1129: || (GET_CODE (X) == PLUS \
1130: && REG_P (XEXP (X, 0)) && REG_OK_FOR_BASE_P (XEXP (X, 0)) \
1131: && GET_CODE (XEXP (X, 1)) == CONST_INT \
1132: && ((unsigned) INTVAL (XEXP (X, 1)) + 0x8000) < 0x10000) \
1133: || (GET_CODE (X) == PLUS && XEXP (X, 0) == pic_offset_table_rtx \
1134: && flag_pic && GET_CODE (XEXP (X, 1)) == SYMBOL_REF) \
1135: || (GET_CODE (X) == PLUS && XEXP (X, 0) == pic_offset_table_rtx \
1136: && flag_pic && GET_CODE (XEXP (X, 1)) == LABEL_REF)) \
1137:
1138: #if 0
1139: /* This should replace the last two (non-pic) lines
1140: except that Sun's assembler does not seem to handle such operands. */
1141: && (TARGET_68020 ? CONSTANT_ADDRESS_P (XEXP (X, 1)) \
1142: : (GET_CODE (XEXP (X, 1)) == CONST_INT \
1143: && ((unsigned) INTVAL (XEXP (X, 1)) + 0x8000) < 0x10000))))
1144: #endif
1145:
1146:
1147: #define GO_IF_NONINDEXED_ADDRESS(X, ADDR) \
1148: { if (INDIRECTABLE_1_ADDRESS_P (X)) goto ADDR; }
1149:
1150: /* Only labels on dispatch tables are valid for indexing from. */
1151: #define GO_IF_INDEXABLE_BASE(X, ADDR) \
1152: { rtx temp; \
1153: if (GET_CODE (X) == LABEL_REF \
1154: && (temp = next_nonnote_insn (XEXP (X, 0))) != 0 \
1155: && GET_CODE (temp) == JUMP_INSN \
1156: && (GET_CODE (PATTERN (temp)) == ADDR_VEC \
1157: || GET_CODE (PATTERN (temp)) == ADDR_DIFF_VEC)) \
1158: goto ADDR; \
1159: if (GET_CODE (X) == REG && REG_OK_FOR_BASE_P (X)) goto ADDR; }
1160:
1161: #define GO_IF_INDEXING(X, ADDR) \
1162: { if (GET_CODE (X) == PLUS && LEGITIMATE_INDEX_P (XEXP (X, 0))) \
1163: { GO_IF_INDEXABLE_BASE (XEXP (X, 1), ADDR); } \
1164: if (GET_CODE (X) == PLUS && LEGITIMATE_INDEX_P (XEXP (X, 1))) \
1165: { GO_IF_INDEXABLE_BASE (XEXP (X, 0), ADDR); } }
1166:
1167: #define GO_IF_INDEXED_ADDRESS(X, ADDR) \
1168: { GO_IF_INDEXING (X, ADDR); \
1169: if (GET_CODE (X) == PLUS) \
1170: { if (GET_CODE (XEXP (X, 1)) == CONST_INT \
1171: && (unsigned) INTVAL (XEXP (X, 1)) + 0x80 < 0x100) \
1172: { rtx go_temp = XEXP (X, 0); GO_IF_INDEXING (go_temp, ADDR); } \
1173: if (GET_CODE (XEXP (X, 0)) == CONST_INT \
1174: && (unsigned) INTVAL (XEXP (X, 0)) + 0x80 < 0x100) \
1175: { rtx go_temp = XEXP (X, 1); GO_IF_INDEXING (go_temp, ADDR); } } }
1176:
1177: #define LEGITIMATE_INDEX_REG_P(X) \
1178: ((GET_CODE (X) == REG && REG_OK_FOR_INDEX_P (X)) \
1179: || (GET_CODE (X) == SIGN_EXTEND \
1180: && GET_CODE (XEXP (X, 0)) == REG \
1181: && GET_MODE (XEXP (X, 0)) == HImode \
1182: && REG_OK_FOR_INDEX_P (XEXP (X, 0))))
1183:
1184: #define LEGITIMATE_INDEX_P(X) \
1185: (LEGITIMATE_INDEX_REG_P (X) \
1186: || (TARGET_68020 && GET_CODE (X) == MULT \
1187: && LEGITIMATE_INDEX_REG_P (XEXP (X, 0)) \
1188: && GET_CODE (XEXP (X, 1)) == CONST_INT \
1189: && (INTVAL (XEXP (X, 1)) == 2 \
1190: || INTVAL (XEXP (X, 1)) == 4 \
1191: || INTVAL (XEXP (X, 1)) == 8)))
1192:
1193: #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
1194: { GO_IF_NONINDEXED_ADDRESS (X, ADDR); \
1195: GO_IF_INDEXED_ADDRESS (X, ADDR); }
1196:
1197: /* Try machine-dependent ways of modifying an illegitimate address
1198: to be legitimate. If we find one, return the new, valid address.
1199: This macro is used in only one place: `memory_address' in explow.c.
1200:
1201: OLDX is the address as it was before break_out_memory_refs was called.
1202: In some cases it is useful to look at this to decide what needs to be done.
1203:
1204: MODE and WIN are passed so that this macro can use
1205: GO_IF_LEGITIMATE_ADDRESS.
1206:
1207: It is always safe for this macro to do nothing. It exists to recognize
1208: opportunities to optimize the output.
1209:
1210: For the 68000, we handle X+REG by loading X into a register R and
1211: using R+REG. R will go in an address reg and indexing will be used.
1212: However, if REG is a broken-out memory address or multiplication,
1213: nothing needs to be done because REG can certainly go in an address reg. */
1214:
1215: #define COPY_ONCE(Y) if (!copied) { Y = copy_rtx (Y); copied = ch = 1; }
1216: #define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) \
1217: { register int ch = (X) != (OLDX); \
1218: if (GET_CODE (X) == PLUS) \
1219: { int copied = 0; \
1220: if (GET_CODE (XEXP (X, 0)) == MULT) \
1221: { COPY_ONCE (X); XEXP (X, 0) = force_operand (XEXP (X, 0), 0);} \
1222: if (GET_CODE (XEXP (X, 1)) == MULT) \
1223: { COPY_ONCE (X); XEXP (X, 1) = force_operand (XEXP (X, 1), 0);} \
1224: if (ch && GET_CODE (XEXP (X, 1)) == REG \
1225: && GET_CODE (XEXP (X, 0)) == REG) \
1226: goto WIN; \
1227: if (ch) { GO_IF_LEGITIMATE_ADDRESS (MODE, X, WIN); } \
1228: if (GET_CODE (XEXP (X, 0)) == REG \
1229: || (GET_CODE (XEXP (X, 0)) == SIGN_EXTEND \
1230: && GET_CODE (XEXP (XEXP (X, 0), 0)) == REG \
1231: && GET_MODE (XEXP (XEXP (X, 0), 0)) == HImode)) \
1232: { register rtx temp = gen_reg_rtx (Pmode); \
1233: register rtx val = force_operand (XEXP (X, 1), 0); \
1234: emit_move_insn (temp, val); \
1235: COPY_ONCE (X); \
1236: XEXP (X, 1) = temp; \
1237: goto WIN; } \
1238: else if (GET_CODE (XEXP (X, 1)) == REG \
1239: || (GET_CODE (XEXP (X, 1)) == SIGN_EXTEND \
1240: && GET_CODE (XEXP (XEXP (X, 1), 0)) == REG \
1241: && GET_MODE (XEXP (XEXP (X, 1), 0)) == HImode)) \
1242: { register rtx temp = gen_reg_rtx (Pmode); \
1243: register rtx val = force_operand (XEXP (X, 0), 0); \
1244: emit_move_insn (temp, val); \
1245: COPY_ONCE (X); \
1246: XEXP (X, 0) = temp; \
1247: goto WIN; }}}
1248:
1249: /* Go to LABEL if ADDR (a legitimate address expression)
1250: has an effect that depends on the machine mode it is used for.
1251: On the 68000, only predecrement and postincrement address depend thus
1252: (the amount of decrement or increment being the length of the operand). */
1253:
1254: #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) \
1255: if (GET_CODE (ADDR) == POST_INC || GET_CODE (ADDR) == PRE_DEC) goto LABEL
1256:
1257: /* Specify the machine mode that this machine uses
1258: for the index in the tablejump instruction. */
1259: #define CASE_VECTOR_MODE HImode
1260:
1261: /* Define this if the tablejump instruction expects the table
1262: to contain offsets from the address of the table.
1263: Do not define this if the table should contain absolute addresses. */
1264: #define CASE_VECTOR_PC_RELATIVE
1265:
1266: /* Specify the tree operation to be used to convert reals to integers. */
1267: #define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR
1268:
1269: /* This is the kind of divide that is easiest to do in the general case. */
1270: #define EASY_DIV_EXPR TRUNC_DIV_EXPR
1271:
1272: /* Define this as 1 if `char' should by default be signed; else as 0. */
1273: #define DEFAULT_SIGNED_CHAR 1
1274:
1275: /* Don't cse the address of the function being compiled. */
1276: #define NO_RECURSIVE_FUNCTION_CSE
1277:
1278: /* Max number of bytes we can move from memory to memory
1279: in one reasonably fast instruction. */
1280: #define MOVE_MAX 4
1281:
1282: /* Define this if zero-extension is slow (more than one real instruction). */
1283: #define SLOW_ZERO_EXTEND
1284:
1285: /* Nonzero if access to memory by bytes is slow and undesirable. */
1286: #define SLOW_BYTE_ACCESS 0
1287:
1288: /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
1289: is done just by pretending it is already truncated. */
1290: #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
1291:
1292: /* We assume that the store-condition-codes instructions store 0 for false
1293: and some other value for true. This is the value stored for true. */
1294:
1295: #define STORE_FLAG_VALUE -1
1296:
1297: /* When a prototype says `char' or `short', really pass an `int'. */
1298: #define PROMOTE_PROTOTYPES
1299:
1300: /* Specify the machine mode that pointers have.
1301: After generation of rtl, the compiler makes no further distinction
1302: between pointers and any other objects of this machine mode. */
1303: #define Pmode SImode
1304:
1305: /* A function address in a call instruction
1306: is a byte address (for indexing purposes)
1307: so give the MEM rtx a byte's mode. */
1308: #define FUNCTION_MODE QImode
1309:
1310: /* Compute the cost of computing a constant rtl expression RTX
1311: whose rtx-code is CODE. The body of this macro is a portion
1312: of a switch statement. If the code is computed here,
1313: return it with a return statement. Otherwise, break from the switch. */
1314:
1315: #define CONST_COSTS(RTX,CODE,OUTER_CODE) \
1316: case CONST_INT: \
1317: /* Constant zero is super cheap due to clr instruction. */ \
1318: if (RTX == const0_rtx) return 0; \
1319: /* Constants between -128 and 127 are cheap due to moveq */ \
1320: if (INTVAL (RTX) >= -128 && INTVAL (RTX) <= 127) return 1; \
1321: /* Constants between -136 and 254 are easily generated */ \
1322: /* by intelligent uses of moveq, add[q], and subq */ \
1323: if ((OUTER_CODE) == SET && INTVAL (RTX) >= -136 \
1324: && INTVAL (RTX) <= 254) return 2; \
1325: case CONST: \
1326: case LABEL_REF: \
1327: case SYMBOL_REF: \
1328: return 3; \
1329: case CONST_DOUBLE: \
1330: return 5;
1331:
1332: /* Compute the cost of various arithmetic operations.
1333: These are vaguely right for a 68020. */
1334: /* The costs for long multiply have been adjusted to
1335: work properly in synth_mult on the 68020,
1336: relative to an average of the time for add and the time for shift,
1337: taking away a little more because sometimes move insns are needed. */
1338: #define MULL_COST (TARGET_68040 ? 5 : 13)
1339: #define MULW_COST (TARGET_68040 ? 3 : 8)
1340:
1341: #define RTX_COSTS(X,CODE,OUTER_CODE) \
1342: case PLUS: \
1343: /* An lea costs about three times as much as a simple add. */ \
1344: if (GET_MODE (X) == SImode \
1345: && GET_CODE (XEXP (X, 0)) == REG \
1346: && GET_CODE (XEXP (X, 1)) == MULT \
1347: && GET_CODE (XEXP (XEXP (X, 1), 0)) == REG \
1348: && GET_CODE (XEXP (XEXP (X, 1), 1)) == CONST_INT \
1349: && (INTVAL (XEXP (XEXP (X, 1), 1)) == 2 \
1350: || INTVAL (XEXP (XEXP (X, 1), 1)) == 4 \
1351: || INTVAL (XEXP (XEXP (X, 1), 1)) == 8)) \
1352: return COSTS_N_INSNS (3); /* lea an@(dx:l:i),am */ \
1353: break; \
1354: case ASHIFT: \
1355: case ASHIFTRT: \
1356: case LSHIFT: \
1357: case LSHIFTRT: \
1358: /* A shift by a big integer takes an extra instruction. */ \
1359: if (GET_CODE (XEXP (X, 1)) == CONST_INT \
1360: && (INTVAL (XEXP (X, 1)) == 16)) \
1361: return COSTS_N_INSNS (2); /* clrw;swap */ \
1362: if (GET_CODE (XEXP (X, 1)) == CONST_INT \
1363: && !(INTVAL (XEXP (X, 1)) > 0 \
1364: && INTVAL (XEXP (X, 1)) <= 8)) \
1365: return COSTS_N_INSNS (3); /* lsr #i,dn */ \
1366: break; \
1367: case MULT: \
1368: if (GET_CODE (XEXP (x, 1)) == CONST_INT \
1369: && exact_log2 (INTVAL (XEXP (x, 1))) >= 0) \
1370: { \
1371: /* A shift by a big integer takes an extra instruction. */ \
1372: if (GET_CODE (XEXP (X, 1)) == CONST_INT \
1373: && (INTVAL (XEXP (X, 1)) == (1 << 16))) \
1374: return COSTS_N_INSNS (2); /* clrw;swap */ \
1375: if (GET_CODE (XEXP (X, 1)) == CONST_INT \
1376: && !(INTVAL (XEXP (X, 1)) > 1 \
1377: && INTVAL (XEXP (X, 1)) <= 256)) \
1378: return COSTS_N_INSNS (3); /* lsr #i,dn */ \
1379: break; \
1380: } \
1381: else if (GET_MODE (X) == QImode || GET_MODE (X) == HImode) \
1382: return COSTS_N_INSNS (MULW_COST); \
1383: else \
1384: return COSTS_N_INSNS (MULL_COST); \
1385: break; \
1386: case DIV: \
1387: case UDIV: \
1388: case MOD: \
1389: case UMOD: \
1390: if (GET_MODE (X) == QImode || GET_MODE (X) == HImode) \
1391: return COSTS_N_INSNS (27); /* div.w */ \
1392: return COSTS_N_INSNS (43); /* div.l */
1393:
1394: /* Tell final.c how to eliminate redundant test instructions. */
1395:
1396: /* Here we define machine-dependent flags and fields in cc_status
1397: (see `conditions.h'). */
1398:
1399: /* Set if the cc value is actually in the 68881, so a floating point
1400: conditional branch must be output. */
1401: #define CC_IN_68881 04000
1402:
1403: /* Store in cc_status the expressions that the condition codes will
1404: describe after execution of an instruction whose pattern is EXP.
1405: Do not alter them if the instruction would not alter the cc's. */
1406:
1407: /* On the 68000, all the insns to store in an address register fail to
1408: set the cc's. However, in some cases these instructions can make it
1409: possibly invalid to use the saved cc's. In those cases we clear out
1410: some or all of the saved cc's so they won't be used. */
1411:
1412: #define NOTICE_UPDATE_CC(EXP,INSN) notice_update_cc (EXP, INSN)
1413:
1414: #define OUTPUT_JUMP(NORMAL, FLOAT, NO_OV) \
1415: { if (cc_prev_status.flags & CC_IN_68881) \
1416: return FLOAT; \
1417: if (cc_prev_status.flags & CC_NO_OVERFLOW) \
1418: return NO_OV; \
1419: return NORMAL; }
1420:
1421: /* Control the assembler format that we output. */
1422:
1423: /* Output at beginning of assembler file. */
1424:
1425: #define ASM_FILE_START(FILE) \
1426: fprintf (FILE, "#NO_APP\n");
1427:
1428: /* Output to assembler file text saying following lines
1429: may contain character constants, extra white space, comments, etc. */
1430:
1431: #define ASM_APP_ON "#APP\n"
1432:
1433: /* Output to assembler file text saying following lines
1434: no longer contain unusual constructs. */
1435:
1436: #define ASM_APP_OFF "#NO_APP\n"
1437:
1438: /* Output before read-only data. */
1439:
1440: #define TEXT_SECTION_ASM_OP ".text"
1441:
1442: /* Output before writable data. */
1443:
1444: #define DATA_SECTION_ASM_OP ".data"
1445:
1446: /* Here are four prefixes that are used by asm_fprintf to
1447: facilitate customization for alternate assembler syntaxes.
1448: Machines with no likelihood of an alternate syntax need not
1449: define these and need not use asm_fprintf. */
1450:
1451: /* The prefix for register names. Note that REGISTER_NAMES
1452: is supposed to include this prefix. */
1453:
1454: #define REGISTER_PREFIX ""
1455:
1456: /* The prefix for local labels. You should be able to define this as
1457: an empty string, or any arbitrary string (such as ".", ".L%", etc)
1458: without having to make any other changes to account for the specific
1459: definition. Note it is a string literal, not interpreted by printf
1460: and friends. */
1461:
1462: #define LOCAL_LABEL_PREFIX ""
1463:
1464: /* The prefix to add to user-visible assembler symbols. */
1465:
1466: #define USER_LABEL_PREFIX "_"
1467:
1468: /* The prefix for immediate operands. */
1469:
1470: #define IMMEDIATE_PREFIX "#"
1471:
1472: /* How to refer to registers in assembler output.
1473: This sequence is indexed by compiler's hard-register-number (see above). */
1474:
1475: #ifndef SUPPORT_SUN_FPA
1476:
1477: #define REGISTER_NAMES \
1478: {"d0", "d1", "d2", "d3", "d4", "d5", "d6", "d7", \
1479: "a0", "a1", "a2", "a3", "a4", "a5", "a6", "sp", \
1480: "fp0", "fp1", "fp2", "fp3", "fp4", "fp5", "fp6", "fp7" }
1481:
1482: #else /* SUPPORTED_SUN_FPA */
1483:
1484: #define REGISTER_NAMES \
1485: {"d0", "d1", "d2", "d3", "d4", "d5", "d6", "d7", \
1486: "a0", "a1", "a2", "a3", "a4", "a5", "a6", "sp", \
1487: "fp0", "fp1", "fp2", "fp3", "fp4", "fp5", "fp6", "fp7", \
1488: "fpa0", "fpa1", "fpa2", "fpa3", "fpa4", "fpa5", "fpa6", "fpa7", \
1489: "fpa8", "fpa9", "fpa10", "fpa11", "fpa12", "fpa13", "fpa14", "fpa15", \
1490: "fpa16", "fpa17", "fpa18", "fpa19", "fpa20", "fpa21", "fpa22", "fpa23", \
1491: "fpa24", "fpa25", "fpa26", "fpa27", "fpa28", "fpa29", "fpa30", "fpa31" }
1492:
1493: #endif /* defined SUPPORT_SUN_FPA */
1494:
1495: /* How to renumber registers for dbx and gdb.
1496: On the Sun-3, the floating point registers have numbers
1497: 18 to 25, not 16 to 23 as they do in the compiler. */
1498:
1499: #define DBX_REGISTER_NUMBER(REGNO) ((REGNO) < 16 ? (REGNO) : (REGNO) + 2)
1500:
1501: /* This is how to output the definition of a user-level label named NAME,
1502: such as the label on a static function or variable NAME. */
1503:
1504: #define ASM_OUTPUT_LABEL(FILE,NAME) \
1505: do { assemble_name (FILE, NAME); fputs (":\n", FILE); } while (0)
1506:
1507: /* This is how to output a command to make the user-level label named NAME
1508: defined for reference from other files. */
1509:
1510: #define GLOBAL_ASM_OP ".globl"
1511: #define ASM_GLOBALIZE_LABEL(FILE,NAME) \
1512: do { fprintf (FILE, "%s ", GLOBAL_ASM_OP); \
1513: assemble_name (FILE, NAME); \
1514: fputs ("\n", FILE);} while (0)
1515:
1516: /* This is how to output a reference to a user-level label named NAME.
1517: `assemble_name' uses this. */
1518:
1519: #define ASM_OUTPUT_LABELREF(FILE,NAME) \
1520: asm_fprintf (FILE, "%0U%s", NAME)
1521:
1522: /* This is how to output an internal numbered label where
1523: PREFIX is the class of label and NUM is the number within the class. */
1524:
1525: #define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \
1526: asm_fprintf (FILE, "%0L%s%d:\n", PREFIX, NUM)
1527:
1528: /* This is how to store into the string LABEL
1529: the symbol_ref name of an internal numbered label where
1530: PREFIX is the class of label and NUM is the number within the class.
1531: This is suitable for output with `assemble_name'. */
1532:
1533: #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \
1534: sprintf (LABEL, "*%s%s%d", LOCAL_LABEL_PREFIX, PREFIX, NUM)
1535:
1536: /* This is how to output a `long double' extended real constant. */
1537:
1538: #define ASM_OUTPUT_LONG_DOUBLE(FILE,VALUE) \
1539: do { long l[3]; \
1540: REAL_VALUE_TO_TARGET_LONG_DOUBLE (VALUE, l); \
1541: if (sizeof (int) == sizeof (long)) \
1542: fprintf (FILE, "\t.long 0x%x,0x%x,0x%x\n", l[0], l[1], l[2]); \
1543: else \
1544: fprintf (FILE, "\t.long 0x%lx,0x%lx,0x%lx\n", l[0], l[1], l[2]); \
1545: } while (0)
1546:
1547: /* This is how to output an assembler line defining a `double' constant. */
1548:
1549: #define ASM_OUTPUT_DOUBLE(FILE,VALUE) \
1550: do { char dstr[30]; \
1551: REAL_VALUE_TO_DECIMAL (VALUE, "%.20g", dstr); \
1552: fprintf (FILE, "\t.double 0r%s\n", dstr); \
1553: } while (0)
1554:
1555: /* This is how to output an assembler line defining a `float' constant. */
1556:
1557: #define ASM_OUTPUT_FLOAT(FILE,VALUE) \
1558: do { long l; \
1559: REAL_VALUE_TO_TARGET_SINGLE (VALUE, l); \
1560: if (sizeof (int) == sizeof (long)) \
1561: fprintf (FILE, "\t.long 0x%x\n", l); \
1562: else \
1563: fprintf (FILE, "\t.long 0x%lx\n", l); \
1564: } while (0)
1565:
1566: /* This is how to output an assembler line defining an `int' constant. */
1567:
1568: #define ASM_OUTPUT_INT(FILE,VALUE) \
1569: ( fprintf (FILE, "\t.long "), \
1570: output_addr_const (FILE, (VALUE)), \
1571: fprintf (FILE, "\n"))
1572:
1573: /* Likewise for `char' and `short' constants. */
1574:
1575: #define ASM_OUTPUT_SHORT(FILE,VALUE) \
1576: ( fprintf (FILE, "\t.word "), \
1577: output_addr_const (FILE, (VALUE)), \
1578: fprintf (FILE, "\n"))
1579:
1580: #define ASM_OUTPUT_CHAR(FILE,VALUE) \
1581: ( fprintf (FILE, "\t.byte "), \
1582: output_addr_const (FILE, (VALUE)), \
1583: fprintf (FILE, "\n"))
1584:
1585: /* This is how to output an assembler line for a numeric constant byte. */
1586:
1587: #define ASM_OUTPUT_BYTE(FILE,VALUE) \
1588: fprintf (FILE, "\t.byte 0x%x\n", (VALUE))
1589:
1590: /* This is how to output an insn to push a register on the stack.
1591: It need not be very fast code. */
1592:
1593: #define ASM_OUTPUT_REG_PUSH(FILE,REGNO) \
1594: asm_fprintf (FILE, "\tmovel %s,%Rsp@-\n", reg_names[REGNO])
1595:
1596: /* This is how to output an insn to pop a register from the stack.
1597: It need not be very fast code. */
1598:
1599: #define ASM_OUTPUT_REG_POP(FILE,REGNO) \
1600: asm_fprintf (FILE, "\tmovel %Rsp@+,%s\n", reg_names[REGNO])
1601:
1602: /* This is how to output an element of a case-vector that is absolute.
1603: (The 68000 does not use such vectors,
1604: but we must define this macro anyway.) */
1605:
1606: #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
1607: asm_fprintf (FILE, "\t.long %LL%d\n", VALUE)
1608:
1609: /* This is how to output an element of a case-vector that is relative. */
1610:
1611: #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, VALUE, REL) \
1612: asm_fprintf (FILE, "\t.word %LL%d-%LL%d\n", VALUE, REL)
1613:
1614: /* This is how to output an assembler line
1615: that says to advance the location counter
1616: to a multiple of 2**LOG bytes. */
1617:
1618: /* We don't have a way to align to more than a two-byte boundary, so do the
1619: best we can and don't complain. */
1620: #define ASM_OUTPUT_ALIGN(FILE,LOG) \
1621: if ((LOG) >= 1) \
1622: fprintf (FILE, "\t.even\n");
1623:
1624: #define ASM_OUTPUT_SKIP(FILE,SIZE) \
1625: fprintf (FILE, "\t.skip %u\n", (SIZE))
1626:
1627: /* This says how to output an assembler line
1628: to define a global common symbol. */
1629:
1630: #define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \
1631: ( fputs (".comm ", (FILE)), \
1632: assemble_name ((FILE), (NAME)), \
1633: fprintf ((FILE), ",%u\n", (ROUNDED)))
1634:
1635: /* This says how to output an assembler line
1636: to define a local common symbol. */
1637:
1638: #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE, ROUNDED) \
1639: ( fputs (".lcomm ", (FILE)), \
1640: assemble_name ((FILE), (NAME)), \
1641: fprintf ((FILE), ",%u\n", (ROUNDED)))
1642:
1643: /* Store in OUTPUT a string (made with alloca) containing
1644: an assembler-name for a local static variable named NAME.
1645: LABELNO is an integer which is different for each call. */
1646:
1647: #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \
1648: ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \
1649: sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO)))
1650:
1651: /* Define the parentheses used to group arithmetic operations
1652: in assembler code. */
1653:
1654: #define ASM_OPEN_PAREN "("
1655: #define ASM_CLOSE_PAREN ")"
1656:
1657: /* Define results of standard character escape sequences. */
1658: #define TARGET_BELL 007
1659: #define TARGET_BS 010
1660: #define TARGET_TAB 011
1661: #define TARGET_NEWLINE 012
1662: #define TARGET_VT 013
1663: #define TARGET_FF 014
1664: #define TARGET_CR 015
1665:
1666: /* Output a float value (represented as a C double) as an immediate operand.
1667: This macro is a 68k-specific macro. */
1668:
1669: #define ASM_OUTPUT_FLOAT_OPERAND(CODE,FILE,VALUE) \
1670: do { \
1671: if (CODE == 'f') \
1672: { \
1673: char dstr[30]; \
1674: REAL_VALUE_TO_DECIMAL (VALUE, "%.9g", dstr); \
1675: asm_fprintf ((FILE), "%I0r%s", dstr); \
1676: } \
1677: else \
1678: { \
1679: long l; \
1680: REAL_VALUE_TO_TARGET_SINGLE (VALUE, l); \
1681: if (sizeof (int) == sizeof (long)) \
1682: asm_fprintf ((FILE), "%I0x%x", l); \
1683: else \
1684: asm_fprintf ((FILE), "%I0x%lx", l); \
1685: } \
1686: } while (0)
1687:
1688: /* Output a double value (represented as a C double) as an immediate operand.
1689: This macro is a 68k-specific macro. */
1690: #define ASM_OUTPUT_DOUBLE_OPERAND(FILE,VALUE) \
1691: do { char dstr[30]; \
1692: REAL_VALUE_TO_DECIMAL (VALUE, "%.20g", dstr); \
1693: asm_fprintf (FILE, "%I0r%s", dstr); \
1694: } while (0)
1695:
1696: /* Note, long double immediate operands are not actually
1697: generated by m68k.md. */
1698: #define ASM_OUTPUT_LONG_DOUBLE_OPERAND(FILE,VALUE) \
1699: do { char dstr[30]; \
1700: REAL_VALUE_TO_DECIMAL (VALUE, "%.20g", dstr); \
1701: asm_fprintf (FILE, "%I0r%s", dstr); \
1702: } while (0)
1703:
1704: /* Print operand X (an rtx) in assembler syntax to file FILE.
1705: CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
1706: For `%' followed by punctuation, CODE is the punctuation and X is null.
1707:
1708: On the 68000, we use several CODE characters:
1709: '.' for dot needed in Motorola-style opcode names.
1710: '-' for an operand pushing on the stack:
1711: sp@-, -(sp) or -(%sp) depending on the style of syntax.
1712: '+' for an operand pushing on the stack:
1713: sp@+, (sp)+ or (%sp)+ depending on the style of syntax.
1714: '@' for a reference to the top word on the stack:
1715: sp@, (sp) or (%sp) depending on the style of syntax.
1716: '#' for an immediate operand prefix (# in MIT and Motorola syntax
1717: but & in SGS syntax).
1718: '!' for the fpcr register (used in some float-to-fixed conversions).
1719: '$' for the letter `s' in an op code, but only on the 68040.
1720: '&' for the letter `d' in an op code, but only on the 68040.
1721: '/' for register prefix needed by longlong.h.
1722:
1723: 'b' for byte insn (no effect, on the Sun; this is for the ISI).
1724: 'd' to force memory addressing to be absolute, not relative.
1725: 'f' for float insn (print a CONST_DOUBLE as a float rather than in hex)
1726: 'w' for FPA insn (print a CONST_DOUBLE as a SunFPA constant rather
1727: than directly). Second part of 'y' below.
1728: 'x' for float insn (print a CONST_DOUBLE as a float rather than in hex),
1729: or print pair of registers as rx:ry.
1730: 'y' for a FPA insn (print pair of registers as rx:ry). This also outputs
1731: CONST_DOUBLE's as SunFPA constant RAM registers if
1732: possible, so it should not be used except for the SunFPA. */
1733:
1734: #define PRINT_OPERAND_PUNCT_VALID_P(CODE) \
1735: ((CODE) == '.' || (CODE) == '#' || (CODE) == '-' \
1736: || (CODE) == '+' || (CODE) == '@' || (CODE) == '!' \
1737: || (CODE) == '$' || (CODE) == '&' || (CODE) == '/')
1738:
1739: /* A C compound statement to output to stdio stream STREAM the
1740: assembler syntax for an instruction operand X. X is an RTL
1741: expression.
1742:
1743: CODE is a value that can be used to specify one of several ways
1744: of printing the operand. It is used when identical operands
1745: must be printed differently depending on the context. CODE
1746: comes from the `%' specification that was used to request
1747: printing of the operand. If the specification was just `%DIGIT'
1748: then CODE is 0; if the specification was `%LTR DIGIT' then CODE
1749: is the ASCII code for LTR.
1750:
1751: If X is a register, this macro should print the register's name.
1752: The names can be found in an array `reg_names' whose type is
1753: `char *[]'. `reg_names' is initialized from `REGISTER_NAMES'.
1754:
1755: When the machine description has a specification `%PUNCT' (a `%'
1756: followed by a punctuation character), this macro is called with
1757: a null pointer for X and the punctuation character for CODE.
1758:
1759: See m68k.c for the m68k specific codes. */
1760:
1761: #define PRINT_OPERAND(FILE, X, CODE) print_operand (FILE, X, CODE)
1762:
1763: /* A C compound statement to output to stdio stream STREAM the
1764: assembler syntax for an instruction operand that is a memory
1765: reference whose address is ADDR. ADDR is an RTL expression.
1766:
1767: On some machines, the syntax for a symbolic address depends on
1768: the section that the address refers to. On these machines,
1769: define the macro `ENCODE_SECTION_INFO' to store the information
1770: into the `symbol_ref', and then check for it here. */
1771:
1772: #define PRINT_OPERAND_ADDRESS(FILE, ADDR) print_operand_address (FILE, ADDR)
1773:
1774:
1775: /* Define functions defined in aux-output.c and used in templates. */
1776:
1777: extern char *output_move_double ();
1778: extern char *output_move_const_single ();
1779: extern char *output_move_const_double ();
1780: extern char *output_btst ();
1781:
1782: /*
1783: Local variables:
1784: version-control: t
1785: End:
1786: */
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