![[BACK]](/cvsweb/icons/back.gif){kind=icon}
Return to m68k.h CVS log ![[TXT]](/cvsweb/icons/text.gif){kind=icon}
![[DIR]](/cvsweb/icons/dir.gif){kind=icon}
Up to [GCC 2.x] / gcc / config / m68k|
Return to m68k.h CVS log | Up to [GCC 2.x] / gcc / config / m68k |
1.1 root 1: /* Definitions of target machine for GNU compiler. Sun 68000/68020 version. 1.1.1.3 ! root 2: Copyright (C) 1987, 1988, 1993, 1994 Free Software Foundation, Inc. 1.1 root 3: 4: This file is part of GNU CC. 5: 6: GNU CC is free software; you can redistribute it and/or modify 7: it under the terms of the GNU General Public License as published by 8: the Free Software Foundation; either version 2, or (at your option) 9: any later version. 10: 11: GNU CC is distributed in the hope that it will be useful, 12: but WITHOUT ANY WARRANTY; without even the implied warranty of 13: MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14: GNU General Public License for more details. 15: 16: You should have received a copy of the GNU General Public License 17: along with GNU CC; see the file COPYING. If not, write to 18: the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */ 19: 20: 21: /* Note that some other tm.h files include this one and then override 22: many of the definitions that relate to assembler syntax. */ 23: 24: 25: /* Names to predefine in the preprocessor for this target machine. */ 26: 27: /* See sun3.h, sun2.h, isi.h for different CPP_PREDEFINES. */ 28: 29: /* Print subsidiary information on the compiler version in use. */ 30: #ifdef MOTOROLA 31: #define TARGET_VERSION fprintf (stderr, " (68k, Motorola syntax)"); 32: #else 33: #define TARGET_VERSION fprintf (stderr, " (68k, MIT syntax)"); 34: #endif 35: 36: /* Define SUPPORT_SUN_FPA to include support for generating code for 37: the Sun Floating Point Accelerator, an optional product for Sun 3 38: machines. By default, it is not defined. Avoid defining it unless 39: you need to output code for the Sun3+FPA architecture, as it has the 40: effect of slowing down the register set operations in hard-reg-set.h 41: (total number of registers will exceed number of bits in a long, 42: if defined, causing the set operations to expand to loops). 43: SUPPORT_SUN_FPA is typically defined in sun3.h. */ 44: 45: /* Run-time compilation parameters selecting different hardware subsets. */ 46: 47: extern int target_flags; 48: 49: /* Macros used in the machine description to test the flags. */ 50: 51: /* Compile for a 68020 (not a 68000 or 68010). */ 52: #define TARGET_68020 (target_flags & 1) 53: 54: /* Compile 68881 insns for floating point (not library calls). */ 55: #define TARGET_68881 (target_flags & 2) 56: 57: /* Compile using 68020 bitfield insns. */ 58: #define TARGET_BITFIELD (target_flags & 4) 59: 60: /* Compile using rtd insn calling sequence. 61: This will not work unless you use prototypes at least 62: for all functions that can take varying numbers of args. */ 63: #define TARGET_RTD (target_flags & 8) 64: 65: /* Compile passing first two args in regs 0 and 1. 66: This exists only to test compiler features that will 67: be needed for RISC chips. It is not usable 68: and is not intended to be usable on this cpu. */ 69: #define TARGET_REGPARM (target_flags & 020) 70: 71: /* Compile with 16-bit `int'. */ 72: #define TARGET_SHORT (target_flags & 040) 73: 74: /* Compile with special insns for Sun FPA. */ 75: #ifdef SUPPORT_SUN_FPA 76: #define TARGET_FPA (target_flags & 0100) 77: #else 78: #define TARGET_FPA 0 79: #endif 80: 81: /* Compile (actually, link) for Sun SKY board. */ 82: #define TARGET_SKY (target_flags & 0200) 83: 84: /* Optimize for 68040, but still allow execution on 68020 85: (-m68020-40 or -m68040). 86: The 68040 will execute all 68030 and 68881/2 instructions, but some 87: of them must be emulated in software by the OS. When TARGET_68040 is 88: turned on, these instructions won't be used. This code will still 89: run on a 68030 and 68881/2. */ 90: #define TARGET_68040 (target_flags & 01400) 91: 92: /* Use the 68040-only fp instructions (-m68040). */ 93: #define TARGET_68040_ONLY (target_flags & 01000) 94: 95: /* Macro to define tables used to set the flags. 96: This is a list in braces of pairs in braces, 97: each pair being { "NAME", VALUE } 98: where VALUE is the bits to set or minus the bits to clear. 99: An empty string NAME is used to identify the default VALUE. */ 100: 101: #define TARGET_SWITCHES \ 102: { { "68020", -01400}, \ 103: { "c68020", -01400}, \ 104: { "68020", 5}, \ 105: { "c68020", 5}, \ 106: { "68881", 2}, \ 107: { "bitfield", 4}, \ 108: { "68000", -01405}, \ 109: { "c68000", -01405}, \ 110: { "soft-float", -01102}, \ 111: { "nobitfield", -4}, \ 112: { "rtd", 8}, \ 113: { "nortd", -8}, \ 114: { "short", 040}, \ 115: { "noshort", -040}, \ 116: { "fpa", 0100}, \ 117: { "nofpa", -0100}, \ 118: { "sky", 0200}, \ 119: { "nosky", -0200}, \ 120: { "68020-40", 0407}, \ 121: { "68030", -01400}, \ 122: { "68030", 5}, \ 123: { "68040", 01007}, \ 1.1.1.2 root 124: { "68851", 0}, /* Affects *_SPEC and/or GAS. */ \ 125: { "no-68851", 0}, /* Affects *_SPEC and/or GAS. */ \ 126: { "68302", 0}, /* Affects *_SPEC and/or GAS. */ \ 127: { "no-68302", 0}, /* Affects *_SPEC and/or GAS. */ \ 128: { "68332", 0}, /* Affects *_SPEC and/or GAS. */ \ 129: { "no-68332", 0}, /* Affects *_SPEC and/or GAS. */ \ 130: SUBTARGET_SWITCHES \ 1.1 root 131: { "", TARGET_DEFAULT}} 132: /* TARGET_DEFAULT is defined in sun*.h and isi.h, etc. */ 133: 1.1.1.2 root 134: /* This is meant to be redefined in the host dependent files */ 135: #define SUBTARGET_SWITCHES 136: 1.1 root 137: #ifdef SUPPORT_SUN_FPA 138: /* Blow away 68881 flag silently on TARGET_FPA (since we can't clear 139: any bits in TARGET_SWITCHES above) */ 140: #define OVERRIDE_OPTIONS \ 141: { \ 142: if (TARGET_FPA) target_flags &= ~2; \ 143: if (! TARGET_68020 && flag_pic == 2) \ 144: error("-fPIC is not currently supported on the 68000 or 68010\n"); \ 1.1.1.2 root 145: SUBTARGET_OVERRIDE_OPTIONS \ 1.1 root 146: } 147: #else 148: #define OVERRIDE_OPTIONS \ 149: { \ 150: if (! TARGET_68020 && flag_pic == 2) \ 151: error("-fPIC is not currently supported on the 68000 or 68010\n"); \ 1.1.1.2 root 152: SUBTARGET_OVERRIDE_OPTIONS \ 1.1 root 153: } 154: #endif /* defined SUPPORT_SUN_FPA */ 1.1.1.2 root 155: 156: /* This is meant to be redefined in the host dependent files */ 157: #define SUBTARGET_OVERRIDE_OPTIONS 1.1 root 158: 159: /* target machine storage layout */ 160: 161: /* Define for XFmode extended real floating point support. 162: This will automatically cause REAL_ARITHMETIC to be defined. */ 163: #define LONG_DOUBLE_TYPE_SIZE 96 164: 165: /* Define if you don't want extended real, but do want to use the 166: software floating point emulator for REAL_ARITHMETIC and 167: decimal <-> binary conversion. */ 168: /* #define REAL_ARITHMETIC */ 169: 170: /* Define this if most significant bit is lowest numbered 171: in instructions that operate on numbered bit-fields. 172: This is true for 68020 insns such as bfins and bfexts. 173: We make it true always by avoiding using the single-bit insns 174: except in special cases with constant bit numbers. */ 175: #define BITS_BIG_ENDIAN 1 176: 177: /* Define this if most significant byte of a word is the lowest numbered. */ 178: /* That is true on the 68000. */ 179: #define BYTES_BIG_ENDIAN 1 180: 181: /* Define this if most significant word of a multiword number is the lowest 182: numbered. */ 183: /* For 68000 we can decide arbitrarily 184: since there are no machine instructions for them. 185: So let's be consistent. */ 186: #define WORDS_BIG_ENDIAN 1 187: 188: /* number of bits in an addressable storage unit */ 189: #define BITS_PER_UNIT 8 190: 191: /* Width in bits of a "word", which is the contents of a machine register. 192: Note that this is not necessarily the width of data type `int'; 193: if using 16-bit ints on a 68000, this would still be 32. 194: But on a machine with 16-bit registers, this would be 16. */ 195: #define BITS_PER_WORD 32 196: 197: /* Width of a word, in units (bytes). */ 198: #define UNITS_PER_WORD 4 199: 200: /* Width in bits of a pointer. 201: See also the macro `Pmode' defined below. */ 202: #define POINTER_SIZE 32 203: 204: /* Allocation boundary (in *bits*) for storing arguments in argument list. */ 205: #define PARM_BOUNDARY (TARGET_SHORT ? 16 : 32) 206: 207: /* Boundary (in *bits*) on which stack pointer should be aligned. */ 208: #define STACK_BOUNDARY 16 209: 210: /* Allocation boundary (in *bits*) for the code of a function. */ 211: #define FUNCTION_BOUNDARY 16 212: 213: /* Alignment of field after `int : 0' in a structure. */ 214: #define EMPTY_FIELD_BOUNDARY 16 215: 216: /* No data type wants to be aligned rounder than this. */ 217: #define BIGGEST_ALIGNMENT 16 218: 219: /* Set this nonzero if move instructions will actually fail to work 220: when given unaligned data. */ 221: #define STRICT_ALIGNMENT 1 222: 223: #define SELECT_RTX_SECTION(MODE, X) \ 224: { \ 225: if (!flag_pic) \ 226: readonly_data_section(); \ 227: else if (LEGITIMATE_PIC_OPERAND_P (X)) \ 228: readonly_data_section(); \ 229: else \ 230: data_section(); \ 231: } 232: 233: /* Define number of bits in most basic integer type. 234: (If undefined, default is BITS_PER_WORD). */ 235: 236: #define INT_TYPE_SIZE (TARGET_SHORT ? 16 : 32) 237: 238: /* Define these to avoid dependence on meaning of `int'. 239: Note that WCHAR_TYPE_SIZE is used in cexp.y, 240: where TARGET_SHORT is not available. */ 241: 242: #define WCHAR_TYPE "long int" 243: #define WCHAR_TYPE_SIZE 32 244: 245: /* Standard register usage. */ 246: 247: /* Number of actual hardware registers. 248: The hardware registers are assigned numbers for the compiler 249: from 0 to just below FIRST_PSEUDO_REGISTER. 250: All registers that the compiler knows about must be given numbers, 251: even those that are not normally considered general registers. 252: For the 68000, we give the data registers numbers 0-7, 253: the address registers numbers 010-017, 254: and the 68881 floating point registers numbers 020-027. */ 255: #ifndef SUPPORT_SUN_FPA 256: #define FIRST_PSEUDO_REGISTER 24 257: #else 258: #define FIRST_PSEUDO_REGISTER 56 259: #endif 260: 261: /* This defines the register which is used to hold the offset table for PIC. */ 262: #define PIC_OFFSET_TABLE_REGNUM 13 263: 264: /* Used to output a (use pic_offset_table_rtx) so that we 265: always save/restore a5 in functions that use PIC relocation 266: at *any* time during the compilation process. */ 267: #define FINALIZE_PIC finalize_pic() 268: 269: #ifndef SUPPORT_SUN_FPA 270: 271: /* 1 for registers that have pervasive standard uses 272: and are not available for the register allocator. 273: On the 68000, only the stack pointer is such. */ 274: 275: #define FIXED_REGISTERS \ 276: {/* Data registers. */ \ 277: 0, 0, 0, 0, 0, 0, 0, 0, \ 278: \ 279: /* Address registers. */ \ 280: 0, 0, 0, 0, 0, 0, 0, 1, \ 281: \ 282: /* Floating point registers \ 283: (if available). */ \ 284: 0, 0, 0, 0, 0, 0, 0, 0 } 285: 286: /* 1 for registers not available across function calls. 287: These must include the FIXED_REGISTERS and also any 288: registers that can be used without being saved. 289: The latter must include the registers where values are returned 290: and the register where structure-value addresses are passed. 291: Aside from that, you can include as many other registers as you like. */ 292: #define CALL_USED_REGISTERS \ 293: {1, 1, 0, 0, 0, 0, 0, 0, \ 294: 1, 1, 0, 0, 0, 0, 0, 1, \ 295: 1, 1, 0, 0, 0, 0, 0, 0 } 296: 297: #else /* SUPPORT_SUN_FPA */ 298: 299: /* 1 for registers that have pervasive standard uses 300: and are not available for the register allocator. 301: On the 68000, only the stack pointer is such. */ 302: 303: /* fpa0 is also reserved so that it can be used to move shit back and 304: forth between high fpa regs and everything else. */ 305: 306: #define FIXED_REGISTERS \ 307: {/* Data registers. */ \ 308: 0, 0, 0, 0, 0, 0, 0, 0, \ 309: \ 310: /* Address registers. */ \ 311: 0, 0, 0, 0, 0, 0, 0, 1, \ 312: \ 313: /* Floating point registers \ 314: (if available). */ \ 315: 0, 0, 0, 0, 0, 0, 0, 0, \ 316: \ 317: /* Sun3 FPA registers. */ \ 318: 1, 0, 0, 0, 0, 0, 0, 0, \ 319: 0, 0, 0, 0, 0, 0, 0, 0, \ 320: 0, 0, 0, 0, 0, 0, 0, 0, \ 321: 0, 0, 0, 0, 0, 0, 0, 0 } 322: 323: /* 1 for registers not available across function calls. 324: These must include the FIXED_REGISTERS and also any 325: registers that can be used without being saved. 326: The latter must include the registers where values are returned 327: and the register where structure-value addresses are passed. 328: Aside from that, you can include as many other registers as you like. */ 329: #define CALL_USED_REGISTERS \ 330: {1, 1, 0, 0, 0, 0, 0, 0, \ 331: 1, 1, 0, 0, 0, 0, 0, 1, \ 332: 1, 1, 0, 0, 0, 0, 0, 0, \ 333: /* FPA registers. */ \ 334: 1, 1, 1, 1, 0, 0, 0, 0, \ 335: 0, 0, 0, 0, 0, 0, 0, 0, \ 336: 0, 0, 0, 0, 0, 0, 0, 0, \ 337: 0, 0, 0, 0, 0, 0, 0, 0 } 338: 339: #endif /* defined SUPPORT_SUN_FPA */ 340: 341: 342: /* Make sure everything's fine if we *don't* have a given processor. 343: This assumes that putting a register in fixed_regs will keep the 344: compiler's mitts completely off it. We don't bother to zero it out 345: of register classes. If neither TARGET_FPA or TARGET_68881 is set, 346: the compiler won't touch since no instructions that use these 347: registers will be valid. 348: 349: Reserve PIC_OFFSET_TABLE_REGNUM (a5) for doing PIC relocation if 350: position independent code is being generated by making it a 351: fixed register */ 352: 353: #ifndef SUPPORT_SUN_FPA 354: 355: #define CONDITIONAL_REGISTER_USAGE \ 356: { \ 357: if (flag_pic) \ 358: fixed_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \ 359: } 360: 361: #else /* defined SUPPORT_SUN_FPA */ 362: 363: #define CONDITIONAL_REGISTER_USAGE \ 364: { \ 365: int i; \ 366: HARD_REG_SET x; \ 367: if (!TARGET_FPA) \ 368: { \ 369: COPY_HARD_REG_SET (x, reg_class_contents[(int)FPA_REGS]); \ 370: for (i = 0; i < FIRST_PSEUDO_REGISTER; i++ ) \ 371: if (TEST_HARD_REG_BIT (x, i)) \ 372: fixed_regs[i] = call_used_regs[i] = 1; \ 373: } \ 374: if (TARGET_FPA) \ 375: { \ 376: COPY_HARD_REG_SET (x, reg_class_contents[(int)FP_REGS]); \ 377: for (i = 0; i < FIRST_PSEUDO_REGISTER; i++ ) \ 378: if (TEST_HARD_REG_BIT (x, i)) \ 379: fixed_regs[i] = call_used_regs[i] = 1; \ 380: } \ 381: if (flag_pic) \ 382: fixed_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \ 383: } 384: 385: #endif /* defined SUPPORT_SUN_FPA */ 386: 387: /* Return number of consecutive hard regs needed starting at reg REGNO 388: to hold something of mode MODE. 389: This is ordinarily the length in words of a value of mode MODE 390: but can be less for certain modes in special long registers. 391: 392: On the 68000, ordinary registers hold 32 bits worth; 393: for the 68881 registers, a single register is always enough for 394: anything that can be stored in them at all. */ 395: #define HARD_REGNO_NREGS(REGNO, MODE) \ 396: ((REGNO) >= 16 ? GET_MODE_NUNITS (MODE) \ 397: : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)) 398: 399: #ifndef SUPPORT_SUN_FPA 400: 401: /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE. 402: On the 68000, the cpu registers can hold any mode but the 68881 registers 403: can hold only SFmode or DFmode. The 68881 registers can't hold anything 404: if 68881 use is disabled. */ 405: 406: #define HARD_REGNO_MODE_OK(REGNO, MODE) \ 407: (((REGNO) < 16) \ 408: || ((REGNO) < 24 \ 409: && TARGET_68881 \ 410: && (GET_MODE_CLASS (MODE) == MODE_FLOAT \ 411: || GET_MODE_CLASS (MODE) == MODE_COMPLEX_FLOAT))) 412: 413: #else /* defined SUPPORT_SUN_FPA */ 414: 415: /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE. 416: On the 68000, the cpu registers can hold any mode but the 68881 registers 417: can hold only SFmode or DFmode. And the 68881 registers can't hold anything 418: if 68881 use is disabled. However, the Sun FPA register can 419: (apparently) hold whatever you feel like putting in them. 420: If using the fpa, don't put a double in d7/a0. */ 421: 422: #define HARD_REGNO_MODE_OK(REGNO, MODE) \ 423: (((REGNO) < 16 \ 424: && !(TARGET_FPA \ 425: && GET_MODE_CLASS ((MODE)) != MODE_INT \ 426: && GET_MODE_UNIT_SIZE ((MODE)) > 4 \ 427: && (REGNO) < 8 && (REGNO) + GET_MODE_SIZE ((MODE)) / 4 > 8 \ 428: && (REGNO) % (GET_MODE_UNIT_SIZE ((MODE)) / 4) != 0)) \ 429: || ((REGNO) < 24 \ 430: ? TARGET_68881 && (GET_MODE_CLASS (MODE) == MODE_FLOAT \ 431: || GET_MODE_CLASS (MODE) == MODE_COMPLEX_FLOAT) \ 432: : ((REGNO) < 56 ? TARGET_FPA : 0))) 433: 434: #endif /* defined SUPPORT_SUN_FPA */ 435: 436: /* Value is 1 if it is a good idea to tie two pseudo registers 437: when one has mode MODE1 and one has mode MODE2. 438: If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2, 439: for any hard reg, then this must be 0 for correct output. */ 440: #define MODES_TIEABLE_P(MODE1, MODE2) \ 441: (! TARGET_68881 \ 442: || ((GET_MODE_CLASS (MODE1) == MODE_FLOAT \ 443: || GET_MODE_CLASS (MODE1) == MODE_COMPLEX_FLOAT) \ 444: == (GET_MODE_CLASS (MODE2) == MODE_FLOAT \ 445: || GET_MODE_CLASS (MODE2) == MODE_COMPLEX_FLOAT))) 446: 447: /* Specify the registers used for certain standard purposes. 448: The values of these macros are register numbers. */ 449: 450: /* m68000 pc isn't overloaded on a register. */ 451: /* #define PC_REGNUM */ 452: 453: /* Register to use for pushing function arguments. */ 454: #define STACK_POINTER_REGNUM 15 455: 456: /* Base register for access to local variables of the function. */ 457: #define FRAME_POINTER_REGNUM 14 458: 459: /* Value should be nonzero if functions must have frame pointers. 460: Zero means the frame pointer need not be set up (and parms 461: may be accessed via the stack pointer) in functions that seem suitable. 462: This is computed in `reload', in reload1.c. */ 463: #define FRAME_POINTER_REQUIRED 0 464: 465: /* Base register for access to arguments of the function. */ 466: #define ARG_POINTER_REGNUM 14 467: 468: /* Register in which static-chain is passed to a function. */ 469: #define STATIC_CHAIN_REGNUM 8 470: 471: /* Register in which address to store a structure value 472: is passed to a function. */ 473: #define STRUCT_VALUE_REGNUM 9 474: 475: /* Define the classes of registers for register constraints in the 476: machine description. Also define ranges of constants. 477: 478: One of the classes must always be named ALL_REGS and include all hard regs. 479: If there is more than one class, another class must be named NO_REGS 480: and contain no registers. 481: 482: The name GENERAL_REGS must be the name of a class (or an alias for 483: another name such as ALL_REGS). This is the class of registers 484: that is allowed by "g" or "r" in a register constraint. 485: Also, registers outside this class are allocated only when 486: instructions express preferences for them. 487: 488: The classes must be numbered in nondecreasing order; that is, 489: a larger-numbered class must never be contained completely 490: in a smaller-numbered class. 491: 492: For any two classes, it is very desirable that there be another 493: class that represents their union. */ 494: 495: /* The 68000 has three kinds of registers, so eight classes would be 496: a complete set. One of them is not needed. */ 497: 498: #ifndef SUPPORT_SUN_FPA 499: 500: enum reg_class { 501: NO_REGS, DATA_REGS, 502: ADDR_REGS, FP_REGS, 503: GENERAL_REGS, DATA_OR_FP_REGS, 504: ADDR_OR_FP_REGS, ALL_REGS, 505: LIM_REG_CLASSES }; 506: 507: #define N_REG_CLASSES (int) LIM_REG_CLASSES 508: 509: /* Give names of register classes as strings for dump file. */ 510: 511: #define REG_CLASS_NAMES \ 512: { "NO_REGS", "DATA_REGS", \ 513: "ADDR_REGS", "FP_REGS", \ 514: "GENERAL_REGS", "DATA_OR_FP_REGS", \ 515: "ADDR_OR_FP_REGS", "ALL_REGS" } 516: 517: /* Define which registers fit in which classes. 518: This is an initializer for a vector of HARD_REG_SET 519: of length N_REG_CLASSES. */ 520: 521: #define REG_CLASS_CONTENTS \ 522: { \ 523: 0x00000000, /* NO_REGS */ \ 524: 0x000000ff, /* DATA_REGS */ \ 525: 0x0000ff00, /* ADDR_REGS */ \ 526: 0x00ff0000, /* FP_REGS */ \ 527: 0x0000ffff, /* GENERAL_REGS */ \ 528: 0x00ff00ff, /* DATA_OR_FP_REGS */ \ 529: 0x00ffff00, /* ADDR_OR_FP_REGS */ \ 530: 0x00ffffff, /* ALL_REGS */ \ 531: } 532: 533: /* The same information, inverted: 534: Return the class number of the smallest class containing 535: reg number REGNO. This could be a conditional expression 536: or could index an array. */ 537: 538: #define REGNO_REG_CLASS(REGNO) (((REGNO)>>3)+1) 539: 540: #else /* defined SUPPORT_SUN_FPA */ 541: 542: /* 543: * Notes on final choices: 544: * 545: * 1) Didn't feel any need to union-ize LOW_FPA_REGS with anything 546: * else. 547: * 2) Removed all unions that involve address registers with 548: * floating point registers (left in unions of address and data with 549: * floating point). 550: * 3) Defined GENERAL_REGS as ADDR_OR_DATA_REGS. 551: * 4) Defined ALL_REGS as FPA_OR_FP_OR_GENERAL_REGS. 552: * 4) Left in everything else. 553: */ 554: enum reg_class { NO_REGS, LO_FPA_REGS, FPA_REGS, FP_REGS, 555: FP_OR_FPA_REGS, DATA_REGS, DATA_OR_FPA_REGS, DATA_OR_FP_REGS, 556: DATA_OR_FP_OR_FPA_REGS, ADDR_REGS, GENERAL_REGS, 557: GENERAL_OR_FPA_REGS, GENERAL_OR_FP_REGS, ALL_REGS, 558: LIM_REG_CLASSES }; 559: 560: #define N_REG_CLASSES (int) LIM_REG_CLASSES 561: 562: /* Give names of register classes as strings for dump file. */ 563: 564: #define REG_CLASS_NAMES \ 565: { "NO_REGS", "LO_FPA_REGS", "FPA_REGS", "FP_REGS", \ 566: "FP_OR_FPA_REGS", "DATA_REGS", "DATA_OR_FPA_REGS", "DATA_OR_FP_REGS", \ 567: "DATA_OR_FP_OR_FPA_REGS", "ADDR_REGS", "GENERAL_REGS", \ 568: "GENERAL_OR_FPA_REGS", "GENERAL_OR_FP_REGS", "ALL_REGS" } 569: 570: /* Define which registers fit in which classes. 571: This is an initializer for a vector of HARD_REG_SET 572: of length N_REG_CLASSES. */ 573: 574: #define REG_CLASS_CONTENTS \ 575: { \ 576: {0, 0}, /* NO_REGS */ \ 577: {0xff000000, 0x000000ff}, /* LO_FPA_REGS */ \ 578: {0xff000000, 0x00ffffff}, /* FPA_REGS */ \ 579: {0x00ff0000, 0x00000000}, /* FP_REGS */ \ 580: {0xffff0000, 0x00ffffff}, /* FP_OR_FPA_REGS */ \ 581: {0x000000ff, 0x00000000}, /* DATA_REGS */ \ 582: {0xff0000ff, 0x00ffffff}, /* DATA_OR_FPA_REGS */ \ 583: {0x00ff00ff, 0x00000000}, /* DATA_OR_FP_REGS */ \ 584: {0xffff00ff, 0x00ffffff}, /* DATA_OR_FP_OR_FPA_REGS */\ 585: {0x0000ff00, 0x00000000}, /* ADDR_REGS */ \ 586: {0x0000ffff, 0x00000000}, /* GENERAL_REGS */ \ 587: {0xff00ffff, 0x00ffffff}, /* GENERAL_OR_FPA_REGS */\ 588: {0x00ffffff, 0x00000000}, /* GENERAL_OR_FP_REGS */\ 589: {0xffffffff, 0x00ffffff}, /* ALL_REGS */ \ 590: } 591: 592: /* The same information, inverted: 593: Return the class number of the smallest class containing 594: reg number REGNO. This could be a conditional expression 595: or could index an array. */ 596: 597: extern enum reg_class regno_reg_class[]; 598: #define REGNO_REG_CLASS(REGNO) (regno_reg_class[(REGNO)>>3]) 599: 600: #endif /* SUPPORT_SUN_FPA */ 601: 602: /* The class value for index registers, and the one for base regs. */ 603: 604: #define INDEX_REG_CLASS GENERAL_REGS 605: #define BASE_REG_CLASS ADDR_REGS 606: 607: /* Get reg_class from a letter such as appears in the machine description. 608: We do a trick here to modify the effective constraints on the 609: machine description; we zorch the constraint letters that aren't 610: appropriate for a specific target. This allows us to guarantee 611: that a specific kind of register will not be used for a given target 612: without fiddling with the register classes above. */ 613: 614: #ifndef SUPPORT_SUN_FPA 615: 616: #define REG_CLASS_FROM_LETTER(C) \ 617: ((C) == 'a' ? ADDR_REGS : \ 618: ((C) == 'd' ? DATA_REGS : \ 619: ((C) == 'f' ? (TARGET_68881 ? FP_REGS : \ 620: NO_REGS) : \ 621: NO_REGS))) 622: 623: #else /* defined SUPPORT_SUN_FPA */ 624: 625: #define REG_CLASS_FROM_LETTER(C) \ 626: ((C) == 'a' ? ADDR_REGS : \ 627: ((C) == 'd' ? DATA_REGS : \ 628: ((C) == 'f' ? (TARGET_68881 ? FP_REGS : \ 629: NO_REGS) : \ 630: ((C) == 'x' ? (TARGET_FPA ? FPA_REGS : \ 631: NO_REGS) : \ 632: ((C) == 'y' ? (TARGET_FPA ? LO_FPA_REGS : \ 633: NO_REGS) : \ 634: NO_REGS))))) 635: 636: #endif /* defined SUPPORT_SUN_FPA */ 637: 638: /* The letters I, J, K, L and M in a register constraint string 639: can be used to stand for particular ranges of immediate operands. 640: This macro defines what the ranges are. 641: C is the letter, and VALUE is a constant value. 642: Return 1 if VALUE is in the range specified by C. 643: 644: For the 68000, `I' is used for the range 1 to 8 645: allowed as immediate shift counts and in addq. 646: `J' is used for the range of signed numbers that fit in 16 bits. 647: `K' is for numbers that moveq can't handle. 648: `L' is for range -8 to -1, range of values that can be added with subq. */ 649: 650: #define CONST_OK_FOR_LETTER_P(VALUE, C) \ 651: ((C) == 'I' ? (VALUE) > 0 && (VALUE) <= 8 : \ 652: (C) == 'J' ? (VALUE) >= -0x8000 && (VALUE) <= 0x7FFF : \ 653: (C) == 'K' ? (VALUE) < -0x80 || (VALUE) >= 0x80 : \ 654: (C) == 'L' ? (VALUE) < 0 && (VALUE) >= -8 : 0) 655: 656: /* 657: * A small bit of explanation: 658: * "G" defines all of the floating constants that are *NOT* 68881 659: * constants. this is so 68881 constants get reloaded and the 660: * fpmovecr is used. "H" defines *only* the class of constants that 661: * the fpa can use, because these can be gotten at in any fpa 662: * instruction and there is no need to force reloads. 663: */ 664: #ifndef SUPPORT_SUN_FPA 665: #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \ 666: ((C) == 'G' ? ! (TARGET_68881 && standard_68881_constant_p (VALUE)) : 0 ) 667: #else /* defined SUPPORT_SUN_FPA */ 668: #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \ 669: ((C) == 'G' ? ! (TARGET_68881 && standard_68881_constant_p (VALUE)) : \ 670: (C) == 'H' ? (TARGET_FPA && standard_sun_fpa_constant_p (VALUE)) : 0) 671: #endif /* defined SUPPORT_SUN_FPA */ 672: 673: /* Given an rtx X being reloaded into a reg required to be 674: in class CLASS, return the class of reg to actually use. 675: In general this is just CLASS; but on some machines 676: in some cases it is preferable to use a more restrictive class. 677: On the 68000 series, use a data reg if possible when the 678: value is a constant in the range where moveq could be used 679: and we ensure that QImodes are reloaded into data regs. 1.1.1.3 ! root 680: Also, if a floating constant needs reloading, put it in memory. ! 681: Don't do this for !G constants, since all patterns in the md file ! 682: expect them to be loaded into a register via fpmovecr. See above. */ 1.1 root 683: 684: #define PREFERRED_RELOAD_CLASS(X,CLASS) \ 685: ((GET_CODE (X) == CONST_INT \ 686: && (unsigned) (INTVAL (X) + 0x80) < 0x100 \ 687: && (CLASS) != ADDR_REGS) \ 688: ? DATA_REGS \ 689: : (GET_MODE (X) == QImode && (CLASS) != ADDR_REGS) \ 690: ? DATA_REGS \ 691: : (GET_CODE (X) == CONST_DOUBLE \ 692: && GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT) \ 1.1.1.3 ! root 693: ? (! CONST_DOUBLE_OK_FOR_LETTER_P (X, 'G') \ ! 694: && CLASS == FP_REGS \ ! 695: ? FP_REGS : NO_REGS) \ 1.1 root 696: : (CLASS)) 697: 698: /* Return the maximum number of consecutive registers 699: needed to represent mode MODE in a register of class CLASS. */ 700: /* On the 68000, this is the size of MODE in words, 701: except in the FP regs, where a single reg is always enough. */ 702: #ifndef SUPPORT_SUN_FPA 703: 704: #define CLASS_MAX_NREGS(CLASS, MODE) \ 705: ((CLASS) == FP_REGS ? 1 \ 706: : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)) 707: 708: /* Moves between fp regs and other regs are two insns. */ 709: #define REGISTER_MOVE_COST(CLASS1, CLASS2) \ 710: (((CLASS1) == FP_REGS && (CLASS2) != FP_REGS) \ 711: || ((CLASS2) == FP_REGS && (CLASS1) != FP_REGS) \ 712: ? 4 : 2) 713: 714: #else /* defined SUPPORT_SUN_FPA */ 715: 716: #define CLASS_MAX_NREGS(CLASS, MODE) \ 717: ((CLASS) == FP_REGS || (CLASS) == FPA_REGS || (CLASS) == LO_FPA_REGS ? 1 \ 718: : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)) 719: 720: /* Moves between fp regs and other regs are two insns. */ 721: /* Likewise for high fpa regs and other regs. */ 722: #define REGISTER_MOVE_COST(CLASS1, CLASS2) \ 723: ((((CLASS1) == FP_REGS && (CLASS2) != FP_REGS) \ 724: || ((CLASS2) == FP_REGS && (CLASS1) != FP_REGS) \ 725: || ((CLASS1) == FPA_REGS && (CLASS2) != FPA_REGS) \ 726: || ((CLASS2) == FPA_REGS && (CLASS1) != FPA_REGS)) \ 727: ? 4 : 2) 728: 729: #endif /* define SUPPORT_SUN_FPA */ 730: 731: /* Stack layout; function entry, exit and calling. */ 732: 733: /* Define this if pushing a word on the stack 734: makes the stack pointer a smaller address. */ 735: #define STACK_GROWS_DOWNWARD 736: 737: /* Nonzero if we need to generate stack-probe insns. 738: On most systems they are not needed. 739: When they are needed, define this as the stack offset to probe at. */ 740: #define NEED_PROBE 0 741: 742: /* Define this if the nominal address of the stack frame 743: is at the high-address end of the local variables; 744: that is, each additional local variable allocated 745: goes at a more negative offset in the frame. */ 746: #define FRAME_GROWS_DOWNWARD 747: 748: /* Offset within stack frame to start allocating local variables at. 749: If FRAME_GROWS_DOWNWARD, this is the offset to the END of the 750: first local allocated. Otherwise, it is the offset to the BEGINNING 751: of the first local allocated. */ 752: #define STARTING_FRAME_OFFSET 0 753: 754: /* If we generate an insn to push BYTES bytes, 755: this says how many the stack pointer really advances by. 756: On the 68000, sp@- in a byte insn really pushes a word. */ 757: #define PUSH_ROUNDING(BYTES) (((BYTES) + 1) & ~1) 758: 759: /* Offset of first parameter from the argument pointer register value. */ 760: #define FIRST_PARM_OFFSET(FNDECL) 8 761: 762: /* Value is the number of byte of arguments automatically 763: popped when returning from a subroutine call. 764: FUNTYPE is the data type of the function (as a tree), 765: or for a library call it is an identifier node for the subroutine name. 766: SIZE is the number of bytes of arguments passed on the stack. 767: 768: On the 68000, the RTS insn cannot pop anything. 769: On the 68010, the RTD insn may be used to pop them if the number 770: of args is fixed, but if the number is variable then the caller 771: must pop them all. RTD can't be used for library calls now 772: because the library is compiled with the Unix compiler. 773: Use of RTD is a selectable option, since it is incompatible with 774: standard Unix calling sequences. If the option is not selected, 775: the caller must always pop the args. */ 776: 777: #define RETURN_POPS_ARGS(FUNTYPE,SIZE) \ 778: ((TARGET_RTD && TREE_CODE (FUNTYPE) != IDENTIFIER_NODE \ 779: && (TYPE_ARG_TYPES (FUNTYPE) == 0 \ 780: || (TREE_VALUE (tree_last (TYPE_ARG_TYPES (FUNTYPE))) \ 781: == void_type_node))) \ 782: ? (SIZE) : 0) 783: 784: /* Define how to find the value returned by a function. 785: VALTYPE is the data type of the value (as a tree). 786: If the precise function being called is known, FUNC is its FUNCTION_DECL; 787: otherwise, FUNC is 0. */ 788: 789: /* On the 68000 the return value is in D0 regardless. */ 790: 791: #define FUNCTION_VALUE(VALTYPE, FUNC) \ 792: gen_rtx (REG, TYPE_MODE (VALTYPE), 0) 793: 794: /* Define how to find the value returned by a library function 795: assuming the value has mode MODE. */ 796: 797: /* On the 68000 the return value is in D0 regardless. */ 798: 799: #define LIBCALL_VALUE(MODE) gen_rtx (REG, MODE, 0) 800: 801: /* 1 if N is a possible register number for a function value. 802: On the 68000, d0 is the only register thus used. */ 803: 804: #define FUNCTION_VALUE_REGNO_P(N) ((N) == 0) 805: 806: /* Define this to be true when FUNCTION_VALUE_REGNO_P is true for 807: more than one register. */ 808: 809: #define NEEDS_UNTYPED_CALL 0 810: 811: /* Define this if PCC uses the nonreentrant convention for returning 812: structure and union values. */ 813: 814: #define PCC_STATIC_STRUCT_RETURN 815: 816: /* 1 if N is a possible register number for function argument passing. 817: On the 68000, no registers are used in this way. */ 818: 819: #define FUNCTION_ARG_REGNO_P(N) 0 820: 821: /* Define a data type for recording info about an argument list 822: during the scan of that argument list. This data type should 823: hold all necessary information about the function itself 824: and about the args processed so far, enough to enable macros 825: such as FUNCTION_ARG to determine where the next arg should go. 826: 827: On the m68k, this is a single integer, which is a number of bytes 828: of arguments scanned so far. */ 829: 830: #define CUMULATIVE_ARGS int 831: 832: /* Initialize a variable CUM of type CUMULATIVE_ARGS 833: for a call to a function whose data type is FNTYPE. 834: For a library call, FNTYPE is 0. 835: 836: On the m68k, the offset starts at 0. */ 837: 838: #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME) \ 839: ((CUM) = 0) 840: 841: /* Update the data in CUM to advance over an argument 842: of mode MODE and data type TYPE. 843: (TYPE is null for libcalls where that information may not be available.) */ 844: 845: #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \ 846: ((CUM) += ((MODE) != BLKmode \ 847: ? (GET_MODE_SIZE (MODE) + 3) & ~3 \ 848: : (int_size_in_bytes (TYPE) + 3) & ~3)) 849: 850: /* Define where to put the arguments to a function. 851: Value is zero to push the argument on the stack, 852: or a hard register in which to store the argument. 853: 854: MODE is the argument's machine mode. 855: TYPE is the data type of the argument (as a tree). 856: This is null for libcalls where that information may 857: not be available. 858: CUM is a variable of type CUMULATIVE_ARGS which gives info about 859: the preceding args and about the function being called. 860: NAMED is nonzero if this argument is a named parameter 861: (otherwise it is an extra parameter matching an ellipsis). */ 862: 863: /* On the 68000 all args are pushed, except if -mregparm is specified 864: then the first two words of arguments are passed in d0, d1. 865: *NOTE* -mregparm does not work. 866: It exists only to test register calling conventions. */ 867: 868: #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \ 869: ((TARGET_REGPARM && (CUM) < 8) ? gen_rtx (REG, (MODE), (CUM) / 4) : 0) 870: 871: /* For an arg passed partly in registers and partly in memory, 872: this is the number of registers used. 873: For args passed entirely in registers or entirely in memory, zero. */ 874: 875: #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) \ 876: ((TARGET_REGPARM && (CUM) < 8 \ 877: && 8 < ((CUM) + ((MODE) == BLKmode \ 878: ? int_size_in_bytes (TYPE) \ 879: : GET_MODE_SIZE (MODE)))) \ 880: ? 2 - (CUM) / 4 : 0) 881: 882: /* Generate the assembly code for function entry. */ 883: #define FUNCTION_PROLOGUE(FILE, SIZE) output_function_prologue(FILE, SIZE) 884: 885: /* Output assembler code to FILE to increment profiler label # LABELNO 886: for profiling a function entry. */ 887: 888: #define FUNCTION_PROFILER(FILE, LABELNO) \ 889: asm_fprintf (FILE, "\tlea %LLP%d,%Ra0\n\tjsr mcount\n", (LABELNO)) 890: 891: /* Output assembler code to FILE to initialize this source file's 892: basic block profiling info, if that has not already been done. */ 893: 894: #define FUNCTION_BLOCK_PROFILER(FILE, LABELNO) \ 895: asm_fprintf (FILE, "\ttstl %LLPBX0\n\tbne %LLPI%d\n\tpea %LLPBX0\n\tjsr %U__bb_init_func\n\taddql %I4,%Rsp\n%LLPI%d:\n", \ 896: LABELNO, LABELNO); 897: 898: /* Output assembler code to FILE to increment the entry-count for 899: the BLOCKNO'th basic block in this source file. */ 900: 901: #define BLOCK_PROFILER(FILE, BLOCKNO) \ 902: asm_fprintf (FILE, "\taddql %I1,%LLPBX2+%d\n", 4 * BLOCKNO) 903: 904: /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function, 905: the stack pointer does not matter. The value is tested only in 906: functions that have frame pointers. 907: No definition is equivalent to always zero. */ 908: 909: #define EXIT_IGNORE_STACK 1 910: 911: /* Generate the assembly code for function exit. */ 912: #define FUNCTION_EPILOGUE(FILE, SIZE) output_function_epilogue (FILE, SIZE) 913: 914: /* This is a hook for other tm files to change. */ 915: /* #define FUNCTION_EXTRA_EPILOGUE(FILE, SIZE) */ 916: 917: /* Determine if the epilogue should be output as RTL. 918: You should override this if you define FUNCTION_EXTRA_EPILOGUE. */ 919: #define USE_RETURN_INSN use_return_insn () 920: 921: /* Store in the variable DEPTH the initial difference between the 922: frame pointer reg contents and the stack pointer reg contents, 923: as of the start of the function body. This depends on the layout 924: of the fixed parts of the stack frame and on how registers are saved. 925: 926: On the 68k, if we have a frame, we must add one word to its length 927: to allow for the place that a6 is stored when we do have a frame pointer. 928: Otherwise, we would need to compute the offset from the frame pointer 929: of a local variable as a function of frame_pointer_needed, which 930: is hard. */ 931: 932: #define INITIAL_FRAME_POINTER_OFFSET(DEPTH) \ 933: { int regno; \ 934: int offset = -4; \ 935: for (regno = 16; regno < FIRST_PSEUDO_REGISTER; regno++) \ 936: if (regs_ever_live[regno] && ! call_used_regs[regno]) \ 937: offset += 12; \ 938: for (regno = 0; regno < 16; regno++) \ 939: if (regs_ever_live[regno] && ! call_used_regs[regno]) \ 940: offset += 4; \ 941: (DEPTH) = (offset + ((get_frame_size () + 3) & -4) \ 942: + (get_frame_size () == 0 ? 0 : 4)); \ 943: } 944: 945: /* Output assembler code for a block containing the constant parts 946: of a trampoline, leaving space for the variable parts. */ 947: 948: /* On the 68k, the trampoline looks like this: 949: mov @#.,a0 950: jsr @#___trampoline 951: jsr @#___trampoline 952: .long STATIC 953: .long FUNCTION 954: The reason for having three jsr insns is so that an entire line 955: of the instruction cache is filled in a predictable way 956: that will always be the same. 957: 958: We always use the assembler label ___trampoline 959: regardless of whether the system adds underscores. */ 960: 961: #define TRAMPOLINE_TEMPLATE(FILE) \ 962: { \ 963: ASM_OUTPUT_SHORT (FILE, gen_rtx (CONST_INT, VOIDmode, 0x207c)); \ 964: ASM_OUTPUT_SHORT (FILE, const0_rtx); \ 965: ASM_OUTPUT_SHORT (FILE, const0_rtx); \ 966: ASM_OUTPUT_SHORT (FILE, gen_rtx (CONST_INT, VOIDmode, 0x4eb9)); \ 967: ASM_OUTPUT_INT (FILE, gen_rtx (SYMBOL_REF, SImode, "*___trampoline"));\ 968: ASM_OUTPUT_SHORT (FILE, gen_rtx (CONST_INT, VOIDmode, 0x4eb9)); \ 969: ASM_OUTPUT_INT (FILE, gen_rtx (SYMBOL_REF, SImode, "*___trampoline"));\ 970: ASM_OUTPUT_SHORT (FILE, const0_rtx); \ 971: ASM_OUTPUT_SHORT (FILE, const0_rtx); \ 972: ASM_OUTPUT_SHORT (FILE, const0_rtx); \ 973: ASM_OUTPUT_SHORT (FILE, const0_rtx); \ 974: } 975: 976: /* Length in units of the trampoline for entering a nested function. */ 977: 978: #define TRAMPOLINE_SIZE 26 979: 980: /* Alignment required for a trampoline. 16 is used to find the 981: beginning of a line in the instruction cache. */ 982: 983: #define TRAMPOLINE_ALIGN 16 984: 985: /* Emit RTL insns to initialize the variable parts of a trampoline. 986: FNADDR is an RTX for the address of the function's pure code. 987: CXT is an RTX for the static chain value for the function. */ 988: 989: #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \ 990: { \ 991: emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 2)), TRAMP); \ 992: emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 18)), CXT); \ 993: emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 22)), FNADDR); \ 994: } 995: 996: /* This is the library routine that is used 997: to transfer control from the trampoline 998: to the actual nested function. */ 999: 1000: /* A colon is used with no explicit operands 1001: to cause the template string to be scanned for %-constructs. */ 1002: /* The function name __transfer_from_trampoline is not actually used. 1003: The function definition just permits use of "asm with operands" 1004: (though the operand list is empty). */ 1005: #define TRANSFER_FROM_TRAMPOLINE \ 1006: void \ 1007: __transfer_from_trampoline () \ 1008: { \ 1009: register char *a0 asm ("%a0"); \ 1010: asm (GLOBAL_ASM_OP " ___trampoline"); \ 1011: asm ("___trampoline:"); \ 1012: asm volatile ("move%.l %0,%@" : : "m" (a0[22])); \ 1013: asm volatile ("move%.l %1,%0" : "=a" (a0) : "m" (a0[18])); \ 1014: asm ("rts":); \ 1015: } 1016: 1017: /* Addressing modes, and classification of registers for them. */ 1018: 1019: #define HAVE_POST_INCREMENT 1020: /* #define HAVE_POST_DECREMENT */ 1021: 1022: #define HAVE_PRE_DECREMENT 1023: /* #define HAVE_PRE_INCREMENT */ 1024: 1025: /* Macros to check register numbers against specific register classes. */ 1026: 1027: /* These assume that REGNO is a hard or pseudo reg number. 1028: They give nonzero only if REGNO is a hard reg of the suitable class 1029: or a pseudo reg currently allocated to a suitable hard reg. 1030: Since they use reg_renumber, they are safe only once reg_renumber 1031: has been allocated, which happens in local-alloc.c. */ 1032: 1033: #define REGNO_OK_FOR_INDEX_P(REGNO) \ 1034: ((REGNO) < 16 || (unsigned) reg_renumber[REGNO] < 16) 1035: #define REGNO_OK_FOR_BASE_P(REGNO) \ 1036: (((REGNO) ^ 010) < 8 || (unsigned) (reg_renumber[REGNO] ^ 010) < 8) 1037: #define REGNO_OK_FOR_DATA_P(REGNO) \ 1038: ((REGNO) < 8 || (unsigned) reg_renumber[REGNO] < 8) 1039: #define REGNO_OK_FOR_FP_P(REGNO) \ 1040: (((REGNO) ^ 020) < 8 || (unsigned) (reg_renumber[REGNO] ^ 020) < 8) 1041: #ifdef SUPPORT_SUN_FPA 1042: #define REGNO_OK_FOR_FPA_P(REGNO) \ 1043: (((REGNO) >= 24 && (REGNO) < 56) || (reg_renumber[REGNO] >= 24 && reg_renumber[REGNO] < 56)) 1044: #endif 1045: 1046: /* Now macros that check whether X is a register and also, 1047: strictly, whether it is in a specified class. 1048: 1049: These macros are specific to the 68000, and may be used only 1050: in code for printing assembler insns and in conditions for 1051: define_optimization. */ 1052: 1053: /* 1 if X is a data register. */ 1054: 1055: #define DATA_REG_P(X) (REG_P (X) && REGNO_OK_FOR_DATA_P (REGNO (X))) 1056: 1057: /* 1 if X is an fp register. */ 1058: 1059: #define FP_REG_P(X) (REG_P (X) && REGNO_OK_FOR_FP_P (REGNO (X))) 1060: 1061: /* 1 if X is an address register */ 1062: 1063: #define ADDRESS_REG_P(X) (REG_P (X) && REGNO_OK_FOR_BASE_P (REGNO (X))) 1064: 1065: #ifdef SUPPORT_SUN_FPA 1066: /* 1 if X is a register in the Sun FPA. */ 1067: #define FPA_REG_P(X) (REG_P (X) && REGNO_OK_FOR_FPA_P (REGNO (X))) 1068: #else 1069: /* Answer must be no if we don't have an FPA. */ 1070: #define FPA_REG_P(X) 0 1071: #endif 1072: 1073: /* Maximum number of registers that can appear in a valid memory address. */ 1074: 1075: #define MAX_REGS_PER_ADDRESS 2 1076: 1077: /* Recognize any constant value that is a valid address. */ 1078: 1079: #define CONSTANT_ADDRESS_P(X) \ 1080: (GET_CODE (X) == LABEL_REF || GET_CODE (X) == SYMBOL_REF \ 1081: || GET_CODE (X) == CONST_INT || GET_CODE (X) == CONST \ 1082: || GET_CODE (X) == HIGH) 1083: 1084: /* Nonzero if the constant value X is a legitimate general operand. 1085: It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE. */ 1086: 1087: #define LEGITIMATE_CONSTANT_P(X) 1 1088: 1089: /* Nonzero if the constant value X is a legitimate general operand 1090: when generating PIC code. It is given that flag_pic is on and 1091: that X satisfies CONSTANT_P or is a CONST_DOUBLE. */ 1092: 1093: #define LEGITIMATE_PIC_OPERAND_P(X) \ 1094: (! symbolic_operand (X, VOIDmode)) 1095: 1096: /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx 1097: and check its validity for a certain class. 1098: We have two alternate definitions for each of them. 1099: The usual definition accepts all pseudo regs; the other rejects 1100: them unless they have been allocated suitable hard regs. 1101: The symbol REG_OK_STRICT causes the latter definition to be used. 1102: 1103: Most source files want to accept pseudo regs in the hope that 1104: they will get allocated to the class that the insn wants them to be in. 1105: Source files for reload pass need to be strict. 1106: After reload, it makes no difference, since pseudo regs have 1107: been eliminated by then. */ 1108: 1109: #ifndef REG_OK_STRICT 1110: 1111: /* Nonzero if X is a hard reg that can be used as an index 1112: or if it is a pseudo reg. */ 1113: #define REG_OK_FOR_INDEX_P(X) ((REGNO (X) ^ 020) >= 8) 1114: /* Nonzero if X is a hard reg that can be used as a base reg 1115: or if it is a pseudo reg. */ 1116: #define REG_OK_FOR_BASE_P(X) ((REGNO (X) & ~027) != 0) 1117: 1118: #else 1119: 1120: /* Nonzero if X is a hard reg that can be used as an index. */ 1121: #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X)) 1122: /* Nonzero if X is a hard reg that can be used as a base reg. */ 1123: #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X)) 1124: 1125: #endif 1126: 1127: /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression 1128: that is a valid memory address for an instruction. 1129: The MODE argument is the machine mode for the MEM expression 1130: that wants to use this address. 1131: 1132: When generating PIC, an address involving a SYMBOL_REF is legitimate 1133: if and only if it is the sum of pic_offset_table_rtx and the SYMBOL_REF. 1134: We use LEGITIMATE_PIC_OPERAND_P to throw out the illegitimate addresses, 1135: and we explicitly check for the sum of pic_offset_table_rtx and a SYMBOL_REF. 1136: 1137: Likewise for a LABEL_REF when generating PIC. 1138: 1139: The other macros defined here are used only in GO_IF_LEGITIMATE_ADDRESS. */ 1140: 1.1.1.2 root 1141: /* Allow SUBREG everywhere we allow REG. This results in better code. It 1142: also makes function inlining work when inline functions are called with 1143: arguments that are SUBREGs. */ 1144: 1145: #define LEGITIMATE_BASE_REG_P(X) \ 1146: ((GET_CODE (X) == REG && REG_OK_FOR_BASE_P (X)) \ 1147: || (GET_CODE (X) == SUBREG \ 1148: && GET_CODE (SUBREG_REG (X)) == REG \ 1149: && REG_OK_FOR_BASE_P (SUBREG_REG (X)))) 1150: 1.1 root 1151: #define INDIRECTABLE_1_ADDRESS_P(X) \ 1152: ((CONSTANT_ADDRESS_P (X) && (!flag_pic || LEGITIMATE_PIC_OPERAND_P (X))) \ 1.1.1.2 root 1153: || LEGITIMATE_BASE_REG_P (X) \ 1.1 root 1154: || ((GET_CODE (X) == PRE_DEC || GET_CODE (X) == POST_INC) \ 1.1.1.2 root 1155: && LEGITIMATE_BASE_REG_P (XEXP (X, 0))) \ 1.1 root 1156: || (GET_CODE (X) == PLUS \ 1.1.1.2 root 1157: && LEGITIMATE_BASE_REG_P (XEXP (X, 0)) \ 1.1 root 1158: && GET_CODE (XEXP (X, 1)) == CONST_INT \ 1159: && ((unsigned) INTVAL (XEXP (X, 1)) + 0x8000) < 0x10000) \ 1160: || (GET_CODE (X) == PLUS && XEXP (X, 0) == pic_offset_table_rtx \ 1161: && flag_pic && GET_CODE (XEXP (X, 1)) == SYMBOL_REF) \ 1162: || (GET_CODE (X) == PLUS && XEXP (X, 0) == pic_offset_table_rtx \ 1163: && flag_pic && GET_CODE (XEXP (X, 1)) == LABEL_REF)) \ 1164: 1165: #if 0 1166: /* This should replace the last two (non-pic) lines 1167: except that Sun's assembler does not seem to handle such operands. */ 1168: && (TARGET_68020 ? CONSTANT_ADDRESS_P (XEXP (X, 1)) \ 1169: : (GET_CODE (XEXP (X, 1)) == CONST_INT \ 1170: && ((unsigned) INTVAL (XEXP (X, 1)) + 0x8000) < 0x10000)))) 1171: #endif 1172: 1173: 1174: #define GO_IF_NONINDEXED_ADDRESS(X, ADDR) \ 1175: { if (INDIRECTABLE_1_ADDRESS_P (X)) goto ADDR; } 1176: 1177: /* Only labels on dispatch tables are valid for indexing from. */ 1178: #define GO_IF_INDEXABLE_BASE(X, ADDR) \ 1179: { rtx temp; \ 1180: if (GET_CODE (X) == LABEL_REF \ 1181: && (temp = next_nonnote_insn (XEXP (X, 0))) != 0 \ 1182: && GET_CODE (temp) == JUMP_INSN \ 1183: && (GET_CODE (PATTERN (temp)) == ADDR_VEC \ 1184: || GET_CODE (PATTERN (temp)) == ADDR_DIFF_VEC)) \ 1185: goto ADDR; \ 1.1.1.2 root 1186: if (LEGITIMATE_BASE_REG_P (X)) goto ADDR; } 1.1 root 1187: 1188: #define GO_IF_INDEXING(X, ADDR) \ 1189: { if (GET_CODE (X) == PLUS && LEGITIMATE_INDEX_P (XEXP (X, 0))) \ 1190: { GO_IF_INDEXABLE_BASE (XEXP (X, 1), ADDR); } \ 1191: if (GET_CODE (X) == PLUS && LEGITIMATE_INDEX_P (XEXP (X, 1))) \ 1192: { GO_IF_INDEXABLE_BASE (XEXP (X, 0), ADDR); } } 1193: 1194: #define GO_IF_INDEXED_ADDRESS(X, ADDR) \ 1195: { GO_IF_INDEXING (X, ADDR); \ 1196: if (GET_CODE (X) == PLUS) \ 1197: { if (GET_CODE (XEXP (X, 1)) == CONST_INT \ 1198: && (unsigned) INTVAL (XEXP (X, 1)) + 0x80 < 0x100) \ 1199: { rtx go_temp = XEXP (X, 0); GO_IF_INDEXING (go_temp, ADDR); } \ 1200: if (GET_CODE (XEXP (X, 0)) == CONST_INT \ 1201: && (unsigned) INTVAL (XEXP (X, 0)) + 0x80 < 0x100) \ 1202: { rtx go_temp = XEXP (X, 1); GO_IF_INDEXING (go_temp, ADDR); } } } 1203: 1204: #define LEGITIMATE_INDEX_REG_P(X) \ 1205: ((GET_CODE (X) == REG && REG_OK_FOR_INDEX_P (X)) \ 1206: || (GET_CODE (X) == SIGN_EXTEND \ 1207: && GET_CODE (XEXP (X, 0)) == REG \ 1208: && GET_MODE (XEXP (X, 0)) == HImode \ 1.1.1.2 root 1209: && REG_OK_FOR_INDEX_P (XEXP (X, 0))) \ 1210: || (GET_CODE (X) == SUBREG \ 1211: && GET_CODE (SUBREG_REG (X)) == REG \ 1212: && REG_OK_FOR_INDEX_P (SUBREG_REG (X)))) 1.1 root 1213: 1214: #define LEGITIMATE_INDEX_P(X) \ 1215: (LEGITIMATE_INDEX_REG_P (X) \ 1216: || (TARGET_68020 && GET_CODE (X) == MULT \ 1217: && LEGITIMATE_INDEX_REG_P (XEXP (X, 0)) \ 1218: && GET_CODE (XEXP (X, 1)) == CONST_INT \ 1219: && (INTVAL (XEXP (X, 1)) == 2 \ 1220: || INTVAL (XEXP (X, 1)) == 4 \ 1221: || INTVAL (XEXP (X, 1)) == 8))) 1222: 1.1.1.2 root 1223: /* If pic, we accept INDEX+LABEL, which is what do_tablejump makes. */ 1224: #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \ 1225: { GO_IF_NONINDEXED_ADDRESS (X, ADDR); \ 1226: GO_IF_INDEXED_ADDRESS (X, ADDR); \ 1227: if (flag_pic && MODE == CASE_VECTOR_MODE && GET_CODE (X) == PLUS \ 1228: && LEGITIMATE_INDEX_P (XEXP (X, 0)) \ 1229: && GET_CODE (XEXP (X, 1)) == LABEL_REF) \ 1230: goto ADDR; } 1231: 1232: /* Don't call memory_address_noforce for the address to fetch 1233: the switch offset. This address is ok as it stands (see above), 1234: but memory_address_noforce would alter it. */ 1235: #define PIC_CASE_VECTOR_ADDRESS(index) index 1.1 root 1236: 1237: /* Try machine-dependent ways of modifying an illegitimate address 1238: to be legitimate. If we find one, return the new, valid address. 1239: This macro is used in only one place: `memory_address' in explow.c. 1240: 1241: OLDX is the address as it was before break_out_memory_refs was called. 1242: In some cases it is useful to look at this to decide what needs to be done. 1243: 1244: MODE and WIN are passed so that this macro can use 1245: GO_IF_LEGITIMATE_ADDRESS. 1246: 1247: It is always safe for this macro to do nothing. It exists to recognize 1248: opportunities to optimize the output. 1249: 1250: For the 68000, we handle X+REG by loading X into a register R and 1251: using R+REG. R will go in an address reg and indexing will be used. 1252: However, if REG is a broken-out memory address or multiplication, 1253: nothing needs to be done because REG can certainly go in an address reg. */ 1254: 1255: #define COPY_ONCE(Y) if (!copied) { Y = copy_rtx (Y); copied = ch = 1; } 1256: #define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) \ 1257: { register int ch = (X) != (OLDX); \ 1258: if (GET_CODE (X) == PLUS) \ 1259: { int copied = 0; \ 1260: if (GET_CODE (XEXP (X, 0)) == MULT) \ 1261: { COPY_ONCE (X); XEXP (X, 0) = force_operand (XEXP (X, 0), 0);} \ 1262: if (GET_CODE (XEXP (X, 1)) == MULT) \ 1263: { COPY_ONCE (X); XEXP (X, 1) = force_operand (XEXP (X, 1), 0);} \ 1264: if (ch && GET_CODE (XEXP (X, 1)) == REG \ 1265: && GET_CODE (XEXP (X, 0)) == REG) \ 1266: goto WIN; \ 1267: if (ch) { GO_IF_LEGITIMATE_ADDRESS (MODE, X, WIN); } \ 1268: if (GET_CODE (XEXP (X, 0)) == REG \ 1269: || (GET_CODE (XEXP (X, 0)) == SIGN_EXTEND \ 1270: && GET_CODE (XEXP (XEXP (X, 0), 0)) == REG \ 1271: && GET_MODE (XEXP (XEXP (X, 0), 0)) == HImode)) \ 1272: { register rtx temp = gen_reg_rtx (Pmode); \ 1273: register rtx val = force_operand (XEXP (X, 1), 0); \ 1274: emit_move_insn (temp, val); \ 1275: COPY_ONCE (X); \ 1276: XEXP (X, 1) = temp; \ 1277: goto WIN; } \ 1278: else if (GET_CODE (XEXP (X, 1)) == REG \ 1279: || (GET_CODE (XEXP (X, 1)) == SIGN_EXTEND \ 1280: && GET_CODE (XEXP (XEXP (X, 1), 0)) == REG \ 1281: && GET_MODE (XEXP (XEXP (X, 1), 0)) == HImode)) \ 1282: { register rtx temp = gen_reg_rtx (Pmode); \ 1283: register rtx val = force_operand (XEXP (X, 0), 0); \ 1284: emit_move_insn (temp, val); \ 1285: COPY_ONCE (X); \ 1286: XEXP (X, 0) = temp; \ 1287: goto WIN; }}} 1288: 1289: /* Go to LABEL if ADDR (a legitimate address expression) 1290: has an effect that depends on the machine mode it is used for. 1291: On the 68000, only predecrement and postincrement address depend thus 1292: (the amount of decrement or increment being the length of the operand). */ 1293: 1294: #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) \ 1295: if (GET_CODE (ADDR) == POST_INC || GET_CODE (ADDR) == PRE_DEC) goto LABEL 1296: 1297: /* Specify the machine mode that this machine uses 1298: for the index in the tablejump instruction. */ 1299: #define CASE_VECTOR_MODE HImode 1300: 1301: /* Define this if the tablejump instruction expects the table 1302: to contain offsets from the address of the table. 1303: Do not define this if the table should contain absolute addresses. */ 1304: #define CASE_VECTOR_PC_RELATIVE 1305: 1306: /* Specify the tree operation to be used to convert reals to integers. */ 1307: #define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR 1308: 1309: /* This is the kind of divide that is easiest to do in the general case. */ 1310: #define EASY_DIV_EXPR TRUNC_DIV_EXPR 1311: 1312: /* Define this as 1 if `char' should by default be signed; else as 0. */ 1313: #define DEFAULT_SIGNED_CHAR 1 1314: 1315: /* Don't cse the address of the function being compiled. */ 1316: #define NO_RECURSIVE_FUNCTION_CSE 1317: 1318: /* Max number of bytes we can move from memory to memory 1319: in one reasonably fast instruction. */ 1320: #define MOVE_MAX 4 1321: 1322: /* Define this if zero-extension is slow (more than one real instruction). */ 1323: #define SLOW_ZERO_EXTEND 1324: 1325: /* Nonzero if access to memory by bytes is slow and undesirable. */ 1326: #define SLOW_BYTE_ACCESS 0 1327: 1328: /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits 1329: is done just by pretending it is already truncated. */ 1330: #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1 1331: 1332: /* We assume that the store-condition-codes instructions store 0 for false 1333: and some other value for true. This is the value stored for true. */ 1334: 1335: #define STORE_FLAG_VALUE -1 1336: 1337: /* When a prototype says `char' or `short', really pass an `int'. */ 1338: #define PROMOTE_PROTOTYPES 1339: 1340: /* Specify the machine mode that pointers have. 1341: After generation of rtl, the compiler makes no further distinction 1342: between pointers and any other objects of this machine mode. */ 1343: #define Pmode SImode 1344: 1345: /* A function address in a call instruction 1346: is a byte address (for indexing purposes) 1347: so give the MEM rtx a byte's mode. */ 1348: #define FUNCTION_MODE QImode 1349: 1350: /* Compute the cost of computing a constant rtl expression RTX 1351: whose rtx-code is CODE. The body of this macro is a portion 1352: of a switch statement. If the code is computed here, 1353: return it with a return statement. Otherwise, break from the switch. */ 1354: 1355: #define CONST_COSTS(RTX,CODE,OUTER_CODE) \ 1356: case CONST_INT: \ 1357: /* Constant zero is super cheap due to clr instruction. */ \ 1358: if (RTX == const0_rtx) return 0; \ 1359: /* Constants between -128 and 127 are cheap due to moveq */ \ 1360: if (INTVAL (RTX) >= -128 && INTVAL (RTX) <= 127) return 1; \ 1.1.1.3 ! root 1361: /* Constants between -256 and 255 are easily generated */ \ ! 1362: /* by use of moveq and not.b */ \ ! 1363: if ((OUTER_CODE) == SET && INTVAL (RTX) >= -256 \ ! 1364: && INTVAL (RTX) < 256) return 2; \ 1.1 root 1365: case CONST: \ 1366: case LABEL_REF: \ 1367: case SYMBOL_REF: \ 1368: return 3; \ 1369: case CONST_DOUBLE: \ 1370: return 5; 1371: 1372: /* Compute the cost of various arithmetic operations. 1373: These are vaguely right for a 68020. */ 1374: /* The costs for long multiply have been adjusted to 1375: work properly in synth_mult on the 68020, 1376: relative to an average of the time for add and the time for shift, 1377: taking away a little more because sometimes move insns are needed. */ 1378: #define MULL_COST (TARGET_68040 ? 5 : 13) 1379: #define MULW_COST (TARGET_68040 ? 3 : 8) 1380: 1381: #define RTX_COSTS(X,CODE,OUTER_CODE) \ 1382: case PLUS: \ 1383: /* An lea costs about three times as much as a simple add. */ \ 1384: if (GET_MODE (X) == SImode \ 1385: && GET_CODE (XEXP (X, 0)) == REG \ 1386: && GET_CODE (XEXP (X, 1)) == MULT \ 1387: && GET_CODE (XEXP (XEXP (X, 1), 0)) == REG \ 1388: && GET_CODE (XEXP (XEXP (X, 1), 1)) == CONST_INT \ 1389: && (INTVAL (XEXP (XEXP (X, 1), 1)) == 2 \ 1390: || INTVAL (XEXP (XEXP (X, 1), 1)) == 4 \ 1391: || INTVAL (XEXP (XEXP (X, 1), 1)) == 8)) \ 1392: return COSTS_N_INSNS (3); /* lea an@(dx:l:i),am */ \ 1393: break; \ 1394: case ASHIFT: \ 1395: case ASHIFTRT: \ 1396: case LSHIFTRT: \ 1397: /* A shift by a big integer takes an extra instruction. */ \ 1398: if (GET_CODE (XEXP (X, 1)) == CONST_INT \ 1399: && (INTVAL (XEXP (X, 1)) == 16)) \ 1400: return COSTS_N_INSNS (2); /* clrw;swap */ \ 1401: if (GET_CODE (XEXP (X, 1)) == CONST_INT \ 1402: && !(INTVAL (XEXP (X, 1)) > 0 \ 1403: && INTVAL (XEXP (X, 1)) <= 8)) \ 1404: return COSTS_N_INSNS (3); /* lsr #i,dn */ \ 1405: break; \ 1406: case MULT: \ 1.1.1.2 root 1407: if (GET_MODE (X) == QImode || GET_MODE (X) == HImode) \ 1.1 root 1408: return COSTS_N_INSNS (MULW_COST); \ 1409: else \ 1410: return COSTS_N_INSNS (MULL_COST); \ 1411: case DIV: \ 1412: case UDIV: \ 1413: case MOD: \ 1414: case UMOD: \ 1415: if (GET_MODE (X) == QImode || GET_MODE (X) == HImode) \ 1416: return COSTS_N_INSNS (27); /* div.w */ \ 1417: return COSTS_N_INSNS (43); /* div.l */ 1418: 1419: /* Tell final.c how to eliminate redundant test instructions. */ 1420: 1421: /* Here we define machine-dependent flags and fields in cc_status 1422: (see `conditions.h'). */ 1423: 1424: /* Set if the cc value is actually in the 68881, so a floating point 1425: conditional branch must be output. */ 1426: #define CC_IN_68881 04000 1427: 1428: /* Store in cc_status the expressions that the condition codes will 1429: describe after execution of an instruction whose pattern is EXP. 1430: Do not alter them if the instruction would not alter the cc's. */ 1431: 1432: /* On the 68000, all the insns to store in an address register fail to 1433: set the cc's. However, in some cases these instructions can make it 1434: possibly invalid to use the saved cc's. In those cases we clear out 1435: some or all of the saved cc's so they won't be used. */ 1436: 1437: #define NOTICE_UPDATE_CC(EXP,INSN) notice_update_cc (EXP, INSN) 1438: 1439: #define OUTPUT_JUMP(NORMAL, FLOAT, NO_OV) \ 1440: { if (cc_prev_status.flags & CC_IN_68881) \ 1441: return FLOAT; \ 1442: if (cc_prev_status.flags & CC_NO_OVERFLOW) \ 1443: return NO_OV; \ 1444: return NORMAL; } 1445: 1446: /* Control the assembler format that we output. */ 1447: 1448: /* Output at beginning of assembler file. */ 1449: 1450: #define ASM_FILE_START(FILE) \ 1451: fprintf (FILE, "#NO_APP\n"); 1452: 1453: /* Output to assembler file text saying following lines 1454: may contain character constants, extra white space, comments, etc. */ 1455: 1456: #define ASM_APP_ON "#APP\n" 1457: 1458: /* Output to assembler file text saying following lines 1459: no longer contain unusual constructs. */ 1460: 1461: #define ASM_APP_OFF "#NO_APP\n" 1462: 1463: /* Output before read-only data. */ 1464: 1465: #define TEXT_SECTION_ASM_OP ".text" 1466: 1467: /* Output before writable data. */ 1468: 1469: #define DATA_SECTION_ASM_OP ".data" 1470: 1471: /* Here are four prefixes that are used by asm_fprintf to 1472: facilitate customization for alternate assembler syntaxes. 1473: Machines with no likelihood of an alternate syntax need not 1474: define these and need not use asm_fprintf. */ 1475: 1476: /* The prefix for register names. Note that REGISTER_NAMES 1477: is supposed to include this prefix. */ 1478: 1479: #define REGISTER_PREFIX "" 1480: 1481: /* The prefix for local labels. You should be able to define this as 1482: an empty string, or any arbitrary string (such as ".", ".L%", etc) 1483: without having to make any other changes to account for the specific 1484: definition. Note it is a string literal, not interpreted by printf 1485: and friends. */ 1486: 1487: #define LOCAL_LABEL_PREFIX "" 1488: 1489: /* The prefix to add to user-visible assembler symbols. */ 1490: 1491: #define USER_LABEL_PREFIX "_" 1492: 1493: /* The prefix for immediate operands. */ 1494: 1495: #define IMMEDIATE_PREFIX "#" 1496: 1497: /* How to refer to registers in assembler output. 1498: This sequence is indexed by compiler's hard-register-number (see above). */ 1499: 1500: #ifndef SUPPORT_SUN_FPA 1501: 1502: #define REGISTER_NAMES \ 1503: {"d0", "d1", "d2", "d3", "d4", "d5", "d6", "d7", \ 1504: "a0", "a1", "a2", "a3", "a4", "a5", "a6", "sp", \ 1505: "fp0", "fp1", "fp2", "fp3", "fp4", "fp5", "fp6", "fp7" } 1506: 1507: #else /* SUPPORTED_SUN_FPA */ 1508: 1509: #define REGISTER_NAMES \ 1510: {"d0", "d1", "d2", "d3", "d4", "d5", "d6", "d7", \ 1511: "a0", "a1", "a2", "a3", "a4", "a5", "a6", "sp", \ 1512: "fp0", "fp1", "fp2", "fp3", "fp4", "fp5", "fp6", "fp7", \ 1513: "fpa0", "fpa1", "fpa2", "fpa3", "fpa4", "fpa5", "fpa6", "fpa7", \ 1514: "fpa8", "fpa9", "fpa10", "fpa11", "fpa12", "fpa13", "fpa14", "fpa15", \ 1515: "fpa16", "fpa17", "fpa18", "fpa19", "fpa20", "fpa21", "fpa22", "fpa23", \ 1516: "fpa24", "fpa25", "fpa26", "fpa27", "fpa28", "fpa29", "fpa30", "fpa31" } 1517: 1518: #endif /* defined SUPPORT_SUN_FPA */ 1519: 1520: /* How to renumber registers for dbx and gdb. 1521: On the Sun-3, the floating point registers have numbers 1522: 18 to 25, not 16 to 23 as they do in the compiler. */ 1523: 1524: #define DBX_REGISTER_NUMBER(REGNO) ((REGNO) < 16 ? (REGNO) : (REGNO) + 2) 1525: 1526: /* This is how to output the definition of a user-level label named NAME, 1527: such as the label on a static function or variable NAME. */ 1528: 1529: #define ASM_OUTPUT_LABEL(FILE,NAME) \ 1530: do { assemble_name (FILE, NAME); fputs (":\n", FILE); } while (0) 1531: 1532: /* This is how to output a command to make the user-level label named NAME 1533: defined for reference from other files. */ 1534: 1535: #define GLOBAL_ASM_OP ".globl" 1536: #define ASM_GLOBALIZE_LABEL(FILE,NAME) \ 1537: do { fprintf (FILE, "%s ", GLOBAL_ASM_OP); \ 1538: assemble_name (FILE, NAME); \ 1539: fputs ("\n", FILE);} while (0) 1540: 1541: /* This is how to output a reference to a user-level label named NAME. 1542: `assemble_name' uses this. */ 1543: 1544: #define ASM_OUTPUT_LABELREF(FILE,NAME) \ 1545: asm_fprintf (FILE, "%0U%s", NAME) 1546: 1547: /* This is how to output an internal numbered label where 1548: PREFIX is the class of label and NUM is the number within the class. */ 1549: 1550: #define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \ 1551: asm_fprintf (FILE, "%0L%s%d:\n", PREFIX, NUM) 1552: 1553: /* This is how to store into the string LABEL 1554: the symbol_ref name of an internal numbered label where 1555: PREFIX is the class of label and NUM is the number within the class. 1556: This is suitable for output with `assemble_name'. */ 1557: 1558: #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \ 1559: sprintf (LABEL, "*%s%s%d", LOCAL_LABEL_PREFIX, PREFIX, NUM) 1560: 1561: /* This is how to output a `long double' extended real constant. */ 1562: 1563: #define ASM_OUTPUT_LONG_DOUBLE(FILE,VALUE) \ 1564: do { long l[3]; \ 1565: REAL_VALUE_TO_TARGET_LONG_DOUBLE (VALUE, l); \ 1566: if (sizeof (int) == sizeof (long)) \ 1567: fprintf (FILE, "\t.long 0x%x,0x%x,0x%x\n", l[0], l[1], l[2]); \ 1568: else \ 1569: fprintf (FILE, "\t.long 0x%lx,0x%lx,0x%lx\n", l[0], l[1], l[2]); \ 1570: } while (0) 1571: 1572: /* This is how to output an assembler line defining a `double' constant. */ 1573: 1574: #define ASM_OUTPUT_DOUBLE(FILE,VALUE) \ 1575: do { char dstr[30]; \ 1576: REAL_VALUE_TO_DECIMAL (VALUE, "%.20g", dstr); \ 1577: fprintf (FILE, "\t.double 0r%s\n", dstr); \ 1578: } while (0) 1579: 1580: /* This is how to output an assembler line defining a `float' constant. */ 1581: 1582: #define ASM_OUTPUT_FLOAT(FILE,VALUE) \ 1583: do { long l; \ 1584: REAL_VALUE_TO_TARGET_SINGLE (VALUE, l); \ 1585: if (sizeof (int) == sizeof (long)) \ 1586: fprintf (FILE, "\t.long 0x%x\n", l); \ 1587: else \ 1588: fprintf (FILE, "\t.long 0x%lx\n", l); \ 1589: } while (0) 1590: 1591: /* This is how to output an assembler line defining an `int' constant. */ 1592: 1593: #define ASM_OUTPUT_INT(FILE,VALUE) \ 1594: ( fprintf (FILE, "\t.long "), \ 1595: output_addr_const (FILE, (VALUE)), \ 1596: fprintf (FILE, "\n")) 1597: 1598: /* Likewise for `char' and `short' constants. */ 1599: 1600: #define ASM_OUTPUT_SHORT(FILE,VALUE) \ 1601: ( fprintf (FILE, "\t.word "), \ 1602: output_addr_const (FILE, (VALUE)), \ 1603: fprintf (FILE, "\n")) 1604: 1605: #define ASM_OUTPUT_CHAR(FILE,VALUE) \ 1606: ( fprintf (FILE, "\t.byte "), \ 1607: output_addr_const (FILE, (VALUE)), \ 1608: fprintf (FILE, "\n")) 1609: 1610: /* This is how to output an assembler line for a numeric constant byte. */ 1611: 1612: #define ASM_OUTPUT_BYTE(FILE,VALUE) \ 1613: fprintf (FILE, "\t.byte 0x%x\n", (VALUE)) 1614: 1615: /* This is how to output an insn to push a register on the stack. 1616: It need not be very fast code. */ 1617: 1618: #define ASM_OUTPUT_REG_PUSH(FILE,REGNO) \ 1619: asm_fprintf (FILE, "\tmovel %s,%Rsp@-\n", reg_names[REGNO]) 1620: 1621: /* This is how to output an insn to pop a register from the stack. 1622: It need not be very fast code. */ 1623: 1624: #define ASM_OUTPUT_REG_POP(FILE,REGNO) \ 1625: asm_fprintf (FILE, "\tmovel %Rsp@+,%s\n", reg_names[REGNO]) 1626: 1627: /* This is how to output an element of a case-vector that is absolute. 1628: (The 68000 does not use such vectors, 1629: but we must define this macro anyway.) */ 1630: 1631: #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \ 1632: asm_fprintf (FILE, "\t.long %LL%d\n", VALUE) 1633: 1634: /* This is how to output an element of a case-vector that is relative. */ 1635: 1636: #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, VALUE, REL) \ 1637: asm_fprintf (FILE, "\t.word %LL%d-%LL%d\n", VALUE, REL) 1638: 1639: /* This is how to output an assembler line 1640: that says to advance the location counter 1641: to a multiple of 2**LOG bytes. */ 1642: 1643: /* We don't have a way to align to more than a two-byte boundary, so do the 1644: best we can and don't complain. */ 1645: #define ASM_OUTPUT_ALIGN(FILE,LOG) \ 1646: if ((LOG) >= 1) \ 1647: fprintf (FILE, "\t.even\n"); 1648: 1649: #define ASM_OUTPUT_SKIP(FILE,SIZE) \ 1650: fprintf (FILE, "\t.skip %u\n", (SIZE)) 1651: 1652: /* This says how to output an assembler line 1653: to define a global common symbol. */ 1654: 1655: #define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \ 1656: ( fputs (".comm ", (FILE)), \ 1657: assemble_name ((FILE), (NAME)), \ 1658: fprintf ((FILE), ",%u\n", (ROUNDED))) 1659: 1660: /* This says how to output an assembler line 1661: to define a local common symbol. */ 1662: 1663: #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE, ROUNDED) \ 1664: ( fputs (".lcomm ", (FILE)), \ 1665: assemble_name ((FILE), (NAME)), \ 1666: fprintf ((FILE), ",%u\n", (ROUNDED))) 1667: 1668: /* Store in OUTPUT a string (made with alloca) containing 1669: an assembler-name for a local static variable named NAME. 1670: LABELNO is an integer which is different for each call. */ 1671: 1672: #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \ 1673: ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \ 1674: sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO))) 1675: 1676: /* Define the parentheses used to group arithmetic operations 1677: in assembler code. */ 1678: 1679: #define ASM_OPEN_PAREN "(" 1680: #define ASM_CLOSE_PAREN ")" 1681: 1682: /* Define results of standard character escape sequences. */ 1683: #define TARGET_BELL 007 1684: #define TARGET_BS 010 1685: #define TARGET_TAB 011 1686: #define TARGET_NEWLINE 012 1687: #define TARGET_VT 013 1688: #define TARGET_FF 014 1689: #define TARGET_CR 015 1690: 1691: /* Output a float value (represented as a C double) as an immediate operand. 1692: This macro is a 68k-specific macro. */ 1693: 1694: #define ASM_OUTPUT_FLOAT_OPERAND(CODE,FILE,VALUE) \ 1695: do { \ 1696: if (CODE == 'f') \ 1697: { \ 1698: char dstr[30]; \ 1699: REAL_VALUE_TO_DECIMAL (VALUE, "%.9g", dstr); \ 1700: asm_fprintf ((FILE), "%I0r%s", dstr); \ 1701: } \ 1702: else \ 1703: { \ 1704: long l; \ 1705: REAL_VALUE_TO_TARGET_SINGLE (VALUE, l); \ 1706: if (sizeof (int) == sizeof (long)) \ 1707: asm_fprintf ((FILE), "%I0x%x", l); \ 1708: else \ 1709: asm_fprintf ((FILE), "%I0x%lx", l); \ 1710: } \ 1711: } while (0) 1712: 1713: /* Output a double value (represented as a C double) as an immediate operand. 1714: This macro is a 68k-specific macro. */ 1715: #define ASM_OUTPUT_DOUBLE_OPERAND(FILE,VALUE) \ 1716: do { char dstr[30]; \ 1717: REAL_VALUE_TO_DECIMAL (VALUE, "%.20g", dstr); \ 1718: asm_fprintf (FILE, "%I0r%s", dstr); \ 1719: } while (0) 1720: 1721: /* Note, long double immediate operands are not actually 1722: generated by m68k.md. */ 1723: #define ASM_OUTPUT_LONG_DOUBLE_OPERAND(FILE,VALUE) \ 1724: do { char dstr[30]; \ 1725: REAL_VALUE_TO_DECIMAL (VALUE, "%.20g", dstr); \ 1726: asm_fprintf (FILE, "%I0r%s", dstr); \ 1727: } while (0) 1728: 1729: /* Print operand X (an rtx) in assembler syntax to file FILE. 1730: CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified. 1731: For `%' followed by punctuation, CODE is the punctuation and X is null. 1732: 1733: On the 68000, we use several CODE characters: 1734: '.' for dot needed in Motorola-style opcode names. 1735: '-' for an operand pushing on the stack: 1736: sp@-, -(sp) or -(%sp) depending on the style of syntax. 1737: '+' for an operand pushing on the stack: 1738: sp@+, (sp)+ or (%sp)+ depending on the style of syntax. 1739: '@' for a reference to the top word on the stack: 1740: sp@, (sp) or (%sp) depending on the style of syntax. 1741: '#' for an immediate operand prefix (# in MIT and Motorola syntax 1742: but & in SGS syntax). 1743: '!' for the fpcr register (used in some float-to-fixed conversions). 1744: '$' for the letter `s' in an op code, but only on the 68040. 1745: '&' for the letter `d' in an op code, but only on the 68040. 1746: '/' for register prefix needed by longlong.h. 1747: 1748: 'b' for byte insn (no effect, on the Sun; this is for the ISI). 1749: 'd' to force memory addressing to be absolute, not relative. 1750: 'f' for float insn (print a CONST_DOUBLE as a float rather than in hex) 1751: 'w' for FPA insn (print a CONST_DOUBLE as a SunFPA constant rather 1752: than directly). Second part of 'y' below. 1753: 'x' for float insn (print a CONST_DOUBLE as a float rather than in hex), 1754: or print pair of registers as rx:ry. 1755: 'y' for a FPA insn (print pair of registers as rx:ry). This also outputs 1756: CONST_DOUBLE's as SunFPA constant RAM registers if 1757: possible, so it should not be used except for the SunFPA. */ 1758: 1759: #define PRINT_OPERAND_PUNCT_VALID_P(CODE) \ 1760: ((CODE) == '.' || (CODE) == '#' || (CODE) == '-' \ 1761: || (CODE) == '+' || (CODE) == '@' || (CODE) == '!' \ 1762: || (CODE) == '$' || (CODE) == '&' || (CODE) == '/') 1763: 1764: /* A C compound statement to output to stdio stream STREAM the 1765: assembler syntax for an instruction operand X. X is an RTL 1766: expression. 1767: 1768: CODE is a value that can be used to specify one of several ways 1769: of printing the operand. It is used when identical operands 1770: must be printed differently depending on the context. CODE 1771: comes from the `%' specification that was used to request 1772: printing of the operand. If the specification was just `%DIGIT' 1773: then CODE is 0; if the specification was `%LTR DIGIT' then CODE 1774: is the ASCII code for LTR. 1775: 1776: If X is a register, this macro should print the register's name. 1777: The names can be found in an array `reg_names' whose type is 1778: `char *[]'. `reg_names' is initialized from `REGISTER_NAMES'. 1779: 1780: When the machine description has a specification `%PUNCT' (a `%' 1781: followed by a punctuation character), this macro is called with 1782: a null pointer for X and the punctuation character for CODE. 1783: 1784: See m68k.c for the m68k specific codes. */ 1785: 1786: #define PRINT_OPERAND(FILE, X, CODE) print_operand (FILE, X, CODE) 1787: 1788: /* A C compound statement to output to stdio stream STREAM the 1789: assembler syntax for an instruction operand that is a memory 1790: reference whose address is ADDR. ADDR is an RTL expression. 1791: 1792: On some machines, the syntax for a symbolic address depends on 1793: the section that the address refers to. On these machines, 1794: define the macro `ENCODE_SECTION_INFO' to store the information 1795: into the `symbol_ref', and then check for it here. */ 1796: 1797: #define PRINT_OPERAND_ADDRESS(FILE, ADDR) print_operand_address (FILE, ADDR) 1798: 1799: 1.1.1.2 root 1800: /* Definitions for generating bytecode */ 1801: 1802: /* Just so it's known this target is supported by the bytecode generator. 1803: If this define isn't found anywhere in the target config files, then 1804: dummy stubs are supplied by bytecode.h, and any attempt to use 1805: -fbytecode will result in an error message. */ 1806: 1807: #define TARGET_SUPPORTS_BYTECODE 1808: 1809: /* Minimal segment alignment within sections is 8 units. */ 1810: #define MACHINE_SEG_ALIGN 3 1811: 1812: /* Integer alignment is two units. */ 1813: #define INT_ALIGN 2 1814: 1815: /* Pointer alignment is eight units. */ 1816: #define PTR_ALIGN 3 1817: 1818: /* Global symbols begin with `_' */ 1819: #define NAMES_HAVE_UNDERSCORES 1820: 1821: /* BC_xxx below are similar to their ASM_xxx counterparts above. */ 1822: #define BC_GLOBALIZE_LABEL(FP, NAME) bc_globalize_label(NAME) 1823: 1824: #define BC_OUTPUT_COMMON(FP, NAME, SIZE, ROUNDED) \ 1825: do { bc_emit_common(NAME, ROUNDED); bc_globalize_label(NAME); } while (0) 1826: 1827: #define BC_OUTPUT_LOCAL(FP, NAME, SIZE, ROUNDED) \ 1828: bc_emit_common(NAME, ROUNDED) 1829: 1830: #define BC_OUTPUT_ALIGN(FP, ALIGN) bc_align(ALIGN) 1831: 1832: #define BC_OUTPUT_LABEL(FP, NAME) bc_emit_labeldef(NAME) 1833: 1834: #define BC_OUTPUT_SKIP(FP, SIZE) bc_emit_skip(SIZE) 1835: 1836: #define BC_OUTPUT_LABELREF(FP, NAME) \ 1837: do { \ 1838: char *foo = (char *) xmalloc(strlen(NAME) + 2); \ 1839: strcpy(foo, "_"); \ 1840: strcat(foo, NAME); \ 1841: bc_emit_labelref (foo); \ 1842: free (foo); \ 1843: } while (0) 1844: 1845: #define BC_OUTPUT_FLOAT(FP, VAL) \ 1846: do { \ 1847: float F = VAL; \ 1848: bc_emit ((char *) &F, sizeof F); \ 1849: } while (0) 1850: 1851: #define BC_OUTPUT_DOUBLE(FP, VAL) \ 1852: do { \ 1853: double D = VAL; \ 1854: bc_emit ((char *) &D, sizeof D); \ 1855: } while (0) 1856: 1857: #define BC_OUTPUT_BYTE(FP, VAL) \ 1858: do { \ 1859: char C = VAL; \ 1860: bc_emit (&C, 1); \ 1861: } while (0) 1862: 1863: 1864: #define BC_OUTPUT_FILE ASM_OUTPUT_FILE 1865: #define BC_OUTPUT_ASCII ASM_OUTPUT_ASCII 1866: #define BC_OUTPUT_IDENT ASM_OUTPUT_IDENT 1867: 1868: /* Same as XSTR, but for bytecode */ 1869: #define BCXSTR(RTX) ((RTX)->bc_label) 1870: 1871: 1872: /* Flush bytecode buffer onto file */ 1873: #define BC_WRITE_FILE(FP) \ 1874: { \ 1875: fprintf (FP, ".text\n"); \ 1876: bc_seg_write (bc_text_seg, FP); \ 1877: fprintf(FP, "\n.data\n"); \ 1878: bc_seg_write (bc_data_seg, FP); \ 1879: bc_sym_write (FP); /* do .globl, .bss, etc. */ \ 1880: } 1881: 1882: /* Write one symbol */ 1883: #define BC_WRITE_SEGSYM(SEGSYM, FP) \ 1884: { \ 1885: prsym (FP, (SEGSYM)->sym->name); \ 1886: fprintf (FP, ":\n"); \ 1887: } 1888: 1889: 1890: /* Write one reloc entry */ 1891: #define BC_WRITE_RELOC_ENTRY(SEGRELOC, FP, OFFSET) \ 1892: { \ 1893: fprintf (FP, "\t.long "); \ 1894: prsym (FP, (SEGRELOC)->sym->name); \ 1895: fprintf (FP, " + %d\n", OFFSET); \ 1896: } 1897: 1898: /* Start new line of bytecodes */ 1899: #define BC_START_BYTECODE_LINE(FP) \ 1900: { \ 1901: fprintf (FP, "\t.byte"); \ 1902: } 1903: 1904: /* Write one bytecode */ 1905: #define BC_WRITE_BYTECODE(SEP, VAL, FP) \ 1906: { \ 1907: fprintf (FP, "%c0x%02X", (SEP), (VAL) & 0xff); \ 1908: } 1909: 1910: /* Write one bytecode RTL entry */ 1911: #define BC_WRITE_RTL(R, FP) \ 1912: { \ 1913: fprintf (FP, "%s+%d/0x%08X\n", (R)->label, (R)->offset, (R)->bc_label); \ 1914: } 1915: 1916: 1917: /* Emit function entry trampoline */ 1918: #define BC_EMIT_TRAMPOLINE(TRAMPSEG, CALLINFO) \ 1919: { \ 1920: short insn; \ 1921: \ 1922: /* Push a reference to the callinfo structure. */ \ 1923: insn = 0x4879; /* pea xxx.L */ \ 1924: seg_data (TRAMPSEG, (char *) &insn, sizeof insn); \ 1925: seg_refsym (TRAMPSEG, CALLINFO, 0); \ 1926: \ 1927: /* Call __interp, pop arguments, and return. */ \ 1928: insn = 0x4eb9; /* jsr xxx.L */ \ 1929: seg_data (TRAMPSEG, (char *) &insn, sizeof insn); \ 1930: seg_refsym (TRAMPSEG, "__callint", 0); \ 1931: insn = 0x588f; /* addql #4, sp */ \ 1932: seg_data (TRAMPSEG, (char *) &insn, sizeof insn); \ 1933: insn = 0x4e75; /* rts */ \ 1934: seg_data (TRAMPSEG, (char *) &insn, sizeof insn); \ 1935: } 1936: 1937: 1938: 1939: #if 0 1940: #define VALIDATE_STACK() if (stack_depth < 0) abort (); 1941: #else 1942: #if 0 1943: #define VALIDATE_STACK() \ 1944: fprintf (stderr, " %%%d%%", stack_depth); 1945: #endif 1946: #endif 1947: 1.1 root 1948: /* Define functions defined in aux-output.c and used in templates. */ 1949: 1950: extern char *output_move_double (); 1951: extern char *output_move_const_single (); 1952: extern char *output_move_const_double (); 1953: extern char *output_btst (); 1954: 1955: /* 1956: Local variables: 1957: version-control: t 1958: End: 1959: */
This archive runs on limited infrastructure. Preserving old code on modern bandwidth. Automated agents are requested to crawl responsibly.