--- gcc/config/m68k/m68k.md	2018/04/24 18:10:23	1.1
+++ gcc/config/m68k/m68k.md	2018/04/24 18:14:10	1.1.1.2
@@ -387,7 +387,11 @@
   "*
 {
   if (GET_CODE (operands[0]) == MEM && GET_CODE (operands[1]) == MEM)
+#ifdef SGS_CMP_ORDER
+    return \"cmpm%.l %0,%1\";
+#else
     return \"cmpm%.l %1,%0\";
+#endif
   if (REG_P (operands[1])
       || (!REG_P (operands[0]) && GET_CODE (operands[0]) != MEM))
     { cc_status.flags |= CC_REVERSED;
@@ -406,13 +410,17 @@
 
 (define_insn "cmphi"
   [(set (cc0)
-	(compare (match_operand:HI 0 "nonimmediate_operand" "rnm,d,n,m")
-		 (match_operand:HI 1 "general_operand" "d,rnm,m,n")))]
+	(compare (match_operand:HI 0 "nonimmediate_operand" "rnm,d,n,m,>")
+		 (match_operand:HI 1 "general_operand" "d,rnm,m,n,>")))]
   ""
   "*
 {
   if (GET_CODE (operands[0]) == MEM && GET_CODE (operands[1]) == MEM)
+#ifdef SGS_CMP_ORDER
+    return \"cmpm%.w %0,%1\";
+#else
     return \"cmpm%.w %1,%0\";
+#endif
   if ((REG_P (operands[1]) && !ADDRESS_REG_P (operands[1]))
       || (!REG_P (operands[0]) && GET_CODE (operands[0]) != MEM))
     { cc_status.flags |= CC_REVERSED;
@@ -437,7 +445,11 @@
   "*
 {
   if (GET_CODE (operands[0]) == MEM && GET_CODE (operands[1]) == MEM)
+#ifdef SGS_CMP_ORDER
+    return \"cmpm%.b %0,%1\";
+#else
     return \"cmpm%.b %1,%0\";
+#endif
   if (REG_P (operands[1])
       || (!REG_P (operands[0]) && GET_CODE (operands[0]) != MEM))
     { cc_status.flags |= CC_REVERSED;
@@ -1109,14 +1121,14 @@
 }")
 
 (define_insn "movdf"
-  [(set (match_operand:DF 0 "general_operand" "=rm,&rf,&rof<>,y,rm,x,!x,!rm")
-	(match_operand:DF 1 "general_operand" "rf,m,rofE<>,rmE,y,xH,rm,x"))]
+  [(set (match_operand:DF 0 "general_operand" "=rm,rf,rf,&rof<>,y,rm,x,!x,!rm")
+	(match_operand:DF 1 "general_operand" "rf,m,0,rofE<>,rmE,y,xH,rm,x"))]
 ;  [(set (match_operand:DF 0 "general_operand" "=rm,&rf,&rof<>")
 ;	(match_operand:DF 1 "general_operand" "rf,m,rofF<>"))]
   ""
   "*
 {
-  if (which_alternative == 6)
+  if (which_alternative == 7)
     return \"fpmove%.d %x1,fpa0\;fpmove%.d fpa0,%x0\";
   if (FPA_REG_P (operands[0]))
     {
@@ -1217,7 +1229,7 @@
 ")
 
 (define_insn ""
-  [(set (match_operand:XF 0 "nonimmediate_operand" "=rm,&rf,&rof<>")
+  [(set (match_operand:XF 0 "nonimmediate_operand" "=rm,rf,&rof<>")
 	(match_operand:XF 1 "nonimmediate_operand" "rf,m,rof<>"))]
   "! TARGET_68881"
   "*
@@ -1260,7 +1272,7 @@
 ;; movdi can apply to fp regs in some cases
 (define_insn "movdi"
   ;; Let's see if it really still needs to handle fp regs, and, if so, why.
-  [(set (match_operand:DI 0 "general_operand" "=rm,&r,&ro<>,y,rm,!*x,!rm")
+  [(set (match_operand:DI 0 "general_operand" "=rm,r,&ro<>,y,rm,!*x,!rm")
 	(match_operand:DI 1 "general_operand" "rF,m,roi<>F,rmiF,y,rmF,*x"))]
 ;  [(set (match_operand:DI 0 "general_operand" "=rm,&r,&ro<>,!&rm,!&f,y,rm,x,!x,!rm")
 ;	(match_operand:DI 1 "general_operand" "r,m,roi<>,fF,rfmF,rmi,y,rm,x"))]
@@ -1744,7 +1756,7 @@
 	(fix:SI (fix:DF (match_operand:DF 1 "register_operand" "f"))))
    (clobber (match_scratch:SI 2 "=d"))
    (clobber (match_scratch:SI 3 "=d"))]
-  "TARGET_68040"
+  "TARGET_68881 && TARGET_68040"
   "*
 {
   CC_STATUS_INIT;
@@ -1756,7 +1768,7 @@
 	(fix:HI (fix:DF (match_operand:DF 1 "register_operand" "f"))))
    (clobber (match_scratch:SI 2 "=d"))
    (clobber (match_scratch:SI 3 "=d"))]
-  "TARGET_68040"
+  "TARGET_68881 && TARGET_68040"
   "*
 {
   CC_STATUS_INIT;
@@ -1768,7 +1780,7 @@
 	(fix:QI (fix:DF (match_operand:DF 1 "register_operand" "f"))))
    (clobber (match_scratch:SI 2 "=d"))
    (clobber (match_scratch:SI 3 "=d"))]
-  "TARGET_68040"
+  "TARGET_68881 && TARGET_68040"
   "*
 {
   CC_STATUS_INIT;
@@ -2575,9 +2587,9 @@
 	  (mult:SI (match_operand:SI 1 "register_operand" "")
 		   (match_operand:SI 2 "nonimmediate_operand" "")))
      (set (subreg:SI (match_dup 0) 0)
-	  (truncate:SI (ashift:DI (mult:DI (sign_extend:DI (match_dup 1))
-					   (sign_extend:DI (match_dup 2)))
-				  (const_int 32))))])]
+	  (truncate:SI (lshiftrt:DI (mult:DI (sign_extend:DI (match_dup 1))
+					     (sign_extend:DI (match_dup 2)))
+				    (const_int 32))))])]
   "TARGET_68020"
   "")
 
@@ -2586,9 +2598,9 @@
 	(mult:SI (match_operand:SI 1 "register_operand" "%0")
 		 (match_operand:SI 2 "nonimmediate_operand" "dm")))
    (set (match_operand:SI 3 "register_operand" "=d")
-	(truncate:SI (ashift:DI (mult:DI (sign_extend:DI (match_dup 1))
-					 (sign_extend:DI (match_dup 2)))
-				(const_int 32))))]
+	(truncate:SI (lshiftrt:DI (mult:DI (sign_extend:DI (match_dup 1))
+					   (sign_extend:DI (match_dup 2)))
+				  (const_int 32))))]
   "TARGET_68020"
   "muls%.l %2,%3:%0")
 
@@ -2597,9 +2609,9 @@
 	(mult:SI (match_operand:SI 1 "register_operand" "%0")
 		 (match_operand:SI 2 "const_int_operand" "n")))
    (set (match_operand:SI 3 "register_operand" "=d")
-	(truncate:SI (ashift:DI (mult:DI (sign_extend:DI (match_dup 1))
-					 (match_dup 2))
-				(const_int 32))))]
+	(truncate:SI (lshiftrt:DI (mult:DI (sign_extend:DI (match_dup 1))
+					   (match_dup 2))
+				  (const_int 32))))]
   "TARGET_68020
    /* This test is a noop on 32 bit machines,
       but important for a cross-compiler hosted on 64-bit machines.  */
@@ -2715,35 +2727,39 @@
 #endif
 }")
 
-(define_insn "divhisi3"
-  [(set (match_operand:HI 0 "general_operand" "=d")
-	(truncate:HI
-	 (div:SI
-	  (match_operand:SI 1 "general_operand" "0")
-	  (sign_extend:SI (match_operand:HI 2 "nonimmediate_operand" "dm")))))]
-  ""
-  "*
-{
-#ifdef MOTOROLA
-  return \"divs%.w %2,%0\";
-#else
-  return \"divs %2,%0\";
-#endif
-}")
-
-(define_insn ""
-  [(set (match_operand:HI 0 "general_operand" "=d")
-	(truncate:HI (div:SI (match_operand:SI 1 "general_operand" "0")
-			     (match_operand:SI 2 "const_int_operand" "n"))))]
-  ""
-  "*
-{
-#ifdef MOTOROLA
-  return \"divs%.w %2,%0\";
-#else
-  return \"divs %2,%0\";
-#endif
-}")
+;; These patterns don't work because the divs instruction is undefined if
+;; the quotient is more than 16 bits.  This valid C would be miscompiled:
+;; int n; short d; unsigned short q; ... q = (unsigned int) (n / d);
+;; Imagine what happens when n = 100000 and d = 1.
+;;(define_insn "divhisi3"
+;;  [(set (match_operand:HI 0 "general_operand" "=d")
+;;	(truncate:HI
+;;	 (div:SI
+;;	  (match_operand:SI 1 "general_operand" "0")
+;;	  (sign_extend:SI (match_operand:HI 2 "nonimmediate_operand" "dm")))))]
+;;  ""
+;;  "*
+;;{
+;;#ifdef MOTOROLA
+;;  return \"divs%.w %2,%0\";
+;;#else
+;;  return \"divs %2,%0\";
+;;#endif
+;;}")
+
+;;(define_insn ""
+;;  [(set (match_operand:HI 0 "general_operand" "=d")
+;;	(truncate:HI (div:SI (match_operand:SI 1 "general_operand" "0")
+;;			     (match_operand:SI 2 "const_int_operand" "n"))))]
+;;  ""
+;;  "*
+;;{
+;;#ifdef MOTOROLA
+;;  return \"divs%.w %2,%0\";
+;;#else
+;;  return \"divs %2,%0\";
+;;#endif
+;;}")
 
 (define_insn "udivhi3"
   [(set (match_operand:HI 0 "general_operand" "=d")
@@ -2759,35 +2775,36 @@
 #endif
 }")
 
-(define_insn "udivhisi3"
-  [(set (match_operand:HI 0 "general_operand" "=d")
-	(truncate:HI
-	 (udiv:SI
-	  (match_operand:SI 1 "general_operand" "0")
-	  (zero_extend:SI (match_operand:HI 2 "nonimmediate_operand" "dm")))))]
-  ""
-  "*
-{
-#ifdef MOTOROLA
-  return \"divu%.w %2,%0\";
-#else
-  return \"divu %2,%0\";
-#endif
-}")
-
-(define_insn ""
-  [(set (match_operand:HI 0 "general_operand" "=d")
-	(truncate:HI (udiv:SI (match_operand:SI 1 "general_operand" "0")
-			      (match_operand:SI 2 "const_int_operand" "n"))))]
-  ""
-  "*
-{
-#ifdef MOTOROLA
-  return \"divu%.w %2,%0\";
-#else
-  return \"divu %2,%0\";
-#endif
-}")
+;; See comment before divhisi3 why these are commented out.
+;;(define_insn "udivhisi3"
+;;  [(set (match_operand:HI 0 "general_operand" "=d")
+;;	(truncate:HI
+;;	 (udiv:SI
+;;	  (match_operand:SI 1 "general_operand" "0")
+;;	  (zero_extend:SI (match_operand:HI 2 "nonimmediate_operand" "dm")))))]
+;;  ""
+;;  "*
+;;{
+;;#ifdef MOTOROLA
+;;  return \"divu%.w %2,%0\";
+;;#else
+;;  return \"divu %2,%0\";
+;;#endif
+;;}")
+
+;;(define_insn ""
+;;  [(set (match_operand:HI 0 "general_operand" "=d")
+;;	(truncate:HI (udiv:SI (match_operand:SI 1 "general_operand" "0")
+;;			      (match_operand:SI 2 "const_int_operand" "n"))))]
+;;  ""
+;;  "*
+;;{
+;;#ifdef MOTOROLA
+;;  return \"divu%.w %2,%0\";
+;;#else
+;;  return \"divu %2,%0\";
+;;#endif
+;;}")
 
 (define_expand "divdf3"
   [(set (match_operand:DF 0 "general_operand" "")
@@ -2888,39 +2905,40 @@
 #endif
 }")
 
-(define_insn "modhisi3"
-  [(set (match_operand:HI 0 "general_operand" "=d")
-	(truncate:HI
-	 (mod:SI
-	  (match_operand:SI 1 "general_operand" "0")
-	  (sign_extend:SI (match_operand:HI 2 "nonimmediate_operand" "dm")))))]
-  ""
-  "*
-{
-  /* The swap insn produces cc's that don't correspond to the result.  */
-  CC_STATUS_INIT;
-#ifdef MOTOROLA
-  return \"divs%.w %2,%0\;swap %0\";
-#else
-  return \"divs %2,%0\;swap %0\";
-#endif
-}")
-
-(define_insn ""
-  [(set (match_operand:HI 0 "general_operand" "=d")
-	(truncate:HI (mod:SI (match_operand:SI 1 "general_operand" "0")
-			     (match_operand:SI 2 "const_int_operand" "n"))))]
-  ""
-  "*
-{
-  /* The swap insn produces cc's that don't correspond to the result.  */
-  CC_STATUS_INIT;
-#ifdef MOTOROLA
-  return \"divs%.w %2,%0\;swap %0\";
-#else
-  return \"divs %2,%0\;swap %0\";
-#endif
-}")
+;; See comment before divhisi3 why these are commented out.
+;;(define_insn "modhisi3"
+;;  [(set (match_operand:HI 0 "general_operand" "=d")
+;;	(truncate:HI
+;;	 (mod:SI
+;;	  (match_operand:SI 1 "general_operand" "0")
+;;	  (sign_extend:SI (match_operand:HI 2 "nonimmediate_operand" "dm")))))]
+;;  ""
+;;  "*
+;;{
+;;  /* The swap insn produces cc's that don't correspond to the result.  */
+;;  CC_STATUS_INIT;
+;;#ifdef MOTOROLA
+;;  return \"divs%.w %2,%0\;swap %0\";
+;;#else
+;;  return \"divs %2,%0\;swap %0\";
+;;#endif
+;;}")
+
+;;(define_insn ""
+;;  [(set (match_operand:HI 0 "general_operand" "=d")
+;;	(truncate:HI (mod:SI (match_operand:SI 1 "general_operand" "0")
+;;			     (match_operand:SI 2 "const_int_operand" "n"))))]
+;;  ""
+;;  "*
+;;{
+;;  /* The swap insn produces cc's that don't correspond to the result.  */
+;;  CC_STATUS_INIT;
+;;#ifdef MOTOROLA
+;;  return \"divs%.w %2,%0\;swap %0\";
+;;#else
+;;  return \"divs %2,%0\;swap %0\";
+;;#endif
+;;}")
 
 (define_insn "umodhi3"
   [(set (match_operand:HI 0 "general_operand" "=d")
@@ -2938,39 +2956,40 @@
 #endif
 }")
 
-(define_insn "umodhisi3"
-  [(set (match_operand:HI 0 "general_operand" "=d")
-	(truncate:HI
-	 (umod:SI
-	  (match_operand:SI 1 "general_operand" "0")
-	  (zero_extend:SI (match_operand:HI 2 "nonimmediate_operand" "dm")))))]
-  ""
-  "*
-{
-  /* The swap insn produces cc's that don't correspond to the result.  */
-  CC_STATUS_INIT;
-#ifdef MOTOROLA
-  return \"divu%.w %2,%0\;swap %0\";
-#else
-  return \"divu %2,%0\;swap %0\";
-#endif
-}")
-
-(define_insn ""
-  [(set (match_operand:HI 0 "general_operand" "=d")
-	(truncate:HI (umod:SI (match_operand:SI 1 "general_operand" "0")
-			      (match_operand:SI 2 "const_int_operand" "n"))))]
-  ""
-  "*
-{
-  /* The swap insn produces cc's that don't correspond to the result.  */
-  CC_STATUS_INIT;
-#ifdef MOTOROLA
-  return \"divu%.w %2,%0\;swap %0\";
-#else
-  return \"divu %2,%0\;swap %0\";
-#endif
-}")
+;; See comment before divhisi3 why these are commented out.
+;;(define_insn "umodhisi3"
+;;  [(set (match_operand:HI 0 "general_operand" "=d")
+;;	(truncate:HI
+;;	 (umod:SI
+;;	  (match_operand:SI 1 "general_operand" "0")
+;;	  (zero_extend:SI (match_operand:HI 2 "nonimmediate_operand" "dm")))))]
+;;  ""
+;;  "*
+;;{
+;;  /* The swap insn produces cc's that don't correspond to the result.  */
+;;  CC_STATUS_INIT;
+;;#ifdef MOTOROLA
+;;  return \"divu%.w %2,%0\;swap %0\";
+;;#else
+;;  return \"divu %2,%0\;swap %0\";
+;;#endif
+;;}")
+
+;;(define_insn ""
+;;  [(set (match_operand:HI 0 "general_operand" "=d")
+;;	(truncate:HI (umod:SI (match_operand:SI 1 "general_operand" "0")
+;;			      (match_operand:SI 2 "const_int_operand" "n"))))]
+;;  ""
+;;  "*
+;;{
+;;  /* The swap insn produces cc's that don't correspond to the result.  */
+;;  CC_STATUS_INIT;
+;;#ifdef MOTOROLA
+;;  return \"divu%.w %2,%0\;swap %0\";
+;;#else
+;;  return \"divu %2,%0\;swap %0\";
+;;#endif
+;;}")
 
 (define_insn "divmodsi4"
   [(set (match_operand:SI 0 "general_operand" "=d")
@@ -3961,7 +3980,15 @@
   "TARGET_68020 && TARGET_BITFIELD"
   "*
 {
-  cc_status.flags |= CC_NOT_NEGATIVE;
+  if (GET_CODE (operands[2]) == CONST_INT)
+    {
+      if (INTVAL (operands[2]) != 32)
+	cc_status.flags |= CC_NOT_NEGATIVE;
+    }
+  else
+    {
+      CC_STATUS_INIT;
+    }
   return \"bfextu %1{%b3:%b2},%0\";
 }")
 
@@ -4033,7 +4060,15 @@
   "TARGET_68020 && TARGET_BITFIELD"
   "*
 {
-  cc_status.flags |= CC_NOT_NEGATIVE;
+  if (GET_CODE (operands[2]) == CONST_INT)
+    {
+      if (INTVAL (operands[2]) != 32)
+	cc_status.flags |= CC_NOT_NEGATIVE;
+    }
+  else
+    {
+      CC_STATUS_INIT;
+    }
   return \"bfextu %1{%b3:%b2},%0\";
 }")
 
@@ -4855,12 +4890,16 @@
 
   "flag_pic"
   "*
+#ifdef HPUX_ASM
+  return \"bsr %0\";
+#else
 #ifdef MOTOROLA
   if (GET_CODE (operands[0]) == MEM 
       && GET_CODE (XEXP (operands[0], 0)) == SYMBOL_REF)
     return \"bsr %0@PLTPC\";
 #endif
   return \"jsr %0\";
+#endif
 ")
 
 ;; Call subroutine, returning value in operand 0
@@ -4906,12 +4945,16 @@
   ;; Operand 2 not really used on the m68000.
   "flag_pic"
   "*
+#ifdef HPUX_ASM
+  return \"bsr %1\";
+#else
 #ifdef MOTOROLA
   if (GET_CODE (operands[1]) == MEM 
       && GET_CODE (XEXP (operands[1], 0)) == SYMBOL_REF)
     return \"bsr %1@PLTPC\";
 #endif
   return \"jsr %1\";
+#endif
 ")
 
 ;; Call subroutine returning any type.