--- gcc/config/m88k.md	2018/04/24 17:51:34	1.1.1.1
+++ gcc/config/m88k.md	2018/04/24 17:54:23	1.1.1.2
@@ -28,11 +28,15 @@
 (define_expand "m88k_sccs_id"
   [(match_operand:SI 0 "" "")]
   ""
-  "{ static char sccs_id[] = \"@(#)m88k.md	1.96.4.3 1/14/92 09:46:15\";
+  "{ static char sccs_id[] = \"@(#)m88k.md	2.0.3.4 20 Mar 1992 15:09:03\";
      FAIL; }")
 
 ;; Attribute specifications
 
+; Target CPU.
+(define_attr "cpu" "m88000,m88100,m88110"
+  (const (symbol_ref "m88k_cpu")))
+
 ; Type of each instruction.  Default is arithmetic.
 ; I'd like to write the list as this, but genattrtab won't accept it.
 ;
@@ -163,7 +167,7 @@
 
 ; Describing stores is currently not useful.  The suggestion here is that the
 ; function unit ordering has already been established (writeback is last) and
-; that store insns use the units in an unusal order.
+; that store insns use the units in an unusual order.
 ;(define_function_unit "writeback" 1 1 (eq_attr "type" "store,mstore") 0 1)
 ;(define_function_unit "memory" 1 3 (eq_attr "type" "store,mstore") 1 2)
 
@@ -185,7 +189,12 @@
 				(match_operand:SI 2 "int5_operand" ""))
 		     (match_operand:SI 3 "int5_operand" "")))]
   "INTVAL (operands [2]) <= INTVAL (operands [3])"
-  "ext %0,%1,%w3<(%3-%2)>")
+  "*
+{
+  operands[4] = gen_rtx (CONST_INT, SImode,
+			 INTVAL (operands[3]) - INTVAL (operands[2]));
+  return \"ext %0,%1,%w3<%4>\";  /* <(%3-%2)> */
+}")
 
 (define_insn ""
   [(set (match_operand:SI 0 "register_operand" "=r")
@@ -193,7 +202,12 @@
 				(match_operand:SI 2 "int5_operand" ""))
 		     (match_operand:SI 3 "int5_operand" "")))]
   "INTVAL (operands [2]) <= INTVAL (operands [3])"
-  "extu %0,%1,%w3<(%3-%2)>")
+  "*
+{
+  operands[4] = gen_rtx (CONST_INT, SImode,
+			 INTVAL (operands[3]) - INTVAL (operands[2]));
+  return \"extu %0,%1,%w3<%4>\";  /* <(%3-%2)> */
+}")
 
 ;; Optimize possible cases of the set instruction.
 
@@ -642,14 +656,11 @@
 ;; The actual compare instructions.
 
 (define_insn ""
-  [(set (match_operand:CC 0 "register_operand" "=r,r")
-	(compare:CC (match_operand:SI 1 "register_operand" "rO,I")
-		    (match_operand:SI 2 "arith_operand" "rI,r")))]
+  [(set (match_operand:CC 0 "register_operand" "=r")
+	(compare:CC (match_operand:SI 1 "register_operand" "rO")
+		    (match_operand:SI 2 "arith_operand" "rI")))]
   ""
-  "@
-   cmp %0,%r1,%2
-   cmp %0,%2,%1\;xor.c %0,%#r0,%0"
-  [(set_attr "type" "arith,marith")])
+  "cmp %0,%r1,%2")
 
 (define_insn ""
   [(set (match_operand:CC 0 "register_operand" "=r,r")
@@ -2652,7 +2663,12 @@
 			 (match_operand:SI 2 "int5_operand" "")
 			 (match_operand:SI 3 "int5_operand" "")))]
   ""
-  "ext %0,%1,%2<(32-%2-%3)>")
+  "*
+{
+  operands[4] = gen_rtx (CONST_INT, SImode,
+			 (32 - INTVAL (operands[2])) - INTVAL (operands[3]));
+  return \"ext %0,%1,%2<%4>\";  /* <(32-%2-%3)> */
+}")
 
 (define_insn ""
   [(set (match_operand:SI 0 "register_operand" "=r")
@@ -2668,26 +2684,41 @@
 			 (match_operand:SI 2 "int5_operand" "")
 			 (match_operand:SI 3 "int5_operand" "")))]
   ""
-  "extu %0,%1,%2<(32-%2-%3)>")
+  "*
+{
+  operands[4] = gen_rtx (CONST_INT, SImode,
+			 (32 - INTVAL (operands[2])) - INTVAL (operands[3]));
+  return \"extu %0,%1,%2<%4>\";  /* <(32-%2-%3)> */
+}")
 
 (define_insn ""
-  [(set (zero_extract:SI (match_operand:SI 0 "register_operand" "r")
+  [(set (zero_extract:SI (match_operand:SI 0 "register_operand" "+r")
 			 (match_operand:SI 1 "int5_operand" "")
 			 (match_operand:SI 2 "int5_operand" ""))
 	(const_int 0))]
   ""
-  "clr %0,%0,%1<(32-%1-%2)>")
+  "*
+{
+  operands[3] = gen_rtx (CONST_INT, SImode,
+			 (32 - INTVAL (operands[1])) - INTVAL (operands[2]));
+  return \"clr %0,%0,%1<%3>\";  /* <(32-%1-%2)> */
+}")
 
 (define_insn ""
-  [(set (zero_extract:SI (match_operand:SI 0 "register_operand" "r")
+  [(set (zero_extract:SI (match_operand:SI 0 "register_operand" "+r")
 			 (match_operand:SI 1 "int5_operand" "")
 			 (match_operand:SI 2 "int5_operand" ""))
 	(const_int -1))]
   ""
-  "set %0,%0,%1<(32-%1-%2)>")
+  "*
+{
+  operands[3] = gen_rtx (CONST_INT, SImode,
+			 (32 - INTVAL (operands[1])) - INTVAL (operands[2]));
+  return \"set %0,%0,%1<%3>\";  /* <(32-%1-%2)> */
+}")
 
 (define_insn ""
-  [(set (zero_extract:SI (match_operand:SI 0 "register_operand" "=r")
+  [(set (zero_extract:SI (match_operand:SI 0 "register_operand" "+r")
 			 (match_operand:SI 1 "int5_operand" "")
 			 (match_operand:SI 2 "int5_operand" ""))
 	(match_operand:SI 3 "int32_operand" "n"))]