--- gcc/config/mips.h 2018/04/24 17:51:32 1.1.1.1 +++ gcc/config/mips.h 2018/04/24 17:58:39 1.1.1.3 @@ -49,12 +49,14 @@ enum cmp_type { enum delay_type { DELAY_NONE, /* no delay slot */ DELAY_LOAD, /* load from memory delay */ - DELAY_HILO /* move from/to hi/lo registers */ + DELAY_HILO, /* move from/to hi/lo registers */ + DELAY_FCMP /* delay after doing c..{d,s} */ }; /* Which processor to schedule for. Since there is no difference between a R2000 and R3000 in terms of the scheduler, we collapse them into - just an R3000. */ + just an R3000. The elements of the enumeration must match exactly + the cpu attribute in the mips.md machine description. */ enum processor_type { PROCESSOR_DEFAULT, @@ -63,6 +65,18 @@ enum processor_type { PROCESSOR_R4000 }; +/* Recast the cpu class to be the cpu attribute. */ +#define mips_cpu_attr ((enum attr_cpu)mips_cpu) + +/* Which type of block move to do (whether or not the last store is + split out so it can fill a branch delay slot). */ + +enum block_move_type { + BLOCK_MOVE_NORMAL, /* generate complete block move */ + BLOCK_MOVE_NOT_LAST, /* generate all but last store */ + BLOCK_MOVE_LAST /* generate just the last store */ +}; + extern char mips_reg_names[][8]; /* register names (a0 vs. $4). */ extern char mips_print_operand_punct[]; /* print_operand punctuation chars */ extern char *current_function_name; /* current function being compiled */ @@ -105,25 +119,27 @@ extern struct rtx_def *mips_load_reg4; / extern void abort_with_insn (); extern int arith32_operand (); extern int arith_operand (); -extern int call_memory_operand (); extern int cmp_op (); extern int cmp2_op (); extern unsigned long compute_frame_size (); extern void expand_block_move (); extern int equality_op (); extern int fcmp_op (); +extern int fpsw_register_operand (); extern struct rtx_def * function_arg (); extern void function_arg_advance (); extern int function_arg_partial_nregs (); extern void function_epilogue (); extern void function_prologue (); extern void gen_conditional_branch (); +extern struct rtx_def * gen_int_relational (); extern void init_cumulative_args (); extern int large_int (); extern int md_register_operand (); extern int mips_address_cost (); extern void mips_asm_file_end (); extern void mips_asm_file_start (); +extern void mips_declare_object (); extern int mips_const_double_ok (); extern void mips_count_memory_refs (); extern int mips_debugger_offset (); @@ -131,10 +147,14 @@ extern int mips_epilogue_delay_slots () extern char *mips_fill_delay_slot (); extern char *mips_move_1word (); extern char *mips_move_2words (); +extern void mips_output_double (); extern int mips_output_external (); +extern void mips_output_float (); extern void mips_output_filename (); extern void mips_output_lineno (); +extern char *output_block_move (); extern void override_options (); +extern int pc_or_label_operand (); extern void print_operand_address (); extern void print_operand (); extern void print_options (); @@ -156,9 +176,14 @@ extern void text_section (); #ifndef HALF_PIC_P #define HALF_PIC_P() 0 +#define HALF_PIC_NUMBER_PTRS 0 +#define HALF_PIC_NUMBER_REFS 0 #define HALF_PIC_ENCODE(DECL) +#define HALF_PIC_DECLARE(NAME) #define HALF_PIC_INIT() error ("half-pic init called on systems that don't support it.") #define HALF_PIC_ADDRESS_P(X) 0 +#define HALF_PIC_PTR(X) X +#define HALF_PIC_FINISH(STREAM) #endif @@ -234,6 +259,9 @@ while (0) #define OPTIMIZATION_OPTIONS(LEVEL) \ { \ + flag_no_function_cse = TRUE; \ + flag_gnu_linker = FALSE; \ + \ if (LEVEL) \ { \ flag_omit_frame_pointer = TRUE; \ @@ -249,7 +277,6 @@ while (0) flag_expensive_optimizations = TRUE; \ flag_rerun_cse_after_loop = TRUE; \ flag_schedule_insns = TRUE; \ - flag_caller_saves = TRUE; \ } \ \ if (LEVEL >= 3) \ @@ -269,6 +296,7 @@ while (0) || defined(SGI_TARGET) \ || defined(MIPS_NEWS) \ || defined(MIPS_SYSV) \ + || defined(MIPS_SVR4) \ || defined(MIPS_BSD43) #ifndef CPP_PREDEFINES @@ -296,11 +324,16 @@ while (0) #endif #endif +/* Tell collect what flags to pass to nm. */ +#ifndef NM_FLAGS +#define NM_FLAGS "-Bp" +#endif + /* Names to predefine in the preprocessor for this target machine. */ #ifndef CPP_PREDEFINES -#define CPP_PREDEFINES "-Dmips -Dunix -Dhost_mips -DMIPSEB -DR3000" +#define CPP_PREDEFINES "-Dmips -Dunix -Dhost_mips -DMIPSEB -DR3000 -DSYSTYPE_BSD43" #endif /* Extra switches sometimes passed to the assembler. */ @@ -308,10 +341,11 @@ while (0) #ifndef ASM_SPEC #define ASM_SPEC "\ %{!mgas: \ - %{!mrnames: -nocpp} \ + %{!mrnames: %{!.s:-nocpp} %{.s: %{cpp} %{nocpp}}} \ %{pipe: %e-pipe is not supported.} \ %{EB} %{!EB:-EB} \ %{EL: %e-EL not supported} \ + %{mips1} %{mips2} %{mips3} \ %{O:-O2} %{O1:-O2} %{O2:-O2} %{O3:-O3} \ %{g} %{g0} %{g1} %{g2} %{g3} %{v} %{K}} \ %{G*}" @@ -321,7 +355,7 @@ while (0) /* Specify to run a post-processor, mips-tfile after the assembler has run to stuff the mips debug information into the object file. This is needed because the $#!%^ MIPS assembler provides no way - of specifing such information in the assembly file. */ + of specifying such information in the assembly file. */ #ifndef ASM_FINAL_SPEC #define ASM_FINAL_SPEC "\ @@ -350,6 +384,7 @@ while (0) %{pipe: %e-pipe is not supported.} \ %{EB} %{!EB:-EB} \ %{EL: %e-EL not supported} \ + %{mips1} %{mips2} %{mips3} \ %{bestGnum}}" #endif /* LINK_SPEC defined */ @@ -367,15 +402,10 @@ while (0) %{save-temps: }" #endif -#ifndef CC1PLUS_SPEC -#define CC1PLUS_SPEC "%{!fgnu-binutils: -fno-gnu-binutils}" -#endif - /* Preprocessor specs */ #ifndef CPP_SPEC #define CPP_SPEC "\ -%{!ansi:-DSYSTYPE_BSD} -D__SYSTYPE_BSD__ \ %{.cc: -D__LANGUAGE_C_PLUS_PLUS -D_LANGUAGE_C_PLUS_PLUS} \ %{.cxx: -D__LANGUAGE_C_PLUS_PLUS -D_LANGUAGE_C_PLUS_PLUS} \ %{.C: -D__LANGUAGE_C_PLUS_PLUS -D_LANGUAGE_C_PLUS_PLUS} \ @@ -388,13 +418,17 @@ while (0) `STANDARD_EXEC_PREFIX'. */ #ifndef MD_EXEC_PREFIX -#define MD_EXEC_PREFIX "/usr/lib/cmplrs/cc" +#define MD_EXEC_PREFIX "/usr/lib/cmplrs/cc/" +#endif + +#ifndef MD_STARTFILE_PREFIX +#define MD_STARTFILE_PREFIX "/usr/lib/cmplrs/cc/" #endif /* Print subsidiary information on the compiler version in use. */ -#define MIPS_VERSION "[AL 1.1, MM 12]" +#define MIPS_VERSION "[AL 1.1, MM 19]" #ifndef MACHINE_TYPE #define MACHINE_TYPE "BSD Mips" @@ -415,9 +449,12 @@ while (0) #define MIPS_DEBUGGING_INFO /* MIPS specific debugging info */ #ifndef PREFERRED_DEBUGGING_TYPE /* assume SDB_DEBUGGING_INFO */ -#define PREFERRED_DEBUGGING_TYPE SDB_DEBUG +#define PREFERRED_DEBUGGING_TYPE ((len > 1 && !strncmp (str, "ggdb", len)) ? DBX_DEBUG : SDB_DEBUG) #endif +/* By default, turn on GDB extensions. */ +#define DEFAULT_GDB_EXTENSIONS 1 + /* If we are passing smuggling stabs through the MIPS ECOFF object format, put a comment in front of the .stab operation so that the MIPS assembler does not choke. The mips-tfile program @@ -582,6 +619,13 @@ do { \ #define EXTENDED_COFF /* ECOFF, not normal coff */ #endif +/* Don't use the default definitions, because we don't have gld. + Also, we don't want stabs when generating ECOFF output. + Instead we depend on collect to handle these. */ + +#define ASM_OUTPUT_CONSTRUCTOR(file, name) +#define ASM_OUTPUT_DESTRUCTOR(file, name) + /* Run-time compilation parameters selecting different hardware subsets. */ @@ -615,14 +659,14 @@ do { \ /* switches not used yet */ #define MASK_WC8 0x00000000 /* wchar's are 8 bits, not 32 */ #define MASK_WC16 0x00000000 /* wchar's are 16 bits, not 32 */ -#define MASK_WC32 0x00000000 /* dummy for consistancy */ +#define MASK_WC32 0x00000000 /* dummy for consistency */ /* Debug switches, not documented */ #define MASK_DEBUG 0x40000000 /* Eliminate version # in .s file */ #define MASK_DEBUG_A 0x20000000 /* don't allow