--- gcc/config/mips.h	2018/04/24 17:51:32	1.1.1.1
+++ gcc/config/mips.h	2018/04/24 18:04:04	1.1.1.4
@@ -28,12 +28,17 @@ the Free Software Foundation, 675 Mass A
 
 /* Standard GCC variables that we reference.  */
 
-extern int target_flags;
-extern int optimize;
-extern int may_call_alloca;
-extern int current_function_calls_alloca;
-extern int frame_pointer_needed;
-extern int flag_omit_frame_pointer;
+extern char    *asm_file_name;
+extern char	call_used_regs[];
+extern int	current_function_calls_alloca;
+extern int	flag_omit_frame_pointer;
+extern int	frame_pointer_needed;
+extern char    *language_string;
+extern int	may_call_alloca;
+extern int	optimize;
+extern char   **save_argv;
+extern int	target_flags;
+extern char    *version_string;
 
 /* MIPS external variables defined in mips.c.  */
 
@@ -49,12 +54,14 @@ enum cmp_type {
 enum delay_type {
   DELAY_NONE,				/* no delay slot */
   DELAY_LOAD,				/* load from memory delay */
-  DELAY_HILO				/* move from/to hi/lo registers */
+  DELAY_HILO,				/* move from/to hi/lo registers */
+  DELAY_FCMP				/* delay after doing c.<xx>.{d,s} */
 };
 
 /* Which processor to schedule for.  Since there is no difference between
    a R2000 and R3000 in terms of the scheduler, we collapse them into
-   just an R3000.  */
+   just an R3000.  The elements of the enumeration must match exactly
+   the cpu attribute in the mips.md machine description.  */
 
 enum processor_type {
   PROCESSOR_DEFAULT,
@@ -63,6 +70,18 @@ enum processor_type {
   PROCESSOR_R4000
 };
 
+/* Recast the cpu class to be the cpu attribute.  */
+#define mips_cpu_attr ((enum attr_cpu)mips_cpu)
+
+/* Which type of block move to do (whether or not the last store is
+   split out so it can fill a branch delay slot).  */
+
+enum block_move_type {
+  BLOCK_MOVE_NORMAL,			/* generate complete block move */
+  BLOCK_MOVE_NOT_LAST,			/* generate all but last store */
+  BLOCK_MOVE_LAST			/* generate just the last store */
+};
+
 extern char mips_reg_names[][8];	/* register names (a0 vs. $4). */
 extern char mips_print_operand_punct[];	/* print_operand punctuation chars */
 extern char *current_function_name;	/* current function being compiled */
@@ -105,19 +124,22 @@ extern struct rtx_def *mips_load_reg4;	/
 extern void		abort_with_insn ();
 extern int		arith32_operand ();
 extern int		arith_operand ();
-extern int		call_memory_operand ();
 extern int		cmp_op ();
 extern int		cmp2_op ();
-extern unsigned long	compute_frame_size ();
+extern long		compute_frame_size ();
+extern int		epilogue_reg_mentioned_p ();
 extern void		expand_block_move ();
 extern int		equality_op ();
 extern int		fcmp_op ();
+extern void		final_prescan_insn ();
+extern int		fpsw_register_operand ();
 extern struct rtx_def *	function_arg ();
 extern void		function_arg_advance ();
 extern int		function_arg_partial_nregs ();
 extern void		function_epilogue ();
 extern void		function_prologue ();
 extern void		gen_conditional_branch ();
+extern struct rtx_def * gen_int_relational ();
 extern void		init_cumulative_args ();
 extern int		large_int ();
 extern int		md_register_operand ();
@@ -127,38 +149,81 @@ extern void		mips_asm_file_start ();
 extern int		mips_const_double_ok ();
 extern void		mips_count_memory_refs ();
 extern int		mips_debugger_offset ();
+extern void		mips_declare_object ();
 extern int		mips_epilogue_delay_slots ();
+extern void		mips_expand_epilogue ();
+extern void		mips_expand_prologue ();
 extern char	       *mips_fill_delay_slot ();
 extern char	       *mips_move_1word ();
 extern char	       *mips_move_2words ();
+extern void		mips_output_double ();
 extern int		mips_output_external ();
+extern void		mips_output_float ();
 extern void		mips_output_filename ();
 extern void		mips_output_lineno ();
+extern char	       *output_block_move ();
 extern void		override_options ();
+extern int		pc_or_label_operand ();
 extern void		print_operand_address ();
 extern void		print_operand ();
 extern void		print_options ();
 extern int		reg_or_0_operand ();
+extern int		simple_epilogue_p ();
 extern int		simple_memory_operand ();
 extern int		small_int ();
 extern void		trace();
 extern int		uns_arith_operand ();
 extern int		uns_cmp_op ();
 
-/* Functions in varasm.c that we reference.  */
+/* Recognition functions that return if a condition is true.  */
+extern int		address_operand ();
+extern int		const_double_operand ();
+extern int		const_int_operand ();
+extern int		general_operand ();
+extern int		immediate_operand ();
+extern int		memory_address_p ();
+extern int		memory_operand ();
+extern int		nonimmediate_operand ();
+extern int		nonmemory_operand ();
+extern int		register_operand ();
+extern int		scratch_operand ();
+
+/* Functions to change what output section we are using.  */
 extern void		data_section ();
 extern void		rdata_section ();
 extern void		readonly_data_section ();
 extern void		sdata_section ();
 extern void		text_section ();
 
+/* Functions in the rest of the compiler that we reference.  */
+extern void		abort_with_insn ();
+extern void		debug_rtx ();
+extern void		fatal_io_error ();
+extern int		get_frame_size ();
+extern int		offsettable_address_p ();
+extern void		output_address ();
+extern char	       *permalloc ();
+extern int		reg_mentioned_p ();
+
+/* Functions in the standard library that we reference.  */
+extern void		abort ();
+extern int		atoi ();
+extern char	       *getenv ();
+extern char	       *mktemp ();
+
+
 /* Stubs for half-pic support if not OSF/1 reference platform.  */
 
 #ifndef HALF_PIC_P
 #define HALF_PIC_P() 0
+#define HALF_PIC_NUMBER_PTRS 0
+#define HALF_PIC_NUMBER_REFS 0
 #define HALF_PIC_ENCODE(DECL)
+#define HALF_PIC_DECLARE(NAME)
 #define HALF_PIC_INIT()	error ("half-pic init called on systems that don't support it.")
 #define HALF_PIC_ADDRESS_P(X) 0
+#define HALF_PIC_PTR(X) X
+#define HALF_PIC_FINISH(STREAM)
 #endif
 
 
@@ -234,6 +299,9 @@ while (0)
 
 #define OPTIMIZATION_OPTIONS(LEVEL)					\
 {									\
+  flag_no_function_cse			= TRUE;				\
+  flag_gnu_linker			= FALSE;			\
+									\
   if (LEVEL)								\
     {									\
       flag_omit_frame_pointer		= TRUE;				\
@@ -249,7 +317,6 @@ while (0)
       flag_expensive_optimizations	= TRUE;				\
       flag_rerun_cse_after_loop		= TRUE;				\
       flag_schedule_insns		= TRUE;				\
-      flag_caller_saves			= TRUE;				\
     }									\
 									\
   if (LEVEL >= 3)							\
@@ -269,6 +336,7 @@ while (0)
     || defined(SGI_TARGET) \
     || defined(MIPS_NEWS) \
     || defined(MIPS_SYSV) \
+    || defined(MIPS_SVR4) \
     || defined(MIPS_BSD43)
 
 #ifndef CPP_PREDEFINES
@@ -296,11 +364,17 @@ while (0)
 #endif
 #endif
 
+/* Tell collect what flags to pass to nm.  */
+#ifndef NM_FLAGS
+#define NM_FLAGS "-Bp"
+#endif
+
 
 /* Names to predefine in the preprocessor for this target machine.  */
 
 #ifndef CPP_PREDEFINES
-#define CPP_PREDEFINES "-Dmips -Dunix -Dhost_mips -DMIPSEB -DR3000"
+#define CPP_PREDEFINES "-Dmips -Dunix -Dhost_mips -DMIPSEB -DR3000 -DSYSTYPE_BSD43 \
+-D_mips -D_unix -D_host_mips -D_MIPSEB -D_R3000 -D_SYSTYPE_BSD43"
 #endif
 
 /* Extra switches sometimes passed to the assembler.  */
@@ -308,10 +382,11 @@ while (0)
 #ifndef ASM_SPEC
 #define ASM_SPEC "\
 %{!mgas: \
-	%{!mrnames: -nocpp} \
+	%{!mrnames: %{!.s:-nocpp} %{.s: %{cpp} %{nocpp}}} \
 	%{pipe: %e-pipe is not supported.} \
 	%{EB} %{!EB:-EB} \
 	%{EL: %e-EL not supported} \
+	%{mips1} %{mips2} %{mips3} \
 	%{O:-O2} %{O1:-O2} %{O2:-O2} %{O3:-O3} \
 	%{g} %{g0} %{g1} %{g2} %{g3} %{v} %{K}} \
 %{G*}"
@@ -321,17 +396,31 @@ while (0)
 /* Specify to run a post-processor, mips-tfile after the assembler
    has run to stuff the mips debug information into the object file.
    This is needed because the $#!%^ MIPS assembler provides no way
-   of specifing such information in the assembly file.  */
+   of specifying such information in the assembly file.  If we are
+   cross compiling, disable mips-tfile unless the user specifies
+   -mmips-tfile.  */
 
 #ifndef ASM_FINAL_SPEC
+#ifndef CROSS_COMPILE
 #define ASM_FINAL_SPEC "\
 %{!mgas: %{!mno-mips-tfile: \
 	\n mips-tfile %{v*: -v} \
 		%{K: -I %b.o~} \
 		%{!K: %{save-temps: -I %b.o~}} \
-		%{c:%W{o*}%{!o*:-o %b.o}}%{!c:-o %b.o} \
+		%{c:%W{o*}%{!o*:-o %b.o}}%{!c:-o %U.o} \
 		%{.s:%i} %{!.s:%g.s}}}"
-#endif
+
+#else				/* CROSS_COMPILE */
+#define ASM_FINAL_SPEC "\
+%{!mgas: %{mmips-tfile: \
+	\n mips-tfile %{v*: -v} \
+		%{K: -I %b.o~} \
+		%{!K: %{save-temps: -I %b.o~}} \
+		%{c:%W{o*}%{!o*:-o %b.o}}%{!c:-o %U.o} \
+		%{.s:%i} %{!.s:%g.s}}}"
+
+#endif	/* CROSS_COMPILE */
+#endif	/* ASM_FINAL_SPEC */
 
 /* Redefinition of libraries used.  Mips doesn't support normal
    UNIX style profiling via calling _mcount.  It does offer
@@ -350,7 +439,8 @@ while (0)
 	%{pipe: %e-pipe is not supported.} \
 	%{EB} %{!EB:-EB} \
 	%{EL: %e-EL not supported} \
-	%{bestGnum}}"
+	%{mips1} %{mips2} %{mips3} \
+	%{bestGnum} %{shared} %{non_shared}}"
 #endif				/* LINK_SPEC defined */
 
 /* Specs for the compiler proper */
@@ -367,15 +457,10 @@ while (0)
 %{save-temps: }"
 #endif
 
-#ifndef CC1PLUS_SPEC
-#define CC1PLUS_SPEC "%{!fgnu-binutils: -fno-gnu-binutils}"
-#endif
-
 /* Preprocessor specs */
 
 #ifndef CPP_SPEC
 #define CPP_SPEC "\
-%{!ansi:-DSYSTYPE_BSD} -D__SYSTYPE_BSD__ \
 %{.cc:	-D__LANGUAGE_C_PLUS_PLUS -D_LANGUAGE_C_PLUS_PLUS} \
 %{.cxx:	-D__LANGUAGE_C_PLUS_PLUS -D_LANGUAGE_C_PLUS_PLUS} \
 %{.C:	-D__LANGUAGE_C_PLUS_PLUS -D_LANGUAGE_C_PLUS_PLUS} \
@@ -388,13 +473,17 @@ while (0)
    `STANDARD_EXEC_PREFIX'.  */
 
 #ifndef MD_EXEC_PREFIX
-#define MD_EXEC_PREFIX "/usr/lib/cmplrs/cc"
+#define MD_EXEC_PREFIX "/usr/lib/cmplrs/cc/"
+#endif
+
+#ifndef MD_STARTFILE_PREFIX
+#define MD_STARTFILE_PREFIX "/usr/lib/cmplrs/cc/"
 #endif
 
 
 /* Print subsidiary information on the compiler version in use.  */
 
-#define MIPS_VERSION "[AL 1.1, MM 12]"
+#define MIPS_VERSION "[AL 1.1, MM 33]"
 
 #ifndef MACHINE_TYPE
 #define MACHINE_TYPE "BSD Mips"
@@ -415,9 +504,12 @@ while (0)
 #define MIPS_DEBUGGING_INFO		/* MIPS specific debugging info */
 
 #ifndef PREFERRED_DEBUGGING_TYPE	/* assume SDB_DEBUGGING_INFO */
-#define PREFERRED_DEBUGGING_TYPE SDB_DEBUG
+#define PREFERRED_DEBUGGING_TYPE ((len > 1 && !strncmp (str, "ggdb", len)) ? DBX_DEBUG : SDB_DEBUG)
 #endif
 
+/* By default, turn on GDB extensions.  */
+#define DEFAULT_GDB_EXTENSIONS 1
+
 /* If we are passing smuggling stabs through the MIPS ECOFF object
    format, put a comment in front of the .stab<x> operation so
    that the MIPS assembler does not choke.  The mips-tfile program
@@ -569,8 +661,12 @@ do {							\
 #define SDB_GENERATE_FAKE(BUFFER, NUMBER) \
   sprintf ((BUFFER), ".%dfake", (NUMBER));
 
-/* Correct the offset of automatic variables and arguments
-   if the frame pointer has been eliminated.  */
+/* Correct the offset of automatic variables and arguments.  Note that
+   the MIPS debug format wants all automatic variables and arguments
+   to be in terms of the virtual frame pointer (stack pointer before
+   any adjustment in the function), while the MIPS 3.0 linker wants
+   the frame pointer to be the stack pointer after the initial
+   adjustment.  */
 
 #define DEBUGGER_AUTO_OFFSET(X)		mips_debugger_offset (X, 0)
 #define DEBUGGER_ARG_OFFSET(OFFSET, X)	mips_debugger_offset (X, OFFSET)
@@ -582,6 +678,13 @@ do {							\
 #define EXTENDED_COFF		/* ECOFF, not normal coff */
 #endif
 
+/* Don't use the default definitions, because we don't have gld.
+   Also, we don't want stabs when generating ECOFF output.
+   Instead we depend on collect to handle these.  */
+
+#define ASM_OUTPUT_CONSTRUCTOR(file, name)
+#define ASM_OUTPUT_DESTRUCTOR(file, name)
+
 
 /* Run-time compilation parameters selecting different hardware subsets.  */
 
@@ -615,14 +718,14 @@ do {							\
 					/* switches not used yet */
 #define MASK_WC8	0x00000000	/* wchar's are  8 bits, not 32 */
 #define MASK_WC16	0x00000000	/* wchar's are 16 bits, not 32 */
-#define MASK_WC32	0x00000000	/* dummy for consistancy */
+#define MASK_WC32	0x00000000	/* dummy for consistency */
 
 					/* Debug switches, not documented */
 #define MASK_DEBUG	0x40000000	/* Eliminate version # in .s file */
 #define MASK_DEBUG_A	0x20000000	/* don't allow <label>($reg) addrs */
 #define MASK_DEBUG_B	0x10000000	/* GO_IF_LEGITIMATE_ADDRESS debug */
-#define MASK_DEBUG_C	0x08000000	/* suppress normal divmod patterns */
-#define MASK_DEBUG_D	0x04000000	/* make multiply cost 2 */
+#define MASK_DEBUG_C	0x08000000	/* don't expand seq, etc. */
+#define MASK_DEBUG_D	0x04000000	/* don't do define_split's */
 #define MASK_DEBUG_E	0x02000000	/* function_arg debug */
 #define MASK_DEBUG_F	0x01000000	/* don't try to suppress load nop's */
 #define MASK_DEBUG_G	0x00800000	/* don't support 64 bit arithmetic */
@@ -805,7 +908,7 @@ do {							\
 #define LEAST_SIGNIFICANT_WORD	0
 #endif
 
-/* Number of bits in an addressible storage unit */
+/* Number of bits in an addressable storage unit */
 #define BITS_PER_UNIT 8
 
 /* Width in bits of a "word", which is the contents of a machine register.
@@ -885,9 +988,9 @@ do {							\
 /* Biggest alignment any structure field can require in bits.  */
 #define BIGGEST_FIELD_ALIGNMENT 64
 
-/* Define this if move instructions will actually fail to work
+/* Set this nonzero if move instructions will actually fail to work
    when given unaligned data.  */
-#define STRICT_ALIGNMENT
+#define STRICT_ALIGNMENT 1
 
 /* Define this if you wish to imitate the way many other C compilers
    handle alignment of bitfields and the structures that contain
@@ -1092,13 +1195,13 @@ extern char mips_hard_regno_mode_ok[][FI
 /* #define PC_REGNUM xx				*/
 
 /* Register to use for pushing function arguments.  */
-#define STACK_POINTER_REGNUM 29
+#define STACK_POINTER_REGNUM (GP_REG_FIRST + 29)
 
 /* Offset from the stack pointer to the first available location.  */
 #define STACK_POINTER_OFFSET 0
 
 /* Base register for access to local variables of the function.  */
-#define FRAME_POINTER_REGNUM 30
+#define FRAME_POINTER_REGNUM (GP_REG_FIRST + 30)
 
 /* Value should be nonzero if functions must have frame pointers.
    Zero means the frame pointer need not be set up (and parms
@@ -1107,22 +1210,29 @@ extern char mips_hard_regno_mode_ok[][FI
 #define FRAME_POINTER_REQUIRED (current_function_calls_alloca)
 
 /* Base register for access to arguments of the function.  */
-#define ARG_POINTER_REGNUM FRAME_POINTER_REGNUM
+#define ARG_POINTER_REGNUM GP_REG_FIRST
 
 /* Register in which static-chain is passed to a function.  */
-#define STATIC_CHAIN_REGNUM 2
+#define STATIC_CHAIN_REGNUM (GP_REG_FIRST + 2)
 
-/* Register in which address to store a structure value
-   is passed to a function.  */
-#define STRUCT_VALUE_REGNUM 4
+/* If the structure value address is passed in a register, then
+   `STRUCT_VALUE_REGNUM' should be the number of that register.  */
+/* #define STRUCT_VALUE_REGNUM (GP_REG_FIRST + 4) */
+
+/* If the structure value address is not passed in a register, define
+   `STRUCT_VALUE' as an expression returning an RTX for the place
+   where the address is passed.  If it returns 0, the address is
+   passed as an "invisible" first argument.  */
+#define STRUCT_VALUE ((rtx)0)
 
 /* Mips registers used in prologue/epilogue code when the stack frame
    is larger than 32K bytes.  These registers must come from the
    scratch register set, and not used for passing and returning
    arguments and any other information used in the calling sequence
    (such as pic).  */
-#define MIPS_TEMP1_REGNUM 8
-#define MIPS_TEMP2_REGNUM 9
+
+#define MIPS_TEMP1_REGNUM (GP_REG_FIRST + 8)
+#define MIPS_TEMP2_REGNUM (GP_REG_FIRST + 9)
 
 /* Define this macro if it is as good or better to call a constant
    function address than to call an address kept in a register.  */
@@ -1140,7 +1250,7 @@ extern char mips_hard_regno_mode_ok[][FI
    once, as with the stack pointer and frame pointer registers.  If
    this macro is not defined, it is up to the machine-dependent
    files to allocate such a register (if necessary).  */
-#define PIC_OFFSET_TABLE_REGNUM 28
+#define PIC_OFFSET_TABLE_REGNUM (GP_REG_FIRST + 28)
 
 
 /* Define the classes of registers for register constraints in the
@@ -1212,8 +1322,8 @@ enum reg_class
   { 0x00000000, 0x00000000, 0x00000000 },	/* no registers */	\
   { 0xffffffff, 0x00000000, 0x00000000 },	/* integer registers */	\
   { 0x00000000, 0xffffffff, 0x00000000 },	/* floating registers*/	\
-  { 0x00000000, 0x00000000, 0x00000001 },	/* lo register */	\
-  { 0x00000000, 0x00000000, 0x00000002 },	/* hi register */	\
+  { 0x00000000, 0x00000000, 0x00000001 },	/* hi register */	\
+  { 0x00000000, 0x00000000, 0x00000002 },	/* lo register */	\
   { 0x00000000, 0x00000000, 0x00000003 },	/* mul/div registers */	\
   { 0x00000000, 0x00000000, 0x00000004 },	/* status registers */	\
   { 0xffffffff, 0xffffffff, 0x00000007 }	/* all registers */	\
@@ -1255,8 +1365,8 @@ extern enum reg_class mips_regno_to_clas
    'f'	Floating point registers
    'h'	Hi register
    'l'	Lo register
-   's'	Status registers
-   'x'	Multiply/divide registers  */
+   'x'	Multiply/divide registers
+   'z'	FP Status register */
 
 extern enum reg_class mips_char_to_class[];
 
@@ -1298,12 +1408,12 @@ extern enum reg_class mips_char_to_class
    : (C) == 'J' ? ((VALUE) == 0)					\
    : (C) == 'K' ? ((unsigned) (VALUE) < 0x10000)			\
    : (C) == 'L' ? (((VALUE) & 0xffff0000) == (VALUE))			\
-   : (C) == 'M' ? ((((VALUE) & 0xffff0000) != 0)			\
-		   && (((VALUE) & 0xffff0000) != 0xffff0000)		\
+   : (C) == 'M' ? ((((VALUE) & ~0x0000ffff) != 0)			\
+		   && (((VALUE) & ~0x0000ffff) != ~0x0000ffff)		\
 		   && ((VALUE) & 0x0000ffff) != 0)			\
-   : (C) == 'N' ? (((VALUE) & 0xffff0000) == 0xffff0000)		\
+   : (C) == 'N' ? (((VALUE) & ~0x0000ffff) == ~0x0000ffff)		\
    : (C) == 'O' ? (exact_log2 (VALUE) >= 0)				\
-   : (C) == 'P' ? ((VALUE) != 0 && (((VALUE) & 0xffff0000) == 0))	\
+   : (C) == 'P' ? ((VALUE) != 0 && (((VALUE) & ~0x0000ffff) == 0))	\
    : 0)
 
 /* Similar, but for floating constants, and defining letters G and H.
@@ -1324,8 +1434,8 @@ extern enum reg_class mips_char_to_class
    operand as its first argument and the constraint letter as its
    second operand.
 
-   `Q'	is for memory refereces using take more than 1 instruction.
-   `R'	is for memory refereces which take 1 word for the instruction.
+   `Q'	is for memory references which take more than 1 instruction.
+   `R'	is for memory references which take 1 word for the instruction.
    `S'	is for references to extern items which are PIC for OSF/rose.  */
 
 #define EXTRA_CONSTRAINT(OP,CODE)					\
@@ -1349,6 +1459,21 @@ extern enum reg_class mips_char_to_class
 		? GR_REGS						\
 		: CLASS))
 
+/* Certain machines have the property that some registers cannot be
+   copied to some other registers without using memory.  Define this
+   macro on those machines to be a C expression that is non-zero if
+   objects of mode MODE in registers of CLASS1 can only be copied to
+   registers of class CLASS2 by storing a register of CLASS1 into
+   memory and loading that memory location into a register of CLASS2.
+
+   Do not define this macro if its value would always be zero.  */
+
+#define SECONDARY_MEMORY_NEEDED(CLASS1, CLASS2, MODE)			\
+  (!TARGET_DEBUG_H_MODE							\
+   && GET_MODE_CLASS (MODE) == MODE_INT					\
+   && ((CLASS1 == FP_REGS && CLASS2 == GR_REGS)				\
+       || (CLASS1 == GR_REGS && CLASS2 == FP_REGS)))
+
 /* Return the maximum number of consecutive registers
    needed to represent mode MODE in a register of class CLASS.  */
 
@@ -1381,32 +1506,57 @@ extern enum reg_class mips_char_to_class
    is at the high-address end of the local variables;
    that is, each additional local variable allocated
    goes at a more negative offset in the frame.  */
-#define FRAME_GROWS_DOWNWARD
+/* #define FRAME_GROWS_DOWNWARD */
 
 /* Offset within stack frame to start allocating local variables at.
    If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
    first local allocated.  Otherwise, it is the offset to the BEGINNING
    of the first local allocated.  */
-#define STARTING_FRAME_OFFSET (-8)
+#define STARTING_FRAME_OFFSET current_function_outgoing_args_size
+
+/* Offset from the stack pointer register to an item dynamically
+   allocated on the stack, e.g., by `alloca'.
+
+   The default value for this macro is `STACK_POINTER_OFFSET' plus the
+   length of the outgoing arguments.  The default is correct for most
+   machines.  See `function.c' for details.
+
+   The MIPS ABI states that functions which dynamically allocate the
+   stack must not have 0 for STACK_DYNAMIC_OFFSET, since it looks like
+   we are trying to create a second frame pointer to the function, so
+   allocate some stack space to make it happy.
+
+   However, the linker currently complains about linking any code that
+   dynamically allocates stack space, and there seems to be a bug in
+   STACK_DYNAMIC_OFFSET, so don't define this right now.  */
+
+#if 0
+#define STACK_DYNAMIC_OFFSET(FUNDECL)					\
+  ((current_function_outgoing_args_size == 0 && current_function_calls_alloca) \
+	? 4*UNITS_PER_WORD						\
+	: current_function_outgoing_args_size)
+#endif
 
 /* Structure to be filled in by compute_frame_size with register
    save masks, and offsets for the current function.  */
 
 struct mips_frame_info
 {
-  unsigned long total_size;	/* # bytes that the entire frame takes up */
-  unsigned long var_size;	/* # bytes that variables take up */
-  unsigned long args_size;	/* # bytes that outgoing arguments take up */
-  unsigned long extra_size;	/* # bytes of extra gunk */
-  unsigned int  gp_reg_size;	/* # bytes needed to store gp regs */
-  unsigned int  fp_reg_size;	/* # bytes needed to store fp regs */
-  unsigned long mask;		/* mask of saved gp registers */
-  unsigned long fmask;		/* mask of saved fp registers */
-  long		gp_save_offset;	/* offset from vfp to store gp registers */
-  long		fp_save_offset;	/* offset from vfp to store fp registers */
-  unsigned long gp_sp_offset;	/* offset from new sp to store gp registers */
-  unsigned long fp_sp_offset;	/* offset from new sp to store fp registers */
-  int		initialized;	/* != 0 if frame size already calculated */
+  long total_size;		/* # bytes that the entire frame takes up */
+  long var_size;		/* # bytes that variables take up */
+  long args_size;		/* # bytes that outgoing arguments take up */
+  long extra_size;		/* # bytes of extra gunk */
+  int  gp_reg_size;		/* # bytes needed to store gp regs */
+  int  fp_reg_size;		/* # bytes needed to store fp regs */
+  long mask;			/* mask of saved gp registers */
+  long fmask;			/* mask of saved fp registers */
+  long gp_save_offset;		/* offset from vfp to store gp registers */
+  long fp_save_offset;		/* offset from vfp to store fp registers */
+  long gp_sp_offset;		/* offset from new sp to store gp registers */
+  long fp_sp_offset;		/* offset from new sp to store fp registers */
+  int  initialized;		/* != 0 if frame size already calculated */
+  int  num_gp;			/* number of gp registers saved */
+  int  num_fp;			/* number of fp registers saved */
 };
 
 extern struct mips_frame_info current_frame_info;
@@ -1416,8 +1566,69 @@ extern struct mips_frame_info current_fr
    as of the start of the function body.  This depends on the layout
    of the fixed parts of the stack frame and on how registers are saved.  */
 
-#define INITIAL_FRAME_POINTER_OFFSET(VAR)				\
- ((VAR) = compute_frame_size (get_frame_size ()))
+/* #define INITIAL_FRAME_POINTER_OFFSET(VAR)				\
+    ((VAR) = compute_frame_size (get_frame_size ())) */
+
+/* If defined, this macro specifies a table of register pairs used to
+   eliminate unneeded registers that point into the stack frame.  If
+   it is not defined, the only elimination attempted by the compiler
+   is to replace references to the frame pointer with references to
+   the stack pointer.
+
+   The definition of this macro is a list of structure
+   initializations, each of which specifies an original and
+   replacement register.
+
+   On some machines, the position of the argument pointer is not
+   known until the compilation is completed.  In such a case, a
+   separate hard register must be used for the argument pointer. 
+   This register can be eliminated by replacing it with either the
+   frame pointer or the argument pointer, depending on whether or not
+   the frame pointer has been eliminated.
+
+   In this case, you might specify:
+        #define ELIMINABLE_REGS  \
+        {{ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
+         {ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM}, \
+         {FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}}
+
+   Note that the elimination of the argument pointer with the stack
+   pointer is specified first since that is the preferred elimination.  */
+
+#define ELIMINABLE_REGS							\
+{{ ARG_POINTER_REGNUM,   STACK_POINTER_REGNUM},				\
+ { ARG_POINTER_REGNUM,   FRAME_POINTER_REGNUM},				\
+ { FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}}
+
+
+/* A C expression that returns non-zero if the compiler is allowed to
+   try to replace register number FROM-REG with register number
+   TO-REG.  This macro need only be defined if `ELIMINABLE_REGS' is
+   defined, and will usually be the constant 1, since most of the
+   cases preventing register elimination are things that the compiler
+   already knows about.  */
+
+#define CAN_ELIMINATE(FROM, TO)						\
+  (!frame_pointer_needed						\
+   || ((FROM) == ARG_POINTER_REGNUM && (TO) == FRAME_POINTER_REGNUM))
+
+/* This macro is similar to `INITIAL_FRAME_POINTER_OFFSET'.  It
+   specifies the initial difference between the specified pair of
+   registers.  This macro must be defined if `ELIMINABLE_REGS' is
+   defined.  */
+
+#define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET)			 \
+{  compute_frame_size (get_frame_size ());				 \
+  if ((FROM) == FRAME_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM)	 \
+    (OFFSET) = 0;							 \
+  else if ((FROM) == ARG_POINTER_REGNUM && (TO) == FRAME_POINTER_REGNUM) \
+    (OFFSET) = current_frame_info.total_size;				 \
+  else if ((FROM) == ARG_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM) \
+    (OFFSET) = current_frame_info.total_size;				 \
+  else									 \
+    abort ();								 \
+}
+
 
 /* If we generate an insn to push BYTES bytes,
    this says how many the stack pointer really advances by.
@@ -1435,16 +1646,30 @@ extern struct mips_frame_info current_fr
    `ACCUMULATE_OUTGOING_ARGS'.  */
 #define ACCUMULATE_OUTGOING_ARGS
 
-/* Offset of first parameter from the argument pointer register value.  */
+/* Offset from the argument pointer register to the first argument's
+   address.  On some machines it may depend on the data type of the
+   function.
+
+   If `ARGS_GROW_DOWNWARD', this is the offset to the location above
+   the first argument's address.
+
+   On the MIPS, we must skip the first argument position if we are
+   returning a structure or a union, to account for it's address being
+   passed in $4.  However, at the current time, this produces a compiler
+   that can't bootstrap, so comment it out for now.  */
+
+#if 0
+#define FIRST_PARM_OFFSET(FNDECL)					\
+  (FNDECL != 0								\
+   && TREE_TYPE (FNDECL) != 0						\
+   && TREE_TYPE (TREE_TYPE (FNDECL)) != 0				\
+   && (TREE_CODE (TREE_TYPE (TREE_TYPE (FNDECL))) == RECORD_TYPE	\
+       || TREE_CODE (TREE_TYPE (TREE_TYPE (FNDECL))) == UNION_TYPE)	\
+		? UNITS_PER_WORD					\
+		: 0)
+#else
 #define FIRST_PARM_OFFSET(FNDECL) 0
-
-/* Offset from top-of-stack address to location to store the
-   function parameter if it can't go in a register.
-   Addresses for following parameters are computed relative to this one.
-
-   It also has the effect of counting register arguments in the total
-   argument size. */
-#define FIRST_PARM_CALLER_OFFSET(FNDECL) 0
+#endif
 
 /* When a parameter is passed in a register, stack space is still
    allocated for it.  For the MIPS, stack space must be allocated, cf
@@ -1454,7 +1679,7 @@ extern struct mips_frame_info current_fr
    in register. In case an argument list is of form GF used registers
    are a0 (a2,a3), but we should push over a1...  */
 
-#define REG_PARM_STACK_SPACE(FNDECL) (4*4)
+#define REG_PARM_STACK_SPACE(FNDECL) ((4*UNITS_PER_WORD) - FIRST_PARM_OFFSET (FNDECL))
 
 /* Define this if it is the responsibility of the caller to
    allocate the area reserved for arguments passed in registers. 
@@ -1584,9 +1809,12 @@ extern struct mips_frame_info current_fr
 */
 
 typedef struct mips_args {
-  int gp_reg_found;
-  int arg_number;
-  int arg_words;
+  int gp_reg_found;		/* whether a gp register was found yet */
+  int arg_number;		/* argument number */
+  int arg_words;		/* # total words the arguments take */
+  int num_adjusts;		/* number of adjustments made */
+				/* Adjustments made to args pass in regs.  */
+  struct rtx_def *adjust[MAX_ARGS_IN_REGISTERS];
 } CUMULATIVE_ARGS;
 
 /* Initialize a variable CUM of type CUMULATIVE_ARGS
@@ -1673,19 +1901,18 @@ typedef struct mips_args {
 #define ELIGIBLE_FOR_EPILOGUE_DELAY(INSN,N)				\
   (get_attr_dslot (INSN) == DSLOT_NO					\
    && get_attr_length (INSN) == 1					\
-   && ! reg_mentioned_p (stack_pointer_rtx, PATTERN (INSN))		\
-   && ! reg_mentioned_p (frame_pointer_rtx, PATTERN (INSN)))
+   && ! epilogue_reg_mentioned_p (PATTERN (INSN)))
 
 /* Tell prologue and epilogue if register REGNO should be saved / restored.  */
 
 #define MUST_SAVE_REGISTER(regno) \
  ((regs_ever_live[regno] && !call_used_regs[regno])		\
   || (regno == FRAME_POINTER_REGNUM && frame_pointer_needed)	\
-  || (regno == 31 && regs_ever_live[31]))
+  || (regno == (GP_REG_FIRST + 31) && regs_ever_live[GP_REG_FIRST + 31]))
 
 /* ALIGN FRAMES on double word boundaries */
 
-#define MIPS_STACK_ALIGN(LOC) (((LOC)+7) & 0xfffffff8)
+#define MIPS_STACK_ALIGN(LOC) (((LOC)+7) & ~7)
 
 
 /* Output assembler code to FILE to increment profiler label # LABELNO
@@ -1705,6 +1932,12 @@ typedef struct mips_args {
   fprintf (FILE, "\t.set\tat\n");					\
 }
 
+/* Define this macro if the code for function profiling should come
+   before the function prologue.  Normally, the profiling code comes
+   after.  */
+
+/* #define PROFILE_BEFORE_PROLOGUE */
+
 /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
    the stack pointer does not matter.  The value is tested only in
    functions that have frame pointers.
@@ -1947,7 +2180,7 @@ __enable_execute_stack (addr)						\
 	     machine doesn't support it.  This is because the		\
 	     assembler can use $r1 to load just the high 16 bits, add	\
 	     in the register, and fold the low 16 bits into the memory	\
-	     reference, wheras the compiler generates a 4 instruction	\
+	     reference, whereas the compiler generates a 4 instruction	\
 	     sequence.  On the other hand, CSE is not as effective.	\
 	     It would be a win to generate the lui directly, but the	\
 	     MIPS assembler does not have syntax to generate the	\
@@ -1976,7 +2209,7 @@ __enable_execute_stack (addr)						\
    addition to `const_int' and `const_double' expressions.  */
 
 #define CONSTANT_ADDRESS_P(X)						\
-  (CONSTANT_P (X) && (!HALF_PIC_P () || HALF_PIC_ADDRESS_P (X)))
+  (CONSTANT_P (X) && (!HALF_PIC_P () || !HALF_PIC_ADDRESS_P (X)))
 
 
 /* Nonzero if the constant value X is a legitimate general operand.
@@ -2011,9 +2244,67 @@ __enable_execute_stack (addr)						\
    It is not necessary for this macro to come up with a legitimate
    address.  The compiler has standard ways of doing so in all
    cases.  In fact, it is safe for this macro to do nothing.  But
-   often a machine-dependent strategy can generate better code.  */
+   often a machine-dependent strategy can generate better code.
+
+   For the MIPS, transform:
+
+	memory(X + <large int>)
 
-#define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) {}
+   into:
+
+	Y = <large int> & ~0x7fff;
+	Z = X + Y
+	memory (Z + (<large int> & 0x7fff));
+
+   This is for CSE to find several similar references, and only use one Z.  */
+
+#define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN)				\
+{									\
+  register rtx xinsn = (X);						\
+									\
+  if (TARGET_DEBUG_B_MODE)						\
+    {									\
+      GO_PRINTF ("\n========== LEGITIMIZE_ADDRESS\n");			\
+      GO_DEBUG_RTX (xinsn);						\
+    }									\
+									\
+  if (GET_CODE (xinsn) == PLUS)						\
+    {									\
+      register rtx xplus0 = XEXP (xinsn, 0);				\
+      register rtx xplus1 = XEXP (xinsn, 1);				\
+      register enum rtx_code code0 = GET_CODE (xplus0);			\
+      register enum rtx_code code1 = GET_CODE (xplus1);			\
+									\
+      if (code0 != REG && code1 == REG)					\
+	{								\
+	  xplus0 = XEXP (xinsn, 1);					\
+	  xplus1 = XEXP (xinsn, 0);					\
+	  code0 = GET_CODE (xplus0);					\
+	  code1 = GET_CODE (xplus1);					\
+	}								\
+									\
+      if (code0 == REG && REG_OK_FOR_BASE_P (xplus0)			\
+	  && code1 == CONST_INT && !SMALL_INT (xplus1))			\
+	{								\
+	  rtx int_reg = gen_reg_rtx (Pmode);				\
+	  rtx ptr_reg = gen_reg_rtx (Pmode);				\
+									\
+	  emit_move_insn (int_reg,					\
+			  GEN_INT (INTVAL (xplus1) & ~ 0x7fff));	\
+									\
+	  emit_insn (gen_rtx (SET, VOIDmode,				\
+			      ptr_reg,					\
+			      gen_rtx (PLUS, Pmode, xplus0, int_reg)));	\
+									\
+	  X = gen_rtx (PLUS, Pmode, ptr_reg,				\
+		       GEN_INT (INTVAL (xplus1) & 0x7fff));		\
+	  goto WIN;							\
+	}								\
+    }									\
+									\
+  if (TARGET_DEBUG_B_MODE)						\
+    GO_PRINTF ("LEGITIMIZE_ADDRESS could not fix.\n");			\
+}
 
 
 /* A C statement or compound statement with a conditional `goto
@@ -2090,7 +2381,9 @@ while (0)
 #define EASY_DIV_EXPR TRUNC_DIV_EXPR
 
 /* Define this as 1 if `char' should by default be signed; else as 0.  */
+#ifndef DEFAULT_SIGNED_CHAR
 #define DEFAULT_SIGNED_CHAR 1
+#endif
 
 /* Max number of bytes we can move from memory to memory
    in one reasonably fast instruction.  */
@@ -2126,8 +2419,16 @@ while (0)
    is done just by pretending it is already truncated.  */
 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
 
-/* By default, allow $ to be part of an identifier.  */
+/* Define this macro to control use of the character `$' in
+   identifier names.  The value should be 0, 1, or 2.  0 means `$'
+   is not allowed by default; 1 means it is allowed by default if
+   `-traditional' is used; 2 means it is allowed by default provided
+   `-ansi' is not used.  1 is the default; there is no need to
+   define this macro in that case. */
+
+#ifndef DOLLARS_IN_IDENTIFIERS
 #define DOLLARS_IN_IDENTIFIERS 1
+#endif
 
 /* Specify the machine mode that pointers have.
    After generation of rtl, the compiler makes no further distinction
@@ -2160,7 +2461,7 @@ while (0)
    CODE is the expression code--redundant, since it can be obtained
    with `GET_CODE (X)'.  */
 
-#define CONST_COSTS(X,CODE)						\
+#define CONST_COSTS(X,CODE,OUTER_CODE)					\
   case CONST_INT:							\
     /* Always return 0, since we don't have different sized		\
        instructions, hence different costs according to Richard		\
@@ -2172,8 +2473,7 @@ while (0)
 									\
   case CONST:								\
     {									\
-      extern rtx eliminate_constant_term ();				\
-      int offset = 0;							\
+      rtx offset = const0_rtx;						\
       rtx symref = eliminate_constant_term (X, &offset);		\
 									\
       if (GET_CODE (symref) == LABEL_REF)				\
@@ -2183,7 +2483,7 @@ while (0)
 	return COSTS_N_INSNS (4);					\
 									\
       /* let's be paranoid.... */					\
-      if (offset < -32768 || offset > 32767)				\
+      if (INTVAL (offset) < -32768 || INTVAL (offset) > 32767)		\
 	return COSTS_N_INSNS (2);					\
 									\
       return COSTS_N_INSNS (SYMBOL_REF_FLAG (symref) ? 1 : 2);		\
@@ -2210,7 +2510,7 @@ while (0)
    strength reduction, and also makes it easier to identify what the
    compiler is doing.  */
 
-#define RTX_COSTS(X,CODE)						\
+#define RTX_COSTS(X,CODE,OUTER_CODE)					\
   case MEM:								\
     {									\
       int num_words = (GET_MODE_SIZE (GET_MODE (X)) > UNITS_PER_WORD) ? 2 : 1; \
@@ -2289,7 +2589,7 @@ while (0)
       if (xmode == DFmode)						\
 	return COSTS_N_INSNS (5);					\
 									\
-      return COSTS_N_INSNS ((TARGET_DEBUG_D_MODE) ? 2 : 12);		\
+      return COSTS_N_INSNS (12);					\
     }									\
 									\
   case DIV:								\
@@ -2397,7 +2697,7 @@ while (0)
 /* Optionally define this if you have added predicates to
    `MACHINE.c'.  This macro is called within an initializer of an
    array of structures.  The first field in the structure is the
-   name of a predicate and the second field is an arrary of rtl
+   name of a predicate and the second field is an array of rtl
    codes.  For each predicate, list all rtl codes that can be in
    expressions matched by the predicate.  The list should have a
    trailing comma.  Here is an example of two entries in the list
@@ -2425,7 +2725,6 @@ while (0)
   {"md_register_operand",	{ REG }},				\
   {"mips_const_double_ok",	{ CONST_DOUBLE }},			\
   {"simple_memory_operand",	{ MEM, SUBREG }},			\
-  {"call_memory_operand",	{ MEM, SUBREG }},			\
   {"equality_op",		{ EQ, NE }},				\
   {"cmp_op",			{ EQ, NE, GT, GE, GTU, GEU, LT, LE,	\
 				  LTU, LEU }},				\
@@ -2451,47 +2750,7 @@ while (0)
    statistics.  */
 
 #define FINAL_PRESCAN_INSN(INSN, OPVEC, NOPERANDS)			\
-do									\
-  {									\
-    if (dslots_number_nops > 0 && mips_load_reg != (rtx)0)		\
-      {									\
-	enum machine_mode mode = GET_MODE (mips_load_reg);		\
-	rtx pattern = PATTERN (INSN);					\
-									\
-	if (reg_mentioned_p (mips_load_reg, pattern)			\
-	    || (mips_load_reg2 != (rtx)0				\
-		&& reg_mentioned_p (mips_load_reg2, pattern))		\
-	    || (mips_load_reg3 != (rtx)0				\
-		&& reg_mentioned_p (mips_load_reg3, pattern))		\
-	    || (mips_load_reg4 != (rtx)0				\
-		&& reg_mentioned_p (mips_load_reg4, pattern))		\
-	    || get_attr_length (INSN) == 0)				\
-	  {								\
-	    fputs ((set_noreorder) ? "\tnop\n" : "\t#nop\n", asm_out_file); \
-	  }								\
-	else								\
-	  dslots_load_filled++;						\
-									\
-	while (--dslots_number_nops > 0)				\
-	  fputs ((set_noreorder) ? "\tnop\n" : "\t#nop\n", asm_out_file); \
-									\
-	mips_load_reg  = (rtx)0;					\
-	mips_load_reg2 = (rtx)0;					\
-	mips_load_reg3 = (rtx)0;					\
-	mips_load_reg4 = (rtx)0;					\
-									\
-	if (set_noreorder && --set_noreorder == 0)			\
-	  fputs ("\t.set\treorder\n", asm_out_file);			\
-      }									\
-									\
-    if (TARGET_STATS)							\
-      {									\
-	enum rtx_code code = GET_CODE (INSN);				\
-	if (code == JUMP_INSN || code == CALL_INSN)			\
-	  dslots_jump_total++;						\
-      }									\
-  }									\
-while (0)
+  final_prescan_insn (INSN, OPVEC, NOPERANDS)
 
 
 /* Tell final.c how to eliminate redundant test instructions.
@@ -2515,47 +2774,34 @@ do									\
   }									\
 while (0)
 
-/* A list of names to be used for additional modes for condition
-   code values in registers (*note Jump Patterns::.).  These names
-   are added to `enum machine_mode' and all have class `MODE_CC'. 
-   By convention, they should start with `CC' and end with `mode'.
+/* A list of names to be used for additional modes for condition code
+   values in registers.  These names are added to `enum machine_mode'
+   and all have class `MODE_CC'.  By convention, they should start
+   with `CC' and end with `mode'.
 
    You should only define this macro if your machine does not use
    `cc0' and only if additional modes are required.
 
-   On the MIPS, we use CC_FPmode for all floating point, CC_EQmode for
-   integer equality/inequality comparisons, CC_0mode for comparisons
-   against 0, and CCmode for other integer comparisons.  */
+   On the MIPS, we use CC_FPmode for all floating point except for not
+   equal, CC_REV_FPmode for not equal (to reverse the sense of the
+   jump), CC_EQmode for integer equality/inequality comparisons,
+   CC_0mode for comparisons against 0, and CCmode for other integer
+   comparisons. */
 
-#define EXTRA_CC_MODES CC_EQmode, CC_FPmode, CC_0mode
+#define EXTRA_CC_MODES CC_EQmode, CC_FPmode, CC_0mode, CC_REV_FPmode
 
 /* A list of C strings giving the names for the modes listed in
-   `EXTRA_CC_MODES'.  For example, the Sparc defines this macro and
-   `EXTRA_CC_MODES' as
-
-          #define EXTRA_CC_MODES CC_NOOVmode, CCFPmode
-          #define EXTRA_CC_NAMES "CC_NOOV", "CCFP"
+   `EXTRA_CC_MODES'.  */
 
-   This macro is not required if `EXTRA_CC_MODES' is not defined.  */
-
-#define EXTRA_CC_NAMES "CC_EQ", "CC_FP", "CC_0"
+#define EXTRA_CC_NAMES "CC_EQ", "CC_FP", "CC_0", "CC_REV_FP"
 
 /* Returns a mode from class `MODE_CC' to be used when comparison
-   operation code OP is applied to rtx X.  For example, on the
-   Sparc, `SELECT_CC_MODE' is defined as (see *note Jump
-   Patterns::. for a description of the reason for this definition)
-
-          #define SELECT_CC_MODE(OP,X)					\
-            (GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT ? CCFPmode	\
-             : (GET_CODE (X) == PLUS || GET_CODE (X) == MINUS		\
-                || GET_CODE (X) == NEG)					\
-             ? CC_NOOVmode : CCmode)
-
-   This macro is not required if `EXTRA_CC_MODES' is not defined.  */
-
-#define SELECT_CC_MODE (OP, X)						\
-  (GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT ? CC_FPmode :		\
-   (OP == EQ || OP == NE) ? CC_EQmode : CCmode)
+   operation code OP is applied to rtx X.  */
+
+#define SELECT_CC_MODE(OP, X, Y)					\
+  (GET_MODE_CLASS (GET_MODE (X)) != MODE_FLOAT				\
+	? SImode							\
+	: ((OP == NE) ? CC_REV_FPmode : CC_FPmode))
 
 
 /* Control the assembler format that we output.  */
@@ -2658,6 +2904,21 @@ while (0)
   &mips_reg_names[66][0],						\
 }
 
+/* print-rtl.c can't use REGISTER_NAMES, since it depends on mips.c.
+   So define this for it.  */
+#define DEBUG_REGISTER_NAMES						\
+{									\
+  "$0",   "at",   "v0",   "v1",   "a0",   "a1",   "a2",   "a3",		\
+  "t0",   "t1",   "t2",   "t3",   "t4",   "t5",   "t6",   "t7",		\
+  "s0",   "s1",   "s2",   "s3",   "s4",   "s5",   "s6",   "s7",		\
+  "t8",   "t9",   "k0",   "k1",   "gp",   "sp",   "$fp",   "ra",	\
+  "$f0",  "$f1",  "$f2",  "$f3",  "$f4",  "$f5",  "$f6",  "$f7",	\
+  "$f8",  "$f9",  "$f10", "$f11", "$f12", "$f13", "$f14", "$f15",	\
+  "$f16", "$f17", "$f18", "$f19", "$f20", "$f21", "$f22", "$f23",	\
+  "$f24", "$f25", "$f26", "$f27", "$f28", "$f29", "$f30", "$f31",	\
+  "hi",   "lo",   "$fcr31"						\
+}
+
 /* If defined, a C initializer for an array of structures
    containing a name and a register number.  This macro defines
    additional names for hard registers, thus allowing the `asm'
@@ -2733,6 +2994,9 @@ while (0)
   { "sp",	29 + GP_REG_FIRST },					\
   { "fp",	30 + GP_REG_FIRST },					\
   { "ra",	31 + GP_REG_FIRST },					\
+  { "$sp",	29 + GP_REG_FIRST },					\
+  { "$fp",	30 + GP_REG_FIRST },					\
+  { "cc",	FPSW_REGNUM },						\
 }
 
 /* Define results of standard character escape sequences.  */
@@ -2850,12 +3114,11 @@ while (0)
    pattern $L[a-z].*.  The machine independent portion of GCC creates
    labels matching:  $L[A-Z][0-9]+ and $L[0-9]+.
 
-	LM[0-9]+	Sillicon graphics/ECOFF stabs label before each stmt.
+	LM[0-9]+	Silicon Graphics/ECOFF stabs label before each stmt.
 	$Lb[0-9]+	Begin blocks for MIPS debug support
 	$Lc[0-9]+	Label for use in s<xx> operation.
 	$Le[0-9]+	End blocks for MIPS debug support
-	$Lp\..+		Half-pic labels.
-	$Ls[0-9]+	FP-SP difference if -fomit-frame-pointer  */
+	$Lp\..+		Half-pic labels. */
 
 /* This is how to output the definition of a user-level label named NAME,
    such as the label on a static function or variable NAME.
@@ -2866,30 +3129,35 @@ while (0)
    since those bits seem to be unused, and we don't have any method
    of getting the decl nodes from the name.  */
 
-#ifndef COLLECT
 #define ASM_OUTPUT_LABEL(STREAM,NAME)					\
 do {									\
   assemble_name (STREAM, NAME);						\
   fputs (":\n", STREAM);						\
-									\
-  if (TARGET_GP_OPT && mips_section_threshold != 0)			\
-    {									\
-      tree name_tree = get_identifier (NAME);				\
-      TREE_ADDRESSABLE (name_tree) = 1;					\
-    }									\
 } while (0)
 
-#else
-#define ASM_OUTPUT_LABEL(STREAM,NAME)					\
-do {									\
-  fprintf (STREAM, "%s:\n", NAME);					\
-} while (0)
-#endif
+
+/* A C statement (sans semicolon) to output to the stdio stream
+   STREAM any text necessary for declaring the name NAME of an
+   initialized variable which is being defined.  This macro must
+   output the label definition (perhaps using `ASM_OUTPUT_LABEL'). 
+   The argument DECL is the `VAR_DECL' tree node representing the
+   variable.
+
+   If this macro is not defined, then the variable name is defined
+   in the usual manner as a label (by means of `ASM_OUTPUT_LABEL').  */
+
+#define ASM_DECLARE_OBJECT_NAME(STREAM, NAME, DECL)			\
+do									\
+ {									\
+   mips_declare_object (STREAM, NAME, "", ":\n", 0);			\
+   HALF_PIC_DECLARE (NAME);						\
+ }									\
+while (0)
+
 
 /* This is how to output a command to make the user-level label named NAME
    defined for reference from other files.  */
 
-#ifndef COLLECT
 #define ASM_GLOBALIZE_LABEL(STREAM,NAME)				\
   do {									\
     fputs ("\t.globl\t", STREAM);					\
@@ -2897,44 +3165,16 @@ do {									\
     fputs ("\n", STREAM);						\
   } while (0)
 
-#else
-#define ASM_GLOBALIZE_LABEL(STREAM,NAME)				\
-do {									\
-  fprintf (STREAM, "\t.globl\t%s\n", NAME);				\
-} while (0)
-#endif
-
-/* This says how to output an assembler line
-   to define a global common symbol.  */
+/* This says how to define a global common symbol.  */
 
 #define ASM_OUTPUT_COMMON(STREAM, NAME, SIZE, ROUNDED)			\
-do {									\
-  fputs ("\n\t.comm\t", (STREAM));					\
-  assemble_name ((STREAM), (NAME));					\
-  fprintf ((STREAM), ",%u\n", (ROUNDED));				\
-									\
-  if (TARGET_GP_OPT && mips_section_threshold != 0)			\
-    {									\
-      tree name_tree = get_identifier (NAME);				\
-      TREE_ADDRESSABLE (name_tree) = 1;					\
-    }									\
-} while (0)
+  mips_declare_object (STREAM, NAME, "\n\t.comm\t", ",%u\n", (ROUNDED))
 
-/* This says how to output an assembler line
-   to define a local common symbol.  */
+/* This says how to define a local common symbol (ie, not visible to
+   linker).  */
 
 #define ASM_OUTPUT_LOCAL(STREAM, NAME, SIZE, ROUNDED)			\
-do {									\
-  fputs ("\n\t.lcomm\t", (STREAM));					\
-  assemble_name ((STREAM), (NAME));					\
-  fprintf ((STREAM), ",%u\n", (ROUNDED));				\
-									\
-  if (TARGET_GP_OPT && mips_section_threshold != 0)			\
-    {									\
-      tree name_tree = get_identifier (NAME);				\
-      TREE_ADDRESSABLE (name_tree) = 1;					\
-    }									\
-} while (0)
+  mips_declare_object (STREAM, NAME, "\n\t.lcomm\t", ",%u\n", (ROUNDED))
 
 
 /* This says how to output an external.  It would be possible not to
@@ -2963,6 +3203,7 @@ do {									\
     STREAM = asm_out_text_file;						\
 									\
   current_function_name = NAME;						\
+  HALF_PIC_DECLARE (NAME);						\
 }
 
 /* This is how to output a reference to a user-level label named NAME.
@@ -2987,25 +3228,17 @@ do {									\
 /* This is how to output an assembler line defining a `double' constant.  */
 
 #define ASM_OUTPUT_DOUBLE(STREAM,VALUE)					\
-{									\
-  union { double d; long l[2]; } u2;					\
-  u2.d = VALUE;								\
-  fprintf (STREAM, "\t.word\t0x%08lx\t\t# %.20g\n\t.word\t0x%08lx\n",	\
-	   u2.l[0], u2.d, u2.l[1]);					\
-}
+  mips_output_double (STREAM, VALUE)
+
 
 /* This is how to output an assembler line defining a `float' constant.  */
 
 #define ASM_OUTPUT_FLOAT(STREAM,VALUE)					\
-{									\
-  union { float f; long l; } u2;					\
-  u2.f = VALUE;								\
-  fprintf (STREAM, "\t.word\t0x%08lx\t\t# %.12g\n", u2.l, u2.f);	\
-}
+  mips_output_float (STREAM, VALUE)
+
 
 /* This is how to output an assembler line defining an `int' constant.  */
 
-#ifndef COLLECT
 #define ASM_OUTPUT_INT(STREAM,VALUE)					\
 do {									\
   fprintf (STREAM, "\t.word\t");					\
@@ -3013,11 +3246,6 @@ do {									\
   fprintf (STREAM, "\n");						\
 } while (0)
 
-#else
-#define ASM_OUTPUT_INT(STREAM,VALUE)					\
-  fprintf (STREAM, "\t.word\t%d\n", VALUE)
-#endif
-
 /* Likewise for `char' and `short' constants.  */
 
 #define ASM_OUTPUT_SHORT(STREAM,VALUE)					\
@@ -3034,29 +3262,6 @@ do {									\
   fprintf (STREAM, "\n");						\
 }
 
-/* This is how to output an assembler line defining an `int' constant,
-   which is not in tree format (for collect.c).  */
-
-#define ASM_OUTPUT_INT_CONST(STREAM,VALUE) 				\
-  fprintf(STREAM, "\t.word\t%d\n", VALUE)
-
-/* This is how to output an assembler line defining an external/static
-   address which is not in tree format (for collect.c).  */
-
-#define ASM_OUTPUT_PTR_INT_SUM(STREAM, NAME, VALUE)			\
-do {									\
-  fprintf (STREAM, "\t.word\t");					\
-  ASM_OUTPUT_LABELREF (STREAM, NAME);					\
-  fprintf (STREAM, "+%d\n", VALUE);					\
-} while (0)
-
-#define ASM_OUTPUT_LABELREF_AS_INT(STREAM, NAME)			\
-do {									\
-  fprintf (STREAM, "\t.word\t");					\
-  ASM_OUTPUT_LABELREF (STREAM, NAME);					\
-  fprintf (STREAM, "\n");						\
-} while (0)
-
 /* This is how to output an assembler line for a numeric constant byte.  */
 
 #define ASM_OUTPUT_BYTE(STREAM,VALUE)					\
@@ -3187,22 +3392,12 @@ do {									\
 }
 
 
-/* Output before read-only data.  */
-
-#define TEXT_SECTION_ASM_OP "\t.text"
-
-/* Output before writable data.  */
-
-#define DATA_SECTION_ASM_OP "\t.data"
-
-/* Output before writable  short data.  */
-
-#define SDATA_SECTION_ASM_OP "\t.sdata"
-
-/* Output before read-only data.  */
-
-#define RDATA_SECTION_ASM_OP "\t.rdata"
-#define READONLY_DATA_SECTION rdata_section
+/* Define the strings to put out for each section in the object file.  */
+#define TEXT_SECTION_ASM_OP	"\t.text"	/* instructions */
+#define DATA_SECTION_ASM_OP	"\t.data"	/* large data */
+#define SDATA_SECTION_ASM_OP	"\t.sdata"	/* small data */
+#define RDATA_SECTION_ASM_OP	"\t.rdata"	/* read-only data */
+#define READONLY_DATA_SECTION	rdata_section
 
 /* What other sections we support other than the normal .data/.text.  */
 
@@ -3242,9 +3437,8 @@ rdata_section ()							\
 /* Given a decl node or constant node, choose the section to output it in
    and select that section.  */
 
-#define SELECT_SECTION_MODE(MODE,RTX)					\
+#define SELECT_RTX_SECTION(MODE,RTX)					\
 {									\
-  extern int mips_section_threshold;					\
   if ((GET_MODE_SIZE(MODE) / BITS_PER_UNIT) <= mips_section_threshold	\
       && mips_section_threshold > 0)					\
     sdata_section ();							\
@@ -3254,7 +3448,6 @@ rdata_section ()							\
 
 #define SELECT_SECTION(DECL,RELOC)					\
 {									\
-  extern int mips_section_threshold;					\
   if (int_size_in_bytes (TREE_TYPE (DECL)) <= mips_section_threshold	\
       && mips_section_threshold > 0)					\
     sdata_section ();							\
@@ -3335,3 +3528,15 @@ while (0)
 #define MIPS_IS_STAB(sym) (((sym)->index & 0xFFF00) == CODE_MASK)
 #define MIPS_MARK_STAB(code) ((code)+CODE_MASK)
 #define MIPS_UNMARK_STAB(code) ((code)-CODE_MASK)
+
+
+/* Default definitions for size_t and ptrdiff_t.  */
+
+#ifndef SIZE_TYPE
+#define SIZE_TYPE	"unsigned int"
+#endif
+
+#ifndef PTRDIFF_TYPE
+#define PTRDIFF_TYPE	"int"
+#endif
+