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1.1 root 1: /* Definitions of target machine for GNU compiler. MIPS version.
2: Contributed by A. Lichnewsky, [email protected]
3: Changed by Michael Meissner, [email protected]
4: Copyright (C) 1989, 1990, 1991, 1992 Free Software Foundation, Inc.
5:
6: This file is part of GNU CC.
7:
8: GNU CC is free software; you can redistribute it and/or modify
9: it under the terms of the GNU General Public License as published by
10: the Free Software Foundation; either version 2, or (at your option)
11: any later version.
12:
13: GNU CC is distributed in the hope that it will be useful,
14: but WITHOUT ANY WARRANTY; without even the implied warranty of
15: MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16: GNU General Public License for more details.
17:
18: You should have received a copy of the GNU General Public License
19: along with GNU CC; see the file COPYING. If not, write to
20: the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
21:
22:
23: /* Make Saber happier on obstack.[ch]. */
24: #if defined(__mips__) || defined(mips)
25: #define __PTR_TO_INT(P) ((int)(P))
26: #define __INT_TO_PTR(P) ((char *)(P))
27: #endif
28:
29: /* Standard GCC variables that we reference. */
30:
31: extern int target_flags;
32: extern int optimize;
33: extern int may_call_alloca;
34: extern int current_function_calls_alloca;
35: extern int frame_pointer_needed;
36: extern int flag_omit_frame_pointer;
37:
38: /* MIPS external variables defined in mips.c. */
39:
40: /* comparison type */
41: enum cmp_type {
42: CMP_SI, /* compare integers */
43: CMP_SF, /* compare single precision floats */
44: CMP_DF, /* compare double precision floats */
45: CMP_MAX /* max comparison type */
46: };
47:
48: /* types of delay slot */
49: enum delay_type {
50: DELAY_NONE, /* no delay slot */
51: DELAY_LOAD, /* load from memory delay */
52: DELAY_HILO /* move from/to hi/lo registers */
53: };
54:
55: /* Which processor to schedule for. Since there is no difference between
56: a R2000 and R3000 in terms of the scheduler, we collapse them into
57: just an R3000. */
58:
59: enum processor_type {
60: PROCESSOR_DEFAULT,
61: PROCESSOR_R3000,
62: PROCESSOR_R6000,
63: PROCESSOR_R4000
64: };
65:
66: extern char mips_reg_names[][8]; /* register names (a0 vs. $4). */
67: extern char mips_print_operand_punct[]; /* print_operand punctuation chars */
68: extern char *current_function_name; /* current function being compiled */
69: extern char *current_function_file; /* filename current function is in */
70: extern int num_source_filenames; /* current .file # */
71: extern int inside_function; /* != 0 if inside of a function */
72: extern int ignore_line_number; /* != 0 if we are to ignore next .loc */
73: extern int file_in_function_warning; /* warning given about .file in func */
74: extern int sdb_label_count; /* block start/end next label # */
75: extern int mips_section_threshold; /* # bytes of data/sdata cutoff */
76: extern int g_switch_value; /* value of the -G xx switch */
77: extern int g_switch_set; /* whether -G xx was passed. */
78: extern int sym_lineno; /* sgi next label # for each stmt */
79: extern int set_noreorder; /* # of nested .set noreorder's */
80: extern int set_nomacro; /* # of nested .set nomacro's */
81: extern int set_noat; /* # of nested .set noat's */
82: extern int set_volatile; /* # of nested .set volatile's */
83: extern int mips_branch_likely; /* emit 'l' after br (branch likely) */
84: extern int mips_dbx_regno[]; /* Map register # to debug register # */
85: extern char mips_rtx_classify[]; /* classify an RTX code */
86: extern struct rtx_def *branch_cmp[2]; /* operands for compare */
87: extern enum cmp_type branch_type; /* what type of branch to use */
88: extern enum processor_type mips_cpu; /* which cpu are we scheduling for */
89: extern int mips_isa; /* architectural level */
90: extern char *mips_cpu_string; /* for -mcpu=<xxx> */
91: extern char *mips_isa_string; /* for -mips{1,2,3} */
92: extern int dslots_load_total; /* total # load related delay slots */
93: extern int dslots_load_filled; /* # filled load delay slots */
94: extern int dslots_jump_total; /* total # jump related delay slots */
95: extern int dslots_jump_filled; /* # filled jump delay slots */
96: extern int dslots_number_nops; /* # of nops needed by previous insn */
97: extern int num_refs[3]; /* # 1/2/3 word references */
98: extern struct rtx_def *mips_load_reg; /* register to check for load delay */
99: extern struct rtx_def *mips_load_reg2; /* 2nd reg to check for load delay */
100: extern struct rtx_def *mips_load_reg3; /* 3rd reg to check for load delay */
101: extern struct rtx_def *mips_load_reg4; /* 4th reg to check for load delay */
102:
103: /* Functions within mips.c that we reference. */
104:
105: extern void abort_with_insn ();
106: extern int arith32_operand ();
107: extern int arith_operand ();
108: extern int call_memory_operand ();
109: extern int cmp_op ();
110: extern int cmp2_op ();
111: extern unsigned long compute_frame_size ();
112: extern void expand_block_move ();
113: extern int equality_op ();
114: extern int fcmp_op ();
115: extern struct rtx_def * function_arg ();
116: extern void function_arg_advance ();
117: extern int function_arg_partial_nregs ();
118: extern void function_epilogue ();
119: extern void function_prologue ();
120: extern void gen_conditional_branch ();
121: extern void init_cumulative_args ();
122: extern int large_int ();
123: extern int md_register_operand ();
124: extern int mips_address_cost ();
125: extern void mips_asm_file_end ();
126: extern void mips_asm_file_start ();
1.1.1.2 ! root 127: extern void mips_declare_object ();
1.1 root 128: extern int mips_const_double_ok ();
129: extern void mips_count_memory_refs ();
130: extern int mips_debugger_offset ();
131: extern int mips_epilogue_delay_slots ();
132: extern char *mips_fill_delay_slot ();
133: extern char *mips_move_1word ();
134: extern char *mips_move_2words ();
135: extern int mips_output_external ();
136: extern void mips_output_filename ();
137: extern void mips_output_lineno ();
138: extern void override_options ();
139: extern void print_operand_address ();
140: extern void print_operand ();
141: extern void print_options ();
142: extern int reg_or_0_operand ();
143: extern int simple_memory_operand ();
144: extern int small_int ();
145: extern void trace();
146: extern int uns_arith_operand ();
147: extern int uns_cmp_op ();
148:
149: /* Functions in varasm.c that we reference. */
150: extern void data_section ();
151: extern void rdata_section ();
152: extern void readonly_data_section ();
153: extern void sdata_section ();
154: extern void text_section ();
155:
156: /* Stubs for half-pic support if not OSF/1 reference platform. */
157:
158: #ifndef HALF_PIC_P
159: #define HALF_PIC_P() 0
160: #define HALF_PIC_ENCODE(DECL)
161: #define HALF_PIC_INIT() error ("half-pic init called on systems that don't support it.")
162: #define HALF_PIC_ADDRESS_P(X) 0
163: #endif
164:
165:
166: /* Switch Recognition by gcc.c. Add -G xx support */
167:
168: #ifdef SWITCH_TAKES_ARG
169: #undef SWITCH_TAKES_ARG
170: #endif
171:
172: #define SWITCH_TAKES_ARG(CHAR) \
173: ((CHAR) == 'D' || (CHAR) == 'U' || (CHAR) == 'o' \
174: || (CHAR) == 'e' || (CHAR) == 'T' || (CHAR) == 'u' \
175: || (CHAR) == 'I' || (CHAR) == 'm' \
176: || (CHAR) == 'L' || (CHAR) == 'A' || (CHAR) == 'G')
177:
178: /* Sometimes certain combinations of command options do not make sense
179: on a particular target machine. You can define a macro
180: `OVERRIDE_OPTIONS' to take account of this. This macro, if
181: defined, is executed once just after all the command options have
182: been parsed.
183:
184: On the MIPS, it is used to handle -G. We also use it to set up all
185: of the tables referenced in the other macros. */
186:
187: #define OVERRIDE_OPTIONS override_options ()
188:
189: /* Zero or more C statements that may conditionally modify two
190: variables `fixed_regs' and `call_used_regs' (both of type `char
191: []') after they have been initialized from the two preceding
192: macros.
193:
194: This is necessary in case the fixed or call-clobbered registers
195: depend on target flags.
196:
197: You need not define this macro if it has no work to do.
198:
199: If the usage of an entire class of registers depends on the target
200: flags, you may indicate this to GCC by using this macro to modify
201: `fixed_regs' and `call_used_regs' to 1 for each of the registers in
202: the classes which should not be used by GCC. Also define the macro
203: `REG_CLASS_FROM_LETTER' to return `NO_REGS' if it is called with a
204: letter for a class that shouldn't be used.
205:
206: (However, if this class is not included in `GENERAL_REGS' and all
207: of the insn patterns whose constraints permit this class are
208: controlled by target switches, then GCC will automatically avoid
209: using these registers when the target switches are opposed to
210: them.) */
211:
212: #define CONDITIONAL_REGISTER_USAGE \
213: do \
214: { \
215: if (!TARGET_HARD_FLOAT) \
216: { \
217: int regno; \
218: \
219: for (regno = FP_REG_FIRST; regno <= FP_REG_LAST; regno++) \
220: fixed_regs[regno] = call_used_regs[regno] = 1; \
221: } \
222: } \
223: while (0)
224:
225:
226: /* Some machines may desire to change what optimizations are
227: performed for various optimization levels. This macro, if
228: defined, is executed once just after the optimization level is
229: determined and before the remainder of the command options have
230: been parsed. Values set in this macro are used as the default
231: values for the other command line options.
232:
233: LEVEL is the optimization level specified; 2 if -O2 is
234: specified, 1 if -O is specified, and 0 if neither is specified. */
235:
236: #define OPTIMIZATION_OPTIONS(LEVEL) \
237: { \
238: if (LEVEL) \
239: { \
240: flag_omit_frame_pointer = TRUE; \
241: flag_delayed_branch = TRUE; \
242: flag_thread_jumps = TRUE; \
243: flag_schedule_insns_after_reload = TRUE; \
244: } \
245: \
246: if (LEVEL >= 2) \
247: { \
248: flag_strength_reduce = TRUE; \
249: flag_cse_follow_jumps = TRUE; \
250: flag_expensive_optimizations = TRUE; \
251: flag_rerun_cse_after_loop = TRUE; \
252: flag_schedule_insns = TRUE; \
253: } \
254: \
255: if (LEVEL >= 3) \
256: { \
257: flag_inline_functions = TRUE; \
258: } \
259: }
260:
261:
262:
263: /* Complain about missing specs and predefines that should be defined in each
264: of the target tm files to override the defaults. This is mostly a place-
265: holder until I can get each of the files updated [mm]. */
266:
267: #if defined(OSF_OS) \
268: || defined(DECSTATION) \
269: || defined(SGI_TARGET) \
270: || defined(MIPS_NEWS) \
271: || defined(MIPS_SYSV) \
1.1.1.2 ! root 272: || defined(MIPS_SVR4) \
1.1 root 273: || defined(MIPS_BSD43)
274:
275: #ifndef CPP_PREDEFINES
276: #error "Define CPP_PREDEFINES in the appropriate tm.h file"
277: #endif
278:
279: #ifndef CPP_SPEC
280: #error "Define CPP_SPEC in the appropriate tm.h file"
281: #endif
282:
283: #ifndef LINK_SPEC
284: #error "Define LINK_SPEC in the appropriate tm.h file"
285: #endif
286:
287: #ifndef LIB_SPEC
288: #error "Define LIB_SPEC in the appropriate tm.h file"
289: #endif
290:
291: #ifndef STARTFILE_SPEC
292: #error "Define STARTFILE_SPEC in the appropriate tm.h file"
293: #endif
294:
295: #ifndef MACHINE_TYPE
296: #error "Define MACHINE_TYPE in the appropriate tm.h file"
297: #endif
298: #endif
299:
1.1.1.2 ! root 300: /* Tell collect what flags to pass to nm. */
! 301: #ifndef NM_FLAGS
! 302: #define NM_FLAGS "-Bp"
! 303: #endif
! 304:
1.1 root 305:
306: /* Names to predefine in the preprocessor for this target machine. */
307:
308: #ifndef CPP_PREDEFINES
1.1.1.2 ! root 309: #define CPP_PREDEFINES "-Dmips -Dunix -Dhost_mips -DMIPSEB -DR3000 -DSYSTYPE_BSD43"
1.1 root 310: #endif
311:
312: /* Extra switches sometimes passed to the assembler. */
313:
314: #ifndef ASM_SPEC
315: #define ASM_SPEC "\
316: %{!mgas: \
1.1.1.2 ! root 317: %{!mrnames: %{!.s:-nocpp} %{.s: %{cpp} %{nocpp}}} \
1.1 root 318: %{pipe: %e-pipe is not supported.} \
319: %{EB} %{!EB:-EB} \
320: %{EL: %e-EL not supported} \
1.1.1.2 ! root 321: %{mips1} %{mips2} %{mips3} \
1.1 root 322: %{O:-O2} %{O1:-O2} %{O2:-O2} %{O3:-O3} \
323: %{g} %{g0} %{g1} %{g2} %{g3} %{v} %{K}} \
324: %{G*}"
325:
326: #endif /* ASM_SPEC */
327:
328: /* Specify to run a post-processor, mips-tfile after the assembler
329: has run to stuff the mips debug information into the object file.
330: This is needed because the $#!%^ MIPS assembler provides no way
1.1.1.2 ! root 331: of specifying such information in the assembly file. */
1.1 root 332:
333: #ifndef ASM_FINAL_SPEC
334: #define ASM_FINAL_SPEC "\
335: %{!mgas: %{!mno-mips-tfile: \
336: \n mips-tfile %{v*: -v} \
337: %{K: -I %b.o~} \
338: %{!K: %{save-temps: -I %b.o~}} \
339: %{c:%W{o*}%{!o*:-o %b.o}}%{!c:-o %b.o} \
340: %{.s:%i} %{!.s:%g.s}}}"
341: #endif
342:
343: /* Redefinition of libraries used. Mips doesn't support normal
344: UNIX style profiling via calling _mcount. It does offer
345: profiling that samples the PC, so do what we can... */
346:
347: #ifndef LIB_SPEC
348: #define LIB_SPEC "%{pg:-lprof1} %{p:-lprof1} -lc"
349: #endif
350:
351: /* Extra switches sometimes passed to the linker. */
352:
353: #ifndef LINK_SPEC
354: #define LINK_SPEC "\
355: %{G*} \
356: %{!mgas: \
357: %{pipe: %e-pipe is not supported.} \
358: %{EB} %{!EB:-EB} \
359: %{EL: %e-EL not supported} \
1.1.1.2 ! root 360: %{mips1} %{mips2} %{mips3} \
1.1 root 361: %{bestGnum}}"
362: #endif /* LINK_SPEC defined */
363:
364: /* Specs for the compiler proper */
365:
366: #ifndef CC1_SPEC
367: #define CC1_SPEC "\
368: %{O*: %{!mno-gpOPT:%{!mno-gpopt: -mgpopt}}} \
369: %{gline:%{!g:%{!g0:%{!g1:%{!g2: -g1}}}}} \
370: %{G*} \
371: %{pic-none: -mno-half-pic} \
372: %{pic-lib: -mhalf-pic} \
373: %{pic-extern: -mhalf-pic} \
374: %{pic-calls: -mhalf-pic} \
375: %{save-temps: }"
376: #endif
377:
378: #ifndef CC1PLUS_SPEC
379: #define CC1PLUS_SPEC "%{!fgnu-binutils: -fno-gnu-binutils}"
380: #endif
381:
382: /* Preprocessor specs */
383:
384: #ifndef CPP_SPEC
385: #define CPP_SPEC "\
386: %{.cc: -D__LANGUAGE_C_PLUS_PLUS -D_LANGUAGE_C_PLUS_PLUS} \
387: %{.cxx: -D__LANGUAGE_C_PLUS_PLUS -D_LANGUAGE_C_PLUS_PLUS} \
388: %{.C: -D__LANGUAGE_C_PLUS_PLUS -D_LANGUAGE_C_PLUS_PLUS} \
389: %{.m: -D__LANGUAGE_OBJECTIVE_C -D_LANGUAGE_OBJECTIVE_C} \
390: %{.S: -D__LANGUAGE_ASSEMBLY -D_LANGUAGE_ASSEMBLY %{!ansi:-DLANGUAGE_ASSEMBLY}} \
391: %{!.S: -D__LANGUAGE_C -D_LANGUAGE_C %{!ansi:-DLANGUAGE_C}}"
392: #endif
393:
394: /* If defined, this macro is an additional prefix to try after
395: `STANDARD_EXEC_PREFIX'. */
396:
397: #ifndef MD_EXEC_PREFIX
1.1.1.2 ! root 398: #define MD_EXEC_PREFIX "/usr/lib/cmplrs/cc/"
! 399: #endif
! 400:
! 401: #ifndef MD_STARTFILE_PREFIX
! 402: #define MD_STARTFILE_PREFIX "/usr/lib/cmplrs/cc/"
1.1 root 403: #endif
404:
405:
406: /* Print subsidiary information on the compiler version in use. */
407:
1.1.1.2 ! root 408: #define MIPS_VERSION "[AL 1.1, MM 14]"
1.1 root 409:
410: #ifndef MACHINE_TYPE
411: #define MACHINE_TYPE "BSD Mips"
412: #endif
413:
414: #ifndef TARGET_VERSION_INTERNAL
415: #define TARGET_VERSION_INTERNAL(STREAM) \
416: fprintf (STREAM, " %s %s", MIPS_VERSION, MACHINE_TYPE)
417: #endif
418:
419: #ifndef TARGET_VERSION
420: #define TARGET_VERSION TARGET_VERSION_INTERNAL (stderr)
421: #endif
422:
423:
424: #define SDB_DEBUGGING_INFO /* generate info for mips-tfile */
425: #define DBX_DEBUGGING_INFO /* generate stabs (OSF/rose) */
426: #define MIPS_DEBUGGING_INFO /* MIPS specific debugging info */
427:
428: #ifndef PREFERRED_DEBUGGING_TYPE /* assume SDB_DEBUGGING_INFO */
1.1.1.2 ! root 429: #define PREFERRED_DEBUGGING_TYPE ((len > 1 && !strncmp (str, "ggdb", len)) ? DBX_DEBUG : SDB_DEBUG)
1.1 root 430: #endif
431:
1.1.1.2 ! root 432: /* By default, turn on GDB extensions. */
! 433: #define DEFAULT_GDB_EXTENSIONS 1
! 434:
1.1 root 435: /* If we are passing smuggling stabs through the MIPS ECOFF object
436: format, put a comment in front of the .stab<x> operation so
437: that the MIPS assembler does not choke. The mips-tfile program
438: will correctly put the stab into the object file. */
439:
440: #define ASM_STABS_OP ((TARGET_GAS) ? ".stabs" : " #.stabs")
441: #define ASM_STABN_OP ((TARGET_GAS) ? ".stabn" : " #.stabn")
442: #define ASM_STABD_OP ((TARGET_GAS) ? ".stabd" : " #.stabd")
443:
444: /* Forward references to tags are allowed. */
445: #define SDB_ALLOW_FORWARD_REFERENCES
446:
447: /* Unknown tags are also allowed. */
448: #define SDB_ALLOW_UNKNOWN_REFERENCES
449:
450: /* On Sun 4, this limit is 2048. We use 1500 to be safe,
451: since the length can run past this up to a continuation point. */
452: #define DBX_CONTIN_LENGTH 1500
453:
454:
455: /* How to renumber registers for dbx and gdb. */
456: #define DBX_REGISTER_NUMBER(REGNO) mips_dbx_regno[ (REGNO) ]
457:
458:
459: /* Overrides for the COFF debug format. */
460: #define PUT_SDB_SCL(a) \
461: do { \
462: extern FILE *asm_out_text_file; \
463: fprintf (asm_out_text_file, "\t.scl\t%d;", (a)); \
464: } while (0)
465:
466: #define PUT_SDB_INT_VAL(a) \
467: do { \
468: extern FILE *asm_out_text_file; \
469: fprintf (asm_out_text_file, "\t.val\t%d;", (a)); \
470: } while (0)
471:
472: #define PUT_SDB_VAL(a) \
473: do { \
474: extern FILE *asm_out_text_file; \
475: fputs ("\t.val\t", asm_out_text_file); \
476: output_addr_const (asm_out_text_file, (a)); \
477: fputc (';', asm_out_text_file); \
478: } while (0)
479:
480: #define PUT_SDB_DEF(a) \
481: do { \
482: extern FILE *asm_out_text_file; \
483: fprintf (asm_out_text_file, "\t#.def\t"); \
484: ASM_OUTPUT_LABELREF (asm_out_text_file, a); \
485: fputc (';', asm_out_text_file); \
486: } while (0)
487:
488: #define PUT_SDB_PLAIN_DEF(a) \
489: do { \
490: extern FILE *asm_out_text_file; \
491: fprintf (asm_out_text_file, "\t#.def\t.%s;", (a)); \
492: } while (0)
493:
494: #define PUT_SDB_ENDEF \
495: do { \
496: extern FILE *asm_out_text_file; \
497: fprintf (asm_out_text_file, "\t.endef\n"); \
498: } while (0)
499:
500: #define PUT_SDB_TYPE(a) \
501: do { \
502: extern FILE *asm_out_text_file; \
503: fprintf (asm_out_text_file, "\t.type\t0x%x;", (a)); \
504: } while (0)
505:
506: #define PUT_SDB_SIZE(a) \
507: do { \
508: extern FILE *asm_out_text_file; \
509: fprintf (asm_out_text_file, "\t.size\t%d;", (a)); \
510: } while (0)
511:
512: #define PUT_SDB_DIM(a) \
513: do { \
514: extern FILE *asm_out_text_file; \
515: fprintf (asm_out_text_file, "\t.dim\t%d;", (a)); \
516: } while (0)
517:
518: #ifndef PUT_SDB_START_DIM
519: #define PUT_SDB_START_DIM \
520: do { \
521: extern FILE *asm_out_text_file; \
522: fprintf (asm_out_text_file, "\t.dim\t"); \
523: } while (0)
524: #endif
525:
526: #ifndef PUT_SDB_NEXT_DIM
527: #define PUT_SDB_NEXT_DIM(a) \
528: do { \
529: extern FILE *asm_out_text_file; \
530: fprintf (asm_out_text_file, "%d,", a); \
531: } while (0)
532: #endif
533:
534: #ifndef PUT_SDB_LAST_DIM
535: #define PUT_SDB_LAST_DIM(a) \
536: do { \
537: extern FILE *asm_out_text_file; \
538: fprintf (asm_out_text_file, "%d;", a); \
539: } while (0)
540: #endif
541:
542: #define PUT_SDB_TAG(a) \
543: do { \
544: extern FILE *asm_out_text_file; \
545: fprintf (asm_out_text_file, "\t.tag\t"); \
546: ASM_OUTPUT_LABELREF (asm_out_text_file, a); \
547: fputc (';', asm_out_text_file); \
548: } while (0)
549:
550: /* For block start and end, we create labels, so that
551: later we can figure out where the correct offset is.
552: The normal .ent/.end serve well enough for functions,
553: so those are just commented out. */
554:
555: #define PUT_SDB_BLOCK_START(LINE) \
556: do { \
557: extern FILE *asm_out_text_file; \
558: fprintf (asm_out_text_file, \
559: "$Lb%d:\n\t#.begin\t$Lb%d\t%d\n", \
560: sdb_label_count, \
561: sdb_label_count, \
562: (LINE)); \
563: sdb_label_count++; \
564: } while (0)
565:
566: #define PUT_SDB_BLOCK_END(LINE) \
567: do { \
568: extern FILE *asm_out_text_file; \
569: fprintf (asm_out_text_file, \
570: "$Le%d:\n\t#.bend\t$Le%d\t%d\n", \
571: sdb_label_count, \
572: sdb_label_count, \
573: (LINE)); \
574: sdb_label_count++; \
575: } while (0)
576:
577: #define PUT_SDB_FUNCTION_START(LINE)
578:
579: #define PUT_SDB_FUNCTION_END(LINE)
580:
581: #define PUT_SDB_EPILOGUE_END(NAME)
582:
583: #define SDB_GENERATE_FAKE(BUFFER, NUMBER) \
584: sprintf ((BUFFER), ".%dfake", (NUMBER));
585:
586: /* Correct the offset of automatic variables and arguments
587: if the frame pointer has been eliminated. */
588:
589: #define DEBUGGER_AUTO_OFFSET(X) mips_debugger_offset (X, 0)
590: #define DEBUGGER_ARG_OFFSET(OFFSET, X) mips_debugger_offset (X, OFFSET)
591:
592:
593: /* Tell collect that the object format is ECOFF */
594: #ifndef OBJECT_FORMAT_ROSE
595: #define OBJECT_FORMAT_COFF /* Object file looks like COFF */
596: #define EXTENDED_COFF /* ECOFF, not normal coff */
597: #endif
598:
599:
600: /* Run-time compilation parameters selecting different hardware subsets. */
601:
602: /* Macros used in the machine description to test the flags. */
603:
604: /* Bits for real switches */
605: #define MASK_INT64 0x00000001 /* ints are 64 bits */
606: #define MASK_LONG64 0x00000002 /* longs are 64 bits */
607: #define MASK_LLONG128 0x00000004 /* long longs are 128 bits */
608: #define MASK_GPOPT 0x00000008 /* Optimize for global pointer */
609: #define MASK_GAS 0x00000010 /* Gas used instead of MIPS as */
610: #define MASK_NAME_REGS 0x00000020 /* Use MIPS s/w reg name convention */
611: #define MASK_STATS 0x00000040 /* print statistics to stderr */
612: #define MASK_MEMCPY 0x00000080 /* call memcpy instead of inline code*/
613: #define MASK_SOFT_FLOAT 0x00000100 /* software floating point */
614: #define MASK_FLOAT64 0x00000200 /* fp registers are 64 bits */
615: #define MASK_ABICALLS 0x00000400 /* emit .abicalls/.cprestore/.cpload */
616: #define MASK_HALF_PIC 0x00000800 /* Emit OSF-style pic refs to externs*/
617: #define MASK_UNUSED1 0x00001000
618: #define MASK_UNUSED2 0x00002000
619: #define MASK_UNUSED3 0x00004000
620: #define MASK_UNUSED4 0x00008000
621: #define MASK_UNUSED5 0x00010000
622: #define MASK_UNUSED6 0x00020000
623: #define MASK_UNUSED7 0x00040000
624: #define MASK_UNUSED8 0x00080000
625:
626: /* Dummy switches used only in spec's*/
627: #define MASK_MIPS_TFILE 0x00000000 /* flag for mips-tfile usage */
628:
629: /* switches not used yet */
630: #define MASK_WC8 0x00000000 /* wchar's are 8 bits, not 32 */
631: #define MASK_WC16 0x00000000 /* wchar's are 16 bits, not 32 */
1.1.1.2 ! root 632: #define MASK_WC32 0x00000000 /* dummy for consistency */
1.1 root 633:
634: /* Debug switches, not documented */
635: #define MASK_DEBUG 0x40000000 /* Eliminate version # in .s file */
636: #define MASK_DEBUG_A 0x20000000 /* don't allow <label>($reg) addrs */
637: #define MASK_DEBUG_B 0x10000000 /* GO_IF_LEGITIMATE_ADDRESS debug */
638: #define MASK_DEBUG_C 0x08000000 /* suppress normal divmod patterns */
639: #define MASK_DEBUG_D 0x04000000 /* make multiply cost 2 */
640: #define MASK_DEBUG_E 0x02000000 /* function_arg debug */
641: #define MASK_DEBUG_F 0x01000000 /* don't try to suppress load nop's */
642: #define MASK_DEBUG_G 0x00800000 /* don't support 64 bit arithmetic */
643: #define MASK_DEBUG_H 0x00400000 /* allow ints in FP registers */
644: #define MASK_DEBUG_I 0x00200000 /* unused */
645: #define MASK_DEBUG_J 0x00100000 /* unused */
646:
647: /* r4000 64 bit sizes */
648: #define TARGET_INT64 (target_flags & MASK_INT64)
649: #define TARGET_LONG64 (target_flags & MASK_LONG64)
650: #define TARGET_LLONG128 (target_flags & MASK_LLONG128)
651: #define TARGET_FLOAT64 (target_flags & MASK_FLOAT64)
652:
653: /* Mips vs. GNU assembler */
654: #define TARGET_GAS (target_flags & MASK_GAS)
655: #define TARGET_UNIX_ASM (!TARGET_GAS)
656: #define TARGET_MIPS_AS TARGET_UNIX_ASM
657:
658: /* Debug Mode */
659: #define TARGET_DEBUG_MODE (target_flags & MASK_DEBUG)
660: #define TARGET_DEBUG_A_MODE (target_flags & MASK_DEBUG_A)
661: #define TARGET_DEBUG_B_MODE (target_flags & MASK_DEBUG_B)
662: #define TARGET_DEBUG_C_MODE (target_flags & MASK_DEBUG_C)
663: #define TARGET_DEBUG_D_MODE (target_flags & MASK_DEBUG_D)
664: #define TARGET_DEBUG_E_MODE (target_flags & MASK_DEBUG_E)
665: #define TARGET_DEBUG_F_MODE (target_flags & MASK_DEBUG_F)
666: #define TARGET_DEBUG_G_MODE (target_flags & MASK_DEBUG_G)
667: #define TARGET_DEBUG_H_MODE (target_flags & MASK_DEBUG_H)
668: #define TARGET_DEBUG_I_MODE (target_flags & MASK_DEBUG_I)
669: #define TARGET_DEBUG_J_MODE (target_flags & MASK_DEBUG_J)
670:
671: /* Reg. Naming in .s ($21 vs. $a0) */
672: #define TARGET_NAME_REGS (target_flags & MASK_NAME_REGS)
673:
674: /* Optimize for Sdata/Sbss */
675: #define TARGET_GP_OPT (target_flags & MASK_GPOPT)
676:
677: /* print program statistics */
678: #define TARGET_STATS (target_flags & MASK_STATS)
679:
680: /* call memcpy instead of inline code */
681: #define TARGET_MEMCPY (target_flags & MASK_MEMCPY)
682:
683: /* .abicalls, etc from Pyramid V.4 */
684: #define TARGET_ABICALLS (target_flags & MASK_ABICALLS)
685:
686: /* OSF pic references to externs */
687: #define TARGET_HALF_PIC (target_flags & MASK_HALF_PIC)
688:
689: /* wchar size */
690: #define TARGET_WC8 (target_flags & MASK_WC8)
691: #define TARGET_WC16 (target_flags & MASK_WC16)
692: #define TARGET_WC32 ((target_flags & (MASK_WC8 | MASK_WC16)) == 0)
693:
694: /* software floating point */
695: #define TARGET_SOFT_FLOAT (target_flags & MASK_SOFT_FLOAT)
696: #define TARGET_HARD_FLOAT (! TARGET_SOFT_FLOAT)
697:
698: /* Macro to define tables used to set the flags.
699: This is a list in braces of pairs in braces,
700: each pair being { "NAME", VALUE }
701: where VALUE is the bits to set or minus the bits to clear.
702: An empty string NAME is used to identify the default VALUE. */
703:
704: #define TARGET_SWITCHES \
705: { \
706: {"int64", MASK_INT64 | MASK_LONG64}, \
707: {"long64", MASK_LONG64}, \
708: {"longlong128", MASK_INT64 | MASK_LONG64 | MASK_LLONG128}, \
709: {"mips-as", -MASK_GAS}, \
710: {"gas", MASK_GAS}, \
711: {"rnames", MASK_NAME_REGS}, \
712: {"no-rnames", -MASK_NAME_REGS}, \
713: {"gpOPT", MASK_GPOPT}, \
714: {"gpopt", MASK_GPOPT}, \
715: {"no-gpOPT", -MASK_GPOPT}, \
716: {"no-gpopt", -MASK_GPOPT}, \
717: {"stats", MASK_STATS}, \
718: {"no-stats", -MASK_STATS}, \
719: {"memcpy", MASK_MEMCPY}, \
720: {"no-memcpy", -MASK_MEMCPY}, \
721: {"wc8", MASK_WC8}, \
722: {"wc16", MASK_WC16}, \
723: {"wc32", MASK_WC32}, \
724: {"mips-tfile", MASK_MIPS_TFILE}, \
725: {"no-mips-tfile", -MASK_MIPS_TFILE}, \
726: {"soft-float", MASK_SOFT_FLOAT}, \
727: {"hard-float", -MASK_SOFT_FLOAT}, \
728: {"fp64", MASK_FLOAT64}, \
729: {"fp32", -MASK_FLOAT64}, \
730: {"abicalls", MASK_ABICALLS}, \
731: {"no-abicalls", -MASK_ABICALLS}, \
732: {"half-pic", MASK_HALF_PIC}, \
733: {"no-half-pic", -MASK_HALF_PIC}, \
734: {"debug", MASK_DEBUG}, \
735: {"debuga", MASK_DEBUG_A}, \
736: {"debugb", MASK_DEBUG_B}, \
737: {"debugc", MASK_DEBUG_C}, \
738: {"debugd", MASK_DEBUG_D}, \
739: {"debuge", MASK_DEBUG_E}, \
740: {"debugf", MASK_DEBUG_F}, \
741: {"debugg", MASK_DEBUG_G}, \
742: {"debugh", MASK_DEBUG_H}, \
743: {"debugi", MASK_DEBUG_I}, \
744: {"debugj", MASK_DEBUG_J}, \
745: {"", TARGET_DEFAULT} \
746: }
747:
748: /* Default target_flags if no switches are specified */
749:
750: #ifndef TARGET_DEFAULT
751: #define TARGET_DEFAULT 0
752: #endif
753:
754: /* This macro is similar to `TARGET_SWITCHES' but defines names of
755: command options that have values. Its definition is an
756: initializer with a subgrouping for each command option.
757:
758: Each subgrouping contains a string constant, that defines the
759: fixed part of the option name, and the address of a variable.
760: The variable, type `char *', is set to the variable part of the
761: given option if the fixed part matches. The actual option name
762: is made by appending `-m' to the specified name.
763:
764: Here is an example which defines `-mshort-data-NUMBER'. If the
765: given option is `-mshort-data-512', the variable `m88k_short_data'
766: will be set to the string `"512"'.
767:
768: extern char *m88k_short_data;
769: #define TARGET_OPTIONS { { "short-data-", &m88k_short_data } } */
770:
771: #define TARGET_OPTIONS \
772: { \
773: { "cpu=", &mips_cpu_string }, \
774: { "ips", &mips_isa_string } \
775: }
776:
777: /* Macros to decide whether certain features are available or not,
778: depending on the instruction set architecture level. */
779:
780: #define BRANCH_LIKELY_P() (mips_isa >= 2)
781: #define HAVE_64BIT_P() (mips_isa >= 3)
782: #define HAVE_SQRT_P() (mips_isa >= 2)
783:
784:
785: /* Target machine storage layout */
786:
787: /* Define this if most significant bit is lowest numbered
788: in instructions that operate on numbered bit-fields.
789: */
790: /* #define BITS_BIG_ENDIAN */
791:
792: /* Define this if most significant byte of a word is the lowest numbered. */
793: #ifndef BYTES_BIG_ENDIAN
794: #ifndef DECSTATION
795: #define BYTES_BIG_ENDIAN 1
796: #else
797: #define BYTES_BIG_ENDIAN 0
798: #endif
799: #endif
800:
801: /* Define this if most significant word of a multiword number is the lowest. */
802: #ifndef WORDS_BIG_ENDIAN
803: #ifndef DECSTATION
804: #define WORDS_BIG_ENDIAN 1
805: #else
806: #define WORDS_BIG_ENDIAN 0
807: #endif
808: #endif
809:
810: /* Define macros to easily access the most and least significant words
811: without a lot of #ifdef's. */
812:
813: #if WORDS_BIG_ENDIAN
814: #define MOST_SIGNIFICANT_WORD 0
815: #define LEAST_SIGNIFICANT_WORD 1
816:
817: #else
818: #define MOST_SIGNIFICANT_WORD 1
819: #define LEAST_SIGNIFICANT_WORD 0
820: #endif
821:
1.1.1.2 ! root 822: /* Number of bits in an addressable storage unit */
1.1 root 823: #define BITS_PER_UNIT 8
824:
825: /* Width in bits of a "word", which is the contents of a machine register.
826: Note that this is not necessarily the width of data type `int';
827: if using 16-bit ints on a 68000, this would still be 32.
828: But on a machine with 16-bit registers, this would be 16. */
829: #define BITS_PER_WORD 32
830:
831: /* Width of a word, in units (bytes). */
832: #define UNITS_PER_WORD 4
833:
834: /* A C expression for the size in bits of the type `int' on the
835: target machine. If you don't define this, the default is one
836: word. */
837: #define INT_TYPE_SIZE 32
838:
839: /* A C expression for the size in bits of the type `short' on the
840: target machine. If you don't define this, the default is half a
841: word. (If this would be less than one storage unit, it is
842: rounded up to one unit.) */
843: #define SHORT_TYPE_SIZE 16
844:
845: /* A C expression for the size in bits of the type `long' on the
846: target machine. If you don't define this, the default is one
847: word. */
848: #define LONG_TYPE_SIZE 32
849:
850: /* A C expression for the size in bits of the type `long long' on the
851: target machine. If you don't define this, the default is two
852: words. */
853: #define LONG_LONG_TYPE_SIZE 64
854:
855: /* A C expression for the size in bits of the type `char' on the
856: target machine. If you don't define this, the default is one
857: quarter of a word. (If this would be less than one storage unit,
858: it is rounded up to one unit.) */
859: #define CHAR_TYPE_SIZE BITS_PER_UNIT
860:
861: /* A C expression for the size in bits of the type `float' on the
862: target machine. If you don't define this, the default is one
863: word. */
864: #define FLOAT_TYPE_SIZE 32
865:
866: /* A C expression for the size in bits of the type `double' on the
867: target machine. If you don't define this, the default is two
868: words. */
869: #define DOUBLE_TYPE_SIZE 64
870:
871: /* A C expression for the size in bits of the type `long double' on
872: the target machine. If you don't define this, the default is two
873: words. */
874: #define LONG_DOUBLE_TYPE_SIZE 64
875:
876: /* Width in bits of a pointer.
877: See also the macro `Pmode' defined below. */
878: #define POINTER_SIZE 32
879:
880: /* Allocation boundary (in *bits*) for storing pointers in memory. */
881: #define POINTER_BOUNDARY 32
882:
883: /* Allocation boundary (in *bits*) for storing arguments in argument list. */
884: #define PARM_BOUNDARY 32
885:
886: /* Allocation boundary (in *bits*) for the code of a function. */
887: #define FUNCTION_BOUNDARY 32
888:
889: /* Alignment of field after `int : 0' in a structure. */
890: #define EMPTY_FIELD_BOUNDARY 32
891:
892: /* Every structure's size must be a multiple of this. */
893: /* 8 is observed right on a DECstation and on riscos 4.02. */
894: #define STRUCTURE_SIZE_BOUNDARY 8
895:
896: /* There is no point aligning anything to a rounder boundary than this. */
897: #define BIGGEST_ALIGNMENT 64
898:
899: /* Biggest alignment any structure field can require in bits. */
900: #define BIGGEST_FIELD_ALIGNMENT 64
901:
1.1.1.2 ! root 902: /* Set this nonzero if move instructions will actually fail to work
1.1 root 903: when given unaligned data. */
1.1.1.2 ! root 904: #define STRICT_ALIGNMENT 1
1.1 root 905:
906: /* Define this if you wish to imitate the way many other C compilers
907: handle alignment of bitfields and the structures that contain
908: them.
909:
910: The behavior is that the type written for a bitfield (`int',
911: `short', or other integer type) imposes an alignment for the
912: entire structure, as if the structure really did contain an
913: ordinary field of that type. In addition, the bitfield is placed
914: within the structure so that it would fit within such a field,
915: not crossing a boundary for it.
916:
917: Thus, on most machines, a bitfield whose type is written as `int'
918: would not cross a four-byte boundary, and would force four-byte
919: alignment for the whole structure. (The alignment used may not
920: be four bytes; it is controlled by the other alignment
921: parameters.)
922:
923: If the macro is defined, its definition should be a C expression;
924: a nonzero value for the expression enables this behavior. */
925:
926: #define PCC_BITFIELD_TYPE_MATTERS 1
927:
928: /* If defined, a C expression to compute the alignment given to a
929: constant that is being placed in memory. CONSTANT is the constant
930: and ALIGN is the alignment that the object would ordinarily have.
931: The value of this macro is used instead of that alignment to align
932: the object.
933:
934: If this macro is not defined, then ALIGN is used.
935:
936: The typical use of this macro is to increase alignment for string
937: constants to be word aligned so that `strcpy' calls that copy
938: constants can be done inline. */
939:
940: #define CONSTANT_ALIGNMENT(EXP, ALIGN) \
941: ((TREE_CODE (EXP) == STRING_CST || TREE_CODE (EXP) == CONSTRUCTOR) \
942: && (ALIGN) < BITS_PER_WORD \
943: ? BITS_PER_WORD \
944: : (ALIGN))
945:
946: /* If defined, a C expression to compute the alignment for a static
947: variable. TYPE is the data type, and ALIGN is the alignment that
948: the object would ordinarily have. The value of this macro is used
949: instead of that alignment to align the object.
950:
951: If this macro is not defined, then ALIGN is used.
952:
953: One use of this macro is to increase alignment of medium-size
954: data to make it all fit in fewer cache lines. Another is to
955: cause character arrays to be word-aligned so that `strcpy' calls
956: that copy constants to character arrays can be done inline. */
957:
958: #undef DATA_ALIGNMENT
959: #define DATA_ALIGNMENT(TYPE, ALIGN) \
960: ((((ALIGN) < BITS_PER_WORD) \
961: && (TREE_CODE (TYPE) == ARRAY_TYPE \
962: || TREE_CODE (TYPE) == UNION_TYPE \
963: || TREE_CODE (TYPE) == RECORD_TYPE)) ? BITS_PER_WORD : (ALIGN))
964:
965: /* Define this macro if an argument declared as `char' or `short' in a
966: prototype should actually be passed as an `int'. In addition to
967: avoiding errors in certain cases of mismatch, it also makes for
968: better code on certain machines. */
969:
970: #define PROMOTE_PROTOTYPES
971:
972: /* Define this macro if an instruction to load a value narrower
973: than a word from memory into a register also zero-extends the
974: value to the whole register. */
975:
976: #define BYTE_LOADS_ZERO_EXTEND
977:
978:
979: /* Standard register usage. */
980:
981: /* Number of actual hardware registers.
982: The hardware registers are assigned numbers for the compiler
983: from 0 to just below FIRST_PSEUDO_REGISTER.
984: All registers that the compiler knows about must be given numbers,
985: even those that are not normally considered general registers.
986:
987: On the Mips, we have 32 integer registers, 32 floating point registers
988: and the special registers hi, lo, and fp status. */
989:
990: #define FIRST_PSEUDO_REGISTER 67
991:
992: /* 1 for registers that have pervasive standard uses
993: and are not available for the register allocator.
994:
995: On the MIPS, see conventions, page D-2 */
996:
997: #define FIXED_REGISTERS \
998: { \
999: 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
1000: 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 1, \
1001: 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
1002: 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
1003: 1, 1, 1 \
1004: }
1005:
1006:
1007: /* 1 for registers not available across function calls.
1008: These must include the FIXED_REGISTERS and also any
1009: registers that can be used without being saved.
1010: The latter must include the registers where values are returned
1011: and the register where structure-value addresses are passed.
1012: Aside from that, you can include as many other registers as you like. */
1013:
1014: #define CALL_USED_REGISTERS \
1015: { \
1016: 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
1017: 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 1, \
1018: 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
1019: 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
1020: 1, 1, 1 \
1021: }
1022:
1023:
1024: /* Internal macros to classify a register number as to whether it's a
1025: general purpose register, a floating point register, a
1026: multiply/divide register, or a status register.
1027:
1028: The macro FP_CALL_REG_P also allows registers $4 and $6 as floating
1029: point registers to pass floating point as per MIPS spec. */
1030:
1031: #define GP_REG_FIRST 0
1032: #define GP_REG_LAST 31
1033: #define GP_REG_NUM (GP_REG_LAST - GP_REG_FIRST + 1)
1034: #define GP_DBX_FIRST 0
1035:
1036: #define FP_REG_FIRST 32
1037: #define FP_REG_LAST 63
1038: #define FP_REG_NUM (FP_REG_LAST - FP_REG_FIRST + 1)
1039: #define FP_DBX_FIRST ((write_symbols == DBX_DEBUG) ? 38 : 32)
1040:
1041: #define MD_REG_FIRST 64
1042: #define MD_REG_LAST 65
1043: #define MD_REG_NUM (MD_REG_LAST - MD_REG_FIRST + 1)
1044:
1045: #define ST_REG_FIRST 66
1046: #define ST_REG_LAST 66
1047: #define ST_REG_NUM (ST_REG_LAST - ST_REG_FIRST + 1)
1048:
1049: #define AT_REGNUM (GP_REG_FIRST + 1)
1050: #define HI_REGNUM (MD_REG_FIRST + 0)
1051: #define LO_REGNUM (MD_REG_FIRST + 1)
1052: #define FPSW_REGNUM ST_REG_FIRST
1053:
1054: #define GP_REG_P(REGNO) ((unsigned) ((REGNO) - GP_REG_FIRST) < GP_REG_NUM)
1055: #define FP_REG_P(REGNO) ((unsigned) ((REGNO) - FP_REG_FIRST) < FP_REG_NUM)
1056: #define MD_REG_P(REGNO) ((unsigned) ((REGNO) - MD_REG_FIRST) < MD_REG_NUM)
1057: #define ST_REG_P(REGNO) ((REGNO) == ST_REG_FIRST)
1058:
1059: #define FP_CALL_REG_P(REGNO) \
1060: (FP_REG_P (REGNO) \
1061: || (REGNO) == (4 + GP_REG_FIRST) \
1062: || (REGNO) == (6 + GP_REG_FIRST))
1063:
1064: /* Return number of consecutive hard regs needed starting at reg REGNO
1065: to hold something of mode MODE.
1066: This is ordinarily the length in words of a value of mode MODE
1067: but can be less for certain modes in special long registers.
1068:
1069: On the MIPS, all general registers are one word long. Except on
1070: the R4000 with the FR bit set, the floating point uses register
1071: pairs, with the second register not being allocatable. */
1072:
1073: #define HARD_REGNO_NREGS(REGNO, MODE) \
1074: (! FP_REG_P (REGNO) \
1075: ? ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD) \
1076: : (((GET_MODE_SIZE (MODE) + (2*UNITS_PER_WORD) - 1) / (2*UNITS_PER_WORD)) \
1077: << (TARGET_FLOAT64 == 0)))
1078:
1079: /* Value is 1 if hard register REGNO can hold a value of machine-mode
1080: MODE. Require that DImode and DFmode be in even registers. For
1081: DImode, this makes some of the insns easier to write, since you
1082: don't have to worry about a DImode value in registers 3 & 4,
1083: producing a result in 4 & 5.
1084:
1085: To make the code simpler HARD_REGNO_MODE_OK now just references an
1086: array built in override_options. Because machmodes.h is not yet
1087: included before this file is processed, the MODE bound can't be
1088: expressed here. */
1089:
1090: extern char mips_hard_regno_mode_ok[][FIRST_PSEUDO_REGISTER];
1091:
1092: #define HARD_REGNO_MODE_OK(REGNO, MODE) \
1093: mips_hard_regno_mode_ok[ (int)(MODE) ][ (REGNO) ]
1094:
1095: /* Value is 1 if it is a good idea to tie two pseudo registers
1096: when one has mode MODE1 and one has mode MODE2.
1097: If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
1098: for any hard reg, then this must be 0 for correct output. */
1099: #define MODES_TIEABLE_P(MODE1, MODE2) \
1100: ((GET_MODE_CLASS (MODE1) == MODE_FLOAT || \
1101: GET_MODE_CLASS (MODE1) == MODE_COMPLEX_FLOAT) \
1102: == (GET_MODE_CLASS (MODE2) == MODE_FLOAT || \
1103: GET_MODE_CLASS (MODE2) == MODE_COMPLEX_FLOAT))
1104:
1105: /* MIPS pc is not overloaded on a register. */
1106: /* #define PC_REGNUM xx */
1107:
1108: /* Register to use for pushing function arguments. */
1109: #define STACK_POINTER_REGNUM 29
1110:
1111: /* Offset from the stack pointer to the first available location. */
1112: #define STACK_POINTER_OFFSET 0
1113:
1114: /* Base register for access to local variables of the function. */
1115: #define FRAME_POINTER_REGNUM 30
1116:
1117: /* Value should be nonzero if functions must have frame pointers.
1118: Zero means the frame pointer need not be set up (and parms
1119: may be accessed via the stack pointer) in functions that seem suitable.
1120: This is computed in `reload', in reload1.c. */
1121: #define FRAME_POINTER_REQUIRED (current_function_calls_alloca)
1122:
1123: /* Base register for access to arguments of the function. */
1124: #define ARG_POINTER_REGNUM FRAME_POINTER_REGNUM
1125:
1126: /* Register in which static-chain is passed to a function. */
1127: #define STATIC_CHAIN_REGNUM 2
1128:
1129: /* Register in which address to store a structure value
1130: is passed to a function. */
1131: #define STRUCT_VALUE_REGNUM 4
1132:
1133: /* Mips registers used in prologue/epilogue code when the stack frame
1134: is larger than 32K bytes. These registers must come from the
1135: scratch register set, and not used for passing and returning
1136: arguments and any other information used in the calling sequence
1137: (such as pic). */
1138: #define MIPS_TEMP1_REGNUM 8
1139: #define MIPS_TEMP2_REGNUM 9
1140:
1141: /* Define this macro if it is as good or better to call a constant
1142: function address than to call an address kept in a register. */
1143: #define NO_FUNCTION_CSE 1
1144:
1145: /* Define this macro if it is as good or better for a function to
1146: call itself with an explicit address than to call an address
1147: kept in a register. */
1148: #define NO_RECURSIVE_FUNCTION_CSE 1
1149:
1150: /* The register number of the register used to address a table of
1151: static data addresses in memory. In some cases this register is
1152: defined by a processor's "application binary interface" (ABI).
1153: When this macro is defined, RTL is generated for this register
1154: once, as with the stack pointer and frame pointer registers. If
1155: this macro is not defined, it is up to the machine-dependent
1156: files to allocate such a register (if necessary). */
1157: #define PIC_OFFSET_TABLE_REGNUM 28
1158:
1159:
1160: /* Define the classes of registers for register constraints in the
1161: machine description. Also define ranges of constants.
1162:
1163: One of the classes must always be named ALL_REGS and include all hard regs.
1164: If there is more than one class, another class must be named NO_REGS
1165: and contain no registers.
1166:
1167: The name GENERAL_REGS must be the name of a class (or an alias for
1168: another name such as ALL_REGS). This is the class of registers
1169: that is allowed by "g" or "r" in a register constraint.
1170: Also, registers outside this class are allocated only when
1171: instructions express preferences for them.
1172:
1173: The classes must be numbered in nondecreasing order; that is,
1174: a larger-numbered class must never be contained completely
1175: in a smaller-numbered class.
1176:
1177: For any two classes, it is very desirable that there be another
1178: class that represents their union. */
1179:
1180: enum reg_class
1181: {
1182: NO_REGS, /* no registers in set */
1183: GR_REGS, /* integer registers */
1184: FP_REGS, /* floating point registers */
1185: HI_REG, /* hi register */
1186: LO_REG, /* lo register */
1187: MD_REGS, /* multiply/divide registers (hi/lo) */
1188: ST_REGS, /* status registers (fp status) */
1189: ALL_REGS, /* all registers */
1190: LIM_REG_CLASSES /* max value + 1 */
1191: };
1192:
1193: #define N_REG_CLASSES (int) LIM_REG_CLASSES
1194:
1195: #define GENERAL_REGS GR_REGS
1196:
1197: /* An initializer containing the names of the register classes as C
1198: string constants. These names are used in writing some of the
1199: debugging dumps. */
1200:
1201: #define REG_CLASS_NAMES \
1202: { \
1203: "NO_REGS", \
1204: "GR_REGS", \
1205: "FP_REGS", \
1206: "HI_REG", \
1207: "LO_REG", \
1208: "MD_REGS", \
1209: "ST_REGS", \
1210: "ALL_REGS" \
1211: }
1212:
1213: /* An initializer containing the contents of the register classes,
1214: as integers which are bit masks. The Nth integer specifies the
1215: contents of class N. The way the integer MASK is interpreted is
1216: that register R is in the class if `MASK & (1 << R)' is 1.
1217:
1218: When the machine has more than 32 registers, an integer does not
1219: suffice. Then the integers are replaced by sub-initializers,
1220: braced groupings containing several integers. Each
1221: sub-initializer must be suitable as an initializer for the type
1222: `HARD_REG_SET' which is defined in `hard-reg-set.h'. */
1223:
1224: #define REG_CLASS_CONTENTS \
1225: { \
1226: { 0x00000000, 0x00000000, 0x00000000 }, /* no registers */ \
1227: { 0xffffffff, 0x00000000, 0x00000000 }, /* integer registers */ \
1228: { 0x00000000, 0xffffffff, 0x00000000 }, /* floating registers*/ \
1229: { 0x00000000, 0x00000000, 0x00000001 }, /* lo register */ \
1230: { 0x00000000, 0x00000000, 0x00000002 }, /* hi register */ \
1231: { 0x00000000, 0x00000000, 0x00000003 }, /* mul/div registers */ \
1232: { 0x00000000, 0x00000000, 0x00000004 }, /* status registers */ \
1233: { 0xffffffff, 0xffffffff, 0x00000007 } /* all registers */ \
1234: }
1235:
1236:
1237: /* A C expression whose value is a register class containing hard
1238: register REGNO. In general there is more that one such class;
1239: choose a class which is "minimal", meaning that no smaller class
1240: also contains the register. */
1241:
1242: extern enum reg_class mips_regno_to_class[];
1243:
1244: #define REGNO_REG_CLASS(REGNO) mips_regno_to_class[ (REGNO) ]
1245:
1246: /* A macro whose definition is the name of the class to which a
1247: valid base register must belong. A base register is one used in
1248: an address which is the register value plus a displacement. */
1249:
1250: #define BASE_REG_CLASS GR_REGS
1251:
1252: /* A macro whose definition is the name of the class to which a
1253: valid index register must belong. An index register is one used
1254: in an address where its value is either multiplied by a scale
1255: factor or added to another register (as well as added to a
1256: displacement). */
1257:
1258: #define INDEX_REG_CLASS GR_REGS
1259:
1260:
1261: /* REGISTER AND CONSTANT CLASSES */
1262:
1263: /* Get reg_class from a letter such as appears in the machine
1264: description.
1265:
1266: DEFINED REGISTER CLASSES:
1267:
1268: 'd' General (aka integer) registers
1269: 'f' Floating point registers
1270: 'h' Hi register
1271: 'l' Lo register
1272: 's' Status registers
1273: 'x' Multiply/divide registers */
1274:
1275: extern enum reg_class mips_char_to_class[];
1276:
1277: #define REG_CLASS_FROM_LETTER(C) mips_char_to_class[ (C) ]
1278:
1279: /* The letters I, J, K, L, M, N, O, and P in a register constraint
1280: string can be used to stand for particular ranges of immediate
1281: operands. This macro defines what the ranges are. C is the
1282: letter, and VALUE is a constant value. Return 1 if VALUE is
1283: in the range specified by C. */
1284:
1285: /* For MIPS:
1286:
1287: `I' is used for the range of constants an arithmetic insn can
1288: actually contain (16 bits signed integers).
1289:
1290: `J' is used for the range which is just zero (ie, $r0).
1291:
1292: `K' is used for the range of constants a logical insn can actually
1293: contain (16 bit zero-extended integers).
1294:
1295: `L' is used for the range of constants that be loaded with lui
1296: (ie, the bottom 16 bits are zero).
1297:
1298: `M' is used for the range of constants that take two words to load
1299: (ie, not matched by `I', `K', and `L').
1300:
1301: `N' is used for negative 16 bit constants.
1302:
1303: `O' is an exact power of 2 (not yet used in the md file).
1304:
1305: `P' is used for positive 16 bit constants. */
1306:
1307: #define SMALL_INT(X) ((unsigned) (INTVAL (X) + 0x8000) < 0x10000)
1308: #define SMALL_INT_UNSIGNED(X) ((unsigned) (INTVAL (X)) < 0x10000)
1309:
1310: #define CONST_OK_FOR_LETTER_P(VALUE, C) \
1311: ((C) == 'I' ? ((unsigned) ((VALUE) + 0x8000) < 0x10000) \
1312: : (C) == 'J' ? ((VALUE) == 0) \
1313: : (C) == 'K' ? ((unsigned) (VALUE) < 0x10000) \
1314: : (C) == 'L' ? (((VALUE) & 0xffff0000) == (VALUE)) \
1315: : (C) == 'M' ? ((((VALUE) & 0xffff0000) != 0) \
1316: && (((VALUE) & 0xffff0000) != 0xffff0000) \
1317: && ((VALUE) & 0x0000ffff) != 0) \
1318: : (C) == 'N' ? (((VALUE) & 0xffff0000) == 0xffff0000) \
1319: : (C) == 'O' ? (exact_log2 (VALUE) >= 0) \
1320: : (C) == 'P' ? ((VALUE) != 0 && (((VALUE) & 0xffff0000) == 0)) \
1321: : 0)
1322:
1323: /* Similar, but for floating constants, and defining letters G and H.
1324: Here VALUE is the CONST_DOUBLE rtx itself. */
1325:
1326: /* For Mips
1327:
1328: 'G' : Floating point 0 */
1329:
1330: #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
1331: ((C) == 'G' \
1332: && CONST_DOUBLE_HIGH (VALUE) == 0 \
1333: && CONST_DOUBLE_LOW (VALUE) == 0)
1334:
1335: /* Letters in the range `Q' through `U' may be defined in a
1336: machine-dependent fashion to stand for arbitrary operand types.
1337: The machine description macro `EXTRA_CONSTRAINT' is passed the
1338: operand as its first argument and the constraint letter as its
1339: second operand.
1340:
1.1.1.2 ! root 1341: `Q' is for memory references which take more than 1 instruction.
! 1342: `R' is for memory references which take 1 word for the instruction.
1.1 root 1343: `S' is for references to extern items which are PIC for OSF/rose. */
1344:
1345: #define EXTRA_CONSTRAINT(OP,CODE) \
1346: ((GET_CODE (OP) != MEM) ? FALSE \
1347: : ((CODE) == 'Q') ? !simple_memory_operand (OP, GET_MODE (OP)) \
1348: : ((CODE) == 'R') ? simple_memory_operand (OP, GET_MODE (OP)) \
1349: : ((CODE) == 'S') ? (HALF_PIC_P () && CONSTANT_P (OP) \
1350: && HALF_PIC_ADDRESS_P (OP)) \
1351: : FALSE)
1352:
1353: /* Given an rtx X being reloaded into a reg required to be
1354: in class CLASS, return the class of reg to actually use.
1355: In general this is just CLASS; but on some machines
1356: in some cases it is preferable to use a more restrictive class. */
1357:
1358: #define PREFERRED_RELOAD_CLASS(X,CLASS) \
1359: ((GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT \
1360: || GET_MODE_CLASS (GET_MODE (X)) == MODE_COMPLEX_FLOAT) \
1361: ? (TARGET_SOFT_FLOAT ? GR_REGS : FP_REGS) \
1362: : ((GET_MODE (X) == VOIDmode) \
1363: ? GR_REGS \
1364: : CLASS))
1365:
1366: /* Return the maximum number of consecutive registers
1367: needed to represent mode MODE in a register of class CLASS. */
1368:
1369: #define CLASS_MAX_NREGS(CLASS, MODE) \
1370: ((((MODE) == DFmode) || ((MODE) == SFmode)) ? 2 \
1371: : ((MODE) == VOIDmode)? ((CLASS) == FP_REGS ? 2 : 1) \
1372: : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))
1373:
1374: /* If defined, this is a C expression whose value should be
1375: nonzero if the insn INSN has the effect of mysteriously
1376: clobbering the contents of hard register number REGNO. By
1377: "mysterious" we mean that the insn's RTL expression doesn't
1378: describe such an effect.
1379:
1380: If this macro is not defined, it means that no insn clobbers
1381: registers mysteriously. This is the usual situation; all else
1382: being equal, it is best for the RTL expression to show all the
1383: activity. */
1384:
1385: /* #define INSN_CLOBBERS_REGNO_P(INSN, REGNO) */
1386:
1387:
1388: /* Stack layout; function entry, exit and calling. */
1389:
1390: /* Define this if pushing a word on the stack
1391: makes the stack pointer a smaller address. */
1392: #define STACK_GROWS_DOWNWARD
1393:
1394: /* Define this if the nominal address of the stack frame
1395: is at the high-address end of the local variables;
1396: that is, each additional local variable allocated
1397: goes at a more negative offset in the frame. */
1398: #define FRAME_GROWS_DOWNWARD
1399:
1400: /* Offset within stack frame to start allocating local variables at.
1401: If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
1402: first local allocated. Otherwise, it is the offset to the BEGINNING
1403: of the first local allocated. */
1404: #define STARTING_FRAME_OFFSET (-8)
1405:
1406: /* Structure to be filled in by compute_frame_size with register
1407: save masks, and offsets for the current function. */
1408:
1409: struct mips_frame_info
1410: {
1411: unsigned long total_size; /* # bytes that the entire frame takes up */
1412: unsigned long var_size; /* # bytes that variables take up */
1413: unsigned long args_size; /* # bytes that outgoing arguments take up */
1414: unsigned long extra_size; /* # bytes of extra gunk */
1415: unsigned int gp_reg_size; /* # bytes needed to store gp regs */
1416: unsigned int fp_reg_size; /* # bytes needed to store fp regs */
1417: unsigned long mask; /* mask of saved gp registers */
1418: unsigned long fmask; /* mask of saved fp registers */
1419: long gp_save_offset; /* offset from vfp to store gp registers */
1420: long fp_save_offset; /* offset from vfp to store fp registers */
1421: unsigned long gp_sp_offset; /* offset from new sp to store gp registers */
1422: unsigned long fp_sp_offset; /* offset from new sp to store fp registers */
1423: int initialized; /* != 0 if frame size already calculated */
1424: };
1425:
1426: extern struct mips_frame_info current_frame_info;
1427:
1428: /* Store in the variable DEPTH the initial difference between the
1429: frame pointer reg contents and the stack pointer reg contents,
1430: as of the start of the function body. This depends on the layout
1431: of the fixed parts of the stack frame and on how registers are saved. */
1432:
1433: #define INITIAL_FRAME_POINTER_OFFSET(VAR) \
1434: ((VAR) = compute_frame_size (get_frame_size ()))
1435:
1436: /* If we generate an insn to push BYTES bytes,
1437: this says how many the stack pointer really advances by.
1438: On the vax, sp@- in a byte insn really pushes a word. */
1439:
1440: /* #define PUSH_ROUNDING(BYTES) 0 */
1441:
1442: /* If defined, the maximum amount of space required for outgoing
1443: arguments will be computed and placed into the variable
1444: `current_function_outgoing_args_size'. No space will be pushed
1445: onto the stack for each call; instead, the function prologue
1446: should increase the stack frame size by this amount.
1447:
1448: It is not proper to define both `PUSH_ROUNDING' and
1449: `ACCUMULATE_OUTGOING_ARGS'. */
1450: #define ACCUMULATE_OUTGOING_ARGS
1451:
1452: /* Offset of first parameter from the argument pointer register value. */
1453: #define FIRST_PARM_OFFSET(FNDECL) 0
1454:
1455: /* Offset from top-of-stack address to location to store the
1456: function parameter if it can't go in a register.
1457: Addresses for following parameters are computed relative to this one.
1458:
1459: It also has the effect of counting register arguments in the total
1460: argument size. */
1461: #define FIRST_PARM_CALLER_OFFSET(FNDECL) 0
1462:
1463: /* When a parameter is passed in a register, stack space is still
1464: allocated for it. For the MIPS, stack space must be allocated, cf
1465: Asm Lang Prog Guide page 7-8.
1466:
1467: BEWARE that some space is also allocated for non existing arguments
1468: in register. In case an argument list is of form GF used registers
1469: are a0 (a2,a3), but we should push over a1... */
1470:
1471: #define REG_PARM_STACK_SPACE(FNDECL) (4*4)
1472:
1473: /* Define this if it is the responsibility of the caller to
1474: allocate the area reserved for arguments passed in registers.
1475: If `ACCUMULATE_OUTGOING_ARGS' is also defined, the only effect
1476: of this macro is to determine whether the space is included in
1477: `current_function_outgoing_args_size'. */
1478: #define OUTGOING_REG_PARM_STACK_SPACE
1479:
1480: /* Align stack frames on 64 bits (Double Word ). */
1481: #define STACK_BOUNDARY 64
1482:
1483: /* Make sure 16 bytes are always allocated on the stack. */
1484:
1485: #ifndef STACK_ARGS_ADJUST
1486: #define STACK_ARGS_ADJUST(SIZE) \
1487: { \
1488: if (SIZE.constant < 16) \
1489: SIZE.constant = 16; \
1490: }
1491: #endif
1492:
1493:
1494: /* A C expression that should indicate the number of bytes of its
1495: own arguments that a function function pops on returning, or 0
1496: if the function pops no arguments and the caller must therefore
1497: pop them all after the function returns.
1498:
1499: FUNTYPE is a C variable whose value is a tree node that
1500: describes the function in question. Normally it is a node of
1501: type `FUNCTION_TYPE' that describes the data type of the function.
1502: From this it is possible to obtain the data types of the value
1503: and arguments (if known).
1504:
1505: When a call to a library function is being considered, FUNTYPE
1506: will contain an identifier node for the library function. Thus,
1507: if you need to distinguish among various library functions, you
1508: can do so by their names. Note that "library function" in this
1509: context means a function used to perform arithmetic, whose name
1510: is known specially in the compiler and was not mentioned in the
1511: C code being compiled.
1512:
1513: STACK-SIZE is the number of bytes of arguments passed on the
1514: stack. If a variable number of bytes is passed, it is zero, and
1515: argument popping will always be the responsibility of the
1516: calling function. */
1517:
1518: #define RETURN_POPS_ARGS(FUNTYPE, SIZE) 0
1519:
1520:
1521: /* Symbolic macros for the registers used to return integer and floating
1522: point values. */
1523:
1524: #define GP_RETURN (GP_REG_FIRST + 2)
1525: #define FP_RETURN ((TARGET_SOFT_FLOAT) ? GP_RETURN : (FP_REG_FIRST + 0))
1526:
1527: /* Symbolic macros for the first/last argument registers. */
1528:
1529: #define GP_ARG_FIRST (GP_REG_FIRST + 4)
1530: #define GP_ARG_LAST (GP_REG_FIRST + 7)
1531: #define FP_ARG_FIRST (FP_REG_FIRST + 12)
1532: #define FP_ARG_LAST (FP_REG_FIRST + 15)
1533:
1534: #define MAX_ARGS_IN_REGISTERS 4
1535:
1536: /* Define how to find the value returned by a library function
1537: assuming the value has mode MODE. */
1538:
1539: #define LIBCALL_VALUE(MODE) \
1540: gen_rtx (REG, MODE, \
1541: (GET_MODE_CLASS (MODE) == MODE_FLOAT) \
1542: ? FP_RETURN \
1543: : GP_RETURN)
1544:
1545: /* Define how to find the value returned by a function.
1546: VALTYPE is the data type of the value (as a tree).
1547: If the precise function being called is known, FUNC is its FUNCTION_DECL;
1548: otherwise, FUNC is 0. */
1549:
1550: #define FUNCTION_VALUE(VALTYPE, FUNC) LIBCALL_VALUE (TYPE_MODE (VALTYPE))
1551:
1552:
1553: /* 1 if N is a possible register number for a function value.
1554: On the MIPS, R2 R3 and F0 F2 are the only register thus used.
1555: Currently, R2 and F0 are only implemented here (C has no complex type) */
1556:
1557: #define FUNCTION_VALUE_REGNO_P(N) ((N) == GP_RETURN || (N) == FP_RETURN)
1558:
1559: /* 1 if N is a possible register number for function argument passing. */
1560:
1561: #define FUNCTION_ARG_REGNO_P(N) (((N) >= GP_ARG_FIRST && (N) <= GP_ARG_LAST) \
1562: || ((N) >= FP_ARG_FIRST && (N) <= FP_ARG_LAST \
1563: && (0 == (N) % 2)))
1564:
1565: /* A C expression which can inhibit the returning of certain function
1566: values in registers, based on the type of value. A nonzero value says
1567: to return the function value in memory, just as large structures are
1568: always returned. Here TYPE will be a C expression of type
1569: `tree', representing the data type of the value.
1570:
1571: Note that values of mode `BLKmode' are returned in memory
1572: regardless of this macro. Also, the option `-fpcc-struct-return'
1573: takes effect regardless of this macro. On most systems, it is
1574: possible to leave the macro undefined; this causes a default
1575: definition to be used, whose value is the constant 0.
1576:
1577: GCC normally converts 1 byte structures into chars, 2 byte
1578: structs into shorts, and 4 byte structs into ints, and returns
1579: them this way. Defining the following macro overrides this,
1580: to give us MIPS cc compatibility. */
1581:
1582: #define RETURN_IN_MEMORY(TYPE) \
1583: ((TREE_CODE (TYPE) == RECORD_TYPE) || (TREE_CODE (TYPE) == UNION_TYPE))
1584:
1585:
1586: /* A code distinguishing the floating point format of the target
1587: machine. There are three defined values: IEEE_FLOAT_FORMAT,
1588: VAX_FLOAT_FORMAT, and UNKNOWN_FLOAT_FORMAT. */
1589:
1590: #define TARGET_FLOAT_FORMAT IEEE_FLOAT_FORMAT
1591:
1592:
1593: /* Define a data type for recording info about an argument list
1594: during the scan of that argument list. This data type should
1595: hold all necessary information about the function itself
1596: and about the args processed so far, enough to enable macros
1597: such as FUNCTION_ARG to determine where the next arg should go.
1598: */
1599:
1600: typedef struct mips_args {
1601: int gp_reg_found;
1602: int arg_number;
1603: int arg_words;
1604: } CUMULATIVE_ARGS;
1605:
1606: /* Initialize a variable CUM of type CUMULATIVE_ARGS
1607: for a call to a function whose data type is FNTYPE.
1608: For a library call, FNTYPE is 0.
1609:
1610: */
1611:
1612: #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME) \
1613: init_cumulative_args (&CUM, FNTYPE, LIBNAME) \
1614:
1615: /* Update the data in CUM to advance over an argument
1616: of mode MODE and data type TYPE.
1617: (TYPE is null for libcalls where that information may not be available.) */
1618:
1619: #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
1620: function_arg_advance (&CUM, MODE, TYPE, NAMED)
1621:
1622: /* Determine where to put an argument to a function.
1623: Value is zero to push the argument on the stack,
1624: or a hard register in which to store the argument.
1625:
1626: MODE is the argument's machine mode.
1627: TYPE is the data type of the argument (as a tree).
1628: This is null for libcalls where that information may
1629: not be available.
1630: CUM is a variable of type CUMULATIVE_ARGS which gives info about
1631: the preceding args and about the function being called.
1632: NAMED is nonzero if this argument is a named parameter
1633: (otherwise it is an extra parameter matching an ellipsis). */
1634:
1635: #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
1636: function_arg( &CUM, MODE, TYPE, NAMED)
1637:
1638: /* For an arg passed partly in registers and partly in memory,
1639: this is the number of registers used.
1640: For args passed entirely in registers or entirely in memory, zero. */
1641:
1642: #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) \
1643: function_arg_partial_nregs (&CUM, MODE, TYPE, NAMED)
1644:
1645: /* If defined, a C expression that gives the alignment boundary, in
1646: bits, of an argument with the specified mode and type. If it is
1647: not defined, `PARM_BOUNDARY' is used for all arguments. */
1648:
1649: #define FUNCTION_ARG_BOUNDARY(MODE, TYPE) \
1650: (((TYPE) != 0) \
1651: ? ((TYPE_ALIGN(TYPE) <= PARM_BOUNDARY) \
1652: ? PARM_BOUNDARY \
1653: : TYPE_ALIGN(TYPE)) \
1654: : ((GET_MODE_ALIGNMENT(MODE) <= PARM_BOUNDARY) \
1655: ? PARM_BOUNDARY \
1656: : GET_MODE_ALIGNMENT(MODE)))
1657:
1658:
1659: /* This macro generates the assembly code for function entry.
1660: FILE is a stdio stream to output the code to.
1661: SIZE is an int: how many units of temporary storage to allocate.
1662: Refer to the array `regs_ever_live' to determine which registers
1663: to save; `regs_ever_live[I]' is nonzero if register number I
1664: is ever used in the function. This macro is responsible for
1665: knowing which registers should not be saved even if used. */
1666:
1667: #define FUNCTION_PROLOGUE(FILE, SIZE) function_prologue(FILE, SIZE)
1668:
1669: /* This macro generates the assembly code for function exit,
1670: on machines that need it. If FUNCTION_EPILOGUE is not defined
1671: then individual return instructions are generated for each
1672: return statement. Args are same as for FUNCTION_PROLOGUE. */
1673:
1674: #define FUNCTION_EPILOGUE(FILE, SIZE) function_epilogue(FILE, SIZE)
1675:
1676: /* Define the number of delay slots needed for the function epilogue.
1677:
1678: On the mips, we need a slot if either no stack has been allocated,
1679: or the only register saved is the return register. */
1680:
1681: #define DELAY_SLOTS_FOR_EPILOGUE mips_epilogue_delay_slots ()
1682:
1683: /* Define whether INSN can be placed in delay slot N for the epilogue.
1684: No references to the stack must be made, since on the MIPS, the
1685: delay slot is done after the stack has been cleaned up. */
1686:
1687: #define ELIGIBLE_FOR_EPILOGUE_DELAY(INSN,N) \
1688: (get_attr_dslot (INSN) == DSLOT_NO \
1689: && get_attr_length (INSN) == 1 \
1690: && ! reg_mentioned_p (stack_pointer_rtx, PATTERN (INSN)) \
1691: && ! reg_mentioned_p (frame_pointer_rtx, PATTERN (INSN)))
1692:
1693: /* Tell prologue and epilogue if register REGNO should be saved / restored. */
1694:
1695: #define MUST_SAVE_REGISTER(regno) \
1696: ((regs_ever_live[regno] && !call_used_regs[regno]) \
1697: || (regno == FRAME_POINTER_REGNUM && frame_pointer_needed) \
1698: || (regno == 31 && regs_ever_live[31]))
1699:
1700: /* ALIGN FRAMES on double word boundaries */
1701:
1702: #define MIPS_STACK_ALIGN(LOC) (((LOC)+7) & 0xfffffff8)
1703:
1704:
1705: /* Output assembler code to FILE to increment profiler label # LABELNO
1706: for profiling a function entry. */
1707:
1708: #define FUNCTION_PROFILER(FILE, LABELNO) \
1709: { \
1710: fprintf (FILE, "\t.set\tnoreorder\n"); \
1711: fprintf (FILE, "\t.set\tnoat\n"); \
1712: fprintf (FILE, "\tmove\t%s,%s\t\t# save current return address\n", \
1713: reg_names[GP_REG_FIRST + 1], reg_names[GP_REG_FIRST + 31]); \
1714: fprintf (FILE, "\tjal\t_mcount\n"); \
1715: fprintf (FILE, "\tsubu\t%s,%s,8\t\t# _mcount pops 2 words from stack\n", \
1716: reg_names[STACK_POINTER_REGNUM], \
1717: reg_names[STACK_POINTER_REGNUM]); \
1718: fprintf (FILE, "\t.set\treorder\n"); \
1719: fprintf (FILE, "\t.set\tat\n"); \
1720: }
1721:
1722: /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
1723: the stack pointer does not matter. The value is tested only in
1724: functions that have frame pointers.
1725: No definition is equivalent to always zero. */
1726:
1727: #define EXIT_IGNORE_STACK 1
1728:
1729:
1730: /* A C statement to output, on the stream FILE, assembler code for a
1731: block of data that contains the constant parts of a trampoline.
1732: This code should not include a label--the label is taken care of
1733: automatically. */
1734:
1735: #define TRAMPOLINE_TEMPLATE(STREAM) \
1736: { \
1737: fprintf (STREAM, "\t.word\t0x03e00821\t\t# move $1,$31\n"); \
1738: fprintf (STREAM, "\t.word\t0x04110001\t\t# bgezal $0,.+8\n"); \
1739: fprintf (STREAM, "\t.word\t0x00000000\t\t# nop\n"); \
1740: fprintf (STREAM, "\t.word\t0x8fe30010\t\t# lw $3,16($31)\n"); \
1741: fprintf (STREAM, "\t.word\t0x8fe20014\t\t# lw $2,20($31)\n"); \
1742: fprintf (STREAM, "\t.word\t0x00600008\t\t# jr $3\n"); \
1743: fprintf (STREAM, "\t.word\t0x0020f821\t\t# move $31,$1\n"); \
1744: fprintf (STREAM, "\t.word\t0x00000000\t\t# <function address>\n"); \
1745: fprintf (STREAM, "\t.word\t0x00000000\t\t# <static chain value>\n"); \
1746: }
1747:
1748: /* A C expression for the size in bytes of the trampoline, as an
1749: integer. */
1750:
1751: #define TRAMPOLINE_SIZE (9*4)
1752:
1753: /* Alignment required for trampolines, in bits.
1754:
1755: If you don't define this macro, the value of `BIGGEST_ALIGNMENT'
1756: is used for aligning trampolines. */
1757:
1758: /* #define TRAMPOLINE_ALIGNMENT 32 */
1759:
1760: /* A C statement to initialize the variable parts of a trampoline.
1761: ADDR is an RTX for the address of the trampoline; FNADDR is an
1762: RTX for the address of the nested function; STATIC_CHAIN is an
1763: RTX for the static chain value that should be passed to the
1764: function when it is called. */
1765:
1766: #define INITIALIZE_TRAMPOLINE(ADDR, FUNC, CHAIN) \
1767: { \
1768: rtx addr = ADDR; \
1769: emit_move_insn (gen_rtx (MEM, SImode, plus_constant (addr, 28)), FUNC); \
1770: emit_move_insn (gen_rtx (MEM, SImode, plus_constant (addr, 32)), CHAIN); \
1771: \
1772: /* Attempt to make stack executable */ \
1773: emit_library_call (gen_rtx (SYMBOL_REF, Pmode, "__enable_execute_stack"), \
1774: 0, VOIDmode, 1, addr, Pmode); \
1775: }
1776:
1777:
1778: /* Attempt to turn on access permissions for the stack. */
1779:
1780: #define TRANSFER_FROM_TRAMPOLINE \
1781: \
1782: void \
1783: __enable_execute_stack (addr) \
1784: char *addr; \
1785: { \
1786: int size = getpagesize (); \
1787: int mask = ~(size-1); \
1788: char *page = (char *) (((int) addr) & mask); \
1789: char *end = (char *) ((((int) (addr + TRAMPOLINE_SIZE)) & mask) + size); \
1790: \
1791: /* 7 is PROT_READ | PROT_WRITE | PROT_EXEC */ \
1792: if (mprotect (page, end - page, 7) < 0) \
1793: perror ("mprotect of trampoline code"); \
1794: \
1795: /* \
1796: if (cacheflush (addr, TRAMPOLINE_SIZE, 1) < 0) \
1797: perror ("cacheflush of trampoline code"); \
1798: */ \
1799: }
1800:
1801:
1802: /* Addressing modes, and classification of registers for them. */
1803:
1804: /* #define HAVE_POST_INCREMENT */
1805: /* #define HAVE_POST_DECREMENT */
1806:
1807: /* #define HAVE_PRE_DECREMENT */
1808: /* #define HAVE_PRE_INCREMENT */
1809:
1810: /* These assume that REGNO is a hard or pseudo reg number.
1811: They give nonzero only if REGNO is a hard reg of the suitable class
1812: or a pseudo reg currently allocated to a suitable hard reg.
1813: These definitions are NOT overridden anywhere. */
1814:
1815: #define GP_REG_OR_PSEUDO_STRICT_P(regno) \
1816: GP_REG_P((regno < FIRST_PSEUDO_REGISTER) ? regno : reg_renumber[regno])
1817:
1818: #define GP_REG_OR_PSEUDO_NONSTRICT_P(regno) \
1819: (((regno) >= FIRST_PSEUDO_REGISTER) || (GP_REG_P (regno)))
1820:
1821: #define REGNO_OK_FOR_INDEX_P(regno) GP_REG_OR_PSEUDO_STRICT_P (regno)
1822: #define REGNO_OK_FOR_BASE_P(regno) GP_REG_OR_PSEUDO_STRICT_P (regno)
1823:
1824: /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
1825: and check its validity for a certain class.
1826: We have two alternate definitions for each of them.
1827: The usual definition accepts all pseudo regs; the other rejects them all.
1828: The symbol REG_OK_STRICT causes the latter definition to be used.
1829:
1830: Most source files want to accept pseudo regs in the hope that
1831: they will get allocated to the class that the insn wants them to be in.
1832: Some source files that are used after register allocation
1833: need to be strict. */
1834:
1835: #ifndef REG_OK_STRICT
1836:
1837: #define REG_OK_STRICT_P 0
1838: #define REG_OK_FOR_INDEX_P(X) GP_REG_OR_PSEUDO_NONSTRICT_P (REGNO (X))
1839: #define REG_OK_FOR_BASE_P(X) GP_REG_OR_PSEUDO_NONSTRICT_P (REGNO (X))
1840:
1841: #else
1842:
1843: #define REG_OK_STRICT_P 1
1844: #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
1845: #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
1846:
1847: #endif
1848:
1849:
1850: /* Maximum number of registers that can appear in a valid memory address. */
1851:
1852: #define MAX_REGS_PER_ADDRESS 1
1853:
1854: /* A C compound statement with a conditional `goto LABEL;' executed
1855: if X (an RTX) is a legitimate memory address on the target
1856: machine for a memory operand of mode MODE.
1857:
1858: It usually pays to define several simpler macros to serve as
1859: subroutines for this one. Otherwise it may be too complicated
1860: to understand.
1861:
1862: This macro must exist in two variants: a strict variant and a
1863: non-strict one. The strict variant is used in the reload pass.
1864: It must be defined so that any pseudo-register that has not been
1865: allocated a hard register is considered a memory reference. In
1866: contexts where some kind of register is required, a
1867: pseudo-register with no hard register must be rejected.
1868:
1869: The non-strict variant is used in other passes. It must be
1870: defined to accept all pseudo-registers in every context where
1871: some kind of register is required.
1872:
1873: Compiler source files that want to use the strict variant of
1874: this macro define the macro `REG_OK_STRICT'. You should use an
1875: `#ifdef REG_OK_STRICT' conditional to define the strict variant
1876: in that case and the non-strict variant otherwise.
1877:
1878: Typically among the subroutines used to define
1879: `GO_IF_LEGITIMATE_ADDRESS' are subroutines to check for
1880: acceptable registers for various purposes (one for base
1881: registers, one for index registers, and so on). Then only these
1882: subroutine macros need have two variants; the higher levels of
1883: macros may be the same whether strict or not.
1884:
1885: Normally, constant addresses which are the sum of a `symbol_ref'
1886: and an integer are stored inside a `const' RTX to mark them as
1887: constant. Therefore, there is no need to recognize such sums
1888: specifically as legitimate addresses. Normally you would simply
1889: recognize any `const' as legitimate.
1890:
1891: Usually `PRINT_OPERAND_ADDRESS' is not prepared to handle
1892: constant sums that are not marked with `const'. It assumes
1893: that a naked `plus' indicates indexing. If so, then you *must*
1894: reject such naked constant sums as illegitimate addresses, so
1895: that none of them will be given to `PRINT_OPERAND_ADDRESS'.
1896:
1897: On some machines, whether a symbolic address is legitimate
1898: depends on the section that the address refers to. On these
1899: machines, define the macro `ENCODE_SECTION_INFO' to store the
1900: information into the `symbol_ref', and then check for it here.
1901: When you see a `const', you will have to look inside it to find
1902: the `symbol_ref' in order to determine the section. */
1903:
1904: #if 1
1905: #define GO_PRINTF(x) trace(x)
1906: #define GO_PRINTF2(x,y) trace(x,y)
1907: #define GO_DEBUG_RTX(x) debug_rtx(x)
1908:
1909: #else
1910: #define GO_PRINTF(x)
1911: #define GO_PRINTF2(x,y)
1912: #define GO_DEBUG_RTX(x)
1913: #endif
1914:
1915: #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
1916: { \
1917: register rtx xinsn = (X); \
1918: \
1919: if (TARGET_DEBUG_B_MODE) \
1920: { \
1921: GO_PRINTF2 ("\n========== GO_IF_LEGITIMATE_ADDRESS, %sstrict\n", \
1922: (REG_OK_STRICT_P) ? "" : "not "); \
1923: GO_DEBUG_RTX (xinsn); \
1924: } \
1925: \
1926: if (GET_CODE (xinsn) == REG && REG_OK_FOR_BASE_P (xinsn)) \
1927: goto ADDR; \
1928: \
1929: if (CONSTANT_ADDRESS_P (xinsn)) \
1930: goto ADDR; \
1931: \
1932: if (GET_CODE (xinsn) == PLUS) \
1933: { \
1934: register rtx xplus0 = XEXP (xinsn, 0); \
1935: register rtx xplus1 = XEXP (xinsn, 1); \
1936: register enum rtx_code code0 = GET_CODE (xplus0); \
1937: register enum rtx_code code1 = GET_CODE (xplus1); \
1938: \
1939: if (code0 != REG && code1 == REG) \
1940: { \
1941: xplus0 = XEXP (xinsn, 1); \
1942: xplus1 = XEXP (xinsn, 0); \
1943: code0 = GET_CODE (xplus0); \
1944: code1 = GET_CODE (xplus1); \
1945: } \
1946: \
1947: if (code0 == REG && REG_OK_FOR_BASE_P (xplus0)) \
1948: { \
1949: if (code1 == CONST_INT) \
1950: { \
1951: register unsigned adj_offset = INTVAL (xplus1) + 0x8000; \
1952: \
1953: if ((adj_offset <= 0xffff) \
1954: && (adj_offset + GET_MODE_SIZE (MODE) - 1 <= 0xffff)) \
1955: goto ADDR; \
1956: } \
1957: \
1958: /* For some code sequences, you actually get better code by \
1959: pretending that the MIPS supports an address mode of a \
1960: constant address + a register, even though the real \
1961: machine doesn't support it. This is because the \
1962: assembler can use $r1 to load just the high 16 bits, add \
1963: in the register, and fold the low 16 bits into the memory \
1.1.1.2 ! root 1964: reference, whereas the compiler generates a 4 instruction \
1.1 root 1965: sequence. On the other hand, CSE is not as effective. \
1966: It would be a win to generate the lui directly, but the \
1967: MIPS assembler does not have syntax to generate the \
1968: appropriate relocation. */ \
1969: \
1970: else if (!TARGET_DEBUG_A_MODE \
1971: && code0 == REG \
1972: && CONSTANT_ADDRESS_P (xplus1)) \
1973: goto ADDR; \
1974: } \
1975: } \
1976: \
1977: if (TARGET_DEBUG_B_MODE) \
1978: GO_PRINTF ("Not a legitimate address\n"); \
1979: }
1980:
1981:
1982: /* A C expression that is 1 if the RTX X is a constant which is a
1983: valid address. On most machines, this can be defined as
1984: `CONSTANT_P (X)', but a few machines are more restrictive in
1985: which constant addresses are supported.
1986:
1987: `CONSTANT_P' accepts integer-values expressions whose values are
1988: not explicitly known, such as `symbol_ref', `label_ref', and
1989: `high' expressions and `const' arithmetic expressions, in
1990: addition to `const_int' and `const_double' expressions. */
1991:
1992: #define CONSTANT_ADDRESS_P(X) \
1993: (CONSTANT_P (X) && (!HALF_PIC_P () || HALF_PIC_ADDRESS_P (X)))
1994:
1995:
1996: /* Nonzero if the constant value X is a legitimate general operand.
1997: It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE.
1998:
1999: At present, GAS doesn't understand li.[sd], so don't allow it
2000: to be generated at present. Also, the MIPS assembler does not
2001: grok li.d Infinity. */
2002:
2003: #define LEGITIMATE_CONSTANT_P(X) \
2004: (GET_CODE (X) != CONST_DOUBLE || mips_const_double_ok (X, GET_MODE (X)))
2005:
2006:
2007: /* A C compound statement that attempts to replace X with a valid
2008: memory address for an operand of mode MODE. WIN will be a C
2009: statement label elsewhere in the code; the macro definition may
2010: use
2011:
2012: GO_IF_LEGITIMATE_ADDRESS (MODE, X, WIN);
2013:
2014: to avoid further processing if the address has become legitimate.
2015:
2016: X will always be the result of a call to `break_out_memory_refs',
2017: and OLDX will be the operand that was given to that function to
2018: produce X.
2019:
2020: The code generated by this macro should not alter the
2021: substructure of X. If it transforms X into a more legitimate
2022: form, it should assign X (which will always be a C variable) a
2023: new value.
2024:
2025: It is not necessary for this macro to come up with a legitimate
2026: address. The compiler has standard ways of doing so in all
2027: cases. In fact, it is safe for this macro to do nothing. But
2028: often a machine-dependent strategy can generate better code. */
2029:
2030: #define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) {}
2031:
2032:
2033: /* A C statement or compound statement with a conditional `goto
2034: LABEL;' executed if memory address X (an RTX) can have different
2035: meanings depending on the machine mode of the memory reference it
2036: is used for.
2037:
2038: Autoincrement and autodecrement addresses typically have
2039: mode-dependent effects because the amount of the increment or
2040: decrement is the size of the operand being addressed. Some
2041: machines have other mode-dependent addresses. Many RISC machines
2042: have no mode-dependent addresses.
2043:
2044: You may assume that ADDR is a valid address for the machine. */
2045:
2046: #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) {}
2047:
2048:
2049: /* Define this macro if references to a symbol must be treated
2050: differently depending on something about the variable or
2051: function named by the symbol (such as what section it is in).
2052:
2053: The macro definition, if any, is executed immediately after the
2054: rtl for DECL has been created and stored in `DECL_RTL (DECL)'.
2055: The value of the rtl will be a `mem' whose address is a
2056: `symbol_ref'.
2057:
2058: The usual thing for this macro to do is to a flag in the
2059: `symbol_ref' (such as `SYMBOL_REF_FLAG') or to store a modified
2060: name string in the `symbol_ref' (if one bit is not enough
2061: information).
2062:
2063: The best way to modify the name string is by adding text to the
2064: beginning, with suitable punctuation to prevent any ambiguity.
2065: Allocate the new name in `saveable_obstack'. You will have to
2066: modify `ASM_OUTPUT_LABELREF' to remove and decode the added text
2067: and output the name accordingly.
2068:
2069: You can also check the information stored in the `symbol_ref' in
2070: the definition of `GO_IF_LEGITIMATE_ADDRESS' or
2071: `PRINT_OPERAND_ADDRESS'. */
2072:
2073: #define ENCODE_SECTION_INFO(DECL) \
2074: do \
2075: { \
2076: if (optimize && mips_section_threshold > 0 && TARGET_GP_OPT \
2077: && TREE_CODE (DECL) == VAR_DECL) \
2078: { \
2079: int size = int_size_in_bytes (TREE_TYPE (DECL)); \
2080: \
2081: if (size > 0 && size <= mips_section_threshold) \
2082: SYMBOL_REF_FLAG (XEXP (DECL_RTL (DECL), 0)) = 1; \
2083: } \
2084: \
2085: else if (HALF_PIC_P ()) \
2086: HALF_PIC_ENCODE (DECL); \
2087: } \
2088: while (0)
2089:
2090:
2091: /* Specify the machine mode that this machine uses
2092: for the index in the tablejump instruction. */
2093: #define CASE_VECTOR_MODE SImode
2094:
2095: /* Define this if the tablejump instruction expects the table
2096: to contain offsets from the address of the table.
2097: Do not define this if the table should contain absolute addresses. */
2098: /* #define CASE_VECTOR_PC_RELATIVE */
2099:
2100: /* Specify the tree operation to be used to convert reals to integers. */
2101: #define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR
2102:
2103: /* This is the kind of divide that is easiest to do in the general case. */
2104: #define EASY_DIV_EXPR TRUNC_DIV_EXPR
2105:
2106: /* Define this as 1 if `char' should by default be signed; else as 0. */
2107: #define DEFAULT_SIGNED_CHAR 1
2108:
2109: /* Max number of bytes we can move from memory to memory
2110: in one reasonably fast instruction. */
2111: #define MOVE_MAX 4
2112:
2113: /* Define this macro as a C expression which is nonzero if
2114: accessing less than a word of memory (i.e. a `char' or a
2115: `short') is no faster than accessing a word of memory, i.e., if
2116: such access require more than one instruction or if there is no
2117: difference in cost between byte and (aligned) word loads.
2118:
2119: On RISC machines, it tends to generate better code to define
2120: this as 1, since it avoids making a QI or HI mode register. */
2121: #define SLOW_BYTE_ACCESS 1
2122:
2123: /* We assume that the store-condition-codes instructions store 0 for false
2124: and some other value for true. This is the value stored for true. */
2125:
2126: #define STORE_FLAG_VALUE 1
2127:
2128: /* Define this if zero-extension is slow (more than one real instruction). */
2129: #define SLOW_ZERO_EXTEND
2130:
2131: /* Define if shifts truncate the shift count
2132: which implies one can omit a sign-extension or zero-extension
2133: of a shift count.
2134:
2135: Only 5 bits are used in SLLV and SRLV */
2136:
2137: #define SHIFT_COUNT_TRUNCATED
2138:
2139: /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
2140: is done just by pretending it is already truncated. */
2141: #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
2142:
1.1.1.2 ! root 2143: /* Define this macro to control use of the character `$' in
! 2144: identifier names. The value should be 0, 1, or 2. 0 means `$'
! 2145: is not allowed by default; 1 means it is allowed by default if
! 2146: `-traditional' is used; 2 means it is allowed by default provided
! 2147: `-ansi' is not used. 1 is the default; there is no need to
! 2148: define this macro in that case. */
! 2149:
! 2150: #ifndef DOLLARS_IN_IDENTIFIERS
1.1 root 2151: #define DOLLARS_IN_IDENTIFIERS 1
1.1.1.2 ! root 2152: #endif
1.1 root 2153:
2154: /* Specify the machine mode that pointers have.
2155: After generation of rtl, the compiler makes no further distinction
2156: between pointers and any other objects of this machine mode. */
2157: #define Pmode SImode
2158:
2159: /* A function address in a call instruction
2160: is a word address (for indexing purposes)
2161: so give the MEM rtx a words's mode. */
2162:
2163: #define FUNCTION_MODE SImode
2164:
2165: /* Define TARGET_MEM_FUNCTIONS if we want to use calls to memcpy and
2166: memset, instead of the BSD functions bcopy and bzero. */
2167:
2168: #if defined(MIPS_SYSV) || defined(OSF_OS)
2169: #define TARGET_MEM_FUNCTIONS
2170: #endif
2171:
2172:
2173: /* A part of a C `switch' statement that describes the relative
2174: costs of constant RTL expressions. It must contain `case'
2175: labels for expression codes `const_int', `const', `symbol_ref',
2176: `label_ref' and `const_double'. Each case must ultimately reach
2177: a `return' statement to return the relative cost of the use of
2178: that kind of constant value in an expression. The cost may
2179: depend on the precise value of the constant, which is available
2180: for examination in X.
2181:
2182: CODE is the expression code--redundant, since it can be obtained
2183: with `GET_CODE (X)'. */
2184:
2185: #define CONST_COSTS(X,CODE) \
2186: case CONST_INT: \
2187: /* Always return 0, since we don't have different sized \
2188: instructions, hence different costs according to Richard \
2189: Kenner */ \
2190: return COSTS_N_INSNS (0); \
2191: \
2192: case LABEL_REF: \
2193: return COSTS_N_INSNS (2); \
2194: \
2195: case CONST: \
2196: { \
2197: extern rtx eliminate_constant_term (); \
1.1.1.2 ! root 2198: rtx offset = const0_rtx; \
1.1 root 2199: rtx symref = eliminate_constant_term (X, &offset); \
2200: \
2201: if (GET_CODE (symref) == LABEL_REF) \
2202: return COSTS_N_INSNS (2); \
2203: \
2204: if (GET_CODE (symref) != SYMBOL_REF) \
2205: return COSTS_N_INSNS (4); \
2206: \
2207: /* let's be paranoid.... */ \
1.1.1.2 ! root 2208: if (INTVAL (offset) < -32768 || INTVAL (offset) > 32767) \
1.1 root 2209: return COSTS_N_INSNS (2); \
2210: \
2211: return COSTS_N_INSNS (SYMBOL_REF_FLAG (symref) ? 1 : 2); \
2212: } \
2213: \
2214: case SYMBOL_REF: \
2215: return COSTS_N_INSNS (SYMBOL_REF_FLAG (X) ? 1 : 2); \
2216: \
2217: case CONST_DOUBLE: \
2218: return COSTS_N_INSNS ((CONST_DOUBLE_HIGH (X) == 0 \
2219: && CONST_DOUBLE_LOW (X)) ? 2 : 4);
2220:
2221:
2222: /* Like `CONST_COSTS' but applies to nonconstant RTL expressions.
2223: This can be used, for example, to indicate how costly a multiply
2224: instruction is. In writing this macro, you can use the construct
2225: `COSTS_N_INSNS (N)' to specify a cost equal to N fast instructions.
2226:
2227: This macro is optional; do not define it if the default cost
2228: assumptions are adequate for the target machine.
2229:
2230: If -mdebugd is used, change the multiply cost to 2, so multiply by
2231: a constant isn't converted to a series of shifts. This helps
2232: strength reduction, and also makes it easier to identify what the
2233: compiler is doing. */
2234:
2235: #define RTX_COSTS(X,CODE) \
2236: case MEM: \
2237: { \
2238: int num_words = (GET_MODE_SIZE (GET_MODE (X)) > UNITS_PER_WORD) ? 2 : 1; \
2239: if (simple_memory_operand (X, GET_MODE (X))) \
2240: return COSTS_N_INSNS (num_words); \
2241: \
2242: return COSTS_N_INSNS (2*num_words); \
2243: } \
2244: \
2245: case FFS: \
2246: return COSTS_N_INSNS (6); \
2247: \
2248: case NOT: \
2249: return COSTS_N_INSNS ((GET_MODE (X) == DImode) ? 2 : 1); \
2250: \
2251: case AND: \
2252: case IOR: \
2253: case XOR: \
2254: if (GET_MODE (X) == DImode) \
2255: return COSTS_N_INSNS (2); \
2256: \
2257: if (GET_CODE (XEXP (X, 1)) == CONST_INT) \
2258: { \
2259: rtx number = XEXP (X, 1); \
2260: if (SMALL_INT_UNSIGNED (number)) \
2261: return COSTS_N_INSNS (1); \
2262: \
2263: else if (SMALL_INT (number)) \
2264: return COSTS_N_INSNS (2); \
2265: \
2266: return COSTS_N_INSNS (3); \
2267: } \
2268: \
2269: return COSTS_N_INSNS (1); \
2270: \
2271: case ASHIFT: \
2272: case ASHIFTRT: \
2273: case LSHIFT: \
2274: case LSHIFTRT: \
2275: if (GET_MODE (X) == DImode) \
2276: return COSTS_N_INSNS ((GET_CODE (XEXP (X, 1)) == CONST_INT) ? 12 : 4); \
2277: \
2278: return COSTS_N_INSNS (1); \
2279: \
2280: case ABS: \
2281: { \
2282: enum machine_mode xmode = GET_MODE (X); \
2283: if (xmode == SFmode || xmode == DFmode) \
2284: return COSTS_N_INSNS (1); \
2285: \
2286: return COSTS_N_INSNS (4); \
2287: } \
2288: \
2289: case PLUS: \
2290: case MINUS: \
2291: { \
2292: enum machine_mode xmode = GET_MODE (X); \
2293: if (xmode == SFmode || xmode == DFmode) \
2294: return COSTS_N_INSNS (2); \
2295: \
2296: if (xmode == DImode) \
2297: return COSTS_N_INSNS (4); \
2298: \
2299: return COSTS_N_INSNS (1); \
2300: } \
2301: \
2302: case NEG: \
2303: return COSTS_N_INSNS ((GET_MODE (X) == DImode) ? 4 : 1); \
2304: \
2305: case MULT: \
2306: { \
2307: enum machine_mode xmode = GET_MODE (X); \
2308: if (xmode == SFmode) \
2309: return COSTS_N_INSNS (4); \
2310: \
2311: if (xmode == DFmode) \
2312: return COSTS_N_INSNS (5); \
2313: \
2314: return COSTS_N_INSNS ((TARGET_DEBUG_D_MODE) ? 2 : 12); \
2315: } \
2316: \
2317: case DIV: \
2318: case MOD: \
2319: { \
2320: enum machine_mode xmode = GET_MODE (X); \
2321: if (xmode == SFmode) \
2322: return COSTS_N_INSNS (12); \
2323: \
2324: if (xmode == DFmode) \
2325: return COSTS_N_INSNS (19); \
2326: } \
2327: /* fall through */ \
2328: \
2329: case UDIV: \
2330: case UMOD: \
2331: return COSTS_N_INSNS (35);
2332:
2333: /* An expression giving the cost of an addressing mode that
2334: contains ADDRESS. If not defined, the cost is computed from the
2335: form of the ADDRESS expression and the `CONST_COSTS' values.
2336:
2337: For most CISC machines, the default cost is a good approximation
2338: of the true cost of the addressing mode. However, on RISC
2339: machines, all instructions normally have the same length and
2340: execution time. Hence all addresses will have equal costs.
2341:
2342: In cases where more than one form of an address is known, the
2343: form with the lowest cost will be used. If multiple forms have
2344: the same, lowest, cost, the one that is the most complex will be
2345: used.
2346:
2347: For example, suppose an address that is equal to the sum of a
2348: register and a constant is used twice in the same basic block.
2349: When this macro is not defined, the address will be computed in
2350: a register and memory references will be indirect through that
2351: register. On machines where the cost of the addressing mode
2352: containing the sum is no higher than that of a simple indirect
2353: reference, this will produce an additional instruction and
2354: possibly require an additional register. Proper specification
2355: of this macro eliminates this overhead for such machines.
2356:
2357: Similar use of this macro is made in strength reduction of loops.
2358:
2359: ADDRESS need not be valid as an address. In such a case, the
2360: cost is not relevant and can be any value; invalid addresses
2361: need not be assigned a different cost.
2362:
2363: On machines where an address involving more than one register is
2364: as cheap as an address computation involving only one register,
2365: defining `ADDRESS_COST' to reflect this can cause two registers
2366: to be live over a region of code where only one would have been
2367: if `ADDRESS_COST' were not defined in that manner. This effect
2368: should be considered in the definition of this macro.
2369: Equivalent costs should probably only be given to addresses with
2370: different numbers of registers on machines with lots of registers.
2371:
2372: This macro will normally either not be defined or be defined as
2373: a constant. */
2374:
2375: #define ADDRESS_COST(ADDR) (REG_P (ADDR) ? 1 : mips_address_cost (ADDR))
2376:
2377: /* A C expression for the cost of moving data from a register in
2378: class FROM to one in class TO. The classes are expressed using
2379: the enumeration values such as `GENERAL_REGS'. A value of 2 is
2380: the default; other values are interpreted relative to that.
2381:
2382: It is not required that the cost always equal 2 when FROM is the
2383: same as TO; on some machines it is expensive to move between
2384: registers if they are not general registers.
2385:
2386: If reload sees an insn consisting of a single `set' between two
2387: hard registers, and if `REGISTER_MOVE_COST' applied to their
2388: classes returns a value of 2, reload does not check to ensure
2389: that the constraints of the insn are met. Setting a cost of
2390: other than 2 will allow reload to verify that the constraints are
2391: met. You should do this if the `movM' pattern's constraints do
2392: not allow such copying. */
2393:
2394: #define REGISTER_MOVE_COST(FROM, TO) 4 /* force reload to use constraints */
2395:
2396: /* A C expression for the cost of a branch instruction. A value of
2397: 1 is the default; other values are interpreted relative to that. */
2398:
2399: #define BRANCH_COST \
2400: ((mips_cpu == PROCESSOR_R4000 || mips_cpu == PROCESSOR_R6000) ? 2 : 1)
2401:
2402:
2403: /* Used in by the peephole code. */
2404: #define classify_op(op,mode) (mips_rtx_classify[ (int)GET_CODE (op) ])
2405: #define additive_op(op,mode) ((classify_op (op,mode) & CLASS_ADD_OP) != 0)
2406: #define divmod_op(op,mode) ((classify_op (op,mode) & CLASS_DIVMOD_OP) != 0)
2407: #define unsigned_op(op,mode) ((classify_op (op,mode) & CLASS_UNSIGNED_OP) != 0)
2408:
2409: #define CLASS_ADD_OP 0x01 /* operator is PLUS/MINUS */
2410: #define CLASS_DIVMOD_OP 0x02 /* operator is {,U}{DIV,MOD} */
2411: #define CLASS_UNSIGNED_OP 0x04 /* operator is U{DIV,MOD} */
2412: #define CLASS_CMP_OP 0x08 /* operator is comparison */
2413: #define CLASS_EQUALITY_OP 0x10 /* operator is == or != */
2414: #define CLASS_FCMP_OP 0x08 /* operator is fp. compare */
2415:
2416: #define CLASS_UNS_CMP_OP (CLASS_UNSIGNED_OP | CLASS_CMP_OP)
2417:
2418:
2419: /* Optionally define this if you have added predicates to
2420: `MACHINE.c'. This macro is called within an initializer of an
2421: array of structures. The first field in the structure is the
1.1.1.2 ! root 2422: name of a predicate and the second field is an array of rtl
1.1 root 2423: codes. For each predicate, list all rtl codes that can be in
2424: expressions matched by the predicate. The list should have a
2425: trailing comma. Here is an example of two entries in the list
2426: for a typical RISC machine:
2427:
2428: #define PREDICATE_CODES \
2429: {"gen_reg_rtx_operand", {SUBREG, REG}}, \
2430: {"reg_or_short_cint_operand", {SUBREG, REG, CONST_INT}},
2431:
2432: Defining this macro does not affect the generated code (however,
2433: incorrect definitions that omit an rtl code that may be matched
2434: by the predicate can cause the compiler to malfunction).
2435: Instead, it allows the table built by `genrecog' to be more
2436: compact and efficient, thus speeding up the compiler. The most
2437: important predicates to include in the list specified by this
2438: macro are thoses used in the most insn patterns. */
2439:
2440: #define PREDICATE_CODES \
2441: {"uns_arith_operand", { REG, CONST_INT, SUBREG }}, \
2442: {"arith_operand", { REG, CONST_INT, SUBREG }}, \
2443: {"arith32_operand", { REG, CONST_INT, SUBREG }}, \
2444: {"reg_or_0_operand", { REG, CONST_INT, SUBREG }}, \
2445: {"small_int", { CONST_INT }}, \
2446: {"large_int", { CONST_INT }}, \
2447: {"md_register_operand", { REG }}, \
2448: {"mips_const_double_ok", { CONST_DOUBLE }}, \
2449: {"simple_memory_operand", { MEM, SUBREG }}, \
2450: {"call_memory_operand", { MEM, SUBREG }}, \
2451: {"equality_op", { EQ, NE }}, \
2452: {"cmp_op", { EQ, NE, GT, GE, GTU, GEU, LT, LE, \
2453: LTU, LEU }}, \
2454: {"cmp2_op", { EQ, NE, GT, GE, GTU, GEU, LT, LE, \
2455: LTU, LEU }}, \
2456: {"fcmp_op", { EQ, NE, GT, GE, LT, LE }}, \
2457: {"uns_cmp_op", { GTU, GEU, LTU, LEU }},
2458:
2459:
2460: /* If defined, a C statement to be executed just prior to the
2461: output of assembler code for INSN, to modify the extracted
2462: operands so they will be output differently.
2463:
2464: Here the argument OPVEC is the vector containing the operands
2465: extracted from INSN, and NOPERANDS is the number of elements of
2466: the vector which contain meaningful data for this insn. The
2467: contents of this vector are what will be used to convert the
2468: insn template into assembler code, so you can change the
2469: assembler output by changing the contents of the vector.
2470:
2471: We use it to check if the current insn needs a nop in front of it
2472: because of load delays, and also to update the delay slot
2473: statistics. */
2474:
2475: #define FINAL_PRESCAN_INSN(INSN, OPVEC, NOPERANDS) \
2476: do \
2477: { \
2478: if (dslots_number_nops > 0 && mips_load_reg != (rtx)0) \
2479: { \
2480: enum machine_mode mode = GET_MODE (mips_load_reg); \
2481: rtx pattern = PATTERN (INSN); \
2482: \
2483: if (reg_mentioned_p (mips_load_reg, pattern) \
2484: || (mips_load_reg2 != (rtx)0 \
2485: && reg_mentioned_p (mips_load_reg2, pattern)) \
2486: || (mips_load_reg3 != (rtx)0 \
2487: && reg_mentioned_p (mips_load_reg3, pattern)) \
2488: || (mips_load_reg4 != (rtx)0 \
2489: && reg_mentioned_p (mips_load_reg4, pattern)) \
2490: || get_attr_length (INSN) == 0) \
2491: { \
2492: fputs ((set_noreorder) ? "\tnop\n" : "\t#nop\n", asm_out_file); \
2493: } \
2494: else \
2495: dslots_load_filled++; \
2496: \
2497: while (--dslots_number_nops > 0) \
2498: fputs ((set_noreorder) ? "\tnop\n" : "\t#nop\n", asm_out_file); \
2499: \
2500: mips_load_reg = (rtx)0; \
2501: mips_load_reg2 = (rtx)0; \
2502: mips_load_reg3 = (rtx)0; \
2503: mips_load_reg4 = (rtx)0; \
2504: \
2505: if (set_noreorder && --set_noreorder == 0) \
2506: fputs ("\t.set\treorder\n", asm_out_file); \
2507: } \
2508: \
2509: if (TARGET_STATS) \
2510: { \
2511: enum rtx_code code = GET_CODE (INSN); \
2512: if (code == JUMP_INSN || code == CALL_INSN) \
2513: dslots_jump_total++; \
2514: } \
2515: } \
2516: while (0)
2517:
2518:
2519: /* Tell final.c how to eliminate redundant test instructions.
2520: Here we define machine-dependent flags and fields in cc_status
2521: (see `conditions.h'). */
2522:
2523: /* A C compound statement to set the components of `cc_status'
2524: appropriately for an insn INSN whose body is EXP. It is this
2525: macro's responsibility to recognize insns that set the condition
2526: code as a byproduct of other activity as well as those that
2527: explicitly set `(cc0)'.
2528:
2529: This macro is not used on machines that do not use `cc0'. */
2530:
2531: #define NOTICE_UPDATE_CC(EXP, INSN) \
2532: do \
2533: { \
2534: enum attr_type type = get_attr_type (INSN); \
2535: if (type == TYPE_ICMP || type == TYPE_FCMP) \
2536: CC_STATUS_INIT; \
2537: } \
2538: while (0)
2539:
2540: /* A list of names to be used for additional modes for condition
2541: code values in registers (*note Jump Patterns::.). These names
2542: are added to `enum machine_mode' and all have class `MODE_CC'.
2543: By convention, they should start with `CC' and end with `mode'.
2544:
2545: You should only define this macro if your machine does not use
2546: `cc0' and only if additional modes are required.
2547:
2548: On the MIPS, we use CC_FPmode for all floating point, CC_EQmode for
2549: integer equality/inequality comparisons, CC_0mode for comparisons
2550: against 0, and CCmode for other integer comparisons. */
2551:
2552: #define EXTRA_CC_MODES CC_EQmode, CC_FPmode, CC_0mode
2553:
2554: /* A list of C strings giving the names for the modes listed in
2555: `EXTRA_CC_MODES'. For example, the Sparc defines this macro and
2556: `EXTRA_CC_MODES' as
2557:
2558: #define EXTRA_CC_MODES CC_NOOVmode, CCFPmode
2559: #define EXTRA_CC_NAMES "CC_NOOV", "CCFP"
2560:
2561: This macro is not required if `EXTRA_CC_MODES' is not defined. */
2562:
2563: #define EXTRA_CC_NAMES "CC_EQ", "CC_FP", "CC_0"
2564:
2565: /* Returns a mode from class `MODE_CC' to be used when comparison
2566: operation code OP is applied to rtx X. For example, on the
2567: Sparc, `SELECT_CC_MODE' is defined as (see *note Jump
2568: Patterns::. for a description of the reason for this definition)
2569:
2570: #define SELECT_CC_MODE(OP,X) \
2571: (GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT ? CCFPmode \
2572: : (GET_CODE (X) == PLUS || GET_CODE (X) == MINUS \
2573: || GET_CODE (X) == NEG) \
2574: ? CC_NOOVmode : CCmode)
2575:
2576: This macro is not required if `EXTRA_CC_MODES' is not defined. */
2577:
2578: #define SELECT_CC_MODE (OP, X) \
2579: (GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT ? CC_FPmode : \
2580: (OP == EQ || OP == NE) ? CC_EQmode : CCmode)
2581:
2582:
2583: /* Control the assembler format that we output. */
2584:
2585: /* Output at beginning of assembler file.
2586: If we are optimizing to use the global pointer, create a temporary
2587: file to hold all of the text stuff, and write it out to the end.
2588: This is needed because the MIPS assembler is evidently one pass,
2589: and if it hasn't seen the relevant .comm/.lcomm/.extern/.sdata
2590: declaration when the code is processed, it generates a two
2591: instruction sequence. */
2592:
2593: #define ASM_FILE_START(STREAM) mips_asm_file_start (STREAM)
2594:
2595: /* Output to assembler file text saying following lines
2596: may contain character constants, extra white space, comments, etc. */
2597:
2598: #define ASM_APP_ON " #APP\n"
2599:
2600: /* Output to assembler file text saying following lines
2601: no longer contain unusual constructs. */
2602:
2603: #define ASM_APP_OFF " #NO_APP\n"
2604:
2605: /* How to refer to registers in assembler output.
2606: This sequence is indexed by compiler's hard-register-number (see above).
2607:
2608: In order to support the two different conventions for register names,
2609: we use the name of a table set up in mips.c, which is overwritten
2610: if -mrnames is used. */
2611:
2612: #define REGISTER_NAMES \
2613: { \
2614: &mips_reg_names[ 0][0], \
2615: &mips_reg_names[ 1][0], \
2616: &mips_reg_names[ 2][0], \
2617: &mips_reg_names[ 3][0], \
2618: &mips_reg_names[ 4][0], \
2619: &mips_reg_names[ 5][0], \
2620: &mips_reg_names[ 6][0], \
2621: &mips_reg_names[ 7][0], \
2622: &mips_reg_names[ 8][0], \
2623: &mips_reg_names[ 9][0], \
2624: &mips_reg_names[10][0], \
2625: &mips_reg_names[11][0], \
2626: &mips_reg_names[12][0], \
2627: &mips_reg_names[13][0], \
2628: &mips_reg_names[14][0], \
2629: &mips_reg_names[15][0], \
2630: &mips_reg_names[16][0], \
2631: &mips_reg_names[17][0], \
2632: &mips_reg_names[18][0], \
2633: &mips_reg_names[19][0], \
2634: &mips_reg_names[20][0], \
2635: &mips_reg_names[21][0], \
2636: &mips_reg_names[22][0], \
2637: &mips_reg_names[23][0], \
2638: &mips_reg_names[24][0], \
2639: &mips_reg_names[25][0], \
2640: &mips_reg_names[26][0], \
2641: &mips_reg_names[27][0], \
2642: &mips_reg_names[28][0], \
2643: &mips_reg_names[29][0], \
2644: &mips_reg_names[30][0], \
2645: &mips_reg_names[31][0], \
2646: &mips_reg_names[32][0], \
2647: &mips_reg_names[33][0], \
2648: &mips_reg_names[34][0], \
2649: &mips_reg_names[35][0], \
2650: &mips_reg_names[36][0], \
2651: &mips_reg_names[37][0], \
2652: &mips_reg_names[38][0], \
2653: &mips_reg_names[39][0], \
2654: &mips_reg_names[40][0], \
2655: &mips_reg_names[41][0], \
2656: &mips_reg_names[42][0], \
2657: &mips_reg_names[43][0], \
2658: &mips_reg_names[44][0], \
2659: &mips_reg_names[45][0], \
2660: &mips_reg_names[46][0], \
2661: &mips_reg_names[47][0], \
2662: &mips_reg_names[48][0], \
2663: &mips_reg_names[49][0], \
2664: &mips_reg_names[50][0], \
2665: &mips_reg_names[51][0], \
2666: &mips_reg_names[52][0], \
2667: &mips_reg_names[53][0], \
2668: &mips_reg_names[54][0], \
2669: &mips_reg_names[55][0], \
2670: &mips_reg_names[56][0], \
2671: &mips_reg_names[57][0], \
2672: &mips_reg_names[58][0], \
2673: &mips_reg_names[59][0], \
2674: &mips_reg_names[60][0], \
2675: &mips_reg_names[61][0], \
2676: &mips_reg_names[62][0], \
2677: &mips_reg_names[63][0], \
2678: &mips_reg_names[64][0], \
2679: &mips_reg_names[65][0], \
2680: &mips_reg_names[66][0], \
2681: }
2682:
2683: /* If defined, a C initializer for an array of structures
2684: containing a name and a register number. This macro defines
2685: additional names for hard registers, thus allowing the `asm'
2686: option in declarations to refer to registers using alternate
2687: names.
2688:
2689: We define both names for the integer registers here. */
2690:
2691: #define ADDITIONAL_REGISTER_NAMES \
2692: { \
2693: { "$0", 0 + GP_REG_FIRST }, \
2694: { "$1", 1 + GP_REG_FIRST }, \
2695: { "$2", 2 + GP_REG_FIRST }, \
2696: { "$3", 3 + GP_REG_FIRST }, \
2697: { "$4", 4 + GP_REG_FIRST }, \
2698: { "$5", 5 + GP_REG_FIRST }, \
2699: { "$6", 6 + GP_REG_FIRST }, \
2700: { "$7", 7 + GP_REG_FIRST }, \
2701: { "$8", 8 + GP_REG_FIRST }, \
2702: { "$9", 9 + GP_REG_FIRST }, \
2703: { "$10", 10 + GP_REG_FIRST }, \
2704: { "$11", 11 + GP_REG_FIRST }, \
2705: { "$12", 12 + GP_REG_FIRST }, \
2706: { "$13", 13 + GP_REG_FIRST }, \
2707: { "$14", 14 + GP_REG_FIRST }, \
2708: { "$15", 15 + GP_REG_FIRST }, \
2709: { "$16", 16 + GP_REG_FIRST }, \
2710: { "$17", 17 + GP_REG_FIRST }, \
2711: { "$18", 18 + GP_REG_FIRST }, \
2712: { "$19", 19 + GP_REG_FIRST }, \
2713: { "$20", 20 + GP_REG_FIRST }, \
2714: { "$21", 21 + GP_REG_FIRST }, \
2715: { "$22", 22 + GP_REG_FIRST }, \
2716: { "$23", 23 + GP_REG_FIRST }, \
2717: { "$24", 24 + GP_REG_FIRST }, \
2718: { "$25", 25 + GP_REG_FIRST }, \
2719: { "$26", 26 + GP_REG_FIRST }, \
2720: { "$27", 27 + GP_REG_FIRST }, \
2721: { "$28", 28 + GP_REG_FIRST }, \
2722: { "$29", 29 + GP_REG_FIRST }, \
2723: { "$30", 30 + GP_REG_FIRST }, \
2724: { "$31", 31 + GP_REG_FIRST }, \
2725: { "$sp", 29 + GP_REG_FIRST }, \
2726: { "$fp", 30 + GP_REG_FIRST }, \
2727: { "at", 1 + GP_REG_FIRST }, \
2728: { "v0", 2 + GP_REG_FIRST }, \
2729: { "v1", 3 + GP_REG_FIRST }, \
2730: { "a0", 4 + GP_REG_FIRST }, \
2731: { "a1", 5 + GP_REG_FIRST }, \
2732: { "a2", 6 + GP_REG_FIRST }, \
2733: { "a3", 7 + GP_REG_FIRST }, \
2734: { "t0", 8 + GP_REG_FIRST }, \
2735: { "t1", 9 + GP_REG_FIRST }, \
2736: { "t2", 10 + GP_REG_FIRST }, \
2737: { "t3", 11 + GP_REG_FIRST }, \
2738: { "t4", 12 + GP_REG_FIRST }, \
2739: { "t5", 13 + GP_REG_FIRST }, \
2740: { "t6", 14 + GP_REG_FIRST }, \
2741: { "t7", 15 + GP_REG_FIRST }, \
2742: { "s0", 16 + GP_REG_FIRST }, \
2743: { "s1", 17 + GP_REG_FIRST }, \
2744: { "s2", 18 + GP_REG_FIRST }, \
2745: { "s3", 19 + GP_REG_FIRST }, \
2746: { "s4", 20 + GP_REG_FIRST }, \
2747: { "s5", 21 + GP_REG_FIRST }, \
2748: { "s6", 22 + GP_REG_FIRST }, \
2749: { "s7", 23 + GP_REG_FIRST }, \
2750: { "t8", 24 + GP_REG_FIRST }, \
2751: { "t9", 25 + GP_REG_FIRST }, \
2752: { "k0", 26 + GP_REG_FIRST }, \
2753: { "k1", 27 + GP_REG_FIRST }, \
2754: { "gp", 28 + GP_REG_FIRST }, \
2755: { "sp", 29 + GP_REG_FIRST }, \
2756: { "fp", 30 + GP_REG_FIRST }, \
2757: { "ra", 31 + GP_REG_FIRST }, \
2758: }
2759:
2760: /* Define results of standard character escape sequences. */
2761: #define TARGET_BELL 007
2762: #define TARGET_BS 010
2763: #define TARGET_TAB 011
2764: #define TARGET_NEWLINE 012
2765: #define TARGET_VT 013
2766: #define TARGET_FF 014
2767: #define TARGET_CR 015
2768:
2769: /* A C compound statement to output to stdio stream STREAM the
2770: assembler syntax for an instruction operand X. X is an RTL
2771: expression.
2772:
2773: CODE is a value that can be used to specify one of several ways
2774: of printing the operand. It is used when identical operands
2775: must be printed differently depending on the context. CODE
2776: comes from the `%' specification that was used to request
2777: printing of the operand. If the specification was just `%DIGIT'
2778: then CODE is 0; if the specification was `%LTR DIGIT' then CODE
2779: is the ASCII code for LTR.
2780:
2781: If X is a register, this macro should print the register's name.
2782: The names can be found in an array `reg_names' whose type is
2783: `char *[]'. `reg_names' is initialized from `REGISTER_NAMES'.
2784:
2785: When the machine description has a specification `%PUNCT' (a `%'
2786: followed by a punctuation character), this macro is called with
2787: a null pointer for X and the punctuation character for CODE.
2788:
2789: See mips.c for the MIPS specific codes. */
2790:
2791: #define PRINT_OPERAND(FILE, X, CODE) print_operand (FILE, X, CODE)
2792:
2793: /* A C expression which evaluates to true if CODE is a valid
2794: punctuation character for use in the `PRINT_OPERAND' macro. If
2795: `PRINT_OPERAND_PUNCT_VALID_P' is not defined, it means that no
2796: punctuation characters (except for the standard one, `%') are
2797: used in this way. */
2798:
2799: #define PRINT_OPERAND_PUNCT_VALID_P(CODE) mips_print_operand_punct[CODE]
2800:
2801: /* A C compound statement to output to stdio stream STREAM the
2802: assembler syntax for an instruction operand that is a memory
2803: reference whose address is ADDR. ADDR is an RTL expression.
2804:
2805: On some machines, the syntax for a symbolic address depends on
2806: the section that the address refers to. On these machines,
2807: define the macro `ENCODE_SECTION_INFO' to store the information
2808: into the `symbol_ref', and then check for it here. */
2809:
2810: #define PRINT_OPERAND_ADDRESS(FILE, ADDR) print_operand_address (FILE, ADDR)
2811:
2812:
2813: /* A C statement, to be executed after all slot-filler instructions
2814: have been output. If necessary, call `dbr_sequence_length' to
2815: determine the number of slots filled in a sequence (zero if not
2816: currently outputting a sequence), to decide how many no-ops to
2817: output, or whatever.
2818:
2819: Don't define this macro if it has nothing to do, but it is
2820: helpful in reading assembly output if the extent of the delay
2821: sequence is made explicit (e.g. with white space).
2822:
2823: Note that output routines for instructions with delay slots must
2824: be prepared to deal with not being output as part of a sequence
2825: (i.e. when the scheduling pass is not run, or when no slot
2826: fillers could be found.) The variable `final_sequence' is null
2827: when not processing a sequence, otherwise it contains the
2828: `sequence' rtx being output. */
2829:
2830: #define DBR_OUTPUT_SEQEND(STREAM) \
2831: do \
2832: { \
2833: if (set_nomacro > 0 && --set_nomacro == 0) \
2834: fputs ("\t.set\tmacro\n", STREAM); \
2835: \
2836: if (set_noreorder > 0 && --set_noreorder == 0) \
2837: fputs ("\t.set\treorder\n", STREAM); \
2838: \
2839: dslots_jump_filled++; \
2840: fputs ("\n", STREAM); \
2841: } \
2842: while (0)
2843:
2844:
2845: /* How to tell the debugger about changes of source files. Note, the
2846: mips ECOFF format cannot deal with changes of files inside of
2847: functions, which means the output of parser generators like bison
2848: is generally not debuggable without using the -l switch. Lose,
2849: lose, lose. Silicon graphics seems to want all .file's hardwired
2850: to 1. */
2851:
2852: #ifndef SET_FILE_NUMBER
2853: #define SET_FILE_NUMBER() ++num_source_filenames
2854: #endif
2855:
2856: #define ASM_OUTPUT_SOURCE_FILENAME(STREAM, NAME) \
2857: mips_output_filename (STREAM, NAME)
2858:
2859: /* This is how to output a note the debugger telling it the line number
2860: to which the following sequence of instructions corresponds.
2861: Silicon graphics puts a label after each .loc. */
2862:
2863: #ifndef LABEL_AFTER_LOC
2864: #define LABEL_AFTER_LOC(STREAM)
2865: #endif
2866:
2867: #define ASM_OUTPUT_SOURCE_LINE(STREAM, LINE) \
2868: mips_output_lineno (STREAM, LINE)
2869:
2870: /* The MIPS implementation uses some labels for it's own purposed. The
2871: following lists what labels are created, and are all formed by the
2872: pattern $L[a-z].*. The machine independent portion of GCC creates
2873: labels matching: $L[A-Z][0-9]+ and $L[0-9]+.
2874:
2875: LM[0-9]+ Sillicon graphics/ECOFF stabs label before each stmt.
2876: $Lb[0-9]+ Begin blocks for MIPS debug support
2877: $Lc[0-9]+ Label for use in s<xx> operation.
2878: $Le[0-9]+ End blocks for MIPS debug support
2879: $Lp\..+ Half-pic labels.
2880: $Ls[0-9]+ FP-SP difference if -fomit-frame-pointer */
2881:
2882: /* This is how to output the definition of a user-level label named NAME,
2883: such as the label on a static function or variable NAME.
2884:
2885: If we are optimizing the gp, remember that this label has been put
2886: out, so we know not to emit an .extern for it in mips_asm_file_end.
2887: We use one of the common bits in the IDENTIFIER tree node for this,
2888: since those bits seem to be unused, and we don't have any method
2889: of getting the decl nodes from the name. */
2890:
2891: #define ASM_OUTPUT_LABEL(STREAM,NAME) \
2892: do { \
2893: assemble_name (STREAM, NAME); \
2894: fputs (":\n", STREAM); \
2895: } while (0)
2896:
1.1.1.2 ! root 2897:
! 2898: /* A C statement (sans semicolon) to output to the stdio stream
! 2899: STREAM any text necessary for declaring the name NAME of an
! 2900: initialized variable which is being defined. This macro must
! 2901: output the label definition (perhaps using `ASM_OUTPUT_LABEL').
! 2902: The argument DECL is the `VAR_DECL' tree node representing the
! 2903: variable.
! 2904:
! 2905: If this macro is not defined, then the variable name is defined
! 2906: in the usual manner as a label (by means of `ASM_OUTPUT_LABEL'). */
! 2907:
! 2908: #define ASM_DECLARE_OBJECT_NAME(STREAM, NAME, DECL) \
! 2909: mips_declare_object (STREAM, NAME, "", ":\n", 0);
! 2910:
1.1 root 2911:
2912: /* This is how to output a command to make the user-level label named NAME
2913: defined for reference from other files. */
2914:
2915: #define ASM_GLOBALIZE_LABEL(STREAM,NAME) \
2916: do { \
2917: fputs ("\t.globl\t", STREAM); \
2918: assemble_name (STREAM, NAME); \
2919: fputs ("\n", STREAM); \
2920: } while (0)
2921:
1.1.1.2 ! root 2922: /* This says how to define a global common symbol. */
1.1 root 2923:
2924: #define ASM_OUTPUT_COMMON(STREAM, NAME, SIZE, ROUNDED) \
1.1.1.2 ! root 2925: mips_declare_object (STREAM, NAME, "\n\t.comm\t", ",%u\n", (ROUNDED))
1.1 root 2926:
1.1.1.2 ! root 2927: /* This says how to define a local common symbol (ie, not visable to
! 2928: linker). */
1.1 root 2929:
2930: #define ASM_OUTPUT_LOCAL(STREAM, NAME, SIZE, ROUNDED) \
1.1.1.2 ! root 2931: mips_declare_object (STREAM, NAME, "\n\t.lcomm\t", ",%u\n", (ROUNDED))
1.1 root 2932:
2933:
2934: /* This says how to output an external. It would be possible not to
2935: output anything and let undefined symbol become external. However
2936: the assembler uses length information on externals to allocate in
2937: data/sdata bss/sbss, thereby saving exec time. */
2938:
2939: #define ASM_OUTPUT_EXTERNAL(STREAM,DECL,NAME) \
2940: mips_output_external(STREAM,DECL,NAME)
2941:
2942: /* This says what to print at the end of the assembly file */
2943: #define ASM_FILE_END(STREAM) mips_asm_file_end(STREAM)
2944:
2945:
2946: /* This is how to declare a function name. The actual work of
2947: emitting the label is moved to function_prologue, so that we can
2948: get the line number correctly emitted before the .ent directive,
2949: and after any .file directives.
2950:
2951: Also, switch files if we are optimizing the global pointer. */
2952:
2953: #define ASM_DECLARE_FUNCTION_NAME(STREAM,NAME,DECL) \
2954: { \
2955: extern FILE *asm_out_text_file; \
2956: if (TARGET_GP_OPT) \
2957: STREAM = asm_out_text_file; \
2958: \
2959: current_function_name = NAME; \
2960: }
2961:
2962: /* This is how to output a reference to a user-level label named NAME.
2963: `assemble_name' uses this. */
2964:
2965: #define ASM_OUTPUT_LABELREF(STREAM,NAME) fprintf (STREAM, "%s", NAME)
2966:
2967: /* This is how to output an internal numbered label where
2968: PREFIX is the class of label and NUM is the number within the class. */
2969:
2970: #define ASM_OUTPUT_INTERNAL_LABEL(STREAM,PREFIX,NUM) \
2971: fprintf (STREAM, "$%s%d:\n", PREFIX, NUM)
2972:
2973: /* This is how to store into the string LABEL
2974: the symbol_ref name of an internal numbered label where
2975: PREFIX is the class of label and NUM is the number within the class.
2976: This is suitable for output with `assemble_name'. */
2977:
2978: #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \
2979: sprintf (LABEL, "*$%s%d", PREFIX, NUM)
2980:
2981: /* This is how to output an assembler line defining a `double' constant. */
2982:
2983: #define ASM_OUTPUT_DOUBLE(STREAM,VALUE) \
2984: { \
2985: union { double d; long l[2]; } u2; \
2986: u2.d = VALUE; \
2987: fprintf (STREAM, "\t.word\t0x%08lx\t\t# %.20g\n\t.word\t0x%08lx\n", \
2988: u2.l[0], u2.d, u2.l[1]); \
2989: }
2990:
2991: /* This is how to output an assembler line defining a `float' constant. */
2992:
2993: #define ASM_OUTPUT_FLOAT(STREAM,VALUE) \
2994: { \
2995: union { float f; long l; } u2; \
2996: u2.f = VALUE; \
2997: fprintf (STREAM, "\t.word\t0x%08lx\t\t# %.12g\n", u2.l, u2.f); \
2998: }
2999:
3000: /* This is how to output an assembler line defining an `int' constant. */
3001:
3002: #define ASM_OUTPUT_INT(STREAM,VALUE) \
3003: do { \
3004: fprintf (STREAM, "\t.word\t"); \
3005: output_addr_const (STREAM, (VALUE)); \
3006: fprintf (STREAM, "\n"); \
3007: } while (0)
3008:
3009: /* Likewise for `char' and `short' constants. */
3010:
3011: #define ASM_OUTPUT_SHORT(STREAM,VALUE) \
3012: { \
3013: fprintf (STREAM, "\t.half\t"); \
3014: output_addr_const (STREAM, (VALUE)); \
3015: fprintf (STREAM, "\n"); \
3016: }
3017:
3018: #define ASM_OUTPUT_CHAR(STREAM,VALUE) \
3019: { \
3020: fprintf (STREAM, "\t.byte\t"); \
3021: output_addr_const (STREAM, (VALUE)); \
3022: fprintf (STREAM, "\n"); \
3023: }
3024:
3025: /* This is how to output an assembler line for a numeric constant byte. */
3026:
3027: #define ASM_OUTPUT_BYTE(STREAM,VALUE) \
3028: fprintf (STREAM, "\t.byte\t0x%x\n", (VALUE))
3029:
3030: /* This is how to output an element of a case-vector that is absolute. */
3031:
3032: #define ASM_OUTPUT_ADDR_VEC_ELT(STREAM, VALUE) \
3033: fprintf (STREAM, "\t.word\t$L%d\n", VALUE)
3034:
3035: /* This is how to output an element of a case-vector that is relative.
3036: (We do not use such vectors,
3037: but we must define this macro anyway.) */
3038:
3039: #define ASM_OUTPUT_ADDR_DIFF_ELT(STREAM, VALUE, REL) \
3040: fprintf (STREAM, "\t.word\t$L%d-$L%d\n", VALUE, REL)
3041:
3042: /* This is how to emit the initial label for switch statements. We
3043: need to put the switch labels somewhere else from the text section,
3044: because the MIPS assembler gets real confused about line numbers if
3045: .word's appear in the text section. */
3046:
3047: #define ASM_OUTPUT_CASE_LABEL(STREAM, PREFIX, NUM, JUMPTABLE) \
3048: { \
3049: rdata_section (); \
3050: ASM_OUTPUT_ALIGN (STREAM, 2); \
3051: ASM_OUTPUT_INTERNAL_LABEL (STREAM, PREFIX, NUM); \
3052: }
3053:
3054: /* This is how to output an assembler line
3055: that says to advance the location counter
3056: to a multiple of 2**LOG bytes. */
3057:
3058: #define ASM_OUTPUT_ALIGN(STREAM,LOG) \
3059: { \
3060: int mask = (1 << (LOG)) - 1; \
3061: fprintf (STREAM, "\t.align\t%d\n", (LOG)); \
3062: }
3063:
3064: /* This is how to output an assembler line to to advance the location
3065: counter by SIZE bytes. */
3066:
3067: #define ASM_OUTPUT_SKIP(STREAM,SIZE) \
3068: fprintf (STREAM, "\t.space\t%u\n", (SIZE))
3069:
3070:
3071: /* This is how to output a string. */
3072: #define ASM_OUTPUT_ASCII(STREAM, STRING, LEN) \
3073: do { \
3074: register int i, c, len = (LEN), cur_pos = 17; \
3075: register unsigned char *string = (unsigned char *)(STRING); \
3076: fprintf ((STREAM), "\t.ascii\t\""); \
3077: for (i = 0; i < len; i++) \
3078: { \
3079: register int c = string[i]; \
3080: \
3081: switch (c) \
3082: { \
3083: case '\"': \
3084: case '\\': \
3085: putc ('\\', (STREAM)); \
3086: putc (c, (STREAM)); \
3087: cur_pos += 2; \
3088: break; \
3089: \
3090: case TARGET_NEWLINE: \
3091: fputs ("\\n", (STREAM)); \
3092: if (i+1 < len \
3093: && (((c = string[i+1]) >= '\040' && c <= '~') \
3094: || c == TARGET_TAB)) \
3095: cur_pos = 32767; /* break right here */ \
3096: else \
3097: cur_pos += 2; \
3098: break; \
3099: \
3100: case TARGET_TAB: \
3101: fputs ("\\t", (STREAM)); \
3102: cur_pos += 2; \
3103: break; \
3104: \
3105: case TARGET_FF: \
3106: fputs ("\\f", (STREAM)); \
3107: cur_pos += 2; \
3108: break; \
3109: \
3110: case TARGET_BS: \
3111: fputs ("\\b", (STREAM)); \
3112: cur_pos += 2; \
3113: break; \
3114: \
3115: case TARGET_CR: \
3116: fputs ("\\r", (STREAM)); \
3117: cur_pos += 2; \
3118: break; \
3119: \
3120: default: \
3121: if (c >= ' ' && c < 0177) \
3122: { \
3123: putc (c, (STREAM)); \
3124: cur_pos++; \
3125: } \
3126: else \
3127: { \
3128: fprintf ((STREAM), "\\%03o", c); \
3129: cur_pos += 4; \
3130: } \
3131: } \
3132: \
3133: if (cur_pos > 72 && i+1 < len) \
3134: { \
3135: cur_pos = 17; \
3136: fprintf ((STREAM), "\"\n\t.ascii\t\""); \
3137: } \
3138: } \
3139: fprintf ((STREAM), "\"\n"); \
3140: } while (0)
3141:
3142: /* Handle certain cpp directives used in header files on sysV. */
3143: #define SCCS_DIRECTIVE
3144:
3145: /* Output #ident as a in the read-only data section. */
3146: #define ASM_OUTPUT_IDENT(FILE, STRING) \
3147: { \
3148: char *p = STRING; \
3149: int size = strlen (p) + 1; \
3150: rdata_section (); \
3151: assemble_string (p, size); \
3152: }
3153:
3154:
3155: /* Output before read-only data. */
3156:
1.1.1.2 ! root 3157: #define TEXT_SECTION_ASM_OP ".text"
1.1 root 3158:
3159: /* Output before writable data. */
3160:
1.1.1.2 ! root 3161: #define DATA_SECTION_ASM_OP ".data"
1.1 root 3162:
3163: /* Output before writable short data. */
3164:
1.1.1.2 ! root 3165: #define SDATA_SECTION_ASM_OP ".sdata"
1.1 root 3166:
3167: /* Output before read-only data. */
3168:
1.1.1.2 ! root 3169: #define RDATA_SECTION_ASM_OP ".rdata"
1.1 root 3170: #define READONLY_DATA_SECTION rdata_section
3171:
3172: /* What other sections we support other than the normal .data/.text. */
3173:
3174: #define EXTRA_SECTIONS in_sdata, in_rdata, in_last_p1
3175:
3176: /* Define the additional functions to select our additional sections. */
3177:
3178: /* on the MIPS it is not a good idea to put constants in the text
3179: section, since this defeats the sdata/data mechanism. This is
3180: especially true when -O is used. In this case an effort is made to
3181: address with faster (gp) register relative addressing, which can
3182: only get at sdata and sbss items (there is no stext !!) However,
3183: if the constant is too large for sdata, and it's readonly, it
3184: will go into the .rdata section. */
3185:
3186: #define EXTRA_SECTION_FUNCTIONS \
3187: void \
3188: sdata_section () \
3189: { \
3190: if (in_section != in_sdata) \
3191: { \
3192: fprintf (asm_out_file, "%s\n", SDATA_SECTION_ASM_OP); \
3193: in_section = in_sdata; \
3194: } \
3195: } \
3196: \
3197: void \
3198: rdata_section () \
3199: { \
3200: if (in_section != in_rdata) \
3201: { \
3202: fprintf (asm_out_file, "%s\n", RDATA_SECTION_ASM_OP); \
3203: in_section = in_rdata; \
3204: } \
3205: }
3206:
3207: /* Given a decl node or constant node, choose the section to output it in
3208: and select that section. */
3209:
3210: #define SELECT_SECTION_MODE(MODE,RTX) \
3211: { \
3212: extern int mips_section_threshold; \
3213: if ((GET_MODE_SIZE(MODE) / BITS_PER_UNIT) <= mips_section_threshold \
3214: && mips_section_threshold > 0) \
3215: sdata_section (); \
3216: else \
3217: rdata_section (); \
3218: } \
3219:
3220: #define SELECT_SECTION(DECL,RELOC) \
3221: { \
3222: extern int mips_section_threshold; \
3223: if (int_size_in_bytes (TREE_TYPE (DECL)) <= mips_section_threshold \
3224: && mips_section_threshold > 0) \
3225: sdata_section (); \
3226: else if (TREE_CODE (DECL) == STRING_CST) \
3227: { \
3228: if (flag_writable_strings) \
3229: data_section (); \
3230: else \
3231: rdata_section (); \
3232: } \
3233: else if (TREE_CODE (DECL) != VAR_DECL) \
3234: rdata_section (); \
3235: else if (!TREE_READONLY (DECL)) \
3236: data_section (); \
3237: else \
3238: rdata_section (); \
3239: }
3240:
3241:
3242: /* Store in OUTPUT a string (made with alloca) containing
3243: an assembler-name for a local static variable named NAME.
3244: LABELNO is an integer which is different for each call. */
3245:
3246: #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \
3247: ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \
3248: sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO)))
3249:
3250: #define ASM_OUTPUT_REG_PUSH(STREAM,REGNO) \
3251: do \
3252: { \
3253: fprintf (STREAM, "\tsubu\t%s,%s,8\n\tsw\t%s,0(%s)\n", \
3254: reg_names[STACK_POINTER_REGNUM], \
3255: reg_names[STACK_POINTER_REGNUM], \
3256: reg_names[REGNO], \
3257: reg_names[STACK_POINTER_REGNUM]); \
3258: } \
3259: while (0)
3260:
3261: #define ASM_OUTPUT_REG_POP(STREAM,REGNO) \
3262: do \
3263: { \
3264: if (! set_noreorder) \
3265: fprintf (STREAM, "\t.set\tnoreorder\n"); \
3266: \
3267: dslots_load_total++; \
3268: dslots_load_filled++; \
3269: fprintf (STREAM, "\tlw\t%s,0(%s)\n\taddu\t%s,%s,8\n", \
3270: reg_names[REGNO], \
3271: reg_names[STACK_POINTER_REGNUM], \
3272: reg_names[STACK_POINTER_REGNUM], \
3273: reg_names[STACK_POINTER_REGNUM]); \
3274: \
3275: if (! set_noreorder) \
3276: fprintf (STREAM, "\t.set\treorder\n"); \
3277: } \
3278: while (0)
3279:
3280: /* Define the parentheses used to group arithmetic operations
3281: in assembler code. */
3282:
3283: #define ASM_OPEN_PAREN "("
3284: #define ASM_CLOSE_PAREN ")"
3285:
3286: /* How to start an assembler comment. */
3287: #ifndef ASM_COMMENT_START
3288: #define ASM_COMMENT_START "\t\t# "
3289: #endif
3290:
3291:
3292:
3293: /* Macros for mips-tfile.c to encapsulate stabs in ECOFF, and for
3294: and mips-tdump.c to print them out.
3295:
3296: These must match the corresponding definitions in gdb/mipsread.c.
3297: Unfortunately, gcc and gdb do not currently share any directories. */
3298:
3299: #define CODE_MASK 0x8F300
3300: #define MIPS_IS_STAB(sym) (((sym)->index & 0xFFF00) == CODE_MASK)
3301: #define MIPS_MARK_STAB(code) ((code)+CODE_MASK)
3302: #define MIPS_UNMARK_STAB(code) ((code)-CODE_MASK)
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