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1.1 root 1: /* Definitions of target machine for GNU compiler. MIPS version.
2: Contributed by A. Lichnewsky, [email protected]
3: Changed by Michael Meissner, [email protected]
4: Copyright (C) 1989, 1990, 1991, 1992 Free Software Foundation, Inc.
5:
6: This file is part of GNU CC.
7:
8: GNU CC is free software; you can redistribute it and/or modify
9: it under the terms of the GNU General Public License as published by
10: the Free Software Foundation; either version 2, or (at your option)
11: any later version.
12:
13: GNU CC is distributed in the hope that it will be useful,
14: but WITHOUT ANY WARRANTY; without even the implied warranty of
15: MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16: GNU General Public License for more details.
17:
18: You should have received a copy of the GNU General Public License
19: along with GNU CC; see the file COPYING. If not, write to
20: the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
21:
22:
23: /* Make Saber happier on obstack.[ch]. */
24: #if defined(__mips__) || defined(mips)
25: #define __PTR_TO_INT(P) ((int)(P))
26: #define __INT_TO_PTR(P) ((char *)(P))
27: #endif
28:
29: /* Standard GCC variables that we reference. */
30:
31: extern int target_flags;
32: extern int optimize;
33: extern int may_call_alloca;
34: extern int current_function_calls_alloca;
35: extern int frame_pointer_needed;
36: extern int flag_omit_frame_pointer;
37:
38: /* MIPS external variables defined in mips.c. */
39:
40: /* comparison type */
41: enum cmp_type {
42: CMP_SI, /* compare integers */
43: CMP_SF, /* compare single precision floats */
44: CMP_DF, /* compare double precision floats */
45: CMP_MAX /* max comparison type */
46: };
47:
48: /* types of delay slot */
49: enum delay_type {
50: DELAY_NONE, /* no delay slot */
51: DELAY_LOAD, /* load from memory delay */
1.1.1.3 ! root 52: DELAY_HILO, /* move from/to hi/lo registers */
! 53: DELAY_FCMP /* delay after doing c.<xx>.{d,s} */
1.1 root 54: };
55:
56: /* Which processor to schedule for. Since there is no difference between
57: a R2000 and R3000 in terms of the scheduler, we collapse them into
1.1.1.3 ! root 58: just an R3000. The elements of the enumeration must match exactly
! 59: the cpu attribute in the mips.md machine description. */
1.1 root 60:
61: enum processor_type {
62: PROCESSOR_DEFAULT,
63: PROCESSOR_R3000,
64: PROCESSOR_R6000,
65: PROCESSOR_R4000
66: };
67:
1.1.1.3 ! root 68: /* Recast the cpu class to be the cpu attribute. */
! 69: #define mips_cpu_attr ((enum attr_cpu)mips_cpu)
! 70:
! 71: /* Which type of block move to do (whether or not the last store is
! 72: split out so it can fill a branch delay slot). */
! 73:
! 74: enum block_move_type {
! 75: BLOCK_MOVE_NORMAL, /* generate complete block move */
! 76: BLOCK_MOVE_NOT_LAST, /* generate all but last store */
! 77: BLOCK_MOVE_LAST /* generate just the last store */
! 78: };
! 79:
1.1 root 80: extern char mips_reg_names[][8]; /* register names (a0 vs. $4). */
81: extern char mips_print_operand_punct[]; /* print_operand punctuation chars */
82: extern char *current_function_name; /* current function being compiled */
83: extern char *current_function_file; /* filename current function is in */
84: extern int num_source_filenames; /* current .file # */
85: extern int inside_function; /* != 0 if inside of a function */
86: extern int ignore_line_number; /* != 0 if we are to ignore next .loc */
87: extern int file_in_function_warning; /* warning given about .file in func */
88: extern int sdb_label_count; /* block start/end next label # */
89: extern int mips_section_threshold; /* # bytes of data/sdata cutoff */
90: extern int g_switch_value; /* value of the -G xx switch */
91: extern int g_switch_set; /* whether -G xx was passed. */
92: extern int sym_lineno; /* sgi next label # for each stmt */
93: extern int set_noreorder; /* # of nested .set noreorder's */
94: extern int set_nomacro; /* # of nested .set nomacro's */
95: extern int set_noat; /* # of nested .set noat's */
96: extern int set_volatile; /* # of nested .set volatile's */
97: extern int mips_branch_likely; /* emit 'l' after br (branch likely) */
98: extern int mips_dbx_regno[]; /* Map register # to debug register # */
99: extern char mips_rtx_classify[]; /* classify an RTX code */
100: extern struct rtx_def *branch_cmp[2]; /* operands for compare */
101: extern enum cmp_type branch_type; /* what type of branch to use */
102: extern enum processor_type mips_cpu; /* which cpu are we scheduling for */
103: extern int mips_isa; /* architectural level */
104: extern char *mips_cpu_string; /* for -mcpu=<xxx> */
105: extern char *mips_isa_string; /* for -mips{1,2,3} */
106: extern int dslots_load_total; /* total # load related delay slots */
107: extern int dslots_load_filled; /* # filled load delay slots */
108: extern int dslots_jump_total; /* total # jump related delay slots */
109: extern int dslots_jump_filled; /* # filled jump delay slots */
110: extern int dslots_number_nops; /* # of nops needed by previous insn */
111: extern int num_refs[3]; /* # 1/2/3 word references */
112: extern struct rtx_def *mips_load_reg; /* register to check for load delay */
113: extern struct rtx_def *mips_load_reg2; /* 2nd reg to check for load delay */
114: extern struct rtx_def *mips_load_reg3; /* 3rd reg to check for load delay */
115: extern struct rtx_def *mips_load_reg4; /* 4th reg to check for load delay */
116:
117: /* Functions within mips.c that we reference. */
118:
119: extern void abort_with_insn ();
120: extern int arith32_operand ();
121: extern int arith_operand ();
122: extern int cmp_op ();
123: extern int cmp2_op ();
124: extern unsigned long compute_frame_size ();
125: extern void expand_block_move ();
126: extern int equality_op ();
127: extern int fcmp_op ();
1.1.1.3 ! root 128: extern int fpsw_register_operand ();
1.1 root 129: extern struct rtx_def * function_arg ();
130: extern void function_arg_advance ();
131: extern int function_arg_partial_nregs ();
132: extern void function_epilogue ();
133: extern void function_prologue ();
134: extern void gen_conditional_branch ();
1.1.1.3 ! root 135: extern struct rtx_def * gen_int_relational ();
1.1 root 136: extern void init_cumulative_args ();
137: extern int large_int ();
138: extern int md_register_operand ();
139: extern int mips_address_cost ();
140: extern void mips_asm_file_end ();
141: extern void mips_asm_file_start ();
1.1.1.2 root 142: extern void mips_declare_object ();
1.1 root 143: extern int mips_const_double_ok ();
144: extern void mips_count_memory_refs ();
145: extern int mips_debugger_offset ();
146: extern int mips_epilogue_delay_slots ();
147: extern char *mips_fill_delay_slot ();
148: extern char *mips_move_1word ();
149: extern char *mips_move_2words ();
1.1.1.3 ! root 150: extern void mips_output_double ();
1.1 root 151: extern int mips_output_external ();
1.1.1.3 ! root 152: extern void mips_output_float ();
1.1 root 153: extern void mips_output_filename ();
154: extern void mips_output_lineno ();
1.1.1.3 ! root 155: extern char *output_block_move ();
1.1 root 156: extern void override_options ();
1.1.1.3 ! root 157: extern int pc_or_label_operand ();
1.1 root 158: extern void print_operand_address ();
159: extern void print_operand ();
160: extern void print_options ();
161: extern int reg_or_0_operand ();
162: extern int simple_memory_operand ();
163: extern int small_int ();
164: extern void trace();
165: extern int uns_arith_operand ();
166: extern int uns_cmp_op ();
167:
168: /* Functions in varasm.c that we reference. */
169: extern void data_section ();
170: extern void rdata_section ();
171: extern void readonly_data_section ();
172: extern void sdata_section ();
173: extern void text_section ();
174:
175: /* Stubs for half-pic support if not OSF/1 reference platform. */
176:
177: #ifndef HALF_PIC_P
178: #define HALF_PIC_P() 0
1.1.1.3 ! root 179: #define HALF_PIC_NUMBER_PTRS 0
! 180: #define HALF_PIC_NUMBER_REFS 0
1.1 root 181: #define HALF_PIC_ENCODE(DECL)
1.1.1.3 ! root 182: #define HALF_PIC_DECLARE(NAME)
1.1 root 183: #define HALF_PIC_INIT() error ("half-pic init called on systems that don't support it.")
184: #define HALF_PIC_ADDRESS_P(X) 0
1.1.1.3 ! root 185: #define HALF_PIC_PTR(X) X
! 186: #define HALF_PIC_FINISH(STREAM)
1.1 root 187: #endif
188:
189:
190: /* Switch Recognition by gcc.c. Add -G xx support */
191:
192: #ifdef SWITCH_TAKES_ARG
193: #undef SWITCH_TAKES_ARG
194: #endif
195:
196: #define SWITCH_TAKES_ARG(CHAR) \
197: ((CHAR) == 'D' || (CHAR) == 'U' || (CHAR) == 'o' \
198: || (CHAR) == 'e' || (CHAR) == 'T' || (CHAR) == 'u' \
199: || (CHAR) == 'I' || (CHAR) == 'm' \
200: || (CHAR) == 'L' || (CHAR) == 'A' || (CHAR) == 'G')
201:
202: /* Sometimes certain combinations of command options do not make sense
203: on a particular target machine. You can define a macro
204: `OVERRIDE_OPTIONS' to take account of this. This macro, if
205: defined, is executed once just after all the command options have
206: been parsed.
207:
208: On the MIPS, it is used to handle -G. We also use it to set up all
209: of the tables referenced in the other macros. */
210:
211: #define OVERRIDE_OPTIONS override_options ()
212:
213: /* Zero or more C statements that may conditionally modify two
214: variables `fixed_regs' and `call_used_regs' (both of type `char
215: []') after they have been initialized from the two preceding
216: macros.
217:
218: This is necessary in case the fixed or call-clobbered registers
219: depend on target flags.
220:
221: You need not define this macro if it has no work to do.
222:
223: If the usage of an entire class of registers depends on the target
224: flags, you may indicate this to GCC by using this macro to modify
225: `fixed_regs' and `call_used_regs' to 1 for each of the registers in
226: the classes which should not be used by GCC. Also define the macro
227: `REG_CLASS_FROM_LETTER' to return `NO_REGS' if it is called with a
228: letter for a class that shouldn't be used.
229:
230: (However, if this class is not included in `GENERAL_REGS' and all
231: of the insn patterns whose constraints permit this class are
232: controlled by target switches, then GCC will automatically avoid
233: using these registers when the target switches are opposed to
234: them.) */
235:
236: #define CONDITIONAL_REGISTER_USAGE \
237: do \
238: { \
239: if (!TARGET_HARD_FLOAT) \
240: { \
241: int regno; \
242: \
243: for (regno = FP_REG_FIRST; regno <= FP_REG_LAST; regno++) \
244: fixed_regs[regno] = call_used_regs[regno] = 1; \
245: } \
246: } \
247: while (0)
248:
249:
250: /* Some machines may desire to change what optimizations are
251: performed for various optimization levels. This macro, if
252: defined, is executed once just after the optimization level is
253: determined and before the remainder of the command options have
254: been parsed. Values set in this macro are used as the default
255: values for the other command line options.
256:
257: LEVEL is the optimization level specified; 2 if -O2 is
258: specified, 1 if -O is specified, and 0 if neither is specified. */
259:
260: #define OPTIMIZATION_OPTIONS(LEVEL) \
261: { \
1.1.1.3 ! root 262: flag_no_function_cse = TRUE; \
! 263: flag_gnu_linker = FALSE; \
! 264: \
1.1 root 265: if (LEVEL) \
266: { \
267: flag_omit_frame_pointer = TRUE; \
268: flag_delayed_branch = TRUE; \
269: flag_thread_jumps = TRUE; \
270: flag_schedule_insns_after_reload = TRUE; \
271: } \
272: \
273: if (LEVEL >= 2) \
274: { \
275: flag_strength_reduce = TRUE; \
276: flag_cse_follow_jumps = TRUE; \
277: flag_expensive_optimizations = TRUE; \
278: flag_rerun_cse_after_loop = TRUE; \
279: flag_schedule_insns = TRUE; \
280: } \
281: \
282: if (LEVEL >= 3) \
283: { \
284: flag_inline_functions = TRUE; \
285: } \
286: }
287:
288:
289:
290: /* Complain about missing specs and predefines that should be defined in each
291: of the target tm files to override the defaults. This is mostly a place-
292: holder until I can get each of the files updated [mm]. */
293:
294: #if defined(OSF_OS) \
295: || defined(DECSTATION) \
296: || defined(SGI_TARGET) \
297: || defined(MIPS_NEWS) \
298: || defined(MIPS_SYSV) \
1.1.1.2 root 299: || defined(MIPS_SVR4) \
1.1 root 300: || defined(MIPS_BSD43)
301:
302: #ifndef CPP_PREDEFINES
303: #error "Define CPP_PREDEFINES in the appropriate tm.h file"
304: #endif
305:
306: #ifndef CPP_SPEC
307: #error "Define CPP_SPEC in the appropriate tm.h file"
308: #endif
309:
310: #ifndef LINK_SPEC
311: #error "Define LINK_SPEC in the appropriate tm.h file"
312: #endif
313:
314: #ifndef LIB_SPEC
315: #error "Define LIB_SPEC in the appropriate tm.h file"
316: #endif
317:
318: #ifndef STARTFILE_SPEC
319: #error "Define STARTFILE_SPEC in the appropriate tm.h file"
320: #endif
321:
322: #ifndef MACHINE_TYPE
323: #error "Define MACHINE_TYPE in the appropriate tm.h file"
324: #endif
325: #endif
326:
1.1.1.2 root 327: /* Tell collect what flags to pass to nm. */
328: #ifndef NM_FLAGS
329: #define NM_FLAGS "-Bp"
330: #endif
331:
1.1 root 332:
333: /* Names to predefine in the preprocessor for this target machine. */
334:
335: #ifndef CPP_PREDEFINES
1.1.1.2 root 336: #define CPP_PREDEFINES "-Dmips -Dunix -Dhost_mips -DMIPSEB -DR3000 -DSYSTYPE_BSD43"
1.1 root 337: #endif
338:
339: /* Extra switches sometimes passed to the assembler. */
340:
341: #ifndef ASM_SPEC
342: #define ASM_SPEC "\
343: %{!mgas: \
1.1.1.2 root 344: %{!mrnames: %{!.s:-nocpp} %{.s: %{cpp} %{nocpp}}} \
1.1 root 345: %{pipe: %e-pipe is not supported.} \
346: %{EB} %{!EB:-EB} \
347: %{EL: %e-EL not supported} \
1.1.1.2 root 348: %{mips1} %{mips2} %{mips3} \
1.1 root 349: %{O:-O2} %{O1:-O2} %{O2:-O2} %{O3:-O3} \
350: %{g} %{g0} %{g1} %{g2} %{g3} %{v} %{K}} \
351: %{G*}"
352:
353: #endif /* ASM_SPEC */
354:
355: /* Specify to run a post-processor, mips-tfile after the assembler
356: has run to stuff the mips debug information into the object file.
357: This is needed because the $#!%^ MIPS assembler provides no way
1.1.1.2 root 358: of specifying such information in the assembly file. */
1.1 root 359:
360: #ifndef ASM_FINAL_SPEC
361: #define ASM_FINAL_SPEC "\
362: %{!mgas: %{!mno-mips-tfile: \
363: \n mips-tfile %{v*: -v} \
364: %{K: -I %b.o~} \
365: %{!K: %{save-temps: -I %b.o~}} \
366: %{c:%W{o*}%{!o*:-o %b.o}}%{!c:-o %b.o} \
367: %{.s:%i} %{!.s:%g.s}}}"
368: #endif
369:
370: /* Redefinition of libraries used. Mips doesn't support normal
371: UNIX style profiling via calling _mcount. It does offer
372: profiling that samples the PC, so do what we can... */
373:
374: #ifndef LIB_SPEC
375: #define LIB_SPEC "%{pg:-lprof1} %{p:-lprof1} -lc"
376: #endif
377:
378: /* Extra switches sometimes passed to the linker. */
379:
380: #ifndef LINK_SPEC
381: #define LINK_SPEC "\
382: %{G*} \
383: %{!mgas: \
384: %{pipe: %e-pipe is not supported.} \
385: %{EB} %{!EB:-EB} \
386: %{EL: %e-EL not supported} \
1.1.1.2 root 387: %{mips1} %{mips2} %{mips3} \
1.1 root 388: %{bestGnum}}"
389: #endif /* LINK_SPEC defined */
390:
391: /* Specs for the compiler proper */
392:
393: #ifndef CC1_SPEC
394: #define CC1_SPEC "\
395: %{O*: %{!mno-gpOPT:%{!mno-gpopt: -mgpopt}}} \
396: %{gline:%{!g:%{!g0:%{!g1:%{!g2: -g1}}}}} \
397: %{G*} \
398: %{pic-none: -mno-half-pic} \
399: %{pic-lib: -mhalf-pic} \
400: %{pic-extern: -mhalf-pic} \
401: %{pic-calls: -mhalf-pic} \
402: %{save-temps: }"
403: #endif
404:
405: /* Preprocessor specs */
406:
407: #ifndef CPP_SPEC
408: #define CPP_SPEC "\
409: %{.cc: -D__LANGUAGE_C_PLUS_PLUS -D_LANGUAGE_C_PLUS_PLUS} \
410: %{.cxx: -D__LANGUAGE_C_PLUS_PLUS -D_LANGUAGE_C_PLUS_PLUS} \
411: %{.C: -D__LANGUAGE_C_PLUS_PLUS -D_LANGUAGE_C_PLUS_PLUS} \
412: %{.m: -D__LANGUAGE_OBJECTIVE_C -D_LANGUAGE_OBJECTIVE_C} \
413: %{.S: -D__LANGUAGE_ASSEMBLY -D_LANGUAGE_ASSEMBLY %{!ansi:-DLANGUAGE_ASSEMBLY}} \
414: %{!.S: -D__LANGUAGE_C -D_LANGUAGE_C %{!ansi:-DLANGUAGE_C}}"
415: #endif
416:
417: /* If defined, this macro is an additional prefix to try after
418: `STANDARD_EXEC_PREFIX'. */
419:
420: #ifndef MD_EXEC_PREFIX
1.1.1.2 root 421: #define MD_EXEC_PREFIX "/usr/lib/cmplrs/cc/"
422: #endif
423:
424: #ifndef MD_STARTFILE_PREFIX
425: #define MD_STARTFILE_PREFIX "/usr/lib/cmplrs/cc/"
1.1 root 426: #endif
427:
428:
429: /* Print subsidiary information on the compiler version in use. */
430:
1.1.1.3 ! root 431: #define MIPS_VERSION "[AL 1.1, MM 19]"
1.1 root 432:
433: #ifndef MACHINE_TYPE
434: #define MACHINE_TYPE "BSD Mips"
435: #endif
436:
437: #ifndef TARGET_VERSION_INTERNAL
438: #define TARGET_VERSION_INTERNAL(STREAM) \
439: fprintf (STREAM, " %s %s", MIPS_VERSION, MACHINE_TYPE)
440: #endif
441:
442: #ifndef TARGET_VERSION
443: #define TARGET_VERSION TARGET_VERSION_INTERNAL (stderr)
444: #endif
445:
446:
447: #define SDB_DEBUGGING_INFO /* generate info for mips-tfile */
448: #define DBX_DEBUGGING_INFO /* generate stabs (OSF/rose) */
449: #define MIPS_DEBUGGING_INFO /* MIPS specific debugging info */
450:
451: #ifndef PREFERRED_DEBUGGING_TYPE /* assume SDB_DEBUGGING_INFO */
1.1.1.2 root 452: #define PREFERRED_DEBUGGING_TYPE ((len > 1 && !strncmp (str, "ggdb", len)) ? DBX_DEBUG : SDB_DEBUG)
1.1 root 453: #endif
454:
1.1.1.2 root 455: /* By default, turn on GDB extensions. */
456: #define DEFAULT_GDB_EXTENSIONS 1
457:
1.1 root 458: /* If we are passing smuggling stabs through the MIPS ECOFF object
459: format, put a comment in front of the .stab<x> operation so
460: that the MIPS assembler does not choke. The mips-tfile program
461: will correctly put the stab into the object file. */
462:
463: #define ASM_STABS_OP ((TARGET_GAS) ? ".stabs" : " #.stabs")
464: #define ASM_STABN_OP ((TARGET_GAS) ? ".stabn" : " #.stabn")
465: #define ASM_STABD_OP ((TARGET_GAS) ? ".stabd" : " #.stabd")
466:
467: /* Forward references to tags are allowed. */
468: #define SDB_ALLOW_FORWARD_REFERENCES
469:
470: /* Unknown tags are also allowed. */
471: #define SDB_ALLOW_UNKNOWN_REFERENCES
472:
473: /* On Sun 4, this limit is 2048. We use 1500 to be safe,
474: since the length can run past this up to a continuation point. */
475: #define DBX_CONTIN_LENGTH 1500
476:
477:
478: /* How to renumber registers for dbx and gdb. */
479: #define DBX_REGISTER_NUMBER(REGNO) mips_dbx_regno[ (REGNO) ]
480:
481:
482: /* Overrides for the COFF debug format. */
483: #define PUT_SDB_SCL(a) \
484: do { \
485: extern FILE *asm_out_text_file; \
486: fprintf (asm_out_text_file, "\t.scl\t%d;", (a)); \
487: } while (0)
488:
489: #define PUT_SDB_INT_VAL(a) \
490: do { \
491: extern FILE *asm_out_text_file; \
492: fprintf (asm_out_text_file, "\t.val\t%d;", (a)); \
493: } while (0)
494:
495: #define PUT_SDB_VAL(a) \
496: do { \
497: extern FILE *asm_out_text_file; \
498: fputs ("\t.val\t", asm_out_text_file); \
499: output_addr_const (asm_out_text_file, (a)); \
500: fputc (';', asm_out_text_file); \
501: } while (0)
502:
503: #define PUT_SDB_DEF(a) \
504: do { \
505: extern FILE *asm_out_text_file; \
506: fprintf (asm_out_text_file, "\t#.def\t"); \
507: ASM_OUTPUT_LABELREF (asm_out_text_file, a); \
508: fputc (';', asm_out_text_file); \
509: } while (0)
510:
511: #define PUT_SDB_PLAIN_DEF(a) \
512: do { \
513: extern FILE *asm_out_text_file; \
514: fprintf (asm_out_text_file, "\t#.def\t.%s;", (a)); \
515: } while (0)
516:
517: #define PUT_SDB_ENDEF \
518: do { \
519: extern FILE *asm_out_text_file; \
520: fprintf (asm_out_text_file, "\t.endef\n"); \
521: } while (0)
522:
523: #define PUT_SDB_TYPE(a) \
524: do { \
525: extern FILE *asm_out_text_file; \
526: fprintf (asm_out_text_file, "\t.type\t0x%x;", (a)); \
527: } while (0)
528:
529: #define PUT_SDB_SIZE(a) \
530: do { \
531: extern FILE *asm_out_text_file; \
532: fprintf (asm_out_text_file, "\t.size\t%d;", (a)); \
533: } while (0)
534:
535: #define PUT_SDB_DIM(a) \
536: do { \
537: extern FILE *asm_out_text_file; \
538: fprintf (asm_out_text_file, "\t.dim\t%d;", (a)); \
539: } while (0)
540:
541: #ifndef PUT_SDB_START_DIM
542: #define PUT_SDB_START_DIM \
543: do { \
544: extern FILE *asm_out_text_file; \
545: fprintf (asm_out_text_file, "\t.dim\t"); \
546: } while (0)
547: #endif
548:
549: #ifndef PUT_SDB_NEXT_DIM
550: #define PUT_SDB_NEXT_DIM(a) \
551: do { \
552: extern FILE *asm_out_text_file; \
553: fprintf (asm_out_text_file, "%d,", a); \
554: } while (0)
555: #endif
556:
557: #ifndef PUT_SDB_LAST_DIM
558: #define PUT_SDB_LAST_DIM(a) \
559: do { \
560: extern FILE *asm_out_text_file; \
561: fprintf (asm_out_text_file, "%d;", a); \
562: } while (0)
563: #endif
564:
565: #define PUT_SDB_TAG(a) \
566: do { \
567: extern FILE *asm_out_text_file; \
568: fprintf (asm_out_text_file, "\t.tag\t"); \
569: ASM_OUTPUT_LABELREF (asm_out_text_file, a); \
570: fputc (';', asm_out_text_file); \
571: } while (0)
572:
573: /* For block start and end, we create labels, so that
574: later we can figure out where the correct offset is.
575: The normal .ent/.end serve well enough for functions,
576: so those are just commented out. */
577:
578: #define PUT_SDB_BLOCK_START(LINE) \
579: do { \
580: extern FILE *asm_out_text_file; \
581: fprintf (asm_out_text_file, \
582: "$Lb%d:\n\t#.begin\t$Lb%d\t%d\n", \
583: sdb_label_count, \
584: sdb_label_count, \
585: (LINE)); \
586: sdb_label_count++; \
587: } while (0)
588:
589: #define PUT_SDB_BLOCK_END(LINE) \
590: do { \
591: extern FILE *asm_out_text_file; \
592: fprintf (asm_out_text_file, \
593: "$Le%d:\n\t#.bend\t$Le%d\t%d\n", \
594: sdb_label_count, \
595: sdb_label_count, \
596: (LINE)); \
597: sdb_label_count++; \
598: } while (0)
599:
600: #define PUT_SDB_FUNCTION_START(LINE)
601:
602: #define PUT_SDB_FUNCTION_END(LINE)
603:
604: #define PUT_SDB_EPILOGUE_END(NAME)
605:
606: #define SDB_GENERATE_FAKE(BUFFER, NUMBER) \
607: sprintf ((BUFFER), ".%dfake", (NUMBER));
608:
609: /* Correct the offset of automatic variables and arguments
610: if the frame pointer has been eliminated. */
611:
612: #define DEBUGGER_AUTO_OFFSET(X) mips_debugger_offset (X, 0)
613: #define DEBUGGER_ARG_OFFSET(OFFSET, X) mips_debugger_offset (X, OFFSET)
614:
615:
616: /* Tell collect that the object format is ECOFF */
617: #ifndef OBJECT_FORMAT_ROSE
618: #define OBJECT_FORMAT_COFF /* Object file looks like COFF */
619: #define EXTENDED_COFF /* ECOFF, not normal coff */
620: #endif
621:
1.1.1.3 ! root 622: /* Don't use the default definitions, because we don't have gld.
! 623: Also, we don't want stabs when generating ECOFF output.
! 624: Instead we depend on collect to handle these. */
! 625:
! 626: #define ASM_OUTPUT_CONSTRUCTOR(file, name)
! 627: #define ASM_OUTPUT_DESTRUCTOR(file, name)
! 628:
1.1 root 629:
630: /* Run-time compilation parameters selecting different hardware subsets. */
631:
632: /* Macros used in the machine description to test the flags. */
633:
634: /* Bits for real switches */
635: #define MASK_INT64 0x00000001 /* ints are 64 bits */
636: #define MASK_LONG64 0x00000002 /* longs are 64 bits */
637: #define MASK_LLONG128 0x00000004 /* long longs are 128 bits */
638: #define MASK_GPOPT 0x00000008 /* Optimize for global pointer */
639: #define MASK_GAS 0x00000010 /* Gas used instead of MIPS as */
640: #define MASK_NAME_REGS 0x00000020 /* Use MIPS s/w reg name convention */
641: #define MASK_STATS 0x00000040 /* print statistics to stderr */
642: #define MASK_MEMCPY 0x00000080 /* call memcpy instead of inline code*/
643: #define MASK_SOFT_FLOAT 0x00000100 /* software floating point */
644: #define MASK_FLOAT64 0x00000200 /* fp registers are 64 bits */
645: #define MASK_ABICALLS 0x00000400 /* emit .abicalls/.cprestore/.cpload */
646: #define MASK_HALF_PIC 0x00000800 /* Emit OSF-style pic refs to externs*/
647: #define MASK_UNUSED1 0x00001000
648: #define MASK_UNUSED2 0x00002000
649: #define MASK_UNUSED3 0x00004000
650: #define MASK_UNUSED4 0x00008000
651: #define MASK_UNUSED5 0x00010000
652: #define MASK_UNUSED6 0x00020000
653: #define MASK_UNUSED7 0x00040000
654: #define MASK_UNUSED8 0x00080000
655:
656: /* Dummy switches used only in spec's*/
657: #define MASK_MIPS_TFILE 0x00000000 /* flag for mips-tfile usage */
658:
659: /* switches not used yet */
660: #define MASK_WC8 0x00000000 /* wchar's are 8 bits, not 32 */
661: #define MASK_WC16 0x00000000 /* wchar's are 16 bits, not 32 */
1.1.1.2 root 662: #define MASK_WC32 0x00000000 /* dummy for consistency */
1.1 root 663:
664: /* Debug switches, not documented */
665: #define MASK_DEBUG 0x40000000 /* Eliminate version # in .s file */
666: #define MASK_DEBUG_A 0x20000000 /* don't allow <label>($reg) addrs */
667: #define MASK_DEBUG_B 0x10000000 /* GO_IF_LEGITIMATE_ADDRESS debug */
1.1.1.3 ! root 668: #define MASK_DEBUG_C 0x08000000 /* don't expand seq, etc. */
! 669: #define MASK_DEBUG_D 0x04000000 /* don't do define_split's */
1.1 root 670: #define MASK_DEBUG_E 0x02000000 /* function_arg debug */
671: #define MASK_DEBUG_F 0x01000000 /* don't try to suppress load nop's */
672: #define MASK_DEBUG_G 0x00800000 /* don't support 64 bit arithmetic */
673: #define MASK_DEBUG_H 0x00400000 /* allow ints in FP registers */
674: #define MASK_DEBUG_I 0x00200000 /* unused */
675: #define MASK_DEBUG_J 0x00100000 /* unused */
676:
677: /* r4000 64 bit sizes */
678: #define TARGET_INT64 (target_flags & MASK_INT64)
679: #define TARGET_LONG64 (target_flags & MASK_LONG64)
680: #define TARGET_LLONG128 (target_flags & MASK_LLONG128)
681: #define TARGET_FLOAT64 (target_flags & MASK_FLOAT64)
682:
683: /* Mips vs. GNU assembler */
684: #define TARGET_GAS (target_flags & MASK_GAS)
685: #define TARGET_UNIX_ASM (!TARGET_GAS)
686: #define TARGET_MIPS_AS TARGET_UNIX_ASM
687:
688: /* Debug Mode */
689: #define TARGET_DEBUG_MODE (target_flags & MASK_DEBUG)
690: #define TARGET_DEBUG_A_MODE (target_flags & MASK_DEBUG_A)
691: #define TARGET_DEBUG_B_MODE (target_flags & MASK_DEBUG_B)
692: #define TARGET_DEBUG_C_MODE (target_flags & MASK_DEBUG_C)
693: #define TARGET_DEBUG_D_MODE (target_flags & MASK_DEBUG_D)
694: #define TARGET_DEBUG_E_MODE (target_flags & MASK_DEBUG_E)
695: #define TARGET_DEBUG_F_MODE (target_flags & MASK_DEBUG_F)
696: #define TARGET_DEBUG_G_MODE (target_flags & MASK_DEBUG_G)
697: #define TARGET_DEBUG_H_MODE (target_flags & MASK_DEBUG_H)
698: #define TARGET_DEBUG_I_MODE (target_flags & MASK_DEBUG_I)
699: #define TARGET_DEBUG_J_MODE (target_flags & MASK_DEBUG_J)
700:
701: /* Reg. Naming in .s ($21 vs. $a0) */
702: #define TARGET_NAME_REGS (target_flags & MASK_NAME_REGS)
703:
704: /* Optimize for Sdata/Sbss */
705: #define TARGET_GP_OPT (target_flags & MASK_GPOPT)
706:
707: /* print program statistics */
708: #define TARGET_STATS (target_flags & MASK_STATS)
709:
710: /* call memcpy instead of inline code */
711: #define TARGET_MEMCPY (target_flags & MASK_MEMCPY)
712:
713: /* .abicalls, etc from Pyramid V.4 */
714: #define TARGET_ABICALLS (target_flags & MASK_ABICALLS)
715:
716: /* OSF pic references to externs */
717: #define TARGET_HALF_PIC (target_flags & MASK_HALF_PIC)
718:
719: /* wchar size */
720: #define TARGET_WC8 (target_flags & MASK_WC8)
721: #define TARGET_WC16 (target_flags & MASK_WC16)
722: #define TARGET_WC32 ((target_flags & (MASK_WC8 | MASK_WC16)) == 0)
723:
724: /* software floating point */
725: #define TARGET_SOFT_FLOAT (target_flags & MASK_SOFT_FLOAT)
726: #define TARGET_HARD_FLOAT (! TARGET_SOFT_FLOAT)
727:
728: /* Macro to define tables used to set the flags.
729: This is a list in braces of pairs in braces,
730: each pair being { "NAME", VALUE }
731: where VALUE is the bits to set or minus the bits to clear.
732: An empty string NAME is used to identify the default VALUE. */
733:
734: #define TARGET_SWITCHES \
735: { \
736: {"int64", MASK_INT64 | MASK_LONG64}, \
737: {"long64", MASK_LONG64}, \
738: {"longlong128", MASK_INT64 | MASK_LONG64 | MASK_LLONG128}, \
739: {"mips-as", -MASK_GAS}, \
740: {"gas", MASK_GAS}, \
741: {"rnames", MASK_NAME_REGS}, \
742: {"no-rnames", -MASK_NAME_REGS}, \
743: {"gpOPT", MASK_GPOPT}, \
744: {"gpopt", MASK_GPOPT}, \
745: {"no-gpOPT", -MASK_GPOPT}, \
746: {"no-gpopt", -MASK_GPOPT}, \
747: {"stats", MASK_STATS}, \
748: {"no-stats", -MASK_STATS}, \
749: {"memcpy", MASK_MEMCPY}, \
750: {"no-memcpy", -MASK_MEMCPY}, \
751: {"wc8", MASK_WC8}, \
752: {"wc16", MASK_WC16}, \
753: {"wc32", MASK_WC32}, \
754: {"mips-tfile", MASK_MIPS_TFILE}, \
755: {"no-mips-tfile", -MASK_MIPS_TFILE}, \
756: {"soft-float", MASK_SOFT_FLOAT}, \
757: {"hard-float", -MASK_SOFT_FLOAT}, \
758: {"fp64", MASK_FLOAT64}, \
759: {"fp32", -MASK_FLOAT64}, \
760: {"abicalls", MASK_ABICALLS}, \
761: {"no-abicalls", -MASK_ABICALLS}, \
762: {"half-pic", MASK_HALF_PIC}, \
763: {"no-half-pic", -MASK_HALF_PIC}, \
764: {"debug", MASK_DEBUG}, \
765: {"debuga", MASK_DEBUG_A}, \
766: {"debugb", MASK_DEBUG_B}, \
767: {"debugc", MASK_DEBUG_C}, \
768: {"debugd", MASK_DEBUG_D}, \
769: {"debuge", MASK_DEBUG_E}, \
770: {"debugf", MASK_DEBUG_F}, \
771: {"debugg", MASK_DEBUG_G}, \
772: {"debugh", MASK_DEBUG_H}, \
773: {"debugi", MASK_DEBUG_I}, \
774: {"debugj", MASK_DEBUG_J}, \
775: {"", TARGET_DEFAULT} \
776: }
777:
778: /* Default target_flags if no switches are specified */
779:
780: #ifndef TARGET_DEFAULT
781: #define TARGET_DEFAULT 0
782: #endif
783:
784: /* This macro is similar to `TARGET_SWITCHES' but defines names of
785: command options that have values. Its definition is an
786: initializer with a subgrouping for each command option.
787:
788: Each subgrouping contains a string constant, that defines the
789: fixed part of the option name, and the address of a variable.
790: The variable, type `char *', is set to the variable part of the
791: given option if the fixed part matches. The actual option name
792: is made by appending `-m' to the specified name.
793:
794: Here is an example which defines `-mshort-data-NUMBER'. If the
795: given option is `-mshort-data-512', the variable `m88k_short_data'
796: will be set to the string `"512"'.
797:
798: extern char *m88k_short_data;
799: #define TARGET_OPTIONS { { "short-data-", &m88k_short_data } } */
800:
801: #define TARGET_OPTIONS \
802: { \
803: { "cpu=", &mips_cpu_string }, \
804: { "ips", &mips_isa_string } \
805: }
806:
807: /* Macros to decide whether certain features are available or not,
808: depending on the instruction set architecture level. */
809:
810: #define BRANCH_LIKELY_P() (mips_isa >= 2)
811: #define HAVE_64BIT_P() (mips_isa >= 3)
812: #define HAVE_SQRT_P() (mips_isa >= 2)
813:
814:
815: /* Target machine storage layout */
816:
817: /* Define this if most significant bit is lowest numbered
818: in instructions that operate on numbered bit-fields.
819: */
820: /* #define BITS_BIG_ENDIAN */
821:
822: /* Define this if most significant byte of a word is the lowest numbered. */
823: #ifndef BYTES_BIG_ENDIAN
824: #ifndef DECSTATION
825: #define BYTES_BIG_ENDIAN 1
826: #else
827: #define BYTES_BIG_ENDIAN 0
828: #endif
829: #endif
830:
831: /* Define this if most significant word of a multiword number is the lowest. */
832: #ifndef WORDS_BIG_ENDIAN
833: #ifndef DECSTATION
834: #define WORDS_BIG_ENDIAN 1
835: #else
836: #define WORDS_BIG_ENDIAN 0
837: #endif
838: #endif
839:
840: /* Define macros to easily access the most and least significant words
841: without a lot of #ifdef's. */
842:
843: #if WORDS_BIG_ENDIAN
844: #define MOST_SIGNIFICANT_WORD 0
845: #define LEAST_SIGNIFICANT_WORD 1
846:
847: #else
848: #define MOST_SIGNIFICANT_WORD 1
849: #define LEAST_SIGNIFICANT_WORD 0
850: #endif
851:
1.1.1.2 root 852: /* Number of bits in an addressable storage unit */
1.1 root 853: #define BITS_PER_UNIT 8
854:
855: /* Width in bits of a "word", which is the contents of a machine register.
856: Note that this is not necessarily the width of data type `int';
857: if using 16-bit ints on a 68000, this would still be 32.
858: But on a machine with 16-bit registers, this would be 16. */
859: #define BITS_PER_WORD 32
860:
861: /* Width of a word, in units (bytes). */
862: #define UNITS_PER_WORD 4
863:
864: /* A C expression for the size in bits of the type `int' on the
865: target machine. If you don't define this, the default is one
866: word. */
867: #define INT_TYPE_SIZE 32
868:
869: /* A C expression for the size in bits of the type `short' on the
870: target machine. If you don't define this, the default is half a
871: word. (If this would be less than one storage unit, it is
872: rounded up to one unit.) */
873: #define SHORT_TYPE_SIZE 16
874:
875: /* A C expression for the size in bits of the type `long' on the
876: target machine. If you don't define this, the default is one
877: word. */
878: #define LONG_TYPE_SIZE 32
879:
880: /* A C expression for the size in bits of the type `long long' on the
881: target machine. If you don't define this, the default is two
882: words. */
883: #define LONG_LONG_TYPE_SIZE 64
884:
885: /* A C expression for the size in bits of the type `char' on the
886: target machine. If you don't define this, the default is one
887: quarter of a word. (If this would be less than one storage unit,
888: it is rounded up to one unit.) */
889: #define CHAR_TYPE_SIZE BITS_PER_UNIT
890:
891: /* A C expression for the size in bits of the type `float' on the
892: target machine. If you don't define this, the default is one
893: word. */
894: #define FLOAT_TYPE_SIZE 32
895:
896: /* A C expression for the size in bits of the type `double' on the
897: target machine. If you don't define this, the default is two
898: words. */
899: #define DOUBLE_TYPE_SIZE 64
900:
901: /* A C expression for the size in bits of the type `long double' on
902: the target machine. If you don't define this, the default is two
903: words. */
904: #define LONG_DOUBLE_TYPE_SIZE 64
905:
906: /* Width in bits of a pointer.
907: See also the macro `Pmode' defined below. */
908: #define POINTER_SIZE 32
909:
910: /* Allocation boundary (in *bits*) for storing pointers in memory. */
911: #define POINTER_BOUNDARY 32
912:
913: /* Allocation boundary (in *bits*) for storing arguments in argument list. */
914: #define PARM_BOUNDARY 32
915:
916: /* Allocation boundary (in *bits*) for the code of a function. */
917: #define FUNCTION_BOUNDARY 32
918:
919: /* Alignment of field after `int : 0' in a structure. */
920: #define EMPTY_FIELD_BOUNDARY 32
921:
922: /* Every structure's size must be a multiple of this. */
923: /* 8 is observed right on a DECstation and on riscos 4.02. */
924: #define STRUCTURE_SIZE_BOUNDARY 8
925:
926: /* There is no point aligning anything to a rounder boundary than this. */
927: #define BIGGEST_ALIGNMENT 64
928:
929: /* Biggest alignment any structure field can require in bits. */
930: #define BIGGEST_FIELD_ALIGNMENT 64
931:
1.1.1.2 root 932: /* Set this nonzero if move instructions will actually fail to work
1.1 root 933: when given unaligned data. */
1.1.1.2 root 934: #define STRICT_ALIGNMENT 1
1.1 root 935:
936: /* Define this if you wish to imitate the way many other C compilers
937: handle alignment of bitfields and the structures that contain
938: them.
939:
940: The behavior is that the type written for a bitfield (`int',
941: `short', or other integer type) imposes an alignment for the
942: entire structure, as if the structure really did contain an
943: ordinary field of that type. In addition, the bitfield is placed
944: within the structure so that it would fit within such a field,
945: not crossing a boundary for it.
946:
947: Thus, on most machines, a bitfield whose type is written as `int'
948: would not cross a four-byte boundary, and would force four-byte
949: alignment for the whole structure. (The alignment used may not
950: be four bytes; it is controlled by the other alignment
951: parameters.)
952:
953: If the macro is defined, its definition should be a C expression;
954: a nonzero value for the expression enables this behavior. */
955:
956: #define PCC_BITFIELD_TYPE_MATTERS 1
957:
958: /* If defined, a C expression to compute the alignment given to a
959: constant that is being placed in memory. CONSTANT is the constant
960: and ALIGN is the alignment that the object would ordinarily have.
961: The value of this macro is used instead of that alignment to align
962: the object.
963:
964: If this macro is not defined, then ALIGN is used.
965:
966: The typical use of this macro is to increase alignment for string
967: constants to be word aligned so that `strcpy' calls that copy
968: constants can be done inline. */
969:
970: #define CONSTANT_ALIGNMENT(EXP, ALIGN) \
971: ((TREE_CODE (EXP) == STRING_CST || TREE_CODE (EXP) == CONSTRUCTOR) \
972: && (ALIGN) < BITS_PER_WORD \
973: ? BITS_PER_WORD \
974: : (ALIGN))
975:
976: /* If defined, a C expression to compute the alignment for a static
977: variable. TYPE is the data type, and ALIGN is the alignment that
978: the object would ordinarily have. The value of this macro is used
979: instead of that alignment to align the object.
980:
981: If this macro is not defined, then ALIGN is used.
982:
983: One use of this macro is to increase alignment of medium-size
984: data to make it all fit in fewer cache lines. Another is to
985: cause character arrays to be word-aligned so that `strcpy' calls
986: that copy constants to character arrays can be done inline. */
987:
988: #undef DATA_ALIGNMENT
989: #define DATA_ALIGNMENT(TYPE, ALIGN) \
990: ((((ALIGN) < BITS_PER_WORD) \
991: && (TREE_CODE (TYPE) == ARRAY_TYPE \
992: || TREE_CODE (TYPE) == UNION_TYPE \
993: || TREE_CODE (TYPE) == RECORD_TYPE)) ? BITS_PER_WORD : (ALIGN))
994:
995: /* Define this macro if an argument declared as `char' or `short' in a
996: prototype should actually be passed as an `int'. In addition to
997: avoiding errors in certain cases of mismatch, it also makes for
998: better code on certain machines. */
999:
1000: #define PROMOTE_PROTOTYPES
1001:
1002: /* Define this macro if an instruction to load a value narrower
1003: than a word from memory into a register also zero-extends the
1004: value to the whole register. */
1005:
1006: #define BYTE_LOADS_ZERO_EXTEND
1007:
1008:
1009: /* Standard register usage. */
1010:
1011: /* Number of actual hardware registers.
1012: The hardware registers are assigned numbers for the compiler
1013: from 0 to just below FIRST_PSEUDO_REGISTER.
1014: All registers that the compiler knows about must be given numbers,
1015: even those that are not normally considered general registers.
1016:
1017: On the Mips, we have 32 integer registers, 32 floating point registers
1018: and the special registers hi, lo, and fp status. */
1019:
1020: #define FIRST_PSEUDO_REGISTER 67
1021:
1022: /* 1 for registers that have pervasive standard uses
1023: and are not available for the register allocator.
1024:
1025: On the MIPS, see conventions, page D-2 */
1026:
1027: #define FIXED_REGISTERS \
1028: { \
1029: 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
1030: 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 1, \
1031: 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
1032: 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
1033: 1, 1, 1 \
1034: }
1035:
1036:
1037: /* 1 for registers not available across function calls.
1038: These must include the FIXED_REGISTERS and also any
1039: registers that can be used without being saved.
1040: The latter must include the registers where values are returned
1041: and the register where structure-value addresses are passed.
1042: Aside from that, you can include as many other registers as you like. */
1043:
1044: #define CALL_USED_REGISTERS \
1045: { \
1046: 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
1047: 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 1, \
1048: 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
1049: 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
1050: 1, 1, 1 \
1051: }
1052:
1053:
1054: /* Internal macros to classify a register number as to whether it's a
1055: general purpose register, a floating point register, a
1056: multiply/divide register, or a status register.
1057:
1058: The macro FP_CALL_REG_P also allows registers $4 and $6 as floating
1059: point registers to pass floating point as per MIPS spec. */
1060:
1061: #define GP_REG_FIRST 0
1062: #define GP_REG_LAST 31
1063: #define GP_REG_NUM (GP_REG_LAST - GP_REG_FIRST + 1)
1064: #define GP_DBX_FIRST 0
1065:
1066: #define FP_REG_FIRST 32
1067: #define FP_REG_LAST 63
1068: #define FP_REG_NUM (FP_REG_LAST - FP_REG_FIRST + 1)
1069: #define FP_DBX_FIRST ((write_symbols == DBX_DEBUG) ? 38 : 32)
1070:
1071: #define MD_REG_FIRST 64
1072: #define MD_REG_LAST 65
1073: #define MD_REG_NUM (MD_REG_LAST - MD_REG_FIRST + 1)
1074:
1075: #define ST_REG_FIRST 66
1076: #define ST_REG_LAST 66
1077: #define ST_REG_NUM (ST_REG_LAST - ST_REG_FIRST + 1)
1078:
1079: #define AT_REGNUM (GP_REG_FIRST + 1)
1080: #define HI_REGNUM (MD_REG_FIRST + 0)
1081: #define LO_REGNUM (MD_REG_FIRST + 1)
1082: #define FPSW_REGNUM ST_REG_FIRST
1083:
1084: #define GP_REG_P(REGNO) ((unsigned) ((REGNO) - GP_REG_FIRST) < GP_REG_NUM)
1085: #define FP_REG_P(REGNO) ((unsigned) ((REGNO) - FP_REG_FIRST) < FP_REG_NUM)
1086: #define MD_REG_P(REGNO) ((unsigned) ((REGNO) - MD_REG_FIRST) < MD_REG_NUM)
1087: #define ST_REG_P(REGNO) ((REGNO) == ST_REG_FIRST)
1088:
1089: #define FP_CALL_REG_P(REGNO) \
1090: (FP_REG_P (REGNO) \
1091: || (REGNO) == (4 + GP_REG_FIRST) \
1092: || (REGNO) == (6 + GP_REG_FIRST))
1093:
1094: /* Return number of consecutive hard regs needed starting at reg REGNO
1095: to hold something of mode MODE.
1096: This is ordinarily the length in words of a value of mode MODE
1097: but can be less for certain modes in special long registers.
1098:
1099: On the MIPS, all general registers are one word long. Except on
1100: the R4000 with the FR bit set, the floating point uses register
1101: pairs, with the second register not being allocatable. */
1102:
1103: #define HARD_REGNO_NREGS(REGNO, MODE) \
1104: (! FP_REG_P (REGNO) \
1105: ? ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD) \
1106: : (((GET_MODE_SIZE (MODE) + (2*UNITS_PER_WORD) - 1) / (2*UNITS_PER_WORD)) \
1107: << (TARGET_FLOAT64 == 0)))
1108:
1109: /* Value is 1 if hard register REGNO can hold a value of machine-mode
1110: MODE. Require that DImode and DFmode be in even registers. For
1111: DImode, this makes some of the insns easier to write, since you
1112: don't have to worry about a DImode value in registers 3 & 4,
1113: producing a result in 4 & 5.
1114:
1115: To make the code simpler HARD_REGNO_MODE_OK now just references an
1116: array built in override_options. Because machmodes.h is not yet
1117: included before this file is processed, the MODE bound can't be
1118: expressed here. */
1119:
1120: extern char mips_hard_regno_mode_ok[][FIRST_PSEUDO_REGISTER];
1121:
1122: #define HARD_REGNO_MODE_OK(REGNO, MODE) \
1123: mips_hard_regno_mode_ok[ (int)(MODE) ][ (REGNO) ]
1124:
1125: /* Value is 1 if it is a good idea to tie two pseudo registers
1126: when one has mode MODE1 and one has mode MODE2.
1127: If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
1128: for any hard reg, then this must be 0 for correct output. */
1129: #define MODES_TIEABLE_P(MODE1, MODE2) \
1130: ((GET_MODE_CLASS (MODE1) == MODE_FLOAT || \
1131: GET_MODE_CLASS (MODE1) == MODE_COMPLEX_FLOAT) \
1132: == (GET_MODE_CLASS (MODE2) == MODE_FLOAT || \
1133: GET_MODE_CLASS (MODE2) == MODE_COMPLEX_FLOAT))
1134:
1135: /* MIPS pc is not overloaded on a register. */
1136: /* #define PC_REGNUM xx */
1137:
1138: /* Register to use for pushing function arguments. */
1139: #define STACK_POINTER_REGNUM 29
1140:
1141: /* Offset from the stack pointer to the first available location. */
1142: #define STACK_POINTER_OFFSET 0
1143:
1144: /* Base register for access to local variables of the function. */
1145: #define FRAME_POINTER_REGNUM 30
1146:
1147: /* Value should be nonzero if functions must have frame pointers.
1148: Zero means the frame pointer need not be set up (and parms
1149: may be accessed via the stack pointer) in functions that seem suitable.
1150: This is computed in `reload', in reload1.c. */
1151: #define FRAME_POINTER_REQUIRED (current_function_calls_alloca)
1152:
1153: /* Base register for access to arguments of the function. */
1154: #define ARG_POINTER_REGNUM FRAME_POINTER_REGNUM
1155:
1156: /* Register in which static-chain is passed to a function. */
1157: #define STATIC_CHAIN_REGNUM 2
1158:
1159: /* Register in which address to store a structure value
1160: is passed to a function. */
1161: #define STRUCT_VALUE_REGNUM 4
1162:
1163: /* Mips registers used in prologue/epilogue code when the stack frame
1164: is larger than 32K bytes. These registers must come from the
1165: scratch register set, and not used for passing and returning
1166: arguments and any other information used in the calling sequence
1167: (such as pic). */
1168: #define MIPS_TEMP1_REGNUM 8
1169: #define MIPS_TEMP2_REGNUM 9
1170:
1171: /* Define this macro if it is as good or better to call a constant
1172: function address than to call an address kept in a register. */
1173: #define NO_FUNCTION_CSE 1
1174:
1175: /* Define this macro if it is as good or better for a function to
1176: call itself with an explicit address than to call an address
1177: kept in a register. */
1178: #define NO_RECURSIVE_FUNCTION_CSE 1
1179:
1180: /* The register number of the register used to address a table of
1181: static data addresses in memory. In some cases this register is
1182: defined by a processor's "application binary interface" (ABI).
1183: When this macro is defined, RTL is generated for this register
1184: once, as with the stack pointer and frame pointer registers. If
1185: this macro is not defined, it is up to the machine-dependent
1186: files to allocate such a register (if necessary). */
1187: #define PIC_OFFSET_TABLE_REGNUM 28
1188:
1189:
1190: /* Define the classes of registers for register constraints in the
1191: machine description. Also define ranges of constants.
1192:
1193: One of the classes must always be named ALL_REGS and include all hard regs.
1194: If there is more than one class, another class must be named NO_REGS
1195: and contain no registers.
1196:
1197: The name GENERAL_REGS must be the name of a class (or an alias for
1198: another name such as ALL_REGS). This is the class of registers
1199: that is allowed by "g" or "r" in a register constraint.
1200: Also, registers outside this class are allocated only when
1201: instructions express preferences for them.
1202:
1203: The classes must be numbered in nondecreasing order; that is,
1204: a larger-numbered class must never be contained completely
1205: in a smaller-numbered class.
1206:
1207: For any two classes, it is very desirable that there be another
1208: class that represents their union. */
1209:
1210: enum reg_class
1211: {
1212: NO_REGS, /* no registers in set */
1213: GR_REGS, /* integer registers */
1214: FP_REGS, /* floating point registers */
1215: HI_REG, /* hi register */
1216: LO_REG, /* lo register */
1217: MD_REGS, /* multiply/divide registers (hi/lo) */
1218: ST_REGS, /* status registers (fp status) */
1219: ALL_REGS, /* all registers */
1220: LIM_REG_CLASSES /* max value + 1 */
1221: };
1222:
1223: #define N_REG_CLASSES (int) LIM_REG_CLASSES
1224:
1225: #define GENERAL_REGS GR_REGS
1226:
1227: /* An initializer containing the names of the register classes as C
1228: string constants. These names are used in writing some of the
1229: debugging dumps. */
1230:
1231: #define REG_CLASS_NAMES \
1232: { \
1233: "NO_REGS", \
1234: "GR_REGS", \
1235: "FP_REGS", \
1236: "HI_REG", \
1237: "LO_REG", \
1238: "MD_REGS", \
1239: "ST_REGS", \
1240: "ALL_REGS" \
1241: }
1242:
1243: /* An initializer containing the contents of the register classes,
1244: as integers which are bit masks. The Nth integer specifies the
1245: contents of class N. The way the integer MASK is interpreted is
1246: that register R is in the class if `MASK & (1 << R)' is 1.
1247:
1248: When the machine has more than 32 registers, an integer does not
1249: suffice. Then the integers are replaced by sub-initializers,
1250: braced groupings containing several integers. Each
1251: sub-initializer must be suitable as an initializer for the type
1252: `HARD_REG_SET' which is defined in `hard-reg-set.h'. */
1253:
1254: #define REG_CLASS_CONTENTS \
1255: { \
1256: { 0x00000000, 0x00000000, 0x00000000 }, /* no registers */ \
1257: { 0xffffffff, 0x00000000, 0x00000000 }, /* integer registers */ \
1258: { 0x00000000, 0xffffffff, 0x00000000 }, /* floating registers*/ \
1259: { 0x00000000, 0x00000000, 0x00000001 }, /* lo register */ \
1260: { 0x00000000, 0x00000000, 0x00000002 }, /* hi register */ \
1261: { 0x00000000, 0x00000000, 0x00000003 }, /* mul/div registers */ \
1262: { 0x00000000, 0x00000000, 0x00000004 }, /* status registers */ \
1263: { 0xffffffff, 0xffffffff, 0x00000007 } /* all registers */ \
1264: }
1265:
1266:
1267: /* A C expression whose value is a register class containing hard
1268: register REGNO. In general there is more that one such class;
1269: choose a class which is "minimal", meaning that no smaller class
1270: also contains the register. */
1271:
1272: extern enum reg_class mips_regno_to_class[];
1273:
1274: #define REGNO_REG_CLASS(REGNO) mips_regno_to_class[ (REGNO) ]
1275:
1276: /* A macro whose definition is the name of the class to which a
1277: valid base register must belong. A base register is one used in
1278: an address which is the register value plus a displacement. */
1279:
1280: #define BASE_REG_CLASS GR_REGS
1281:
1282: /* A macro whose definition is the name of the class to which a
1283: valid index register must belong. An index register is one used
1284: in an address where its value is either multiplied by a scale
1285: factor or added to another register (as well as added to a
1286: displacement). */
1287:
1288: #define INDEX_REG_CLASS GR_REGS
1289:
1290:
1291: /* REGISTER AND CONSTANT CLASSES */
1292:
1293: /* Get reg_class from a letter such as appears in the machine
1294: description.
1295:
1296: DEFINED REGISTER CLASSES:
1297:
1298: 'd' General (aka integer) registers
1299: 'f' Floating point registers
1300: 'h' Hi register
1301: 'l' Lo register
1.1.1.3 ! root 1302: 'x' Multiply/divide registers
! 1303: 'z' FP Status register */
1.1 root 1304:
1305: extern enum reg_class mips_char_to_class[];
1306:
1307: #define REG_CLASS_FROM_LETTER(C) mips_char_to_class[ (C) ]
1308:
1309: /* The letters I, J, K, L, M, N, O, and P in a register constraint
1310: string can be used to stand for particular ranges of immediate
1311: operands. This macro defines what the ranges are. C is the
1312: letter, and VALUE is a constant value. Return 1 if VALUE is
1313: in the range specified by C. */
1314:
1315: /* For MIPS:
1316:
1317: `I' is used for the range of constants an arithmetic insn can
1318: actually contain (16 bits signed integers).
1319:
1320: `J' is used for the range which is just zero (ie, $r0).
1321:
1322: `K' is used for the range of constants a logical insn can actually
1323: contain (16 bit zero-extended integers).
1324:
1325: `L' is used for the range of constants that be loaded with lui
1326: (ie, the bottom 16 bits are zero).
1327:
1328: `M' is used for the range of constants that take two words to load
1329: (ie, not matched by `I', `K', and `L').
1330:
1331: `N' is used for negative 16 bit constants.
1332:
1333: `O' is an exact power of 2 (not yet used in the md file).
1334:
1335: `P' is used for positive 16 bit constants. */
1336:
1337: #define SMALL_INT(X) ((unsigned) (INTVAL (X) + 0x8000) < 0x10000)
1338: #define SMALL_INT_UNSIGNED(X) ((unsigned) (INTVAL (X)) < 0x10000)
1339:
1340: #define CONST_OK_FOR_LETTER_P(VALUE, C) \
1341: ((C) == 'I' ? ((unsigned) ((VALUE) + 0x8000) < 0x10000) \
1342: : (C) == 'J' ? ((VALUE) == 0) \
1343: : (C) == 'K' ? ((unsigned) (VALUE) < 0x10000) \
1344: : (C) == 'L' ? (((VALUE) & 0xffff0000) == (VALUE)) \
1345: : (C) == 'M' ? ((((VALUE) & 0xffff0000) != 0) \
1346: && (((VALUE) & 0xffff0000) != 0xffff0000) \
1347: && ((VALUE) & 0x0000ffff) != 0) \
1348: : (C) == 'N' ? (((VALUE) & 0xffff0000) == 0xffff0000) \
1349: : (C) == 'O' ? (exact_log2 (VALUE) >= 0) \
1350: : (C) == 'P' ? ((VALUE) != 0 && (((VALUE) & 0xffff0000) == 0)) \
1351: : 0)
1352:
1353: /* Similar, but for floating constants, and defining letters G and H.
1354: Here VALUE is the CONST_DOUBLE rtx itself. */
1355:
1356: /* For Mips
1357:
1358: 'G' : Floating point 0 */
1359:
1360: #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
1361: ((C) == 'G' \
1362: && CONST_DOUBLE_HIGH (VALUE) == 0 \
1363: && CONST_DOUBLE_LOW (VALUE) == 0)
1364:
1365: /* Letters in the range `Q' through `U' may be defined in a
1366: machine-dependent fashion to stand for arbitrary operand types.
1367: The machine description macro `EXTRA_CONSTRAINT' is passed the
1368: operand as its first argument and the constraint letter as its
1369: second operand.
1370:
1.1.1.2 root 1371: `Q' is for memory references which take more than 1 instruction.
1372: `R' is for memory references which take 1 word for the instruction.
1.1 root 1373: `S' is for references to extern items which are PIC for OSF/rose. */
1374:
1375: #define EXTRA_CONSTRAINT(OP,CODE) \
1376: ((GET_CODE (OP) != MEM) ? FALSE \
1377: : ((CODE) == 'Q') ? !simple_memory_operand (OP, GET_MODE (OP)) \
1378: : ((CODE) == 'R') ? simple_memory_operand (OP, GET_MODE (OP)) \
1379: : ((CODE) == 'S') ? (HALF_PIC_P () && CONSTANT_P (OP) \
1380: && HALF_PIC_ADDRESS_P (OP)) \
1381: : FALSE)
1382:
1383: /* Given an rtx X being reloaded into a reg required to be
1384: in class CLASS, return the class of reg to actually use.
1385: In general this is just CLASS; but on some machines
1386: in some cases it is preferable to use a more restrictive class. */
1387:
1388: #define PREFERRED_RELOAD_CLASS(X,CLASS) \
1389: ((GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT \
1390: || GET_MODE_CLASS (GET_MODE (X)) == MODE_COMPLEX_FLOAT) \
1391: ? (TARGET_SOFT_FLOAT ? GR_REGS : FP_REGS) \
1392: : ((GET_MODE (X) == VOIDmode) \
1393: ? GR_REGS \
1394: : CLASS))
1395:
1396: /* Return the maximum number of consecutive registers
1397: needed to represent mode MODE in a register of class CLASS. */
1398:
1399: #define CLASS_MAX_NREGS(CLASS, MODE) \
1400: ((((MODE) == DFmode) || ((MODE) == SFmode)) ? 2 \
1401: : ((MODE) == VOIDmode)? ((CLASS) == FP_REGS ? 2 : 1) \
1402: : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))
1403:
1404: /* If defined, this is a C expression whose value should be
1405: nonzero if the insn INSN has the effect of mysteriously
1406: clobbering the contents of hard register number REGNO. By
1407: "mysterious" we mean that the insn's RTL expression doesn't
1408: describe such an effect.
1409:
1410: If this macro is not defined, it means that no insn clobbers
1411: registers mysteriously. This is the usual situation; all else
1412: being equal, it is best for the RTL expression to show all the
1413: activity. */
1414:
1415: /* #define INSN_CLOBBERS_REGNO_P(INSN, REGNO) */
1416:
1417:
1418: /* Stack layout; function entry, exit and calling. */
1419:
1420: /* Define this if pushing a word on the stack
1421: makes the stack pointer a smaller address. */
1422: #define STACK_GROWS_DOWNWARD
1423:
1424: /* Define this if the nominal address of the stack frame
1425: is at the high-address end of the local variables;
1426: that is, each additional local variable allocated
1427: goes at a more negative offset in the frame. */
1428: #define FRAME_GROWS_DOWNWARD
1429:
1430: /* Offset within stack frame to start allocating local variables at.
1431: If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
1432: first local allocated. Otherwise, it is the offset to the BEGINNING
1433: of the first local allocated. */
1434: #define STARTING_FRAME_OFFSET (-8)
1435:
1436: /* Structure to be filled in by compute_frame_size with register
1437: save masks, and offsets for the current function. */
1438:
1439: struct mips_frame_info
1440: {
1441: unsigned long total_size; /* # bytes that the entire frame takes up */
1442: unsigned long var_size; /* # bytes that variables take up */
1443: unsigned long args_size; /* # bytes that outgoing arguments take up */
1444: unsigned long extra_size; /* # bytes of extra gunk */
1445: unsigned int gp_reg_size; /* # bytes needed to store gp regs */
1446: unsigned int fp_reg_size; /* # bytes needed to store fp regs */
1447: unsigned long mask; /* mask of saved gp registers */
1448: unsigned long fmask; /* mask of saved fp registers */
1449: long gp_save_offset; /* offset from vfp to store gp registers */
1450: long fp_save_offset; /* offset from vfp to store fp registers */
1451: unsigned long gp_sp_offset; /* offset from new sp to store gp registers */
1452: unsigned long fp_sp_offset; /* offset from new sp to store fp registers */
1453: int initialized; /* != 0 if frame size already calculated */
1454: };
1455:
1456: extern struct mips_frame_info current_frame_info;
1457:
1458: /* Store in the variable DEPTH the initial difference between the
1459: frame pointer reg contents and the stack pointer reg contents,
1460: as of the start of the function body. This depends on the layout
1461: of the fixed parts of the stack frame and on how registers are saved. */
1462:
1463: #define INITIAL_FRAME_POINTER_OFFSET(VAR) \
1464: ((VAR) = compute_frame_size (get_frame_size ()))
1465:
1466: /* If we generate an insn to push BYTES bytes,
1467: this says how many the stack pointer really advances by.
1468: On the vax, sp@- in a byte insn really pushes a word. */
1469:
1470: /* #define PUSH_ROUNDING(BYTES) 0 */
1471:
1472: /* If defined, the maximum amount of space required for outgoing
1473: arguments will be computed and placed into the variable
1474: `current_function_outgoing_args_size'. No space will be pushed
1475: onto the stack for each call; instead, the function prologue
1476: should increase the stack frame size by this amount.
1477:
1478: It is not proper to define both `PUSH_ROUNDING' and
1479: `ACCUMULATE_OUTGOING_ARGS'. */
1480: #define ACCUMULATE_OUTGOING_ARGS
1481:
1482: /* Offset of first parameter from the argument pointer register value. */
1483: #define FIRST_PARM_OFFSET(FNDECL) 0
1484:
1485: /* Offset from top-of-stack address to location to store the
1486: function parameter if it can't go in a register.
1487: Addresses for following parameters are computed relative to this one.
1488:
1489: It also has the effect of counting register arguments in the total
1490: argument size. */
1491: #define FIRST_PARM_CALLER_OFFSET(FNDECL) 0
1492:
1493: /* When a parameter is passed in a register, stack space is still
1494: allocated for it. For the MIPS, stack space must be allocated, cf
1495: Asm Lang Prog Guide page 7-8.
1496:
1497: BEWARE that some space is also allocated for non existing arguments
1498: in register. In case an argument list is of form GF used registers
1499: are a0 (a2,a3), but we should push over a1... */
1500:
1501: #define REG_PARM_STACK_SPACE(FNDECL) (4*4)
1502:
1503: /* Define this if it is the responsibility of the caller to
1504: allocate the area reserved for arguments passed in registers.
1505: If `ACCUMULATE_OUTGOING_ARGS' is also defined, the only effect
1506: of this macro is to determine whether the space is included in
1507: `current_function_outgoing_args_size'. */
1508: #define OUTGOING_REG_PARM_STACK_SPACE
1509:
1510: /* Align stack frames on 64 bits (Double Word ). */
1511: #define STACK_BOUNDARY 64
1512:
1513: /* Make sure 16 bytes are always allocated on the stack. */
1514:
1515: #ifndef STACK_ARGS_ADJUST
1516: #define STACK_ARGS_ADJUST(SIZE) \
1517: { \
1518: if (SIZE.constant < 16) \
1519: SIZE.constant = 16; \
1520: }
1521: #endif
1522:
1523:
1524: /* A C expression that should indicate the number of bytes of its
1525: own arguments that a function function pops on returning, or 0
1526: if the function pops no arguments and the caller must therefore
1527: pop them all after the function returns.
1528:
1529: FUNTYPE is a C variable whose value is a tree node that
1530: describes the function in question. Normally it is a node of
1531: type `FUNCTION_TYPE' that describes the data type of the function.
1532: From this it is possible to obtain the data types of the value
1533: and arguments (if known).
1534:
1535: When a call to a library function is being considered, FUNTYPE
1536: will contain an identifier node for the library function. Thus,
1537: if you need to distinguish among various library functions, you
1538: can do so by their names. Note that "library function" in this
1539: context means a function used to perform arithmetic, whose name
1540: is known specially in the compiler and was not mentioned in the
1541: C code being compiled.
1542:
1543: STACK-SIZE is the number of bytes of arguments passed on the
1544: stack. If a variable number of bytes is passed, it is zero, and
1545: argument popping will always be the responsibility of the
1546: calling function. */
1547:
1548: #define RETURN_POPS_ARGS(FUNTYPE, SIZE) 0
1549:
1550:
1551: /* Symbolic macros for the registers used to return integer and floating
1552: point values. */
1553:
1554: #define GP_RETURN (GP_REG_FIRST + 2)
1555: #define FP_RETURN ((TARGET_SOFT_FLOAT) ? GP_RETURN : (FP_REG_FIRST + 0))
1556:
1557: /* Symbolic macros for the first/last argument registers. */
1558:
1559: #define GP_ARG_FIRST (GP_REG_FIRST + 4)
1560: #define GP_ARG_LAST (GP_REG_FIRST + 7)
1561: #define FP_ARG_FIRST (FP_REG_FIRST + 12)
1562: #define FP_ARG_LAST (FP_REG_FIRST + 15)
1563:
1564: #define MAX_ARGS_IN_REGISTERS 4
1565:
1566: /* Define how to find the value returned by a library function
1567: assuming the value has mode MODE. */
1568:
1569: #define LIBCALL_VALUE(MODE) \
1570: gen_rtx (REG, MODE, \
1571: (GET_MODE_CLASS (MODE) == MODE_FLOAT) \
1572: ? FP_RETURN \
1573: : GP_RETURN)
1574:
1575: /* Define how to find the value returned by a function.
1576: VALTYPE is the data type of the value (as a tree).
1577: If the precise function being called is known, FUNC is its FUNCTION_DECL;
1578: otherwise, FUNC is 0. */
1579:
1580: #define FUNCTION_VALUE(VALTYPE, FUNC) LIBCALL_VALUE (TYPE_MODE (VALTYPE))
1581:
1582:
1583: /* 1 if N is a possible register number for a function value.
1584: On the MIPS, R2 R3 and F0 F2 are the only register thus used.
1585: Currently, R2 and F0 are only implemented here (C has no complex type) */
1586:
1587: #define FUNCTION_VALUE_REGNO_P(N) ((N) == GP_RETURN || (N) == FP_RETURN)
1588:
1589: /* 1 if N is a possible register number for function argument passing. */
1590:
1591: #define FUNCTION_ARG_REGNO_P(N) (((N) >= GP_ARG_FIRST && (N) <= GP_ARG_LAST) \
1592: || ((N) >= FP_ARG_FIRST && (N) <= FP_ARG_LAST \
1593: && (0 == (N) % 2)))
1594:
1595: /* A C expression which can inhibit the returning of certain function
1596: values in registers, based on the type of value. A nonzero value says
1597: to return the function value in memory, just as large structures are
1598: always returned. Here TYPE will be a C expression of type
1599: `tree', representing the data type of the value.
1600:
1601: Note that values of mode `BLKmode' are returned in memory
1602: regardless of this macro. Also, the option `-fpcc-struct-return'
1603: takes effect regardless of this macro. On most systems, it is
1604: possible to leave the macro undefined; this causes a default
1605: definition to be used, whose value is the constant 0.
1606:
1607: GCC normally converts 1 byte structures into chars, 2 byte
1608: structs into shorts, and 4 byte structs into ints, and returns
1609: them this way. Defining the following macro overrides this,
1610: to give us MIPS cc compatibility. */
1611:
1612: #define RETURN_IN_MEMORY(TYPE) \
1613: ((TREE_CODE (TYPE) == RECORD_TYPE) || (TREE_CODE (TYPE) == UNION_TYPE))
1614:
1615:
1616: /* A code distinguishing the floating point format of the target
1617: machine. There are three defined values: IEEE_FLOAT_FORMAT,
1618: VAX_FLOAT_FORMAT, and UNKNOWN_FLOAT_FORMAT. */
1619:
1620: #define TARGET_FLOAT_FORMAT IEEE_FLOAT_FORMAT
1621:
1622:
1623: /* Define a data type for recording info about an argument list
1624: during the scan of that argument list. This data type should
1625: hold all necessary information about the function itself
1626: and about the args processed so far, enough to enable macros
1627: such as FUNCTION_ARG to determine where the next arg should go.
1628: */
1629:
1630: typedef struct mips_args {
1631: int gp_reg_found;
1632: int arg_number;
1633: int arg_words;
1634: } CUMULATIVE_ARGS;
1635:
1636: /* Initialize a variable CUM of type CUMULATIVE_ARGS
1637: for a call to a function whose data type is FNTYPE.
1638: For a library call, FNTYPE is 0.
1639:
1640: */
1641:
1642: #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME) \
1643: init_cumulative_args (&CUM, FNTYPE, LIBNAME) \
1644:
1645: /* Update the data in CUM to advance over an argument
1646: of mode MODE and data type TYPE.
1647: (TYPE is null for libcalls where that information may not be available.) */
1648:
1649: #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
1650: function_arg_advance (&CUM, MODE, TYPE, NAMED)
1651:
1652: /* Determine where to put an argument to a function.
1653: Value is zero to push the argument on the stack,
1654: or a hard register in which to store the argument.
1655:
1656: MODE is the argument's machine mode.
1657: TYPE is the data type of the argument (as a tree).
1658: This is null for libcalls where that information may
1659: not be available.
1660: CUM is a variable of type CUMULATIVE_ARGS which gives info about
1661: the preceding args and about the function being called.
1662: NAMED is nonzero if this argument is a named parameter
1663: (otherwise it is an extra parameter matching an ellipsis). */
1664:
1665: #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
1666: function_arg( &CUM, MODE, TYPE, NAMED)
1667:
1668: /* For an arg passed partly in registers and partly in memory,
1669: this is the number of registers used.
1670: For args passed entirely in registers or entirely in memory, zero. */
1671:
1672: #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) \
1673: function_arg_partial_nregs (&CUM, MODE, TYPE, NAMED)
1674:
1675: /* If defined, a C expression that gives the alignment boundary, in
1676: bits, of an argument with the specified mode and type. If it is
1677: not defined, `PARM_BOUNDARY' is used for all arguments. */
1678:
1679: #define FUNCTION_ARG_BOUNDARY(MODE, TYPE) \
1680: (((TYPE) != 0) \
1681: ? ((TYPE_ALIGN(TYPE) <= PARM_BOUNDARY) \
1682: ? PARM_BOUNDARY \
1683: : TYPE_ALIGN(TYPE)) \
1684: : ((GET_MODE_ALIGNMENT(MODE) <= PARM_BOUNDARY) \
1685: ? PARM_BOUNDARY \
1686: : GET_MODE_ALIGNMENT(MODE)))
1687:
1688:
1689: /* This macro generates the assembly code for function entry.
1690: FILE is a stdio stream to output the code to.
1691: SIZE is an int: how many units of temporary storage to allocate.
1692: Refer to the array `regs_ever_live' to determine which registers
1693: to save; `regs_ever_live[I]' is nonzero if register number I
1694: is ever used in the function. This macro is responsible for
1695: knowing which registers should not be saved even if used. */
1696:
1697: #define FUNCTION_PROLOGUE(FILE, SIZE) function_prologue(FILE, SIZE)
1698:
1699: /* This macro generates the assembly code for function exit,
1700: on machines that need it. If FUNCTION_EPILOGUE is not defined
1701: then individual return instructions are generated for each
1702: return statement. Args are same as for FUNCTION_PROLOGUE. */
1703:
1704: #define FUNCTION_EPILOGUE(FILE, SIZE) function_epilogue(FILE, SIZE)
1705:
1706: /* Define the number of delay slots needed for the function epilogue.
1707:
1708: On the mips, we need a slot if either no stack has been allocated,
1709: or the only register saved is the return register. */
1710:
1711: #define DELAY_SLOTS_FOR_EPILOGUE mips_epilogue_delay_slots ()
1712:
1713: /* Define whether INSN can be placed in delay slot N for the epilogue.
1714: No references to the stack must be made, since on the MIPS, the
1715: delay slot is done after the stack has been cleaned up. */
1716:
1717: #define ELIGIBLE_FOR_EPILOGUE_DELAY(INSN,N) \
1718: (get_attr_dslot (INSN) == DSLOT_NO \
1719: && get_attr_length (INSN) == 1 \
1720: && ! reg_mentioned_p (stack_pointer_rtx, PATTERN (INSN)) \
1721: && ! reg_mentioned_p (frame_pointer_rtx, PATTERN (INSN)))
1722:
1723: /* Tell prologue and epilogue if register REGNO should be saved / restored. */
1724:
1725: #define MUST_SAVE_REGISTER(regno) \
1726: ((regs_ever_live[regno] && !call_used_regs[regno]) \
1727: || (regno == FRAME_POINTER_REGNUM && frame_pointer_needed) \
1728: || (regno == 31 && regs_ever_live[31]))
1729:
1730: /* ALIGN FRAMES on double word boundaries */
1731:
1732: #define MIPS_STACK_ALIGN(LOC) (((LOC)+7) & 0xfffffff8)
1733:
1734:
1735: /* Output assembler code to FILE to increment profiler label # LABELNO
1736: for profiling a function entry. */
1737:
1738: #define FUNCTION_PROFILER(FILE, LABELNO) \
1739: { \
1740: fprintf (FILE, "\t.set\tnoreorder\n"); \
1741: fprintf (FILE, "\t.set\tnoat\n"); \
1742: fprintf (FILE, "\tmove\t%s,%s\t\t# save current return address\n", \
1743: reg_names[GP_REG_FIRST + 1], reg_names[GP_REG_FIRST + 31]); \
1744: fprintf (FILE, "\tjal\t_mcount\n"); \
1745: fprintf (FILE, "\tsubu\t%s,%s,8\t\t# _mcount pops 2 words from stack\n", \
1746: reg_names[STACK_POINTER_REGNUM], \
1747: reg_names[STACK_POINTER_REGNUM]); \
1748: fprintf (FILE, "\t.set\treorder\n"); \
1749: fprintf (FILE, "\t.set\tat\n"); \
1750: }
1751:
1752: /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
1753: the stack pointer does not matter. The value is tested only in
1754: functions that have frame pointers.
1755: No definition is equivalent to always zero. */
1756:
1757: #define EXIT_IGNORE_STACK 1
1758:
1759:
1760: /* A C statement to output, on the stream FILE, assembler code for a
1761: block of data that contains the constant parts of a trampoline.
1762: This code should not include a label--the label is taken care of
1763: automatically. */
1764:
1765: #define TRAMPOLINE_TEMPLATE(STREAM) \
1766: { \
1767: fprintf (STREAM, "\t.word\t0x03e00821\t\t# move $1,$31\n"); \
1768: fprintf (STREAM, "\t.word\t0x04110001\t\t# bgezal $0,.+8\n"); \
1769: fprintf (STREAM, "\t.word\t0x00000000\t\t# nop\n"); \
1770: fprintf (STREAM, "\t.word\t0x8fe30010\t\t# lw $3,16($31)\n"); \
1771: fprintf (STREAM, "\t.word\t0x8fe20014\t\t# lw $2,20($31)\n"); \
1772: fprintf (STREAM, "\t.word\t0x00600008\t\t# jr $3\n"); \
1773: fprintf (STREAM, "\t.word\t0x0020f821\t\t# move $31,$1\n"); \
1774: fprintf (STREAM, "\t.word\t0x00000000\t\t# <function address>\n"); \
1775: fprintf (STREAM, "\t.word\t0x00000000\t\t# <static chain value>\n"); \
1776: }
1777:
1778: /* A C expression for the size in bytes of the trampoline, as an
1779: integer. */
1780:
1781: #define TRAMPOLINE_SIZE (9*4)
1782:
1783: /* Alignment required for trampolines, in bits.
1784:
1785: If you don't define this macro, the value of `BIGGEST_ALIGNMENT'
1786: is used for aligning trampolines. */
1787:
1788: /* #define TRAMPOLINE_ALIGNMENT 32 */
1789:
1790: /* A C statement to initialize the variable parts of a trampoline.
1791: ADDR is an RTX for the address of the trampoline; FNADDR is an
1792: RTX for the address of the nested function; STATIC_CHAIN is an
1793: RTX for the static chain value that should be passed to the
1794: function when it is called. */
1795:
1796: #define INITIALIZE_TRAMPOLINE(ADDR, FUNC, CHAIN) \
1797: { \
1798: rtx addr = ADDR; \
1799: emit_move_insn (gen_rtx (MEM, SImode, plus_constant (addr, 28)), FUNC); \
1800: emit_move_insn (gen_rtx (MEM, SImode, plus_constant (addr, 32)), CHAIN); \
1801: \
1802: /* Attempt to make stack executable */ \
1803: emit_library_call (gen_rtx (SYMBOL_REF, Pmode, "__enable_execute_stack"), \
1804: 0, VOIDmode, 1, addr, Pmode); \
1805: }
1806:
1807:
1808: /* Attempt to turn on access permissions for the stack. */
1809:
1810: #define TRANSFER_FROM_TRAMPOLINE \
1811: \
1812: void \
1813: __enable_execute_stack (addr) \
1814: char *addr; \
1815: { \
1816: int size = getpagesize (); \
1817: int mask = ~(size-1); \
1818: char *page = (char *) (((int) addr) & mask); \
1819: char *end = (char *) ((((int) (addr + TRAMPOLINE_SIZE)) & mask) + size); \
1820: \
1821: /* 7 is PROT_READ | PROT_WRITE | PROT_EXEC */ \
1822: if (mprotect (page, end - page, 7) < 0) \
1823: perror ("mprotect of trampoline code"); \
1824: \
1825: /* \
1826: if (cacheflush (addr, TRAMPOLINE_SIZE, 1) < 0) \
1827: perror ("cacheflush of trampoline code"); \
1828: */ \
1829: }
1830:
1831:
1832: /* Addressing modes, and classification of registers for them. */
1833:
1834: /* #define HAVE_POST_INCREMENT */
1835: /* #define HAVE_POST_DECREMENT */
1836:
1837: /* #define HAVE_PRE_DECREMENT */
1838: /* #define HAVE_PRE_INCREMENT */
1839:
1840: /* These assume that REGNO is a hard or pseudo reg number.
1841: They give nonzero only if REGNO is a hard reg of the suitable class
1842: or a pseudo reg currently allocated to a suitable hard reg.
1843: These definitions are NOT overridden anywhere. */
1844:
1845: #define GP_REG_OR_PSEUDO_STRICT_P(regno) \
1846: GP_REG_P((regno < FIRST_PSEUDO_REGISTER) ? regno : reg_renumber[regno])
1847:
1848: #define GP_REG_OR_PSEUDO_NONSTRICT_P(regno) \
1849: (((regno) >= FIRST_PSEUDO_REGISTER) || (GP_REG_P (regno)))
1850:
1851: #define REGNO_OK_FOR_INDEX_P(regno) GP_REG_OR_PSEUDO_STRICT_P (regno)
1852: #define REGNO_OK_FOR_BASE_P(regno) GP_REG_OR_PSEUDO_STRICT_P (regno)
1853:
1854: /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
1855: and check its validity for a certain class.
1856: We have two alternate definitions for each of them.
1857: The usual definition accepts all pseudo regs; the other rejects them all.
1858: The symbol REG_OK_STRICT causes the latter definition to be used.
1859:
1860: Most source files want to accept pseudo regs in the hope that
1861: they will get allocated to the class that the insn wants them to be in.
1862: Some source files that are used after register allocation
1863: need to be strict. */
1864:
1865: #ifndef REG_OK_STRICT
1866:
1867: #define REG_OK_STRICT_P 0
1868: #define REG_OK_FOR_INDEX_P(X) GP_REG_OR_PSEUDO_NONSTRICT_P (REGNO (X))
1869: #define REG_OK_FOR_BASE_P(X) GP_REG_OR_PSEUDO_NONSTRICT_P (REGNO (X))
1870:
1871: #else
1872:
1873: #define REG_OK_STRICT_P 1
1874: #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
1875: #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
1876:
1877: #endif
1878:
1879:
1880: /* Maximum number of registers that can appear in a valid memory address. */
1881:
1882: #define MAX_REGS_PER_ADDRESS 1
1883:
1884: /* A C compound statement with a conditional `goto LABEL;' executed
1885: if X (an RTX) is a legitimate memory address on the target
1886: machine for a memory operand of mode MODE.
1887:
1888: It usually pays to define several simpler macros to serve as
1889: subroutines for this one. Otherwise it may be too complicated
1890: to understand.
1891:
1892: This macro must exist in two variants: a strict variant and a
1893: non-strict one. The strict variant is used in the reload pass.
1894: It must be defined so that any pseudo-register that has not been
1895: allocated a hard register is considered a memory reference. In
1896: contexts where some kind of register is required, a
1897: pseudo-register with no hard register must be rejected.
1898:
1899: The non-strict variant is used in other passes. It must be
1900: defined to accept all pseudo-registers in every context where
1901: some kind of register is required.
1902:
1903: Compiler source files that want to use the strict variant of
1904: this macro define the macro `REG_OK_STRICT'. You should use an
1905: `#ifdef REG_OK_STRICT' conditional to define the strict variant
1906: in that case and the non-strict variant otherwise.
1907:
1908: Typically among the subroutines used to define
1909: `GO_IF_LEGITIMATE_ADDRESS' are subroutines to check for
1910: acceptable registers for various purposes (one for base
1911: registers, one for index registers, and so on). Then only these
1912: subroutine macros need have two variants; the higher levels of
1913: macros may be the same whether strict or not.
1914:
1915: Normally, constant addresses which are the sum of a `symbol_ref'
1916: and an integer are stored inside a `const' RTX to mark them as
1917: constant. Therefore, there is no need to recognize such sums
1918: specifically as legitimate addresses. Normally you would simply
1919: recognize any `const' as legitimate.
1920:
1921: Usually `PRINT_OPERAND_ADDRESS' is not prepared to handle
1922: constant sums that are not marked with `const'. It assumes
1923: that a naked `plus' indicates indexing. If so, then you *must*
1924: reject such naked constant sums as illegitimate addresses, so
1925: that none of them will be given to `PRINT_OPERAND_ADDRESS'.
1926:
1927: On some machines, whether a symbolic address is legitimate
1928: depends on the section that the address refers to. On these
1929: machines, define the macro `ENCODE_SECTION_INFO' to store the
1930: information into the `symbol_ref', and then check for it here.
1931: When you see a `const', you will have to look inside it to find
1932: the `symbol_ref' in order to determine the section. */
1933:
1934: #if 1
1935: #define GO_PRINTF(x) trace(x)
1936: #define GO_PRINTF2(x,y) trace(x,y)
1937: #define GO_DEBUG_RTX(x) debug_rtx(x)
1938:
1939: #else
1940: #define GO_PRINTF(x)
1941: #define GO_PRINTF2(x,y)
1942: #define GO_DEBUG_RTX(x)
1943: #endif
1944:
1945: #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
1946: { \
1947: register rtx xinsn = (X); \
1948: \
1949: if (TARGET_DEBUG_B_MODE) \
1950: { \
1951: GO_PRINTF2 ("\n========== GO_IF_LEGITIMATE_ADDRESS, %sstrict\n", \
1952: (REG_OK_STRICT_P) ? "" : "not "); \
1953: GO_DEBUG_RTX (xinsn); \
1954: } \
1955: \
1956: if (GET_CODE (xinsn) == REG && REG_OK_FOR_BASE_P (xinsn)) \
1957: goto ADDR; \
1958: \
1959: if (CONSTANT_ADDRESS_P (xinsn)) \
1960: goto ADDR; \
1961: \
1962: if (GET_CODE (xinsn) == PLUS) \
1963: { \
1964: register rtx xplus0 = XEXP (xinsn, 0); \
1965: register rtx xplus1 = XEXP (xinsn, 1); \
1966: register enum rtx_code code0 = GET_CODE (xplus0); \
1967: register enum rtx_code code1 = GET_CODE (xplus1); \
1968: \
1969: if (code0 != REG && code1 == REG) \
1970: { \
1971: xplus0 = XEXP (xinsn, 1); \
1972: xplus1 = XEXP (xinsn, 0); \
1973: code0 = GET_CODE (xplus0); \
1974: code1 = GET_CODE (xplus1); \
1975: } \
1976: \
1977: if (code0 == REG && REG_OK_FOR_BASE_P (xplus0)) \
1978: { \
1979: if (code1 == CONST_INT) \
1980: { \
1981: register unsigned adj_offset = INTVAL (xplus1) + 0x8000; \
1982: \
1983: if ((adj_offset <= 0xffff) \
1984: && (adj_offset + GET_MODE_SIZE (MODE) - 1 <= 0xffff)) \
1985: goto ADDR; \
1986: } \
1987: \
1988: /* For some code sequences, you actually get better code by \
1989: pretending that the MIPS supports an address mode of a \
1990: constant address + a register, even though the real \
1991: machine doesn't support it. This is because the \
1992: assembler can use $r1 to load just the high 16 bits, add \
1993: in the register, and fold the low 16 bits into the memory \
1.1.1.2 root 1994: reference, whereas the compiler generates a 4 instruction \
1.1 root 1995: sequence. On the other hand, CSE is not as effective. \
1996: It would be a win to generate the lui directly, but the \
1997: MIPS assembler does not have syntax to generate the \
1998: appropriate relocation. */ \
1999: \
2000: else if (!TARGET_DEBUG_A_MODE \
2001: && code0 == REG \
2002: && CONSTANT_ADDRESS_P (xplus1)) \
2003: goto ADDR; \
2004: } \
2005: } \
2006: \
2007: if (TARGET_DEBUG_B_MODE) \
2008: GO_PRINTF ("Not a legitimate address\n"); \
2009: }
2010:
2011:
2012: /* A C expression that is 1 if the RTX X is a constant which is a
2013: valid address. On most machines, this can be defined as
2014: `CONSTANT_P (X)', but a few machines are more restrictive in
2015: which constant addresses are supported.
2016:
2017: `CONSTANT_P' accepts integer-values expressions whose values are
2018: not explicitly known, such as `symbol_ref', `label_ref', and
2019: `high' expressions and `const' arithmetic expressions, in
2020: addition to `const_int' and `const_double' expressions. */
2021:
2022: #define CONSTANT_ADDRESS_P(X) \
1.1.1.3 ! root 2023: (CONSTANT_P (X) && (!HALF_PIC_P () || !HALF_PIC_ADDRESS_P (X)))
1.1 root 2024:
2025:
2026: /* Nonzero if the constant value X is a legitimate general operand.
2027: It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE.
2028:
2029: At present, GAS doesn't understand li.[sd], so don't allow it
2030: to be generated at present. Also, the MIPS assembler does not
2031: grok li.d Infinity. */
2032:
2033: #define LEGITIMATE_CONSTANT_P(X) \
2034: (GET_CODE (X) != CONST_DOUBLE || mips_const_double_ok (X, GET_MODE (X)))
2035:
2036:
2037: /* A C compound statement that attempts to replace X with a valid
2038: memory address for an operand of mode MODE. WIN will be a C
2039: statement label elsewhere in the code; the macro definition may
2040: use
2041:
2042: GO_IF_LEGITIMATE_ADDRESS (MODE, X, WIN);
2043:
2044: to avoid further processing if the address has become legitimate.
2045:
2046: X will always be the result of a call to `break_out_memory_refs',
2047: and OLDX will be the operand that was given to that function to
2048: produce X.
2049:
2050: The code generated by this macro should not alter the
2051: substructure of X. If it transforms X into a more legitimate
2052: form, it should assign X (which will always be a C variable) a
2053: new value.
2054:
2055: It is not necessary for this macro to come up with a legitimate
2056: address. The compiler has standard ways of doing so in all
2057: cases. In fact, it is safe for this macro to do nothing. But
2058: often a machine-dependent strategy can generate better code. */
2059:
2060: #define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) {}
2061:
2062:
2063: /* A C statement or compound statement with a conditional `goto
2064: LABEL;' executed if memory address X (an RTX) can have different
2065: meanings depending on the machine mode of the memory reference it
2066: is used for.
2067:
2068: Autoincrement and autodecrement addresses typically have
2069: mode-dependent effects because the amount of the increment or
2070: decrement is the size of the operand being addressed. Some
2071: machines have other mode-dependent addresses. Many RISC machines
2072: have no mode-dependent addresses.
2073:
2074: You may assume that ADDR is a valid address for the machine. */
2075:
2076: #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) {}
2077:
2078:
2079: /* Define this macro if references to a symbol must be treated
2080: differently depending on something about the variable or
2081: function named by the symbol (such as what section it is in).
2082:
2083: The macro definition, if any, is executed immediately after the
2084: rtl for DECL has been created and stored in `DECL_RTL (DECL)'.
2085: The value of the rtl will be a `mem' whose address is a
2086: `symbol_ref'.
2087:
2088: The usual thing for this macro to do is to a flag in the
2089: `symbol_ref' (such as `SYMBOL_REF_FLAG') or to store a modified
2090: name string in the `symbol_ref' (if one bit is not enough
2091: information).
2092:
2093: The best way to modify the name string is by adding text to the
2094: beginning, with suitable punctuation to prevent any ambiguity.
2095: Allocate the new name in `saveable_obstack'. You will have to
2096: modify `ASM_OUTPUT_LABELREF' to remove and decode the added text
2097: and output the name accordingly.
2098:
2099: You can also check the information stored in the `symbol_ref' in
2100: the definition of `GO_IF_LEGITIMATE_ADDRESS' or
2101: `PRINT_OPERAND_ADDRESS'. */
2102:
2103: #define ENCODE_SECTION_INFO(DECL) \
2104: do \
2105: { \
2106: if (optimize && mips_section_threshold > 0 && TARGET_GP_OPT \
2107: && TREE_CODE (DECL) == VAR_DECL) \
2108: { \
2109: int size = int_size_in_bytes (TREE_TYPE (DECL)); \
2110: \
2111: if (size > 0 && size <= mips_section_threshold) \
2112: SYMBOL_REF_FLAG (XEXP (DECL_RTL (DECL), 0)) = 1; \
2113: } \
2114: \
2115: else if (HALF_PIC_P ()) \
2116: HALF_PIC_ENCODE (DECL); \
2117: } \
2118: while (0)
2119:
2120:
2121: /* Specify the machine mode that this machine uses
2122: for the index in the tablejump instruction. */
2123: #define CASE_VECTOR_MODE SImode
2124:
2125: /* Define this if the tablejump instruction expects the table
2126: to contain offsets from the address of the table.
2127: Do not define this if the table should contain absolute addresses. */
2128: /* #define CASE_VECTOR_PC_RELATIVE */
2129:
2130: /* Specify the tree operation to be used to convert reals to integers. */
2131: #define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR
2132:
2133: /* This is the kind of divide that is easiest to do in the general case. */
2134: #define EASY_DIV_EXPR TRUNC_DIV_EXPR
2135:
2136: /* Define this as 1 if `char' should by default be signed; else as 0. */
1.1.1.3 ! root 2137: #ifndef DEFAULT_SIGNED_CHAR
1.1 root 2138: #define DEFAULT_SIGNED_CHAR 1
1.1.1.3 ! root 2139: #endif
1.1 root 2140:
2141: /* Max number of bytes we can move from memory to memory
2142: in one reasonably fast instruction. */
2143: #define MOVE_MAX 4
2144:
2145: /* Define this macro as a C expression which is nonzero if
2146: accessing less than a word of memory (i.e. a `char' or a
2147: `short') is no faster than accessing a word of memory, i.e., if
2148: such access require more than one instruction or if there is no
2149: difference in cost between byte and (aligned) word loads.
2150:
2151: On RISC machines, it tends to generate better code to define
2152: this as 1, since it avoids making a QI or HI mode register. */
2153: #define SLOW_BYTE_ACCESS 1
2154:
2155: /* We assume that the store-condition-codes instructions store 0 for false
2156: and some other value for true. This is the value stored for true. */
2157:
2158: #define STORE_FLAG_VALUE 1
2159:
2160: /* Define this if zero-extension is slow (more than one real instruction). */
2161: #define SLOW_ZERO_EXTEND
2162:
2163: /* Define if shifts truncate the shift count
2164: which implies one can omit a sign-extension or zero-extension
2165: of a shift count.
2166:
2167: Only 5 bits are used in SLLV and SRLV */
2168:
2169: #define SHIFT_COUNT_TRUNCATED
2170:
2171: /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
2172: is done just by pretending it is already truncated. */
2173: #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
2174:
1.1.1.2 root 2175: /* Define this macro to control use of the character `$' in
2176: identifier names. The value should be 0, 1, or 2. 0 means `$'
2177: is not allowed by default; 1 means it is allowed by default if
2178: `-traditional' is used; 2 means it is allowed by default provided
2179: `-ansi' is not used. 1 is the default; there is no need to
2180: define this macro in that case. */
2181:
2182: #ifndef DOLLARS_IN_IDENTIFIERS
1.1 root 2183: #define DOLLARS_IN_IDENTIFIERS 1
1.1.1.2 root 2184: #endif
1.1 root 2185:
2186: /* Specify the machine mode that pointers have.
2187: After generation of rtl, the compiler makes no further distinction
2188: between pointers and any other objects of this machine mode. */
2189: #define Pmode SImode
2190:
2191: /* A function address in a call instruction
2192: is a word address (for indexing purposes)
2193: so give the MEM rtx a words's mode. */
2194:
2195: #define FUNCTION_MODE SImode
2196:
2197: /* Define TARGET_MEM_FUNCTIONS if we want to use calls to memcpy and
2198: memset, instead of the BSD functions bcopy and bzero. */
2199:
2200: #if defined(MIPS_SYSV) || defined(OSF_OS)
2201: #define TARGET_MEM_FUNCTIONS
2202: #endif
2203:
2204:
2205: /* A part of a C `switch' statement that describes the relative
2206: costs of constant RTL expressions. It must contain `case'
2207: labels for expression codes `const_int', `const', `symbol_ref',
2208: `label_ref' and `const_double'. Each case must ultimately reach
2209: a `return' statement to return the relative cost of the use of
2210: that kind of constant value in an expression. The cost may
2211: depend on the precise value of the constant, which is available
2212: for examination in X.
2213:
2214: CODE is the expression code--redundant, since it can be obtained
2215: with `GET_CODE (X)'. */
2216:
1.1.1.3 ! root 2217: #define CONST_COSTS(X,CODE,OUTER_CODE) \
1.1 root 2218: case CONST_INT: \
2219: /* Always return 0, since we don't have different sized \
2220: instructions, hence different costs according to Richard \
2221: Kenner */ \
2222: return COSTS_N_INSNS (0); \
2223: \
2224: case LABEL_REF: \
2225: return COSTS_N_INSNS (2); \
2226: \
2227: case CONST: \
2228: { \
2229: extern rtx eliminate_constant_term (); \
1.1.1.2 root 2230: rtx offset = const0_rtx; \
1.1 root 2231: rtx symref = eliminate_constant_term (X, &offset); \
2232: \
2233: if (GET_CODE (symref) == LABEL_REF) \
2234: return COSTS_N_INSNS (2); \
2235: \
2236: if (GET_CODE (symref) != SYMBOL_REF) \
2237: return COSTS_N_INSNS (4); \
2238: \
2239: /* let's be paranoid.... */ \
1.1.1.2 root 2240: if (INTVAL (offset) < -32768 || INTVAL (offset) > 32767) \
1.1 root 2241: return COSTS_N_INSNS (2); \
2242: \
2243: return COSTS_N_INSNS (SYMBOL_REF_FLAG (symref) ? 1 : 2); \
2244: } \
2245: \
2246: case SYMBOL_REF: \
2247: return COSTS_N_INSNS (SYMBOL_REF_FLAG (X) ? 1 : 2); \
2248: \
2249: case CONST_DOUBLE: \
2250: return COSTS_N_INSNS ((CONST_DOUBLE_HIGH (X) == 0 \
2251: && CONST_DOUBLE_LOW (X)) ? 2 : 4);
2252:
2253:
2254: /* Like `CONST_COSTS' but applies to nonconstant RTL expressions.
2255: This can be used, for example, to indicate how costly a multiply
2256: instruction is. In writing this macro, you can use the construct
2257: `COSTS_N_INSNS (N)' to specify a cost equal to N fast instructions.
2258:
2259: This macro is optional; do not define it if the default cost
2260: assumptions are adequate for the target machine.
2261:
2262: If -mdebugd is used, change the multiply cost to 2, so multiply by
2263: a constant isn't converted to a series of shifts. This helps
2264: strength reduction, and also makes it easier to identify what the
2265: compiler is doing. */
2266:
1.1.1.3 ! root 2267: #define RTX_COSTS(X,CODE,OUTER_CODE) \
1.1 root 2268: case MEM: \
2269: { \
2270: int num_words = (GET_MODE_SIZE (GET_MODE (X)) > UNITS_PER_WORD) ? 2 : 1; \
2271: if (simple_memory_operand (X, GET_MODE (X))) \
2272: return COSTS_N_INSNS (num_words); \
2273: \
2274: return COSTS_N_INSNS (2*num_words); \
2275: } \
2276: \
2277: case FFS: \
2278: return COSTS_N_INSNS (6); \
2279: \
2280: case NOT: \
2281: return COSTS_N_INSNS ((GET_MODE (X) == DImode) ? 2 : 1); \
2282: \
2283: case AND: \
2284: case IOR: \
2285: case XOR: \
2286: if (GET_MODE (X) == DImode) \
2287: return COSTS_N_INSNS (2); \
2288: \
2289: if (GET_CODE (XEXP (X, 1)) == CONST_INT) \
2290: { \
2291: rtx number = XEXP (X, 1); \
2292: if (SMALL_INT_UNSIGNED (number)) \
2293: return COSTS_N_INSNS (1); \
2294: \
2295: else if (SMALL_INT (number)) \
2296: return COSTS_N_INSNS (2); \
2297: \
2298: return COSTS_N_INSNS (3); \
2299: } \
2300: \
2301: return COSTS_N_INSNS (1); \
2302: \
2303: case ASHIFT: \
2304: case ASHIFTRT: \
2305: case LSHIFT: \
2306: case LSHIFTRT: \
2307: if (GET_MODE (X) == DImode) \
2308: return COSTS_N_INSNS ((GET_CODE (XEXP (X, 1)) == CONST_INT) ? 12 : 4); \
2309: \
2310: return COSTS_N_INSNS (1); \
2311: \
2312: case ABS: \
2313: { \
2314: enum machine_mode xmode = GET_MODE (X); \
2315: if (xmode == SFmode || xmode == DFmode) \
2316: return COSTS_N_INSNS (1); \
2317: \
2318: return COSTS_N_INSNS (4); \
2319: } \
2320: \
2321: case PLUS: \
2322: case MINUS: \
2323: { \
2324: enum machine_mode xmode = GET_MODE (X); \
2325: if (xmode == SFmode || xmode == DFmode) \
2326: return COSTS_N_INSNS (2); \
2327: \
2328: if (xmode == DImode) \
2329: return COSTS_N_INSNS (4); \
2330: \
2331: return COSTS_N_INSNS (1); \
2332: } \
2333: \
2334: case NEG: \
2335: return COSTS_N_INSNS ((GET_MODE (X) == DImode) ? 4 : 1); \
2336: \
2337: case MULT: \
2338: { \
2339: enum machine_mode xmode = GET_MODE (X); \
2340: if (xmode == SFmode) \
2341: return COSTS_N_INSNS (4); \
2342: \
2343: if (xmode == DFmode) \
2344: return COSTS_N_INSNS (5); \
2345: \
1.1.1.3 ! root 2346: return COSTS_N_INSNS (12); \
1.1 root 2347: } \
2348: \
2349: case DIV: \
2350: case MOD: \
2351: { \
2352: enum machine_mode xmode = GET_MODE (X); \
2353: if (xmode == SFmode) \
2354: return COSTS_N_INSNS (12); \
2355: \
2356: if (xmode == DFmode) \
2357: return COSTS_N_INSNS (19); \
2358: } \
2359: /* fall through */ \
2360: \
2361: case UDIV: \
2362: case UMOD: \
2363: return COSTS_N_INSNS (35);
2364:
2365: /* An expression giving the cost of an addressing mode that
2366: contains ADDRESS. If not defined, the cost is computed from the
2367: form of the ADDRESS expression and the `CONST_COSTS' values.
2368:
2369: For most CISC machines, the default cost is a good approximation
2370: of the true cost of the addressing mode. However, on RISC
2371: machines, all instructions normally have the same length and
2372: execution time. Hence all addresses will have equal costs.
2373:
2374: In cases where more than one form of an address is known, the
2375: form with the lowest cost will be used. If multiple forms have
2376: the same, lowest, cost, the one that is the most complex will be
2377: used.
2378:
2379: For example, suppose an address that is equal to the sum of a
2380: register and a constant is used twice in the same basic block.
2381: When this macro is not defined, the address will be computed in
2382: a register and memory references will be indirect through that
2383: register. On machines where the cost of the addressing mode
2384: containing the sum is no higher than that of a simple indirect
2385: reference, this will produce an additional instruction and
2386: possibly require an additional register. Proper specification
2387: of this macro eliminates this overhead for such machines.
2388:
2389: Similar use of this macro is made in strength reduction of loops.
2390:
2391: ADDRESS need not be valid as an address. In such a case, the
2392: cost is not relevant and can be any value; invalid addresses
2393: need not be assigned a different cost.
2394:
2395: On machines where an address involving more than one register is
2396: as cheap as an address computation involving only one register,
2397: defining `ADDRESS_COST' to reflect this can cause two registers
2398: to be live over a region of code where only one would have been
2399: if `ADDRESS_COST' were not defined in that manner. This effect
2400: should be considered in the definition of this macro.
2401: Equivalent costs should probably only be given to addresses with
2402: different numbers of registers on machines with lots of registers.
2403:
2404: This macro will normally either not be defined or be defined as
2405: a constant. */
2406:
2407: #define ADDRESS_COST(ADDR) (REG_P (ADDR) ? 1 : mips_address_cost (ADDR))
2408:
2409: /* A C expression for the cost of moving data from a register in
2410: class FROM to one in class TO. The classes are expressed using
2411: the enumeration values such as `GENERAL_REGS'. A value of 2 is
2412: the default; other values are interpreted relative to that.
2413:
2414: It is not required that the cost always equal 2 when FROM is the
2415: same as TO; on some machines it is expensive to move between
2416: registers if they are not general registers.
2417:
2418: If reload sees an insn consisting of a single `set' between two
2419: hard registers, and if `REGISTER_MOVE_COST' applied to their
2420: classes returns a value of 2, reload does not check to ensure
2421: that the constraints of the insn are met. Setting a cost of
2422: other than 2 will allow reload to verify that the constraints are
2423: met. You should do this if the `movM' pattern's constraints do
2424: not allow such copying. */
2425:
2426: #define REGISTER_MOVE_COST(FROM, TO) 4 /* force reload to use constraints */
2427:
2428: /* A C expression for the cost of a branch instruction. A value of
2429: 1 is the default; other values are interpreted relative to that. */
2430:
2431: #define BRANCH_COST \
2432: ((mips_cpu == PROCESSOR_R4000 || mips_cpu == PROCESSOR_R6000) ? 2 : 1)
2433:
2434:
2435: /* Used in by the peephole code. */
2436: #define classify_op(op,mode) (mips_rtx_classify[ (int)GET_CODE (op) ])
2437: #define additive_op(op,mode) ((classify_op (op,mode) & CLASS_ADD_OP) != 0)
2438: #define divmod_op(op,mode) ((classify_op (op,mode) & CLASS_DIVMOD_OP) != 0)
2439: #define unsigned_op(op,mode) ((classify_op (op,mode) & CLASS_UNSIGNED_OP) != 0)
2440:
2441: #define CLASS_ADD_OP 0x01 /* operator is PLUS/MINUS */
2442: #define CLASS_DIVMOD_OP 0x02 /* operator is {,U}{DIV,MOD} */
2443: #define CLASS_UNSIGNED_OP 0x04 /* operator is U{DIV,MOD} */
2444: #define CLASS_CMP_OP 0x08 /* operator is comparison */
2445: #define CLASS_EQUALITY_OP 0x10 /* operator is == or != */
2446: #define CLASS_FCMP_OP 0x08 /* operator is fp. compare */
2447:
2448: #define CLASS_UNS_CMP_OP (CLASS_UNSIGNED_OP | CLASS_CMP_OP)
2449:
2450:
2451: /* Optionally define this if you have added predicates to
2452: `MACHINE.c'. This macro is called within an initializer of an
2453: array of structures. The first field in the structure is the
1.1.1.2 root 2454: name of a predicate and the second field is an array of rtl
1.1 root 2455: codes. For each predicate, list all rtl codes that can be in
2456: expressions matched by the predicate. The list should have a
2457: trailing comma. Here is an example of two entries in the list
2458: for a typical RISC machine:
2459:
2460: #define PREDICATE_CODES \
2461: {"gen_reg_rtx_operand", {SUBREG, REG}}, \
2462: {"reg_or_short_cint_operand", {SUBREG, REG, CONST_INT}},
2463:
2464: Defining this macro does not affect the generated code (however,
2465: incorrect definitions that omit an rtl code that may be matched
2466: by the predicate can cause the compiler to malfunction).
2467: Instead, it allows the table built by `genrecog' to be more
2468: compact and efficient, thus speeding up the compiler. The most
2469: important predicates to include in the list specified by this
2470: macro are thoses used in the most insn patterns. */
2471:
2472: #define PREDICATE_CODES \
2473: {"uns_arith_operand", { REG, CONST_INT, SUBREG }}, \
2474: {"arith_operand", { REG, CONST_INT, SUBREG }}, \
2475: {"arith32_operand", { REG, CONST_INT, SUBREG }}, \
2476: {"reg_or_0_operand", { REG, CONST_INT, SUBREG }}, \
2477: {"small_int", { CONST_INT }}, \
2478: {"large_int", { CONST_INT }}, \
2479: {"md_register_operand", { REG }}, \
2480: {"mips_const_double_ok", { CONST_DOUBLE }}, \
2481: {"simple_memory_operand", { MEM, SUBREG }}, \
2482: {"equality_op", { EQ, NE }}, \
2483: {"cmp_op", { EQ, NE, GT, GE, GTU, GEU, LT, LE, \
2484: LTU, LEU }}, \
2485: {"cmp2_op", { EQ, NE, GT, GE, GTU, GEU, LT, LE, \
2486: LTU, LEU }}, \
2487: {"fcmp_op", { EQ, NE, GT, GE, LT, LE }}, \
2488: {"uns_cmp_op", { GTU, GEU, LTU, LEU }},
2489:
2490:
2491: /* If defined, a C statement to be executed just prior to the
2492: output of assembler code for INSN, to modify the extracted
2493: operands so they will be output differently.
2494:
2495: Here the argument OPVEC is the vector containing the operands
2496: extracted from INSN, and NOPERANDS is the number of elements of
2497: the vector which contain meaningful data for this insn. The
2498: contents of this vector are what will be used to convert the
2499: insn template into assembler code, so you can change the
2500: assembler output by changing the contents of the vector.
2501:
2502: We use it to check if the current insn needs a nop in front of it
2503: because of load delays, and also to update the delay slot
2504: statistics. */
2505:
2506: #define FINAL_PRESCAN_INSN(INSN, OPVEC, NOPERANDS) \
2507: do \
2508: { \
2509: if (dslots_number_nops > 0 && mips_load_reg != (rtx)0) \
2510: { \
2511: enum machine_mode mode = GET_MODE (mips_load_reg); \
2512: rtx pattern = PATTERN (INSN); \
2513: \
2514: if (reg_mentioned_p (mips_load_reg, pattern) \
2515: || (mips_load_reg2 != (rtx)0 \
2516: && reg_mentioned_p (mips_load_reg2, pattern)) \
2517: || (mips_load_reg3 != (rtx)0 \
2518: && reg_mentioned_p (mips_load_reg3, pattern)) \
2519: || (mips_load_reg4 != (rtx)0 \
2520: && reg_mentioned_p (mips_load_reg4, pattern)) \
2521: || get_attr_length (INSN) == 0) \
2522: { \
2523: fputs ((set_noreorder) ? "\tnop\n" : "\t#nop\n", asm_out_file); \
2524: } \
2525: else \
2526: dslots_load_filled++; \
2527: \
2528: while (--dslots_number_nops > 0) \
2529: fputs ((set_noreorder) ? "\tnop\n" : "\t#nop\n", asm_out_file); \
2530: \
2531: mips_load_reg = (rtx)0; \
2532: mips_load_reg2 = (rtx)0; \
2533: mips_load_reg3 = (rtx)0; \
2534: mips_load_reg4 = (rtx)0; \
2535: \
2536: if (set_noreorder && --set_noreorder == 0) \
2537: fputs ("\t.set\treorder\n", asm_out_file); \
2538: } \
2539: \
2540: if (TARGET_STATS) \
2541: { \
2542: enum rtx_code code = GET_CODE (INSN); \
2543: if (code == JUMP_INSN || code == CALL_INSN) \
2544: dslots_jump_total++; \
2545: } \
2546: } \
2547: while (0)
2548:
2549:
2550: /* Tell final.c how to eliminate redundant test instructions.
2551: Here we define machine-dependent flags and fields in cc_status
2552: (see `conditions.h'). */
2553:
2554: /* A C compound statement to set the components of `cc_status'
2555: appropriately for an insn INSN whose body is EXP. It is this
2556: macro's responsibility to recognize insns that set the condition
2557: code as a byproduct of other activity as well as those that
2558: explicitly set `(cc0)'.
2559:
2560: This macro is not used on machines that do not use `cc0'. */
2561:
2562: #define NOTICE_UPDATE_CC(EXP, INSN) \
2563: do \
2564: { \
2565: enum attr_type type = get_attr_type (INSN); \
2566: if (type == TYPE_ICMP || type == TYPE_FCMP) \
2567: CC_STATUS_INIT; \
2568: } \
2569: while (0)
2570:
1.1.1.3 ! root 2571: /* A list of names to be used for additional modes for condition code
! 2572: values in registers. These names are added to `enum machine_mode'
! 2573: and all have class `MODE_CC'. By convention, they should start
! 2574: with `CC' and end with `mode'.
1.1 root 2575:
2576: You should only define this macro if your machine does not use
2577: `cc0' and only if additional modes are required.
2578:
1.1.1.3 ! root 2579: On the MIPS, we use CC_FPmode for all floating point except for not
! 2580: equal, CC_REV_FPmode for not equal (to reverse the sense of the
! 2581: jump), CC_EQmode for integer equality/inequality comparisons,
! 2582: CC_0mode for comparisons against 0, and CCmode for other integer
! 2583: comparisons. */
1.1 root 2584:
1.1.1.3 ! root 2585: #define EXTRA_CC_MODES CC_EQmode, CC_FPmode, CC_0mode, CC_REV_FPmode
1.1 root 2586:
2587: /* A list of C strings giving the names for the modes listed in
1.1.1.3 ! root 2588: `EXTRA_CC_MODES'. */
1.1 root 2589:
1.1.1.3 ! root 2590: #define EXTRA_CC_NAMES "CC_EQ", "CC_FP", "CC_0", "CC_REV_FP"
1.1 root 2591:
2592: /* Returns a mode from class `MODE_CC' to be used when comparison
1.1.1.3 ! root 2593: operation code OP is applied to rtx X. */
! 2594:
! 2595: #define SELECT_CC_MODE(OP, X) \
! 2596: (GET_MODE_CLASS (GET_MODE (X)) != MODE_FLOAT \
! 2597: ? SImode \
! 2598: : ((OP == NE) ? CC_REV_FPmode : CC_FPmode))
1.1 root 2599:
2600:
2601: /* Control the assembler format that we output. */
2602:
2603: /* Output at beginning of assembler file.
2604: If we are optimizing to use the global pointer, create a temporary
2605: file to hold all of the text stuff, and write it out to the end.
2606: This is needed because the MIPS assembler is evidently one pass,
2607: and if it hasn't seen the relevant .comm/.lcomm/.extern/.sdata
2608: declaration when the code is processed, it generates a two
2609: instruction sequence. */
2610:
2611: #define ASM_FILE_START(STREAM) mips_asm_file_start (STREAM)
2612:
2613: /* Output to assembler file text saying following lines
2614: may contain character constants, extra white space, comments, etc. */
2615:
2616: #define ASM_APP_ON " #APP\n"
2617:
2618: /* Output to assembler file text saying following lines
2619: no longer contain unusual constructs. */
2620:
2621: #define ASM_APP_OFF " #NO_APP\n"
2622:
2623: /* How to refer to registers in assembler output.
2624: This sequence is indexed by compiler's hard-register-number (see above).
2625:
2626: In order to support the two different conventions for register names,
2627: we use the name of a table set up in mips.c, which is overwritten
2628: if -mrnames is used. */
2629:
2630: #define REGISTER_NAMES \
2631: { \
2632: &mips_reg_names[ 0][0], \
2633: &mips_reg_names[ 1][0], \
2634: &mips_reg_names[ 2][0], \
2635: &mips_reg_names[ 3][0], \
2636: &mips_reg_names[ 4][0], \
2637: &mips_reg_names[ 5][0], \
2638: &mips_reg_names[ 6][0], \
2639: &mips_reg_names[ 7][0], \
2640: &mips_reg_names[ 8][0], \
2641: &mips_reg_names[ 9][0], \
2642: &mips_reg_names[10][0], \
2643: &mips_reg_names[11][0], \
2644: &mips_reg_names[12][0], \
2645: &mips_reg_names[13][0], \
2646: &mips_reg_names[14][0], \
2647: &mips_reg_names[15][0], \
2648: &mips_reg_names[16][0], \
2649: &mips_reg_names[17][0], \
2650: &mips_reg_names[18][0], \
2651: &mips_reg_names[19][0], \
2652: &mips_reg_names[20][0], \
2653: &mips_reg_names[21][0], \
2654: &mips_reg_names[22][0], \
2655: &mips_reg_names[23][0], \
2656: &mips_reg_names[24][0], \
2657: &mips_reg_names[25][0], \
2658: &mips_reg_names[26][0], \
2659: &mips_reg_names[27][0], \
2660: &mips_reg_names[28][0], \
2661: &mips_reg_names[29][0], \
2662: &mips_reg_names[30][0], \
2663: &mips_reg_names[31][0], \
2664: &mips_reg_names[32][0], \
2665: &mips_reg_names[33][0], \
2666: &mips_reg_names[34][0], \
2667: &mips_reg_names[35][0], \
2668: &mips_reg_names[36][0], \
2669: &mips_reg_names[37][0], \
2670: &mips_reg_names[38][0], \
2671: &mips_reg_names[39][0], \
2672: &mips_reg_names[40][0], \
2673: &mips_reg_names[41][0], \
2674: &mips_reg_names[42][0], \
2675: &mips_reg_names[43][0], \
2676: &mips_reg_names[44][0], \
2677: &mips_reg_names[45][0], \
2678: &mips_reg_names[46][0], \
2679: &mips_reg_names[47][0], \
2680: &mips_reg_names[48][0], \
2681: &mips_reg_names[49][0], \
2682: &mips_reg_names[50][0], \
2683: &mips_reg_names[51][0], \
2684: &mips_reg_names[52][0], \
2685: &mips_reg_names[53][0], \
2686: &mips_reg_names[54][0], \
2687: &mips_reg_names[55][0], \
2688: &mips_reg_names[56][0], \
2689: &mips_reg_names[57][0], \
2690: &mips_reg_names[58][0], \
2691: &mips_reg_names[59][0], \
2692: &mips_reg_names[60][0], \
2693: &mips_reg_names[61][0], \
2694: &mips_reg_names[62][0], \
2695: &mips_reg_names[63][0], \
2696: &mips_reg_names[64][0], \
2697: &mips_reg_names[65][0], \
2698: &mips_reg_names[66][0], \
2699: }
2700:
2701: /* If defined, a C initializer for an array of structures
2702: containing a name and a register number. This macro defines
2703: additional names for hard registers, thus allowing the `asm'
2704: option in declarations to refer to registers using alternate
2705: names.
2706:
2707: We define both names for the integer registers here. */
2708:
2709: #define ADDITIONAL_REGISTER_NAMES \
2710: { \
2711: { "$0", 0 + GP_REG_FIRST }, \
2712: { "$1", 1 + GP_REG_FIRST }, \
2713: { "$2", 2 + GP_REG_FIRST }, \
2714: { "$3", 3 + GP_REG_FIRST }, \
2715: { "$4", 4 + GP_REG_FIRST }, \
2716: { "$5", 5 + GP_REG_FIRST }, \
2717: { "$6", 6 + GP_REG_FIRST }, \
2718: { "$7", 7 + GP_REG_FIRST }, \
2719: { "$8", 8 + GP_REG_FIRST }, \
2720: { "$9", 9 + GP_REG_FIRST }, \
2721: { "$10", 10 + GP_REG_FIRST }, \
2722: { "$11", 11 + GP_REG_FIRST }, \
2723: { "$12", 12 + GP_REG_FIRST }, \
2724: { "$13", 13 + GP_REG_FIRST }, \
2725: { "$14", 14 + GP_REG_FIRST }, \
2726: { "$15", 15 + GP_REG_FIRST }, \
2727: { "$16", 16 + GP_REG_FIRST }, \
2728: { "$17", 17 + GP_REG_FIRST }, \
2729: { "$18", 18 + GP_REG_FIRST }, \
2730: { "$19", 19 + GP_REG_FIRST }, \
2731: { "$20", 20 + GP_REG_FIRST }, \
2732: { "$21", 21 + GP_REG_FIRST }, \
2733: { "$22", 22 + GP_REG_FIRST }, \
2734: { "$23", 23 + GP_REG_FIRST }, \
2735: { "$24", 24 + GP_REG_FIRST }, \
2736: { "$25", 25 + GP_REG_FIRST }, \
2737: { "$26", 26 + GP_REG_FIRST }, \
2738: { "$27", 27 + GP_REG_FIRST }, \
2739: { "$28", 28 + GP_REG_FIRST }, \
2740: { "$29", 29 + GP_REG_FIRST }, \
2741: { "$30", 30 + GP_REG_FIRST }, \
2742: { "$31", 31 + GP_REG_FIRST }, \
2743: { "$sp", 29 + GP_REG_FIRST }, \
2744: { "$fp", 30 + GP_REG_FIRST }, \
2745: { "at", 1 + GP_REG_FIRST }, \
2746: { "v0", 2 + GP_REG_FIRST }, \
2747: { "v1", 3 + GP_REG_FIRST }, \
2748: { "a0", 4 + GP_REG_FIRST }, \
2749: { "a1", 5 + GP_REG_FIRST }, \
2750: { "a2", 6 + GP_REG_FIRST }, \
2751: { "a3", 7 + GP_REG_FIRST }, \
2752: { "t0", 8 + GP_REG_FIRST }, \
2753: { "t1", 9 + GP_REG_FIRST }, \
2754: { "t2", 10 + GP_REG_FIRST }, \
2755: { "t3", 11 + GP_REG_FIRST }, \
2756: { "t4", 12 + GP_REG_FIRST }, \
2757: { "t5", 13 + GP_REG_FIRST }, \
2758: { "t6", 14 + GP_REG_FIRST }, \
2759: { "t7", 15 + GP_REG_FIRST }, \
2760: { "s0", 16 + GP_REG_FIRST }, \
2761: { "s1", 17 + GP_REG_FIRST }, \
2762: { "s2", 18 + GP_REG_FIRST }, \
2763: { "s3", 19 + GP_REG_FIRST }, \
2764: { "s4", 20 + GP_REG_FIRST }, \
2765: { "s5", 21 + GP_REG_FIRST }, \
2766: { "s6", 22 + GP_REG_FIRST }, \
2767: { "s7", 23 + GP_REG_FIRST }, \
2768: { "t8", 24 + GP_REG_FIRST }, \
2769: { "t9", 25 + GP_REG_FIRST }, \
2770: { "k0", 26 + GP_REG_FIRST }, \
2771: { "k1", 27 + GP_REG_FIRST }, \
2772: { "gp", 28 + GP_REG_FIRST }, \
2773: { "sp", 29 + GP_REG_FIRST }, \
2774: { "fp", 30 + GP_REG_FIRST }, \
2775: { "ra", 31 + GP_REG_FIRST }, \
1.1.1.3 ! root 2776: { "$sp", 29 + GP_REG_FIRST }, \
! 2777: { "$fp", 30 + GP_REG_FIRST }, \
! 2778: { "cc", FPSW_REGNUM }, \
1.1 root 2779: }
2780:
2781: /* Define results of standard character escape sequences. */
2782: #define TARGET_BELL 007
2783: #define TARGET_BS 010
2784: #define TARGET_TAB 011
2785: #define TARGET_NEWLINE 012
2786: #define TARGET_VT 013
2787: #define TARGET_FF 014
2788: #define TARGET_CR 015
2789:
2790: /* A C compound statement to output to stdio stream STREAM the
2791: assembler syntax for an instruction operand X. X is an RTL
2792: expression.
2793:
2794: CODE is a value that can be used to specify one of several ways
2795: of printing the operand. It is used when identical operands
2796: must be printed differently depending on the context. CODE
2797: comes from the `%' specification that was used to request
2798: printing of the operand. If the specification was just `%DIGIT'
2799: then CODE is 0; if the specification was `%LTR DIGIT' then CODE
2800: is the ASCII code for LTR.
2801:
2802: If X is a register, this macro should print the register's name.
2803: The names can be found in an array `reg_names' whose type is
2804: `char *[]'. `reg_names' is initialized from `REGISTER_NAMES'.
2805:
2806: When the machine description has a specification `%PUNCT' (a `%'
2807: followed by a punctuation character), this macro is called with
2808: a null pointer for X and the punctuation character for CODE.
2809:
2810: See mips.c for the MIPS specific codes. */
2811:
2812: #define PRINT_OPERAND(FILE, X, CODE) print_operand (FILE, X, CODE)
2813:
2814: /* A C expression which evaluates to true if CODE is a valid
2815: punctuation character for use in the `PRINT_OPERAND' macro. If
2816: `PRINT_OPERAND_PUNCT_VALID_P' is not defined, it means that no
2817: punctuation characters (except for the standard one, `%') are
2818: used in this way. */
2819:
2820: #define PRINT_OPERAND_PUNCT_VALID_P(CODE) mips_print_operand_punct[CODE]
2821:
2822: /* A C compound statement to output to stdio stream STREAM the
2823: assembler syntax for an instruction operand that is a memory
2824: reference whose address is ADDR. ADDR is an RTL expression.
2825:
2826: On some machines, the syntax for a symbolic address depends on
2827: the section that the address refers to. On these machines,
2828: define the macro `ENCODE_SECTION_INFO' to store the information
2829: into the `symbol_ref', and then check for it here. */
2830:
2831: #define PRINT_OPERAND_ADDRESS(FILE, ADDR) print_operand_address (FILE, ADDR)
2832:
2833:
2834: /* A C statement, to be executed after all slot-filler instructions
2835: have been output. If necessary, call `dbr_sequence_length' to
2836: determine the number of slots filled in a sequence (zero if not
2837: currently outputting a sequence), to decide how many no-ops to
2838: output, or whatever.
2839:
2840: Don't define this macro if it has nothing to do, but it is
2841: helpful in reading assembly output if the extent of the delay
2842: sequence is made explicit (e.g. with white space).
2843:
2844: Note that output routines for instructions with delay slots must
2845: be prepared to deal with not being output as part of a sequence
2846: (i.e. when the scheduling pass is not run, or when no slot
2847: fillers could be found.) The variable `final_sequence' is null
2848: when not processing a sequence, otherwise it contains the
2849: `sequence' rtx being output. */
2850:
2851: #define DBR_OUTPUT_SEQEND(STREAM) \
2852: do \
2853: { \
2854: if (set_nomacro > 0 && --set_nomacro == 0) \
2855: fputs ("\t.set\tmacro\n", STREAM); \
2856: \
2857: if (set_noreorder > 0 && --set_noreorder == 0) \
2858: fputs ("\t.set\treorder\n", STREAM); \
2859: \
2860: dslots_jump_filled++; \
2861: fputs ("\n", STREAM); \
2862: } \
2863: while (0)
2864:
2865:
2866: /* How to tell the debugger about changes of source files. Note, the
2867: mips ECOFF format cannot deal with changes of files inside of
2868: functions, which means the output of parser generators like bison
2869: is generally not debuggable without using the -l switch. Lose,
2870: lose, lose. Silicon graphics seems to want all .file's hardwired
2871: to 1. */
2872:
2873: #ifndef SET_FILE_NUMBER
2874: #define SET_FILE_NUMBER() ++num_source_filenames
2875: #endif
2876:
2877: #define ASM_OUTPUT_SOURCE_FILENAME(STREAM, NAME) \
2878: mips_output_filename (STREAM, NAME)
2879:
2880: /* This is how to output a note the debugger telling it the line number
2881: to which the following sequence of instructions corresponds.
2882: Silicon graphics puts a label after each .loc. */
2883:
2884: #ifndef LABEL_AFTER_LOC
2885: #define LABEL_AFTER_LOC(STREAM)
2886: #endif
2887:
2888: #define ASM_OUTPUT_SOURCE_LINE(STREAM, LINE) \
2889: mips_output_lineno (STREAM, LINE)
2890:
2891: /* The MIPS implementation uses some labels for it's own purposed. The
2892: following lists what labels are created, and are all formed by the
2893: pattern $L[a-z].*. The machine independent portion of GCC creates
2894: labels matching: $L[A-Z][0-9]+ and $L[0-9]+.
2895:
1.1.1.3 ! root 2896: LM[0-9]+ Silicon Graphics/ECOFF stabs label before each stmt.
1.1 root 2897: $Lb[0-9]+ Begin blocks for MIPS debug support
2898: $Lc[0-9]+ Label for use in s<xx> operation.
2899: $Le[0-9]+ End blocks for MIPS debug support
2900: $Lp\..+ Half-pic labels.
2901: $Ls[0-9]+ FP-SP difference if -fomit-frame-pointer */
2902:
2903: /* This is how to output the definition of a user-level label named NAME,
2904: such as the label on a static function or variable NAME.
2905:
2906: If we are optimizing the gp, remember that this label has been put
2907: out, so we know not to emit an .extern for it in mips_asm_file_end.
2908: We use one of the common bits in the IDENTIFIER tree node for this,
2909: since those bits seem to be unused, and we don't have any method
2910: of getting the decl nodes from the name. */
2911:
2912: #define ASM_OUTPUT_LABEL(STREAM,NAME) \
2913: do { \
2914: assemble_name (STREAM, NAME); \
2915: fputs (":\n", STREAM); \
2916: } while (0)
2917:
1.1.1.2 root 2918:
2919: /* A C statement (sans semicolon) to output to the stdio stream
2920: STREAM any text necessary for declaring the name NAME of an
2921: initialized variable which is being defined. This macro must
2922: output the label definition (perhaps using `ASM_OUTPUT_LABEL').
2923: The argument DECL is the `VAR_DECL' tree node representing the
2924: variable.
2925:
2926: If this macro is not defined, then the variable name is defined
2927: in the usual manner as a label (by means of `ASM_OUTPUT_LABEL'). */
2928:
2929: #define ASM_DECLARE_OBJECT_NAME(STREAM, NAME, DECL) \
1.1.1.3 ! root 2930: do \
! 2931: { \
! 2932: mips_declare_object (STREAM, NAME, "", ":\n", 0); \
! 2933: HALF_PIC_DECLARE (NAME); \
! 2934: } \
! 2935: while (0)
1.1.1.2 root 2936:
1.1 root 2937:
2938: /* This is how to output a command to make the user-level label named NAME
2939: defined for reference from other files. */
2940:
2941: #define ASM_GLOBALIZE_LABEL(STREAM,NAME) \
2942: do { \
2943: fputs ("\t.globl\t", STREAM); \
2944: assemble_name (STREAM, NAME); \
2945: fputs ("\n", STREAM); \
2946: } while (0)
2947:
1.1.1.2 root 2948: /* This says how to define a global common symbol. */
1.1 root 2949:
2950: #define ASM_OUTPUT_COMMON(STREAM, NAME, SIZE, ROUNDED) \
1.1.1.2 root 2951: mips_declare_object (STREAM, NAME, "\n\t.comm\t", ",%u\n", (ROUNDED))
1.1 root 2952:
1.1.1.3 ! root 2953: /* This says how to define a local common symbol (ie, not visible to
1.1.1.2 root 2954: linker). */
1.1 root 2955:
2956: #define ASM_OUTPUT_LOCAL(STREAM, NAME, SIZE, ROUNDED) \
1.1.1.2 root 2957: mips_declare_object (STREAM, NAME, "\n\t.lcomm\t", ",%u\n", (ROUNDED))
1.1 root 2958:
2959:
2960: /* This says how to output an external. It would be possible not to
2961: output anything and let undefined symbol become external. However
2962: the assembler uses length information on externals to allocate in
2963: data/sdata bss/sbss, thereby saving exec time. */
2964:
2965: #define ASM_OUTPUT_EXTERNAL(STREAM,DECL,NAME) \
2966: mips_output_external(STREAM,DECL,NAME)
2967:
2968: /* This says what to print at the end of the assembly file */
2969: #define ASM_FILE_END(STREAM) mips_asm_file_end(STREAM)
2970:
2971:
2972: /* This is how to declare a function name. The actual work of
2973: emitting the label is moved to function_prologue, so that we can
2974: get the line number correctly emitted before the .ent directive,
2975: and after any .file directives.
2976:
2977: Also, switch files if we are optimizing the global pointer. */
2978:
2979: #define ASM_DECLARE_FUNCTION_NAME(STREAM,NAME,DECL) \
2980: { \
2981: extern FILE *asm_out_text_file; \
2982: if (TARGET_GP_OPT) \
2983: STREAM = asm_out_text_file; \
2984: \
2985: current_function_name = NAME; \
1.1.1.3 ! root 2986: HALF_PIC_DECLARE (NAME); \
1.1 root 2987: }
2988:
2989: /* This is how to output a reference to a user-level label named NAME.
2990: `assemble_name' uses this. */
2991:
2992: #define ASM_OUTPUT_LABELREF(STREAM,NAME) fprintf (STREAM, "%s", NAME)
2993:
2994: /* This is how to output an internal numbered label where
2995: PREFIX is the class of label and NUM is the number within the class. */
2996:
2997: #define ASM_OUTPUT_INTERNAL_LABEL(STREAM,PREFIX,NUM) \
2998: fprintf (STREAM, "$%s%d:\n", PREFIX, NUM)
2999:
3000: /* This is how to store into the string LABEL
3001: the symbol_ref name of an internal numbered label where
3002: PREFIX is the class of label and NUM is the number within the class.
3003: This is suitable for output with `assemble_name'. */
3004:
3005: #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \
3006: sprintf (LABEL, "*$%s%d", PREFIX, NUM)
3007:
3008: /* This is how to output an assembler line defining a `double' constant. */
3009:
3010: #define ASM_OUTPUT_DOUBLE(STREAM,VALUE) \
1.1.1.3 ! root 3011: mips_output_double (STREAM, VALUE)
! 3012:
1.1 root 3013:
3014: /* This is how to output an assembler line defining a `float' constant. */
3015:
3016: #define ASM_OUTPUT_FLOAT(STREAM,VALUE) \
1.1.1.3 ! root 3017: mips_output_float (STREAM, VALUE)
! 3018:
1.1 root 3019:
3020: /* This is how to output an assembler line defining an `int' constant. */
3021:
3022: #define ASM_OUTPUT_INT(STREAM,VALUE) \
3023: do { \
3024: fprintf (STREAM, "\t.word\t"); \
3025: output_addr_const (STREAM, (VALUE)); \
3026: fprintf (STREAM, "\n"); \
3027: } while (0)
3028:
3029: /* Likewise for `char' and `short' constants. */
3030:
3031: #define ASM_OUTPUT_SHORT(STREAM,VALUE) \
3032: { \
3033: fprintf (STREAM, "\t.half\t"); \
3034: output_addr_const (STREAM, (VALUE)); \
3035: fprintf (STREAM, "\n"); \
3036: }
3037:
3038: #define ASM_OUTPUT_CHAR(STREAM,VALUE) \
3039: { \
3040: fprintf (STREAM, "\t.byte\t"); \
3041: output_addr_const (STREAM, (VALUE)); \
3042: fprintf (STREAM, "\n"); \
3043: }
3044:
3045: /* This is how to output an assembler line for a numeric constant byte. */
3046:
3047: #define ASM_OUTPUT_BYTE(STREAM,VALUE) \
3048: fprintf (STREAM, "\t.byte\t0x%x\n", (VALUE))
3049:
3050: /* This is how to output an element of a case-vector that is absolute. */
3051:
3052: #define ASM_OUTPUT_ADDR_VEC_ELT(STREAM, VALUE) \
3053: fprintf (STREAM, "\t.word\t$L%d\n", VALUE)
3054:
3055: /* This is how to output an element of a case-vector that is relative.
3056: (We do not use such vectors,
3057: but we must define this macro anyway.) */
3058:
3059: #define ASM_OUTPUT_ADDR_DIFF_ELT(STREAM, VALUE, REL) \
3060: fprintf (STREAM, "\t.word\t$L%d-$L%d\n", VALUE, REL)
3061:
3062: /* This is how to emit the initial label for switch statements. We
3063: need to put the switch labels somewhere else from the text section,
3064: because the MIPS assembler gets real confused about line numbers if
3065: .word's appear in the text section. */
3066:
3067: #define ASM_OUTPUT_CASE_LABEL(STREAM, PREFIX, NUM, JUMPTABLE) \
3068: { \
3069: rdata_section (); \
3070: ASM_OUTPUT_ALIGN (STREAM, 2); \
3071: ASM_OUTPUT_INTERNAL_LABEL (STREAM, PREFIX, NUM); \
3072: }
3073:
3074: /* This is how to output an assembler line
3075: that says to advance the location counter
3076: to a multiple of 2**LOG bytes. */
3077:
3078: #define ASM_OUTPUT_ALIGN(STREAM,LOG) \
3079: { \
3080: int mask = (1 << (LOG)) - 1; \
3081: fprintf (STREAM, "\t.align\t%d\n", (LOG)); \
3082: }
3083:
3084: /* This is how to output an assembler line to to advance the location
3085: counter by SIZE bytes. */
3086:
3087: #define ASM_OUTPUT_SKIP(STREAM,SIZE) \
3088: fprintf (STREAM, "\t.space\t%u\n", (SIZE))
3089:
3090:
3091: /* This is how to output a string. */
3092: #define ASM_OUTPUT_ASCII(STREAM, STRING, LEN) \
3093: do { \
3094: register int i, c, len = (LEN), cur_pos = 17; \
3095: register unsigned char *string = (unsigned char *)(STRING); \
3096: fprintf ((STREAM), "\t.ascii\t\""); \
3097: for (i = 0; i < len; i++) \
3098: { \
3099: register int c = string[i]; \
3100: \
3101: switch (c) \
3102: { \
3103: case '\"': \
3104: case '\\': \
3105: putc ('\\', (STREAM)); \
3106: putc (c, (STREAM)); \
3107: cur_pos += 2; \
3108: break; \
3109: \
3110: case TARGET_NEWLINE: \
3111: fputs ("\\n", (STREAM)); \
3112: if (i+1 < len \
3113: && (((c = string[i+1]) >= '\040' && c <= '~') \
3114: || c == TARGET_TAB)) \
3115: cur_pos = 32767; /* break right here */ \
3116: else \
3117: cur_pos += 2; \
3118: break; \
3119: \
3120: case TARGET_TAB: \
3121: fputs ("\\t", (STREAM)); \
3122: cur_pos += 2; \
3123: break; \
3124: \
3125: case TARGET_FF: \
3126: fputs ("\\f", (STREAM)); \
3127: cur_pos += 2; \
3128: break; \
3129: \
3130: case TARGET_BS: \
3131: fputs ("\\b", (STREAM)); \
3132: cur_pos += 2; \
3133: break; \
3134: \
3135: case TARGET_CR: \
3136: fputs ("\\r", (STREAM)); \
3137: cur_pos += 2; \
3138: break; \
3139: \
3140: default: \
3141: if (c >= ' ' && c < 0177) \
3142: { \
3143: putc (c, (STREAM)); \
3144: cur_pos++; \
3145: } \
3146: else \
3147: { \
3148: fprintf ((STREAM), "\\%03o", c); \
3149: cur_pos += 4; \
3150: } \
3151: } \
3152: \
3153: if (cur_pos > 72 && i+1 < len) \
3154: { \
3155: cur_pos = 17; \
3156: fprintf ((STREAM), "\"\n\t.ascii\t\""); \
3157: } \
3158: } \
3159: fprintf ((STREAM), "\"\n"); \
3160: } while (0)
3161:
3162: /* Handle certain cpp directives used in header files on sysV. */
3163: #define SCCS_DIRECTIVE
3164:
3165: /* Output #ident as a in the read-only data section. */
3166: #define ASM_OUTPUT_IDENT(FILE, STRING) \
3167: { \
3168: char *p = STRING; \
3169: int size = strlen (p) + 1; \
3170: rdata_section (); \
3171: assemble_string (p, size); \
3172: }
3173:
3174:
1.1.1.3 ! root 3175: /* Define the strings to put out for each section in the object file. */
! 3176: #define TEXT_SECTION_ASM_OP "\t.text" /* instructions */
! 3177: #define DATA_SECTION_ASM_OP "\t.data" /* large data */
! 3178: #define SDATA_SECTION_ASM_OP "\t.sdata" /* small data */
! 3179: #define RDATA_SECTION_ASM_OP "\t.rdata" /* read-only data */
! 3180: #define READONLY_DATA_SECTION rdata_section
1.1 root 3181:
3182: /* What other sections we support other than the normal .data/.text. */
3183:
3184: #define EXTRA_SECTIONS in_sdata, in_rdata, in_last_p1
3185:
3186: /* Define the additional functions to select our additional sections. */
3187:
3188: /* on the MIPS it is not a good idea to put constants in the text
3189: section, since this defeats the sdata/data mechanism. This is
3190: especially true when -O is used. In this case an effort is made to
3191: address with faster (gp) register relative addressing, which can
3192: only get at sdata and sbss items (there is no stext !!) However,
3193: if the constant is too large for sdata, and it's readonly, it
3194: will go into the .rdata section. */
3195:
3196: #define EXTRA_SECTION_FUNCTIONS \
3197: void \
3198: sdata_section () \
3199: { \
3200: if (in_section != in_sdata) \
3201: { \
3202: fprintf (asm_out_file, "%s\n", SDATA_SECTION_ASM_OP); \
3203: in_section = in_sdata; \
3204: } \
3205: } \
3206: \
3207: void \
3208: rdata_section () \
3209: { \
3210: if (in_section != in_rdata) \
3211: { \
3212: fprintf (asm_out_file, "%s\n", RDATA_SECTION_ASM_OP); \
3213: in_section = in_rdata; \
3214: } \
3215: }
3216:
3217: /* Given a decl node or constant node, choose the section to output it in
3218: and select that section. */
3219:
3220: #define SELECT_SECTION_MODE(MODE,RTX) \
3221: { \
3222: extern int mips_section_threshold; \
3223: if ((GET_MODE_SIZE(MODE) / BITS_PER_UNIT) <= mips_section_threshold \
3224: && mips_section_threshold > 0) \
3225: sdata_section (); \
3226: else \
3227: rdata_section (); \
3228: } \
3229:
3230: #define SELECT_SECTION(DECL,RELOC) \
3231: { \
3232: extern int mips_section_threshold; \
3233: if (int_size_in_bytes (TREE_TYPE (DECL)) <= mips_section_threshold \
3234: && mips_section_threshold > 0) \
3235: sdata_section (); \
3236: else if (TREE_CODE (DECL) == STRING_CST) \
3237: { \
3238: if (flag_writable_strings) \
3239: data_section (); \
3240: else \
3241: rdata_section (); \
3242: } \
3243: else if (TREE_CODE (DECL) != VAR_DECL) \
3244: rdata_section (); \
3245: else if (!TREE_READONLY (DECL)) \
3246: data_section (); \
3247: else \
3248: rdata_section (); \
3249: }
3250:
3251:
3252: /* Store in OUTPUT a string (made with alloca) containing
3253: an assembler-name for a local static variable named NAME.
3254: LABELNO is an integer which is different for each call. */
3255:
3256: #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \
3257: ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \
3258: sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO)))
3259:
3260: #define ASM_OUTPUT_REG_PUSH(STREAM,REGNO) \
3261: do \
3262: { \
3263: fprintf (STREAM, "\tsubu\t%s,%s,8\n\tsw\t%s,0(%s)\n", \
3264: reg_names[STACK_POINTER_REGNUM], \
3265: reg_names[STACK_POINTER_REGNUM], \
3266: reg_names[REGNO], \
3267: reg_names[STACK_POINTER_REGNUM]); \
3268: } \
3269: while (0)
3270:
3271: #define ASM_OUTPUT_REG_POP(STREAM,REGNO) \
3272: do \
3273: { \
3274: if (! set_noreorder) \
3275: fprintf (STREAM, "\t.set\tnoreorder\n"); \
3276: \
3277: dslots_load_total++; \
3278: dslots_load_filled++; \
3279: fprintf (STREAM, "\tlw\t%s,0(%s)\n\taddu\t%s,%s,8\n", \
3280: reg_names[REGNO], \
3281: reg_names[STACK_POINTER_REGNUM], \
3282: reg_names[STACK_POINTER_REGNUM], \
3283: reg_names[STACK_POINTER_REGNUM]); \
3284: \
3285: if (! set_noreorder) \
3286: fprintf (STREAM, "\t.set\treorder\n"); \
3287: } \
3288: while (0)
3289:
3290: /* Define the parentheses used to group arithmetic operations
3291: in assembler code. */
3292:
3293: #define ASM_OPEN_PAREN "("
3294: #define ASM_CLOSE_PAREN ")"
3295:
3296: /* How to start an assembler comment. */
3297: #ifndef ASM_COMMENT_START
3298: #define ASM_COMMENT_START "\t\t# "
3299: #endif
3300:
3301:
3302:
3303: /* Macros for mips-tfile.c to encapsulate stabs in ECOFF, and for
3304: and mips-tdump.c to print them out.
3305:
3306: These must match the corresponding definitions in gdb/mipsread.c.
3307: Unfortunately, gcc and gdb do not currently share any directories. */
3308:
3309: #define CODE_MASK 0x8F300
3310: #define MIPS_IS_STAB(sym) (((sym)->index & 0xFFF00) == CODE_MASK)
3311: #define MIPS_MARK_STAB(code) ((code)+CODE_MASK)
3312: #define MIPS_UNMARK_STAB(code) ((code)-CODE_MASK)
1.1.1.3 ! root 3313:
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