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1.1 root 1: /* Definitions of target machine for GNU compiler. MIPS version.
2: Contributed by A. Lichnewsky, [email protected]
3: Changed by Michael Meissner, [email protected]
4: Copyright (C) 1989, 1990, 1991, 1992 Free Software Foundation, Inc.
5:
6: This file is part of GNU CC.
7:
8: GNU CC is free software; you can redistribute it and/or modify
9: it under the terms of the GNU General Public License as published by
10: the Free Software Foundation; either version 2, or (at your option)
11: any later version.
12:
13: GNU CC is distributed in the hope that it will be useful,
14: but WITHOUT ANY WARRANTY; without even the implied warranty of
15: MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16: GNU General Public License for more details.
17:
18: You should have received a copy of the GNU General Public License
19: along with GNU CC; see the file COPYING. If not, write to
20: the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
21:
22:
23: /* Make Saber happier on obstack.[ch]. */
24: #if defined(__mips__) || defined(mips)
25: #define __PTR_TO_INT(P) ((int)(P))
26: #define __INT_TO_PTR(P) ((char *)(P))
27: #endif
28:
29: /* Standard GCC variables that we reference. */
30:
1.1.1.4 ! root 31: extern char *asm_file_name;
! 32: extern char call_used_regs[];
! 33: extern int current_function_calls_alloca;
! 34: extern int flag_omit_frame_pointer;
! 35: extern int frame_pointer_needed;
! 36: extern char *language_string;
! 37: extern int may_call_alloca;
! 38: extern int optimize;
! 39: extern char **save_argv;
! 40: extern int target_flags;
! 41: extern char *version_string;
1.1 root 42:
43: /* MIPS external variables defined in mips.c. */
44:
45: /* comparison type */
46: enum cmp_type {
47: CMP_SI, /* compare integers */
48: CMP_SF, /* compare single precision floats */
49: CMP_DF, /* compare double precision floats */
50: CMP_MAX /* max comparison type */
51: };
52:
53: /* types of delay slot */
54: enum delay_type {
55: DELAY_NONE, /* no delay slot */
56: DELAY_LOAD, /* load from memory delay */
1.1.1.3 root 57: DELAY_HILO, /* move from/to hi/lo registers */
58: DELAY_FCMP /* delay after doing c.<xx>.{d,s} */
1.1 root 59: };
60:
61: /* Which processor to schedule for. Since there is no difference between
62: a R2000 and R3000 in terms of the scheduler, we collapse them into
1.1.1.3 root 63: just an R3000. The elements of the enumeration must match exactly
64: the cpu attribute in the mips.md machine description. */
1.1 root 65:
66: enum processor_type {
67: PROCESSOR_DEFAULT,
68: PROCESSOR_R3000,
69: PROCESSOR_R6000,
70: PROCESSOR_R4000
71: };
72:
1.1.1.3 root 73: /* Recast the cpu class to be the cpu attribute. */
74: #define mips_cpu_attr ((enum attr_cpu)mips_cpu)
75:
76: /* Which type of block move to do (whether or not the last store is
77: split out so it can fill a branch delay slot). */
78:
79: enum block_move_type {
80: BLOCK_MOVE_NORMAL, /* generate complete block move */
81: BLOCK_MOVE_NOT_LAST, /* generate all but last store */
82: BLOCK_MOVE_LAST /* generate just the last store */
83: };
84:
1.1 root 85: extern char mips_reg_names[][8]; /* register names (a0 vs. $4). */
86: extern char mips_print_operand_punct[]; /* print_operand punctuation chars */
87: extern char *current_function_name; /* current function being compiled */
88: extern char *current_function_file; /* filename current function is in */
89: extern int num_source_filenames; /* current .file # */
90: extern int inside_function; /* != 0 if inside of a function */
91: extern int ignore_line_number; /* != 0 if we are to ignore next .loc */
92: extern int file_in_function_warning; /* warning given about .file in func */
93: extern int sdb_label_count; /* block start/end next label # */
94: extern int mips_section_threshold; /* # bytes of data/sdata cutoff */
95: extern int g_switch_value; /* value of the -G xx switch */
96: extern int g_switch_set; /* whether -G xx was passed. */
97: extern int sym_lineno; /* sgi next label # for each stmt */
98: extern int set_noreorder; /* # of nested .set noreorder's */
99: extern int set_nomacro; /* # of nested .set nomacro's */
100: extern int set_noat; /* # of nested .set noat's */
101: extern int set_volatile; /* # of nested .set volatile's */
102: extern int mips_branch_likely; /* emit 'l' after br (branch likely) */
103: extern int mips_dbx_regno[]; /* Map register # to debug register # */
104: extern char mips_rtx_classify[]; /* classify an RTX code */
105: extern struct rtx_def *branch_cmp[2]; /* operands for compare */
106: extern enum cmp_type branch_type; /* what type of branch to use */
107: extern enum processor_type mips_cpu; /* which cpu are we scheduling for */
108: extern int mips_isa; /* architectural level */
109: extern char *mips_cpu_string; /* for -mcpu=<xxx> */
110: extern char *mips_isa_string; /* for -mips{1,2,3} */
111: extern int dslots_load_total; /* total # load related delay slots */
112: extern int dslots_load_filled; /* # filled load delay slots */
113: extern int dslots_jump_total; /* total # jump related delay slots */
114: extern int dslots_jump_filled; /* # filled jump delay slots */
115: extern int dslots_number_nops; /* # of nops needed by previous insn */
116: extern int num_refs[3]; /* # 1/2/3 word references */
117: extern struct rtx_def *mips_load_reg; /* register to check for load delay */
118: extern struct rtx_def *mips_load_reg2; /* 2nd reg to check for load delay */
119: extern struct rtx_def *mips_load_reg3; /* 3rd reg to check for load delay */
120: extern struct rtx_def *mips_load_reg4; /* 4th reg to check for load delay */
121:
122: /* Functions within mips.c that we reference. */
123:
124: extern void abort_with_insn ();
125: extern int arith32_operand ();
126: extern int arith_operand ();
127: extern int cmp_op ();
128: extern int cmp2_op ();
1.1.1.4 ! root 129: extern long compute_frame_size ();
! 130: extern int epilogue_reg_mentioned_p ();
1.1 root 131: extern void expand_block_move ();
132: extern int equality_op ();
133: extern int fcmp_op ();
1.1.1.4 ! root 134: extern void final_prescan_insn ();
1.1.1.3 root 135: extern int fpsw_register_operand ();
1.1 root 136: extern struct rtx_def * function_arg ();
137: extern void function_arg_advance ();
138: extern int function_arg_partial_nregs ();
139: extern void function_epilogue ();
140: extern void function_prologue ();
141: extern void gen_conditional_branch ();
1.1.1.3 root 142: extern struct rtx_def * gen_int_relational ();
1.1 root 143: extern void init_cumulative_args ();
144: extern int large_int ();
145: extern int md_register_operand ();
146: extern int mips_address_cost ();
147: extern void mips_asm_file_end ();
148: extern void mips_asm_file_start ();
149: extern int mips_const_double_ok ();
150: extern void mips_count_memory_refs ();
151: extern int mips_debugger_offset ();
1.1.1.4 ! root 152: extern void mips_declare_object ();
1.1 root 153: extern int mips_epilogue_delay_slots ();
1.1.1.4 ! root 154: extern void mips_expand_epilogue ();
! 155: extern void mips_expand_prologue ();
1.1 root 156: extern char *mips_fill_delay_slot ();
157: extern char *mips_move_1word ();
158: extern char *mips_move_2words ();
1.1.1.3 root 159: extern void mips_output_double ();
1.1 root 160: extern int mips_output_external ();
1.1.1.3 root 161: extern void mips_output_float ();
1.1 root 162: extern void mips_output_filename ();
163: extern void mips_output_lineno ();
1.1.1.3 root 164: extern char *output_block_move ();
1.1 root 165: extern void override_options ();
1.1.1.3 root 166: extern int pc_or_label_operand ();
1.1 root 167: extern void print_operand_address ();
168: extern void print_operand ();
169: extern void print_options ();
170: extern int reg_or_0_operand ();
1.1.1.4 ! root 171: extern int simple_epilogue_p ();
1.1 root 172: extern int simple_memory_operand ();
173: extern int small_int ();
174: extern void trace();
175: extern int uns_arith_operand ();
176: extern int uns_cmp_op ();
177:
1.1.1.4 ! root 178: /* Recognition functions that return if a condition is true. */
! 179: extern int address_operand ();
! 180: extern int const_double_operand ();
! 181: extern int const_int_operand ();
! 182: extern int general_operand ();
! 183: extern int immediate_operand ();
! 184: extern int memory_address_p ();
! 185: extern int memory_operand ();
! 186: extern int nonimmediate_operand ();
! 187: extern int nonmemory_operand ();
! 188: extern int register_operand ();
! 189: extern int scratch_operand ();
! 190:
! 191: /* Functions to change what output section we are using. */
1.1 root 192: extern void data_section ();
193: extern void rdata_section ();
194: extern void readonly_data_section ();
195: extern void sdata_section ();
196: extern void text_section ();
197:
1.1.1.4 ! root 198: /* Functions in the rest of the compiler that we reference. */
! 199: extern void abort_with_insn ();
! 200: extern void debug_rtx ();
! 201: extern void fatal_io_error ();
! 202: extern int get_frame_size ();
! 203: extern int offsettable_address_p ();
! 204: extern void output_address ();
! 205: extern char *permalloc ();
! 206: extern int reg_mentioned_p ();
! 207:
! 208: /* Functions in the standard library that we reference. */
! 209: extern void abort ();
! 210: extern int atoi ();
! 211: extern char *getenv ();
! 212: extern char *mktemp ();
! 213:
! 214:
1.1 root 215: /* Stubs for half-pic support if not OSF/1 reference platform. */
216:
217: #ifndef HALF_PIC_P
218: #define HALF_PIC_P() 0
1.1.1.3 root 219: #define HALF_PIC_NUMBER_PTRS 0
220: #define HALF_PIC_NUMBER_REFS 0
1.1 root 221: #define HALF_PIC_ENCODE(DECL)
1.1.1.3 root 222: #define HALF_PIC_DECLARE(NAME)
1.1 root 223: #define HALF_PIC_INIT() error ("half-pic init called on systems that don't support it.")
224: #define HALF_PIC_ADDRESS_P(X) 0
1.1.1.3 root 225: #define HALF_PIC_PTR(X) X
226: #define HALF_PIC_FINISH(STREAM)
1.1 root 227: #endif
228:
229:
230: /* Switch Recognition by gcc.c. Add -G xx support */
231:
232: #ifdef SWITCH_TAKES_ARG
233: #undef SWITCH_TAKES_ARG
234: #endif
235:
236: #define SWITCH_TAKES_ARG(CHAR) \
237: ((CHAR) == 'D' || (CHAR) == 'U' || (CHAR) == 'o' \
238: || (CHAR) == 'e' || (CHAR) == 'T' || (CHAR) == 'u' \
239: || (CHAR) == 'I' || (CHAR) == 'm' \
240: || (CHAR) == 'L' || (CHAR) == 'A' || (CHAR) == 'G')
241:
242: /* Sometimes certain combinations of command options do not make sense
243: on a particular target machine. You can define a macro
244: `OVERRIDE_OPTIONS' to take account of this. This macro, if
245: defined, is executed once just after all the command options have
246: been parsed.
247:
248: On the MIPS, it is used to handle -G. We also use it to set up all
249: of the tables referenced in the other macros. */
250:
251: #define OVERRIDE_OPTIONS override_options ()
252:
253: /* Zero or more C statements that may conditionally modify two
254: variables `fixed_regs' and `call_used_regs' (both of type `char
255: []') after they have been initialized from the two preceding
256: macros.
257:
258: This is necessary in case the fixed or call-clobbered registers
259: depend on target flags.
260:
261: You need not define this macro if it has no work to do.
262:
263: If the usage of an entire class of registers depends on the target
264: flags, you may indicate this to GCC by using this macro to modify
265: `fixed_regs' and `call_used_regs' to 1 for each of the registers in
266: the classes which should not be used by GCC. Also define the macro
267: `REG_CLASS_FROM_LETTER' to return `NO_REGS' if it is called with a
268: letter for a class that shouldn't be used.
269:
270: (However, if this class is not included in `GENERAL_REGS' and all
271: of the insn patterns whose constraints permit this class are
272: controlled by target switches, then GCC will automatically avoid
273: using these registers when the target switches are opposed to
274: them.) */
275:
276: #define CONDITIONAL_REGISTER_USAGE \
277: do \
278: { \
279: if (!TARGET_HARD_FLOAT) \
280: { \
281: int regno; \
282: \
283: for (regno = FP_REG_FIRST; regno <= FP_REG_LAST; regno++) \
284: fixed_regs[regno] = call_used_regs[regno] = 1; \
285: } \
286: } \
287: while (0)
288:
289:
290: /* Some machines may desire to change what optimizations are
291: performed for various optimization levels. This macro, if
292: defined, is executed once just after the optimization level is
293: determined and before the remainder of the command options have
294: been parsed. Values set in this macro are used as the default
295: values for the other command line options.
296:
297: LEVEL is the optimization level specified; 2 if -O2 is
298: specified, 1 if -O is specified, and 0 if neither is specified. */
299:
300: #define OPTIMIZATION_OPTIONS(LEVEL) \
301: { \
1.1.1.3 root 302: flag_no_function_cse = TRUE; \
303: flag_gnu_linker = FALSE; \
304: \
1.1 root 305: if (LEVEL) \
306: { \
307: flag_omit_frame_pointer = TRUE; \
308: flag_delayed_branch = TRUE; \
309: flag_thread_jumps = TRUE; \
310: flag_schedule_insns_after_reload = TRUE; \
311: } \
312: \
313: if (LEVEL >= 2) \
314: { \
315: flag_strength_reduce = TRUE; \
316: flag_cse_follow_jumps = TRUE; \
317: flag_expensive_optimizations = TRUE; \
318: flag_rerun_cse_after_loop = TRUE; \
319: flag_schedule_insns = TRUE; \
320: } \
321: \
322: if (LEVEL >= 3) \
323: { \
324: flag_inline_functions = TRUE; \
325: } \
326: }
327:
328:
329:
330: /* Complain about missing specs and predefines that should be defined in each
331: of the target tm files to override the defaults. This is mostly a place-
332: holder until I can get each of the files updated [mm]. */
333:
334: #if defined(OSF_OS) \
335: || defined(DECSTATION) \
336: || defined(SGI_TARGET) \
337: || defined(MIPS_NEWS) \
338: || defined(MIPS_SYSV) \
1.1.1.2 root 339: || defined(MIPS_SVR4) \
1.1 root 340: || defined(MIPS_BSD43)
341:
342: #ifndef CPP_PREDEFINES
343: #error "Define CPP_PREDEFINES in the appropriate tm.h file"
344: #endif
345:
346: #ifndef CPP_SPEC
347: #error "Define CPP_SPEC in the appropriate tm.h file"
348: #endif
349:
350: #ifndef LINK_SPEC
351: #error "Define LINK_SPEC in the appropriate tm.h file"
352: #endif
353:
354: #ifndef LIB_SPEC
355: #error "Define LIB_SPEC in the appropriate tm.h file"
356: #endif
357:
358: #ifndef STARTFILE_SPEC
359: #error "Define STARTFILE_SPEC in the appropriate tm.h file"
360: #endif
361:
362: #ifndef MACHINE_TYPE
363: #error "Define MACHINE_TYPE in the appropriate tm.h file"
364: #endif
365: #endif
366:
1.1.1.2 root 367: /* Tell collect what flags to pass to nm. */
368: #ifndef NM_FLAGS
369: #define NM_FLAGS "-Bp"
370: #endif
371:
1.1 root 372:
373: /* Names to predefine in the preprocessor for this target machine. */
374:
375: #ifndef CPP_PREDEFINES
1.1.1.4 ! root 376: #define CPP_PREDEFINES "-Dmips -Dunix -Dhost_mips -DMIPSEB -DR3000 -DSYSTYPE_BSD43 \
! 377: -D_mips -D_unix -D_host_mips -D_MIPSEB -D_R3000 -D_SYSTYPE_BSD43"
1.1 root 378: #endif
379:
380: /* Extra switches sometimes passed to the assembler. */
381:
382: #ifndef ASM_SPEC
383: #define ASM_SPEC "\
384: %{!mgas: \
1.1.1.2 root 385: %{!mrnames: %{!.s:-nocpp} %{.s: %{cpp} %{nocpp}}} \
1.1 root 386: %{pipe: %e-pipe is not supported.} \
387: %{EB} %{!EB:-EB} \
388: %{EL: %e-EL not supported} \
1.1.1.2 root 389: %{mips1} %{mips2} %{mips3} \
1.1 root 390: %{O:-O2} %{O1:-O2} %{O2:-O2} %{O3:-O3} \
391: %{g} %{g0} %{g1} %{g2} %{g3} %{v} %{K}} \
392: %{G*}"
393:
394: #endif /* ASM_SPEC */
395:
396: /* Specify to run a post-processor, mips-tfile after the assembler
397: has run to stuff the mips debug information into the object file.
398: This is needed because the $#!%^ MIPS assembler provides no way
1.1.1.4 ! root 399: of specifying such information in the assembly file. If we are
! 400: cross compiling, disable mips-tfile unless the user specifies
! 401: -mmips-tfile. */
1.1 root 402:
403: #ifndef ASM_FINAL_SPEC
1.1.1.4 ! root 404: #ifndef CROSS_COMPILE
1.1 root 405: #define ASM_FINAL_SPEC "\
406: %{!mgas: %{!mno-mips-tfile: \
407: \n mips-tfile %{v*: -v} \
408: %{K: -I %b.o~} \
409: %{!K: %{save-temps: -I %b.o~}} \
1.1.1.4 ! root 410: %{c:%W{o*}%{!o*:-o %b.o}}%{!c:-o %U.o} \
1.1 root 411: %{.s:%i} %{!.s:%g.s}}}"
1.1.1.4 ! root 412:
! 413: #else /* CROSS_COMPILE */
! 414: #define ASM_FINAL_SPEC "\
! 415: %{!mgas: %{mmips-tfile: \
! 416: \n mips-tfile %{v*: -v} \
! 417: %{K: -I %b.o~} \
! 418: %{!K: %{save-temps: -I %b.o~}} \
! 419: %{c:%W{o*}%{!o*:-o %b.o}}%{!c:-o %U.o} \
! 420: %{.s:%i} %{!.s:%g.s}}}"
! 421:
! 422: #endif /* CROSS_COMPILE */
! 423: #endif /* ASM_FINAL_SPEC */
1.1 root 424:
425: /* Redefinition of libraries used. Mips doesn't support normal
426: UNIX style profiling via calling _mcount. It does offer
427: profiling that samples the PC, so do what we can... */
428:
429: #ifndef LIB_SPEC
430: #define LIB_SPEC "%{pg:-lprof1} %{p:-lprof1} -lc"
431: #endif
432:
433: /* Extra switches sometimes passed to the linker. */
434:
435: #ifndef LINK_SPEC
436: #define LINK_SPEC "\
437: %{G*} \
438: %{!mgas: \
439: %{pipe: %e-pipe is not supported.} \
440: %{EB} %{!EB:-EB} \
441: %{EL: %e-EL not supported} \
1.1.1.2 root 442: %{mips1} %{mips2} %{mips3} \
1.1.1.4 ! root 443: %{bestGnum} %{shared} %{non_shared}}"
1.1 root 444: #endif /* LINK_SPEC defined */
445:
446: /* Specs for the compiler proper */
447:
448: #ifndef CC1_SPEC
449: #define CC1_SPEC "\
450: %{O*: %{!mno-gpOPT:%{!mno-gpopt: -mgpopt}}} \
451: %{gline:%{!g:%{!g0:%{!g1:%{!g2: -g1}}}}} \
452: %{G*} \
453: %{pic-none: -mno-half-pic} \
454: %{pic-lib: -mhalf-pic} \
455: %{pic-extern: -mhalf-pic} \
456: %{pic-calls: -mhalf-pic} \
457: %{save-temps: }"
458: #endif
459:
460: /* Preprocessor specs */
461:
462: #ifndef CPP_SPEC
463: #define CPP_SPEC "\
464: %{.cc: -D__LANGUAGE_C_PLUS_PLUS -D_LANGUAGE_C_PLUS_PLUS} \
465: %{.cxx: -D__LANGUAGE_C_PLUS_PLUS -D_LANGUAGE_C_PLUS_PLUS} \
466: %{.C: -D__LANGUAGE_C_PLUS_PLUS -D_LANGUAGE_C_PLUS_PLUS} \
467: %{.m: -D__LANGUAGE_OBJECTIVE_C -D_LANGUAGE_OBJECTIVE_C} \
468: %{.S: -D__LANGUAGE_ASSEMBLY -D_LANGUAGE_ASSEMBLY %{!ansi:-DLANGUAGE_ASSEMBLY}} \
469: %{!.S: -D__LANGUAGE_C -D_LANGUAGE_C %{!ansi:-DLANGUAGE_C}}"
470: #endif
471:
472: /* If defined, this macro is an additional prefix to try after
473: `STANDARD_EXEC_PREFIX'. */
474:
475: #ifndef MD_EXEC_PREFIX
1.1.1.2 root 476: #define MD_EXEC_PREFIX "/usr/lib/cmplrs/cc/"
477: #endif
478:
479: #ifndef MD_STARTFILE_PREFIX
480: #define MD_STARTFILE_PREFIX "/usr/lib/cmplrs/cc/"
1.1 root 481: #endif
482:
483:
484: /* Print subsidiary information on the compiler version in use. */
485:
1.1.1.4 ! root 486: #define MIPS_VERSION "[AL 1.1, MM 33]"
1.1 root 487:
488: #ifndef MACHINE_TYPE
489: #define MACHINE_TYPE "BSD Mips"
490: #endif
491:
492: #ifndef TARGET_VERSION_INTERNAL
493: #define TARGET_VERSION_INTERNAL(STREAM) \
494: fprintf (STREAM, " %s %s", MIPS_VERSION, MACHINE_TYPE)
495: #endif
496:
497: #ifndef TARGET_VERSION
498: #define TARGET_VERSION TARGET_VERSION_INTERNAL (stderr)
499: #endif
500:
501:
502: #define SDB_DEBUGGING_INFO /* generate info for mips-tfile */
503: #define DBX_DEBUGGING_INFO /* generate stabs (OSF/rose) */
504: #define MIPS_DEBUGGING_INFO /* MIPS specific debugging info */
505:
506: #ifndef PREFERRED_DEBUGGING_TYPE /* assume SDB_DEBUGGING_INFO */
1.1.1.2 root 507: #define PREFERRED_DEBUGGING_TYPE ((len > 1 && !strncmp (str, "ggdb", len)) ? DBX_DEBUG : SDB_DEBUG)
1.1 root 508: #endif
509:
1.1.1.2 root 510: /* By default, turn on GDB extensions. */
511: #define DEFAULT_GDB_EXTENSIONS 1
512:
1.1 root 513: /* If we are passing smuggling stabs through the MIPS ECOFF object
514: format, put a comment in front of the .stab<x> operation so
515: that the MIPS assembler does not choke. The mips-tfile program
516: will correctly put the stab into the object file. */
517:
518: #define ASM_STABS_OP ((TARGET_GAS) ? ".stabs" : " #.stabs")
519: #define ASM_STABN_OP ((TARGET_GAS) ? ".stabn" : " #.stabn")
520: #define ASM_STABD_OP ((TARGET_GAS) ? ".stabd" : " #.stabd")
521:
522: /* Forward references to tags are allowed. */
523: #define SDB_ALLOW_FORWARD_REFERENCES
524:
525: /* Unknown tags are also allowed. */
526: #define SDB_ALLOW_UNKNOWN_REFERENCES
527:
528: /* On Sun 4, this limit is 2048. We use 1500 to be safe,
529: since the length can run past this up to a continuation point. */
530: #define DBX_CONTIN_LENGTH 1500
531:
532:
533: /* How to renumber registers for dbx and gdb. */
534: #define DBX_REGISTER_NUMBER(REGNO) mips_dbx_regno[ (REGNO) ]
535:
536:
537: /* Overrides for the COFF debug format. */
538: #define PUT_SDB_SCL(a) \
539: do { \
540: extern FILE *asm_out_text_file; \
541: fprintf (asm_out_text_file, "\t.scl\t%d;", (a)); \
542: } while (0)
543:
544: #define PUT_SDB_INT_VAL(a) \
545: do { \
546: extern FILE *asm_out_text_file; \
547: fprintf (asm_out_text_file, "\t.val\t%d;", (a)); \
548: } while (0)
549:
550: #define PUT_SDB_VAL(a) \
551: do { \
552: extern FILE *asm_out_text_file; \
553: fputs ("\t.val\t", asm_out_text_file); \
554: output_addr_const (asm_out_text_file, (a)); \
555: fputc (';', asm_out_text_file); \
556: } while (0)
557:
558: #define PUT_SDB_DEF(a) \
559: do { \
560: extern FILE *asm_out_text_file; \
561: fprintf (asm_out_text_file, "\t#.def\t"); \
562: ASM_OUTPUT_LABELREF (asm_out_text_file, a); \
563: fputc (';', asm_out_text_file); \
564: } while (0)
565:
566: #define PUT_SDB_PLAIN_DEF(a) \
567: do { \
568: extern FILE *asm_out_text_file; \
569: fprintf (asm_out_text_file, "\t#.def\t.%s;", (a)); \
570: } while (0)
571:
572: #define PUT_SDB_ENDEF \
573: do { \
574: extern FILE *asm_out_text_file; \
575: fprintf (asm_out_text_file, "\t.endef\n"); \
576: } while (0)
577:
578: #define PUT_SDB_TYPE(a) \
579: do { \
580: extern FILE *asm_out_text_file; \
581: fprintf (asm_out_text_file, "\t.type\t0x%x;", (a)); \
582: } while (0)
583:
584: #define PUT_SDB_SIZE(a) \
585: do { \
586: extern FILE *asm_out_text_file; \
587: fprintf (asm_out_text_file, "\t.size\t%d;", (a)); \
588: } while (0)
589:
590: #define PUT_SDB_DIM(a) \
591: do { \
592: extern FILE *asm_out_text_file; \
593: fprintf (asm_out_text_file, "\t.dim\t%d;", (a)); \
594: } while (0)
595:
596: #ifndef PUT_SDB_START_DIM
597: #define PUT_SDB_START_DIM \
598: do { \
599: extern FILE *asm_out_text_file; \
600: fprintf (asm_out_text_file, "\t.dim\t"); \
601: } while (0)
602: #endif
603:
604: #ifndef PUT_SDB_NEXT_DIM
605: #define PUT_SDB_NEXT_DIM(a) \
606: do { \
607: extern FILE *asm_out_text_file; \
608: fprintf (asm_out_text_file, "%d,", a); \
609: } while (0)
610: #endif
611:
612: #ifndef PUT_SDB_LAST_DIM
613: #define PUT_SDB_LAST_DIM(a) \
614: do { \
615: extern FILE *asm_out_text_file; \
616: fprintf (asm_out_text_file, "%d;", a); \
617: } while (0)
618: #endif
619:
620: #define PUT_SDB_TAG(a) \
621: do { \
622: extern FILE *asm_out_text_file; \
623: fprintf (asm_out_text_file, "\t.tag\t"); \
624: ASM_OUTPUT_LABELREF (asm_out_text_file, a); \
625: fputc (';', asm_out_text_file); \
626: } while (0)
627:
628: /* For block start and end, we create labels, so that
629: later we can figure out where the correct offset is.
630: The normal .ent/.end serve well enough for functions,
631: so those are just commented out. */
632:
633: #define PUT_SDB_BLOCK_START(LINE) \
634: do { \
635: extern FILE *asm_out_text_file; \
636: fprintf (asm_out_text_file, \
637: "$Lb%d:\n\t#.begin\t$Lb%d\t%d\n", \
638: sdb_label_count, \
639: sdb_label_count, \
640: (LINE)); \
641: sdb_label_count++; \
642: } while (0)
643:
644: #define PUT_SDB_BLOCK_END(LINE) \
645: do { \
646: extern FILE *asm_out_text_file; \
647: fprintf (asm_out_text_file, \
648: "$Le%d:\n\t#.bend\t$Le%d\t%d\n", \
649: sdb_label_count, \
650: sdb_label_count, \
651: (LINE)); \
652: sdb_label_count++; \
653: } while (0)
654:
655: #define PUT_SDB_FUNCTION_START(LINE)
656:
657: #define PUT_SDB_FUNCTION_END(LINE)
658:
659: #define PUT_SDB_EPILOGUE_END(NAME)
660:
661: #define SDB_GENERATE_FAKE(BUFFER, NUMBER) \
662: sprintf ((BUFFER), ".%dfake", (NUMBER));
663:
1.1.1.4 ! root 664: /* Correct the offset of automatic variables and arguments. Note that
! 665: the MIPS debug format wants all automatic variables and arguments
! 666: to be in terms of the virtual frame pointer (stack pointer before
! 667: any adjustment in the function), while the MIPS 3.0 linker wants
! 668: the frame pointer to be the stack pointer after the initial
! 669: adjustment. */
1.1 root 670:
671: #define DEBUGGER_AUTO_OFFSET(X) mips_debugger_offset (X, 0)
672: #define DEBUGGER_ARG_OFFSET(OFFSET, X) mips_debugger_offset (X, OFFSET)
673:
674:
675: /* Tell collect that the object format is ECOFF */
676: #ifndef OBJECT_FORMAT_ROSE
677: #define OBJECT_FORMAT_COFF /* Object file looks like COFF */
678: #define EXTENDED_COFF /* ECOFF, not normal coff */
679: #endif
680:
1.1.1.3 root 681: /* Don't use the default definitions, because we don't have gld.
682: Also, we don't want stabs when generating ECOFF output.
683: Instead we depend on collect to handle these. */
684:
685: #define ASM_OUTPUT_CONSTRUCTOR(file, name)
686: #define ASM_OUTPUT_DESTRUCTOR(file, name)
687:
1.1 root 688:
689: /* Run-time compilation parameters selecting different hardware subsets. */
690:
691: /* Macros used in the machine description to test the flags. */
692:
693: /* Bits for real switches */
694: #define MASK_INT64 0x00000001 /* ints are 64 bits */
695: #define MASK_LONG64 0x00000002 /* longs are 64 bits */
696: #define MASK_LLONG128 0x00000004 /* long longs are 128 bits */
697: #define MASK_GPOPT 0x00000008 /* Optimize for global pointer */
698: #define MASK_GAS 0x00000010 /* Gas used instead of MIPS as */
699: #define MASK_NAME_REGS 0x00000020 /* Use MIPS s/w reg name convention */
700: #define MASK_STATS 0x00000040 /* print statistics to stderr */
701: #define MASK_MEMCPY 0x00000080 /* call memcpy instead of inline code*/
702: #define MASK_SOFT_FLOAT 0x00000100 /* software floating point */
703: #define MASK_FLOAT64 0x00000200 /* fp registers are 64 bits */
704: #define MASK_ABICALLS 0x00000400 /* emit .abicalls/.cprestore/.cpload */
705: #define MASK_HALF_PIC 0x00000800 /* Emit OSF-style pic refs to externs*/
706: #define MASK_UNUSED1 0x00001000
707: #define MASK_UNUSED2 0x00002000
708: #define MASK_UNUSED3 0x00004000
709: #define MASK_UNUSED4 0x00008000
710: #define MASK_UNUSED5 0x00010000
711: #define MASK_UNUSED6 0x00020000
712: #define MASK_UNUSED7 0x00040000
713: #define MASK_UNUSED8 0x00080000
714:
715: /* Dummy switches used only in spec's*/
716: #define MASK_MIPS_TFILE 0x00000000 /* flag for mips-tfile usage */
717:
718: /* switches not used yet */
719: #define MASK_WC8 0x00000000 /* wchar's are 8 bits, not 32 */
720: #define MASK_WC16 0x00000000 /* wchar's are 16 bits, not 32 */
1.1.1.2 root 721: #define MASK_WC32 0x00000000 /* dummy for consistency */
1.1 root 722:
723: /* Debug switches, not documented */
724: #define MASK_DEBUG 0x40000000 /* Eliminate version # in .s file */
725: #define MASK_DEBUG_A 0x20000000 /* don't allow <label>($reg) addrs */
726: #define MASK_DEBUG_B 0x10000000 /* GO_IF_LEGITIMATE_ADDRESS debug */
1.1.1.3 root 727: #define MASK_DEBUG_C 0x08000000 /* don't expand seq, etc. */
728: #define MASK_DEBUG_D 0x04000000 /* don't do define_split's */
1.1 root 729: #define MASK_DEBUG_E 0x02000000 /* function_arg debug */
730: #define MASK_DEBUG_F 0x01000000 /* don't try to suppress load nop's */
731: #define MASK_DEBUG_G 0x00800000 /* don't support 64 bit arithmetic */
732: #define MASK_DEBUG_H 0x00400000 /* allow ints in FP registers */
733: #define MASK_DEBUG_I 0x00200000 /* unused */
734: #define MASK_DEBUG_J 0x00100000 /* unused */
735:
736: /* r4000 64 bit sizes */
737: #define TARGET_INT64 (target_flags & MASK_INT64)
738: #define TARGET_LONG64 (target_flags & MASK_LONG64)
739: #define TARGET_LLONG128 (target_flags & MASK_LLONG128)
740: #define TARGET_FLOAT64 (target_flags & MASK_FLOAT64)
741:
742: /* Mips vs. GNU assembler */
743: #define TARGET_GAS (target_flags & MASK_GAS)
744: #define TARGET_UNIX_ASM (!TARGET_GAS)
745: #define TARGET_MIPS_AS TARGET_UNIX_ASM
746:
747: /* Debug Mode */
748: #define TARGET_DEBUG_MODE (target_flags & MASK_DEBUG)
749: #define TARGET_DEBUG_A_MODE (target_flags & MASK_DEBUG_A)
750: #define TARGET_DEBUG_B_MODE (target_flags & MASK_DEBUG_B)
751: #define TARGET_DEBUG_C_MODE (target_flags & MASK_DEBUG_C)
752: #define TARGET_DEBUG_D_MODE (target_flags & MASK_DEBUG_D)
753: #define TARGET_DEBUG_E_MODE (target_flags & MASK_DEBUG_E)
754: #define TARGET_DEBUG_F_MODE (target_flags & MASK_DEBUG_F)
755: #define TARGET_DEBUG_G_MODE (target_flags & MASK_DEBUG_G)
756: #define TARGET_DEBUG_H_MODE (target_flags & MASK_DEBUG_H)
757: #define TARGET_DEBUG_I_MODE (target_flags & MASK_DEBUG_I)
758: #define TARGET_DEBUG_J_MODE (target_flags & MASK_DEBUG_J)
759:
760: /* Reg. Naming in .s ($21 vs. $a0) */
761: #define TARGET_NAME_REGS (target_flags & MASK_NAME_REGS)
762:
763: /* Optimize for Sdata/Sbss */
764: #define TARGET_GP_OPT (target_flags & MASK_GPOPT)
765:
766: /* print program statistics */
767: #define TARGET_STATS (target_flags & MASK_STATS)
768:
769: /* call memcpy instead of inline code */
770: #define TARGET_MEMCPY (target_flags & MASK_MEMCPY)
771:
772: /* .abicalls, etc from Pyramid V.4 */
773: #define TARGET_ABICALLS (target_flags & MASK_ABICALLS)
774:
775: /* OSF pic references to externs */
776: #define TARGET_HALF_PIC (target_flags & MASK_HALF_PIC)
777:
778: /* wchar size */
779: #define TARGET_WC8 (target_flags & MASK_WC8)
780: #define TARGET_WC16 (target_flags & MASK_WC16)
781: #define TARGET_WC32 ((target_flags & (MASK_WC8 | MASK_WC16)) == 0)
782:
783: /* software floating point */
784: #define TARGET_SOFT_FLOAT (target_flags & MASK_SOFT_FLOAT)
785: #define TARGET_HARD_FLOAT (! TARGET_SOFT_FLOAT)
786:
787: /* Macro to define tables used to set the flags.
788: This is a list in braces of pairs in braces,
789: each pair being { "NAME", VALUE }
790: where VALUE is the bits to set or minus the bits to clear.
791: An empty string NAME is used to identify the default VALUE. */
792:
793: #define TARGET_SWITCHES \
794: { \
795: {"int64", MASK_INT64 | MASK_LONG64}, \
796: {"long64", MASK_LONG64}, \
797: {"longlong128", MASK_INT64 | MASK_LONG64 | MASK_LLONG128}, \
798: {"mips-as", -MASK_GAS}, \
799: {"gas", MASK_GAS}, \
800: {"rnames", MASK_NAME_REGS}, \
801: {"no-rnames", -MASK_NAME_REGS}, \
802: {"gpOPT", MASK_GPOPT}, \
803: {"gpopt", MASK_GPOPT}, \
804: {"no-gpOPT", -MASK_GPOPT}, \
805: {"no-gpopt", -MASK_GPOPT}, \
806: {"stats", MASK_STATS}, \
807: {"no-stats", -MASK_STATS}, \
808: {"memcpy", MASK_MEMCPY}, \
809: {"no-memcpy", -MASK_MEMCPY}, \
810: {"wc8", MASK_WC8}, \
811: {"wc16", MASK_WC16}, \
812: {"wc32", MASK_WC32}, \
813: {"mips-tfile", MASK_MIPS_TFILE}, \
814: {"no-mips-tfile", -MASK_MIPS_TFILE}, \
815: {"soft-float", MASK_SOFT_FLOAT}, \
816: {"hard-float", -MASK_SOFT_FLOAT}, \
817: {"fp64", MASK_FLOAT64}, \
818: {"fp32", -MASK_FLOAT64}, \
819: {"abicalls", MASK_ABICALLS}, \
820: {"no-abicalls", -MASK_ABICALLS}, \
821: {"half-pic", MASK_HALF_PIC}, \
822: {"no-half-pic", -MASK_HALF_PIC}, \
823: {"debug", MASK_DEBUG}, \
824: {"debuga", MASK_DEBUG_A}, \
825: {"debugb", MASK_DEBUG_B}, \
826: {"debugc", MASK_DEBUG_C}, \
827: {"debugd", MASK_DEBUG_D}, \
828: {"debuge", MASK_DEBUG_E}, \
829: {"debugf", MASK_DEBUG_F}, \
830: {"debugg", MASK_DEBUG_G}, \
831: {"debugh", MASK_DEBUG_H}, \
832: {"debugi", MASK_DEBUG_I}, \
833: {"debugj", MASK_DEBUG_J}, \
834: {"", TARGET_DEFAULT} \
835: }
836:
837: /* Default target_flags if no switches are specified */
838:
839: #ifndef TARGET_DEFAULT
840: #define TARGET_DEFAULT 0
841: #endif
842:
843: /* This macro is similar to `TARGET_SWITCHES' but defines names of
844: command options that have values. Its definition is an
845: initializer with a subgrouping for each command option.
846:
847: Each subgrouping contains a string constant, that defines the
848: fixed part of the option name, and the address of a variable.
849: The variable, type `char *', is set to the variable part of the
850: given option if the fixed part matches. The actual option name
851: is made by appending `-m' to the specified name.
852:
853: Here is an example which defines `-mshort-data-NUMBER'. If the
854: given option is `-mshort-data-512', the variable `m88k_short_data'
855: will be set to the string `"512"'.
856:
857: extern char *m88k_short_data;
858: #define TARGET_OPTIONS { { "short-data-", &m88k_short_data } } */
859:
860: #define TARGET_OPTIONS \
861: { \
862: { "cpu=", &mips_cpu_string }, \
863: { "ips", &mips_isa_string } \
864: }
865:
866: /* Macros to decide whether certain features are available or not,
867: depending on the instruction set architecture level. */
868:
869: #define BRANCH_LIKELY_P() (mips_isa >= 2)
870: #define HAVE_64BIT_P() (mips_isa >= 3)
871: #define HAVE_SQRT_P() (mips_isa >= 2)
872:
873:
874: /* Target machine storage layout */
875:
876: /* Define this if most significant bit is lowest numbered
877: in instructions that operate on numbered bit-fields.
878: */
879: /* #define BITS_BIG_ENDIAN */
880:
881: /* Define this if most significant byte of a word is the lowest numbered. */
882: #ifndef BYTES_BIG_ENDIAN
883: #ifndef DECSTATION
884: #define BYTES_BIG_ENDIAN 1
885: #else
886: #define BYTES_BIG_ENDIAN 0
887: #endif
888: #endif
889:
890: /* Define this if most significant word of a multiword number is the lowest. */
891: #ifndef WORDS_BIG_ENDIAN
892: #ifndef DECSTATION
893: #define WORDS_BIG_ENDIAN 1
894: #else
895: #define WORDS_BIG_ENDIAN 0
896: #endif
897: #endif
898:
899: /* Define macros to easily access the most and least significant words
900: without a lot of #ifdef's. */
901:
902: #if WORDS_BIG_ENDIAN
903: #define MOST_SIGNIFICANT_WORD 0
904: #define LEAST_SIGNIFICANT_WORD 1
905:
906: #else
907: #define MOST_SIGNIFICANT_WORD 1
908: #define LEAST_SIGNIFICANT_WORD 0
909: #endif
910:
1.1.1.2 root 911: /* Number of bits in an addressable storage unit */
1.1 root 912: #define BITS_PER_UNIT 8
913:
914: /* Width in bits of a "word", which is the contents of a machine register.
915: Note that this is not necessarily the width of data type `int';
916: if using 16-bit ints on a 68000, this would still be 32.
917: But on a machine with 16-bit registers, this would be 16. */
918: #define BITS_PER_WORD 32
919:
920: /* Width of a word, in units (bytes). */
921: #define UNITS_PER_WORD 4
922:
923: /* A C expression for the size in bits of the type `int' on the
924: target machine. If you don't define this, the default is one
925: word. */
926: #define INT_TYPE_SIZE 32
927:
928: /* A C expression for the size in bits of the type `short' on the
929: target machine. If you don't define this, the default is half a
930: word. (If this would be less than one storage unit, it is
931: rounded up to one unit.) */
932: #define SHORT_TYPE_SIZE 16
933:
934: /* A C expression for the size in bits of the type `long' on the
935: target machine. If you don't define this, the default is one
936: word. */
937: #define LONG_TYPE_SIZE 32
938:
939: /* A C expression for the size in bits of the type `long long' on the
940: target machine. If you don't define this, the default is two
941: words. */
942: #define LONG_LONG_TYPE_SIZE 64
943:
944: /* A C expression for the size in bits of the type `char' on the
945: target machine. If you don't define this, the default is one
946: quarter of a word. (If this would be less than one storage unit,
947: it is rounded up to one unit.) */
948: #define CHAR_TYPE_SIZE BITS_PER_UNIT
949:
950: /* A C expression for the size in bits of the type `float' on the
951: target machine. If you don't define this, the default is one
952: word. */
953: #define FLOAT_TYPE_SIZE 32
954:
955: /* A C expression for the size in bits of the type `double' on the
956: target machine. If you don't define this, the default is two
957: words. */
958: #define DOUBLE_TYPE_SIZE 64
959:
960: /* A C expression for the size in bits of the type `long double' on
961: the target machine. If you don't define this, the default is two
962: words. */
963: #define LONG_DOUBLE_TYPE_SIZE 64
964:
965: /* Width in bits of a pointer.
966: See also the macro `Pmode' defined below. */
967: #define POINTER_SIZE 32
968:
969: /* Allocation boundary (in *bits*) for storing pointers in memory. */
970: #define POINTER_BOUNDARY 32
971:
972: /* Allocation boundary (in *bits*) for storing arguments in argument list. */
973: #define PARM_BOUNDARY 32
974:
975: /* Allocation boundary (in *bits*) for the code of a function. */
976: #define FUNCTION_BOUNDARY 32
977:
978: /* Alignment of field after `int : 0' in a structure. */
979: #define EMPTY_FIELD_BOUNDARY 32
980:
981: /* Every structure's size must be a multiple of this. */
982: /* 8 is observed right on a DECstation and on riscos 4.02. */
983: #define STRUCTURE_SIZE_BOUNDARY 8
984:
985: /* There is no point aligning anything to a rounder boundary than this. */
986: #define BIGGEST_ALIGNMENT 64
987:
988: /* Biggest alignment any structure field can require in bits. */
989: #define BIGGEST_FIELD_ALIGNMENT 64
990:
1.1.1.2 root 991: /* Set this nonzero if move instructions will actually fail to work
1.1 root 992: when given unaligned data. */
1.1.1.2 root 993: #define STRICT_ALIGNMENT 1
1.1 root 994:
995: /* Define this if you wish to imitate the way many other C compilers
996: handle alignment of bitfields and the structures that contain
997: them.
998:
999: The behavior is that the type written for a bitfield (`int',
1000: `short', or other integer type) imposes an alignment for the
1001: entire structure, as if the structure really did contain an
1002: ordinary field of that type. In addition, the bitfield is placed
1003: within the structure so that it would fit within such a field,
1004: not crossing a boundary for it.
1005:
1006: Thus, on most machines, a bitfield whose type is written as `int'
1007: would not cross a four-byte boundary, and would force four-byte
1008: alignment for the whole structure. (The alignment used may not
1009: be four bytes; it is controlled by the other alignment
1010: parameters.)
1011:
1012: If the macro is defined, its definition should be a C expression;
1013: a nonzero value for the expression enables this behavior. */
1014:
1015: #define PCC_BITFIELD_TYPE_MATTERS 1
1016:
1017: /* If defined, a C expression to compute the alignment given to a
1018: constant that is being placed in memory. CONSTANT is the constant
1019: and ALIGN is the alignment that the object would ordinarily have.
1020: The value of this macro is used instead of that alignment to align
1021: the object.
1022:
1023: If this macro is not defined, then ALIGN is used.
1024:
1025: The typical use of this macro is to increase alignment for string
1026: constants to be word aligned so that `strcpy' calls that copy
1027: constants can be done inline. */
1028:
1029: #define CONSTANT_ALIGNMENT(EXP, ALIGN) \
1030: ((TREE_CODE (EXP) == STRING_CST || TREE_CODE (EXP) == CONSTRUCTOR) \
1031: && (ALIGN) < BITS_PER_WORD \
1032: ? BITS_PER_WORD \
1033: : (ALIGN))
1034:
1035: /* If defined, a C expression to compute the alignment for a static
1036: variable. TYPE is the data type, and ALIGN is the alignment that
1037: the object would ordinarily have. The value of this macro is used
1038: instead of that alignment to align the object.
1039:
1040: If this macro is not defined, then ALIGN is used.
1041:
1042: One use of this macro is to increase alignment of medium-size
1043: data to make it all fit in fewer cache lines. Another is to
1044: cause character arrays to be word-aligned so that `strcpy' calls
1045: that copy constants to character arrays can be done inline. */
1046:
1047: #undef DATA_ALIGNMENT
1048: #define DATA_ALIGNMENT(TYPE, ALIGN) \
1049: ((((ALIGN) < BITS_PER_WORD) \
1050: && (TREE_CODE (TYPE) == ARRAY_TYPE \
1051: || TREE_CODE (TYPE) == UNION_TYPE \
1052: || TREE_CODE (TYPE) == RECORD_TYPE)) ? BITS_PER_WORD : (ALIGN))
1053:
1054: /* Define this macro if an argument declared as `char' or `short' in a
1055: prototype should actually be passed as an `int'. In addition to
1056: avoiding errors in certain cases of mismatch, it also makes for
1057: better code on certain machines. */
1058:
1059: #define PROMOTE_PROTOTYPES
1060:
1061: /* Define this macro if an instruction to load a value narrower
1062: than a word from memory into a register also zero-extends the
1063: value to the whole register. */
1064:
1065: #define BYTE_LOADS_ZERO_EXTEND
1066:
1067:
1068: /* Standard register usage. */
1069:
1070: /* Number of actual hardware registers.
1071: The hardware registers are assigned numbers for the compiler
1072: from 0 to just below FIRST_PSEUDO_REGISTER.
1073: All registers that the compiler knows about must be given numbers,
1074: even those that are not normally considered general registers.
1075:
1076: On the Mips, we have 32 integer registers, 32 floating point registers
1077: and the special registers hi, lo, and fp status. */
1078:
1079: #define FIRST_PSEUDO_REGISTER 67
1080:
1081: /* 1 for registers that have pervasive standard uses
1082: and are not available for the register allocator.
1083:
1084: On the MIPS, see conventions, page D-2 */
1085:
1086: #define FIXED_REGISTERS \
1087: { \
1088: 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
1089: 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 1, \
1090: 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
1091: 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
1092: 1, 1, 1 \
1093: }
1094:
1095:
1096: /* 1 for registers not available across function calls.
1097: These must include the FIXED_REGISTERS and also any
1098: registers that can be used without being saved.
1099: The latter must include the registers where values are returned
1100: and the register where structure-value addresses are passed.
1101: Aside from that, you can include as many other registers as you like. */
1102:
1103: #define CALL_USED_REGISTERS \
1104: { \
1105: 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
1106: 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 1, \
1107: 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
1108: 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
1109: 1, 1, 1 \
1110: }
1111:
1112:
1113: /* Internal macros to classify a register number as to whether it's a
1114: general purpose register, a floating point register, a
1115: multiply/divide register, or a status register.
1116:
1117: The macro FP_CALL_REG_P also allows registers $4 and $6 as floating
1118: point registers to pass floating point as per MIPS spec. */
1119:
1120: #define GP_REG_FIRST 0
1121: #define GP_REG_LAST 31
1122: #define GP_REG_NUM (GP_REG_LAST - GP_REG_FIRST + 1)
1123: #define GP_DBX_FIRST 0
1124:
1125: #define FP_REG_FIRST 32
1126: #define FP_REG_LAST 63
1127: #define FP_REG_NUM (FP_REG_LAST - FP_REG_FIRST + 1)
1128: #define FP_DBX_FIRST ((write_symbols == DBX_DEBUG) ? 38 : 32)
1129:
1130: #define MD_REG_FIRST 64
1131: #define MD_REG_LAST 65
1132: #define MD_REG_NUM (MD_REG_LAST - MD_REG_FIRST + 1)
1133:
1134: #define ST_REG_FIRST 66
1135: #define ST_REG_LAST 66
1136: #define ST_REG_NUM (ST_REG_LAST - ST_REG_FIRST + 1)
1137:
1138: #define AT_REGNUM (GP_REG_FIRST + 1)
1139: #define HI_REGNUM (MD_REG_FIRST + 0)
1140: #define LO_REGNUM (MD_REG_FIRST + 1)
1141: #define FPSW_REGNUM ST_REG_FIRST
1142:
1143: #define GP_REG_P(REGNO) ((unsigned) ((REGNO) - GP_REG_FIRST) < GP_REG_NUM)
1144: #define FP_REG_P(REGNO) ((unsigned) ((REGNO) - FP_REG_FIRST) < FP_REG_NUM)
1145: #define MD_REG_P(REGNO) ((unsigned) ((REGNO) - MD_REG_FIRST) < MD_REG_NUM)
1146: #define ST_REG_P(REGNO) ((REGNO) == ST_REG_FIRST)
1147:
1148: #define FP_CALL_REG_P(REGNO) \
1149: (FP_REG_P (REGNO) \
1150: || (REGNO) == (4 + GP_REG_FIRST) \
1151: || (REGNO) == (6 + GP_REG_FIRST))
1152:
1153: /* Return number of consecutive hard regs needed starting at reg REGNO
1154: to hold something of mode MODE.
1155: This is ordinarily the length in words of a value of mode MODE
1156: but can be less for certain modes in special long registers.
1157:
1158: On the MIPS, all general registers are one word long. Except on
1159: the R4000 with the FR bit set, the floating point uses register
1160: pairs, with the second register not being allocatable. */
1161:
1162: #define HARD_REGNO_NREGS(REGNO, MODE) \
1163: (! FP_REG_P (REGNO) \
1164: ? ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD) \
1165: : (((GET_MODE_SIZE (MODE) + (2*UNITS_PER_WORD) - 1) / (2*UNITS_PER_WORD)) \
1166: << (TARGET_FLOAT64 == 0)))
1167:
1168: /* Value is 1 if hard register REGNO can hold a value of machine-mode
1169: MODE. Require that DImode and DFmode be in even registers. For
1170: DImode, this makes some of the insns easier to write, since you
1171: don't have to worry about a DImode value in registers 3 & 4,
1172: producing a result in 4 & 5.
1173:
1174: To make the code simpler HARD_REGNO_MODE_OK now just references an
1175: array built in override_options. Because machmodes.h is not yet
1176: included before this file is processed, the MODE bound can't be
1177: expressed here. */
1178:
1179: extern char mips_hard_regno_mode_ok[][FIRST_PSEUDO_REGISTER];
1180:
1181: #define HARD_REGNO_MODE_OK(REGNO, MODE) \
1182: mips_hard_regno_mode_ok[ (int)(MODE) ][ (REGNO) ]
1183:
1184: /* Value is 1 if it is a good idea to tie two pseudo registers
1185: when one has mode MODE1 and one has mode MODE2.
1186: If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
1187: for any hard reg, then this must be 0 for correct output. */
1188: #define MODES_TIEABLE_P(MODE1, MODE2) \
1189: ((GET_MODE_CLASS (MODE1) == MODE_FLOAT || \
1190: GET_MODE_CLASS (MODE1) == MODE_COMPLEX_FLOAT) \
1191: == (GET_MODE_CLASS (MODE2) == MODE_FLOAT || \
1192: GET_MODE_CLASS (MODE2) == MODE_COMPLEX_FLOAT))
1193:
1194: /* MIPS pc is not overloaded on a register. */
1195: /* #define PC_REGNUM xx */
1196:
1197: /* Register to use for pushing function arguments. */
1.1.1.4 ! root 1198: #define STACK_POINTER_REGNUM (GP_REG_FIRST + 29)
1.1 root 1199:
1200: /* Offset from the stack pointer to the first available location. */
1201: #define STACK_POINTER_OFFSET 0
1202:
1203: /* Base register for access to local variables of the function. */
1.1.1.4 ! root 1204: #define FRAME_POINTER_REGNUM (GP_REG_FIRST + 30)
1.1 root 1205:
1206: /* Value should be nonzero if functions must have frame pointers.
1207: Zero means the frame pointer need not be set up (and parms
1208: may be accessed via the stack pointer) in functions that seem suitable.
1209: This is computed in `reload', in reload1.c. */
1210: #define FRAME_POINTER_REQUIRED (current_function_calls_alloca)
1211:
1212: /* Base register for access to arguments of the function. */
1.1.1.4 ! root 1213: #define ARG_POINTER_REGNUM GP_REG_FIRST
1.1 root 1214:
1215: /* Register in which static-chain is passed to a function. */
1.1.1.4 ! root 1216: #define STATIC_CHAIN_REGNUM (GP_REG_FIRST + 2)
1.1 root 1217:
1.1.1.4 ! root 1218: /* If the structure value address is passed in a register, then
! 1219: `STRUCT_VALUE_REGNUM' should be the number of that register. */
! 1220: /* #define STRUCT_VALUE_REGNUM (GP_REG_FIRST + 4) */
! 1221:
! 1222: /* If the structure value address is not passed in a register, define
! 1223: `STRUCT_VALUE' as an expression returning an RTX for the place
! 1224: where the address is passed. If it returns 0, the address is
! 1225: passed as an "invisible" first argument. */
! 1226: #define STRUCT_VALUE ((rtx)0)
1.1 root 1227:
1228: /* Mips registers used in prologue/epilogue code when the stack frame
1229: is larger than 32K bytes. These registers must come from the
1230: scratch register set, and not used for passing and returning
1231: arguments and any other information used in the calling sequence
1232: (such as pic). */
1.1.1.4 ! root 1233:
! 1234: #define MIPS_TEMP1_REGNUM (GP_REG_FIRST + 8)
! 1235: #define MIPS_TEMP2_REGNUM (GP_REG_FIRST + 9)
1.1 root 1236:
1237: /* Define this macro if it is as good or better to call a constant
1238: function address than to call an address kept in a register. */
1239: #define NO_FUNCTION_CSE 1
1240:
1241: /* Define this macro if it is as good or better for a function to
1242: call itself with an explicit address than to call an address
1243: kept in a register. */
1244: #define NO_RECURSIVE_FUNCTION_CSE 1
1245:
1246: /* The register number of the register used to address a table of
1247: static data addresses in memory. In some cases this register is
1248: defined by a processor's "application binary interface" (ABI).
1249: When this macro is defined, RTL is generated for this register
1250: once, as with the stack pointer and frame pointer registers. If
1251: this macro is not defined, it is up to the machine-dependent
1252: files to allocate such a register (if necessary). */
1.1.1.4 ! root 1253: #define PIC_OFFSET_TABLE_REGNUM (GP_REG_FIRST + 28)
1.1 root 1254:
1255:
1256: /* Define the classes of registers for register constraints in the
1257: machine description. Also define ranges of constants.
1258:
1259: One of the classes must always be named ALL_REGS and include all hard regs.
1260: If there is more than one class, another class must be named NO_REGS
1261: and contain no registers.
1262:
1263: The name GENERAL_REGS must be the name of a class (or an alias for
1264: another name such as ALL_REGS). This is the class of registers
1265: that is allowed by "g" or "r" in a register constraint.
1266: Also, registers outside this class are allocated only when
1267: instructions express preferences for them.
1268:
1269: The classes must be numbered in nondecreasing order; that is,
1270: a larger-numbered class must never be contained completely
1271: in a smaller-numbered class.
1272:
1273: For any two classes, it is very desirable that there be another
1274: class that represents their union. */
1275:
1276: enum reg_class
1277: {
1278: NO_REGS, /* no registers in set */
1279: GR_REGS, /* integer registers */
1280: FP_REGS, /* floating point registers */
1281: HI_REG, /* hi register */
1282: LO_REG, /* lo register */
1283: MD_REGS, /* multiply/divide registers (hi/lo) */
1284: ST_REGS, /* status registers (fp status) */
1285: ALL_REGS, /* all registers */
1286: LIM_REG_CLASSES /* max value + 1 */
1287: };
1288:
1289: #define N_REG_CLASSES (int) LIM_REG_CLASSES
1290:
1291: #define GENERAL_REGS GR_REGS
1292:
1293: /* An initializer containing the names of the register classes as C
1294: string constants. These names are used in writing some of the
1295: debugging dumps. */
1296:
1297: #define REG_CLASS_NAMES \
1298: { \
1299: "NO_REGS", \
1300: "GR_REGS", \
1301: "FP_REGS", \
1302: "HI_REG", \
1303: "LO_REG", \
1304: "MD_REGS", \
1305: "ST_REGS", \
1306: "ALL_REGS" \
1307: }
1308:
1309: /* An initializer containing the contents of the register classes,
1310: as integers which are bit masks. The Nth integer specifies the
1311: contents of class N. The way the integer MASK is interpreted is
1312: that register R is in the class if `MASK & (1 << R)' is 1.
1313:
1314: When the machine has more than 32 registers, an integer does not
1315: suffice. Then the integers are replaced by sub-initializers,
1316: braced groupings containing several integers. Each
1317: sub-initializer must be suitable as an initializer for the type
1318: `HARD_REG_SET' which is defined in `hard-reg-set.h'. */
1319:
1320: #define REG_CLASS_CONTENTS \
1321: { \
1322: { 0x00000000, 0x00000000, 0x00000000 }, /* no registers */ \
1323: { 0xffffffff, 0x00000000, 0x00000000 }, /* integer registers */ \
1324: { 0x00000000, 0xffffffff, 0x00000000 }, /* floating registers*/ \
1.1.1.4 ! root 1325: { 0x00000000, 0x00000000, 0x00000001 }, /* hi register */ \
! 1326: { 0x00000000, 0x00000000, 0x00000002 }, /* lo register */ \
1.1 root 1327: { 0x00000000, 0x00000000, 0x00000003 }, /* mul/div registers */ \
1328: { 0x00000000, 0x00000000, 0x00000004 }, /* status registers */ \
1329: { 0xffffffff, 0xffffffff, 0x00000007 } /* all registers */ \
1330: }
1331:
1332:
1333: /* A C expression whose value is a register class containing hard
1334: register REGNO. In general there is more that one such class;
1335: choose a class which is "minimal", meaning that no smaller class
1336: also contains the register. */
1337:
1338: extern enum reg_class mips_regno_to_class[];
1339:
1340: #define REGNO_REG_CLASS(REGNO) mips_regno_to_class[ (REGNO) ]
1341:
1342: /* A macro whose definition is the name of the class to which a
1343: valid base register must belong. A base register is one used in
1344: an address which is the register value plus a displacement. */
1345:
1346: #define BASE_REG_CLASS GR_REGS
1347:
1348: /* A macro whose definition is the name of the class to which a
1349: valid index register must belong. An index register is one used
1350: in an address where its value is either multiplied by a scale
1351: factor or added to another register (as well as added to a
1352: displacement). */
1353:
1354: #define INDEX_REG_CLASS GR_REGS
1355:
1356:
1357: /* REGISTER AND CONSTANT CLASSES */
1358:
1359: /* Get reg_class from a letter such as appears in the machine
1360: description.
1361:
1362: DEFINED REGISTER CLASSES:
1363:
1364: 'd' General (aka integer) registers
1365: 'f' Floating point registers
1366: 'h' Hi register
1367: 'l' Lo register
1.1.1.3 root 1368: 'x' Multiply/divide registers
1369: 'z' FP Status register */
1.1 root 1370:
1371: extern enum reg_class mips_char_to_class[];
1372:
1373: #define REG_CLASS_FROM_LETTER(C) mips_char_to_class[ (C) ]
1374:
1375: /* The letters I, J, K, L, M, N, O, and P in a register constraint
1376: string can be used to stand for particular ranges of immediate
1377: operands. This macro defines what the ranges are. C is the
1378: letter, and VALUE is a constant value. Return 1 if VALUE is
1379: in the range specified by C. */
1380:
1381: /* For MIPS:
1382:
1383: `I' is used for the range of constants an arithmetic insn can
1384: actually contain (16 bits signed integers).
1385:
1386: `J' is used for the range which is just zero (ie, $r0).
1387:
1388: `K' is used for the range of constants a logical insn can actually
1389: contain (16 bit zero-extended integers).
1390:
1391: `L' is used for the range of constants that be loaded with lui
1392: (ie, the bottom 16 bits are zero).
1393:
1394: `M' is used for the range of constants that take two words to load
1395: (ie, not matched by `I', `K', and `L').
1396:
1397: `N' is used for negative 16 bit constants.
1398:
1399: `O' is an exact power of 2 (not yet used in the md file).
1400:
1401: `P' is used for positive 16 bit constants. */
1402:
1403: #define SMALL_INT(X) ((unsigned) (INTVAL (X) + 0x8000) < 0x10000)
1404: #define SMALL_INT_UNSIGNED(X) ((unsigned) (INTVAL (X)) < 0x10000)
1405:
1406: #define CONST_OK_FOR_LETTER_P(VALUE, C) \
1407: ((C) == 'I' ? ((unsigned) ((VALUE) + 0x8000) < 0x10000) \
1408: : (C) == 'J' ? ((VALUE) == 0) \
1409: : (C) == 'K' ? ((unsigned) (VALUE) < 0x10000) \
1410: : (C) == 'L' ? (((VALUE) & 0xffff0000) == (VALUE)) \
1.1.1.4 ! root 1411: : (C) == 'M' ? ((((VALUE) & ~0x0000ffff) != 0) \
! 1412: && (((VALUE) & ~0x0000ffff) != ~0x0000ffff) \
1.1 root 1413: && ((VALUE) & 0x0000ffff) != 0) \
1.1.1.4 ! root 1414: : (C) == 'N' ? (((VALUE) & ~0x0000ffff) == ~0x0000ffff) \
1.1 root 1415: : (C) == 'O' ? (exact_log2 (VALUE) >= 0) \
1.1.1.4 ! root 1416: : (C) == 'P' ? ((VALUE) != 0 && (((VALUE) & ~0x0000ffff) == 0)) \
1.1 root 1417: : 0)
1418:
1419: /* Similar, but for floating constants, and defining letters G and H.
1420: Here VALUE is the CONST_DOUBLE rtx itself. */
1421:
1422: /* For Mips
1423:
1424: 'G' : Floating point 0 */
1425:
1426: #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
1427: ((C) == 'G' \
1428: && CONST_DOUBLE_HIGH (VALUE) == 0 \
1429: && CONST_DOUBLE_LOW (VALUE) == 0)
1430:
1431: /* Letters in the range `Q' through `U' may be defined in a
1432: machine-dependent fashion to stand for arbitrary operand types.
1433: The machine description macro `EXTRA_CONSTRAINT' is passed the
1434: operand as its first argument and the constraint letter as its
1435: second operand.
1436:
1.1.1.2 root 1437: `Q' is for memory references which take more than 1 instruction.
1438: `R' is for memory references which take 1 word for the instruction.
1.1 root 1439: `S' is for references to extern items which are PIC for OSF/rose. */
1440:
1441: #define EXTRA_CONSTRAINT(OP,CODE) \
1442: ((GET_CODE (OP) != MEM) ? FALSE \
1443: : ((CODE) == 'Q') ? !simple_memory_operand (OP, GET_MODE (OP)) \
1444: : ((CODE) == 'R') ? simple_memory_operand (OP, GET_MODE (OP)) \
1445: : ((CODE) == 'S') ? (HALF_PIC_P () && CONSTANT_P (OP) \
1446: && HALF_PIC_ADDRESS_P (OP)) \
1447: : FALSE)
1448:
1449: /* Given an rtx X being reloaded into a reg required to be
1450: in class CLASS, return the class of reg to actually use.
1451: In general this is just CLASS; but on some machines
1452: in some cases it is preferable to use a more restrictive class. */
1453:
1454: #define PREFERRED_RELOAD_CLASS(X,CLASS) \
1455: ((GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT \
1456: || GET_MODE_CLASS (GET_MODE (X)) == MODE_COMPLEX_FLOAT) \
1457: ? (TARGET_SOFT_FLOAT ? GR_REGS : FP_REGS) \
1458: : ((GET_MODE (X) == VOIDmode) \
1459: ? GR_REGS \
1460: : CLASS))
1461:
1.1.1.4 ! root 1462: /* Certain machines have the property that some registers cannot be
! 1463: copied to some other registers without using memory. Define this
! 1464: macro on those machines to be a C expression that is non-zero if
! 1465: objects of mode MODE in registers of CLASS1 can only be copied to
! 1466: registers of class CLASS2 by storing a register of CLASS1 into
! 1467: memory and loading that memory location into a register of CLASS2.
! 1468:
! 1469: Do not define this macro if its value would always be zero. */
! 1470:
! 1471: #define SECONDARY_MEMORY_NEEDED(CLASS1, CLASS2, MODE) \
! 1472: (!TARGET_DEBUG_H_MODE \
! 1473: && GET_MODE_CLASS (MODE) == MODE_INT \
! 1474: && ((CLASS1 == FP_REGS && CLASS2 == GR_REGS) \
! 1475: || (CLASS1 == GR_REGS && CLASS2 == FP_REGS)))
! 1476:
1.1 root 1477: /* Return the maximum number of consecutive registers
1478: needed to represent mode MODE in a register of class CLASS. */
1479:
1480: #define CLASS_MAX_NREGS(CLASS, MODE) \
1481: ((((MODE) == DFmode) || ((MODE) == SFmode)) ? 2 \
1482: : ((MODE) == VOIDmode)? ((CLASS) == FP_REGS ? 2 : 1) \
1483: : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))
1484:
1485: /* If defined, this is a C expression whose value should be
1486: nonzero if the insn INSN has the effect of mysteriously
1487: clobbering the contents of hard register number REGNO. By
1488: "mysterious" we mean that the insn's RTL expression doesn't
1489: describe such an effect.
1490:
1491: If this macro is not defined, it means that no insn clobbers
1492: registers mysteriously. This is the usual situation; all else
1493: being equal, it is best for the RTL expression to show all the
1494: activity. */
1495:
1496: /* #define INSN_CLOBBERS_REGNO_P(INSN, REGNO) */
1497:
1498:
1499: /* Stack layout; function entry, exit and calling. */
1500:
1501: /* Define this if pushing a word on the stack
1502: makes the stack pointer a smaller address. */
1503: #define STACK_GROWS_DOWNWARD
1504:
1505: /* Define this if the nominal address of the stack frame
1506: is at the high-address end of the local variables;
1507: that is, each additional local variable allocated
1508: goes at a more negative offset in the frame. */
1.1.1.4 ! root 1509: /* #define FRAME_GROWS_DOWNWARD */
1.1 root 1510:
1511: /* Offset within stack frame to start allocating local variables at.
1512: If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
1513: first local allocated. Otherwise, it is the offset to the BEGINNING
1514: of the first local allocated. */
1.1.1.4 ! root 1515: #define STARTING_FRAME_OFFSET current_function_outgoing_args_size
! 1516:
! 1517: /* Offset from the stack pointer register to an item dynamically
! 1518: allocated on the stack, e.g., by `alloca'.
! 1519:
! 1520: The default value for this macro is `STACK_POINTER_OFFSET' plus the
! 1521: length of the outgoing arguments. The default is correct for most
! 1522: machines. See `function.c' for details.
! 1523:
! 1524: The MIPS ABI states that functions which dynamically allocate the
! 1525: stack must not have 0 for STACK_DYNAMIC_OFFSET, since it looks like
! 1526: we are trying to create a second frame pointer to the function, so
! 1527: allocate some stack space to make it happy.
! 1528:
! 1529: However, the linker currently complains about linking any code that
! 1530: dynamically allocates stack space, and there seems to be a bug in
! 1531: STACK_DYNAMIC_OFFSET, so don't define this right now. */
! 1532:
! 1533: #if 0
! 1534: #define STACK_DYNAMIC_OFFSET(FUNDECL) \
! 1535: ((current_function_outgoing_args_size == 0 && current_function_calls_alloca) \
! 1536: ? 4*UNITS_PER_WORD \
! 1537: : current_function_outgoing_args_size)
! 1538: #endif
1.1 root 1539:
1540: /* Structure to be filled in by compute_frame_size with register
1541: save masks, and offsets for the current function. */
1542:
1543: struct mips_frame_info
1544: {
1.1.1.4 ! root 1545: long total_size; /* # bytes that the entire frame takes up */
! 1546: long var_size; /* # bytes that variables take up */
! 1547: long args_size; /* # bytes that outgoing arguments take up */
! 1548: long extra_size; /* # bytes of extra gunk */
! 1549: int gp_reg_size; /* # bytes needed to store gp regs */
! 1550: int fp_reg_size; /* # bytes needed to store fp regs */
! 1551: long mask; /* mask of saved gp registers */
! 1552: long fmask; /* mask of saved fp registers */
! 1553: long gp_save_offset; /* offset from vfp to store gp registers */
! 1554: long fp_save_offset; /* offset from vfp to store fp registers */
! 1555: long gp_sp_offset; /* offset from new sp to store gp registers */
! 1556: long fp_sp_offset; /* offset from new sp to store fp registers */
! 1557: int initialized; /* != 0 if frame size already calculated */
! 1558: int num_gp; /* number of gp registers saved */
! 1559: int num_fp; /* number of fp registers saved */
1.1 root 1560: };
1561:
1562: extern struct mips_frame_info current_frame_info;
1563:
1564: /* Store in the variable DEPTH the initial difference between the
1565: frame pointer reg contents and the stack pointer reg contents,
1566: as of the start of the function body. This depends on the layout
1567: of the fixed parts of the stack frame and on how registers are saved. */
1568:
1.1.1.4 ! root 1569: /* #define INITIAL_FRAME_POINTER_OFFSET(VAR) \
! 1570: ((VAR) = compute_frame_size (get_frame_size ())) */
! 1571:
! 1572: /* If defined, this macro specifies a table of register pairs used to
! 1573: eliminate unneeded registers that point into the stack frame. If
! 1574: it is not defined, the only elimination attempted by the compiler
! 1575: is to replace references to the frame pointer with references to
! 1576: the stack pointer.
! 1577:
! 1578: The definition of this macro is a list of structure
! 1579: initializations, each of which specifies an original and
! 1580: replacement register.
! 1581:
! 1582: On some machines, the position of the argument pointer is not
! 1583: known until the compilation is completed. In such a case, a
! 1584: separate hard register must be used for the argument pointer.
! 1585: This register can be eliminated by replacing it with either the
! 1586: frame pointer or the argument pointer, depending on whether or not
! 1587: the frame pointer has been eliminated.
! 1588:
! 1589: In this case, you might specify:
! 1590: #define ELIMINABLE_REGS \
! 1591: {{ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
! 1592: {ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM}, \
! 1593: {FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}}
! 1594:
! 1595: Note that the elimination of the argument pointer with the stack
! 1596: pointer is specified first since that is the preferred elimination. */
! 1597:
! 1598: #define ELIMINABLE_REGS \
! 1599: {{ ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
! 1600: { ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM}, \
! 1601: { FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}}
! 1602:
! 1603:
! 1604: /* A C expression that returns non-zero if the compiler is allowed to
! 1605: try to replace register number FROM-REG with register number
! 1606: TO-REG. This macro need only be defined if `ELIMINABLE_REGS' is
! 1607: defined, and will usually be the constant 1, since most of the
! 1608: cases preventing register elimination are things that the compiler
! 1609: already knows about. */
! 1610:
! 1611: #define CAN_ELIMINATE(FROM, TO) \
! 1612: (!frame_pointer_needed \
! 1613: || ((FROM) == ARG_POINTER_REGNUM && (TO) == FRAME_POINTER_REGNUM))
! 1614:
! 1615: /* This macro is similar to `INITIAL_FRAME_POINTER_OFFSET'. It
! 1616: specifies the initial difference between the specified pair of
! 1617: registers. This macro must be defined if `ELIMINABLE_REGS' is
! 1618: defined. */
! 1619:
! 1620: #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
! 1621: { compute_frame_size (get_frame_size ()); \
! 1622: if ((FROM) == FRAME_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM) \
! 1623: (OFFSET) = 0; \
! 1624: else if ((FROM) == ARG_POINTER_REGNUM && (TO) == FRAME_POINTER_REGNUM) \
! 1625: (OFFSET) = current_frame_info.total_size; \
! 1626: else if ((FROM) == ARG_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM) \
! 1627: (OFFSET) = current_frame_info.total_size; \
! 1628: else \
! 1629: abort (); \
! 1630: }
! 1631:
1.1 root 1632:
1633: /* If we generate an insn to push BYTES bytes,
1634: this says how many the stack pointer really advances by.
1635: On the vax, sp@- in a byte insn really pushes a word. */
1636:
1637: /* #define PUSH_ROUNDING(BYTES) 0 */
1638:
1639: /* If defined, the maximum amount of space required for outgoing
1640: arguments will be computed and placed into the variable
1641: `current_function_outgoing_args_size'. No space will be pushed
1642: onto the stack for each call; instead, the function prologue
1643: should increase the stack frame size by this amount.
1644:
1645: It is not proper to define both `PUSH_ROUNDING' and
1646: `ACCUMULATE_OUTGOING_ARGS'. */
1647: #define ACCUMULATE_OUTGOING_ARGS
1648:
1.1.1.4 ! root 1649: /* Offset from the argument pointer register to the first argument's
! 1650: address. On some machines it may depend on the data type of the
! 1651: function.
! 1652:
! 1653: If `ARGS_GROW_DOWNWARD', this is the offset to the location above
! 1654: the first argument's address.
! 1655:
! 1656: On the MIPS, we must skip the first argument position if we are
! 1657: returning a structure or a union, to account for it's address being
! 1658: passed in $4. However, at the current time, this produces a compiler
! 1659: that can't bootstrap, so comment it out for now. */
! 1660:
! 1661: #if 0
! 1662: #define FIRST_PARM_OFFSET(FNDECL) \
! 1663: (FNDECL != 0 \
! 1664: && TREE_TYPE (FNDECL) != 0 \
! 1665: && TREE_TYPE (TREE_TYPE (FNDECL)) != 0 \
! 1666: && (TREE_CODE (TREE_TYPE (TREE_TYPE (FNDECL))) == RECORD_TYPE \
! 1667: || TREE_CODE (TREE_TYPE (TREE_TYPE (FNDECL))) == UNION_TYPE) \
! 1668: ? UNITS_PER_WORD \
! 1669: : 0)
! 1670: #else
1.1 root 1671: #define FIRST_PARM_OFFSET(FNDECL) 0
1.1.1.4 ! root 1672: #endif
1.1 root 1673:
1674: /* When a parameter is passed in a register, stack space is still
1675: allocated for it. For the MIPS, stack space must be allocated, cf
1676: Asm Lang Prog Guide page 7-8.
1677:
1678: BEWARE that some space is also allocated for non existing arguments
1679: in register. In case an argument list is of form GF used registers
1680: are a0 (a2,a3), but we should push over a1... */
1681:
1.1.1.4 ! root 1682: #define REG_PARM_STACK_SPACE(FNDECL) ((4*UNITS_PER_WORD) - FIRST_PARM_OFFSET (FNDECL))
1.1 root 1683:
1684: /* Define this if it is the responsibility of the caller to
1685: allocate the area reserved for arguments passed in registers.
1686: If `ACCUMULATE_OUTGOING_ARGS' is also defined, the only effect
1687: of this macro is to determine whether the space is included in
1688: `current_function_outgoing_args_size'. */
1689: #define OUTGOING_REG_PARM_STACK_SPACE
1690:
1691: /* Align stack frames on 64 bits (Double Word ). */
1692: #define STACK_BOUNDARY 64
1693:
1694: /* Make sure 16 bytes are always allocated on the stack. */
1695:
1696: #ifndef STACK_ARGS_ADJUST
1697: #define STACK_ARGS_ADJUST(SIZE) \
1698: { \
1699: if (SIZE.constant < 16) \
1700: SIZE.constant = 16; \
1701: }
1702: #endif
1703:
1704:
1705: /* A C expression that should indicate the number of bytes of its
1706: own arguments that a function function pops on returning, or 0
1707: if the function pops no arguments and the caller must therefore
1708: pop them all after the function returns.
1709:
1710: FUNTYPE is a C variable whose value is a tree node that
1711: describes the function in question. Normally it is a node of
1712: type `FUNCTION_TYPE' that describes the data type of the function.
1713: From this it is possible to obtain the data types of the value
1714: and arguments (if known).
1715:
1716: When a call to a library function is being considered, FUNTYPE
1717: will contain an identifier node for the library function. Thus,
1718: if you need to distinguish among various library functions, you
1719: can do so by their names. Note that "library function" in this
1720: context means a function used to perform arithmetic, whose name
1721: is known specially in the compiler and was not mentioned in the
1722: C code being compiled.
1723:
1724: STACK-SIZE is the number of bytes of arguments passed on the
1725: stack. If a variable number of bytes is passed, it is zero, and
1726: argument popping will always be the responsibility of the
1727: calling function. */
1728:
1729: #define RETURN_POPS_ARGS(FUNTYPE, SIZE) 0
1730:
1731:
1732: /* Symbolic macros for the registers used to return integer and floating
1733: point values. */
1734:
1735: #define GP_RETURN (GP_REG_FIRST + 2)
1736: #define FP_RETURN ((TARGET_SOFT_FLOAT) ? GP_RETURN : (FP_REG_FIRST + 0))
1737:
1738: /* Symbolic macros for the first/last argument registers. */
1739:
1740: #define GP_ARG_FIRST (GP_REG_FIRST + 4)
1741: #define GP_ARG_LAST (GP_REG_FIRST + 7)
1742: #define FP_ARG_FIRST (FP_REG_FIRST + 12)
1743: #define FP_ARG_LAST (FP_REG_FIRST + 15)
1744:
1745: #define MAX_ARGS_IN_REGISTERS 4
1746:
1747: /* Define how to find the value returned by a library function
1748: assuming the value has mode MODE. */
1749:
1750: #define LIBCALL_VALUE(MODE) \
1751: gen_rtx (REG, MODE, \
1752: (GET_MODE_CLASS (MODE) == MODE_FLOAT) \
1753: ? FP_RETURN \
1754: : GP_RETURN)
1755:
1756: /* Define how to find the value returned by a function.
1757: VALTYPE is the data type of the value (as a tree).
1758: If the precise function being called is known, FUNC is its FUNCTION_DECL;
1759: otherwise, FUNC is 0. */
1760:
1761: #define FUNCTION_VALUE(VALTYPE, FUNC) LIBCALL_VALUE (TYPE_MODE (VALTYPE))
1762:
1763:
1764: /* 1 if N is a possible register number for a function value.
1765: On the MIPS, R2 R3 and F0 F2 are the only register thus used.
1766: Currently, R2 and F0 are only implemented here (C has no complex type) */
1767:
1768: #define FUNCTION_VALUE_REGNO_P(N) ((N) == GP_RETURN || (N) == FP_RETURN)
1769:
1770: /* 1 if N is a possible register number for function argument passing. */
1771:
1772: #define FUNCTION_ARG_REGNO_P(N) (((N) >= GP_ARG_FIRST && (N) <= GP_ARG_LAST) \
1773: || ((N) >= FP_ARG_FIRST && (N) <= FP_ARG_LAST \
1774: && (0 == (N) % 2)))
1775:
1776: /* A C expression which can inhibit the returning of certain function
1777: values in registers, based on the type of value. A nonzero value says
1778: to return the function value in memory, just as large structures are
1779: always returned. Here TYPE will be a C expression of type
1780: `tree', representing the data type of the value.
1781:
1782: Note that values of mode `BLKmode' are returned in memory
1783: regardless of this macro. Also, the option `-fpcc-struct-return'
1784: takes effect regardless of this macro. On most systems, it is
1785: possible to leave the macro undefined; this causes a default
1786: definition to be used, whose value is the constant 0.
1787:
1788: GCC normally converts 1 byte structures into chars, 2 byte
1789: structs into shorts, and 4 byte structs into ints, and returns
1790: them this way. Defining the following macro overrides this,
1791: to give us MIPS cc compatibility. */
1792:
1793: #define RETURN_IN_MEMORY(TYPE) \
1794: ((TREE_CODE (TYPE) == RECORD_TYPE) || (TREE_CODE (TYPE) == UNION_TYPE))
1795:
1796:
1797: /* A code distinguishing the floating point format of the target
1798: machine. There are three defined values: IEEE_FLOAT_FORMAT,
1799: VAX_FLOAT_FORMAT, and UNKNOWN_FLOAT_FORMAT. */
1800:
1801: #define TARGET_FLOAT_FORMAT IEEE_FLOAT_FORMAT
1802:
1803:
1804: /* Define a data type for recording info about an argument list
1805: during the scan of that argument list. This data type should
1806: hold all necessary information about the function itself
1807: and about the args processed so far, enough to enable macros
1808: such as FUNCTION_ARG to determine where the next arg should go.
1809: */
1810:
1811: typedef struct mips_args {
1.1.1.4 ! root 1812: int gp_reg_found; /* whether a gp register was found yet */
! 1813: int arg_number; /* argument number */
! 1814: int arg_words; /* # total words the arguments take */
! 1815: int num_adjusts; /* number of adjustments made */
! 1816: /* Adjustments made to args pass in regs. */
! 1817: struct rtx_def *adjust[MAX_ARGS_IN_REGISTERS];
1.1 root 1818: } CUMULATIVE_ARGS;
1819:
1820: /* Initialize a variable CUM of type CUMULATIVE_ARGS
1821: for a call to a function whose data type is FNTYPE.
1822: For a library call, FNTYPE is 0.
1823:
1824: */
1825:
1826: #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME) \
1827: init_cumulative_args (&CUM, FNTYPE, LIBNAME) \
1828:
1829: /* Update the data in CUM to advance over an argument
1830: of mode MODE and data type TYPE.
1831: (TYPE is null for libcalls where that information may not be available.) */
1832:
1833: #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
1834: function_arg_advance (&CUM, MODE, TYPE, NAMED)
1835:
1836: /* Determine where to put an argument to a function.
1837: Value is zero to push the argument on the stack,
1838: or a hard register in which to store the argument.
1839:
1840: MODE is the argument's machine mode.
1841: TYPE is the data type of the argument (as a tree).
1842: This is null for libcalls where that information may
1843: not be available.
1844: CUM is a variable of type CUMULATIVE_ARGS which gives info about
1845: the preceding args and about the function being called.
1846: NAMED is nonzero if this argument is a named parameter
1847: (otherwise it is an extra parameter matching an ellipsis). */
1848:
1849: #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
1850: function_arg( &CUM, MODE, TYPE, NAMED)
1851:
1852: /* For an arg passed partly in registers and partly in memory,
1853: this is the number of registers used.
1854: For args passed entirely in registers or entirely in memory, zero. */
1855:
1856: #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) \
1857: function_arg_partial_nregs (&CUM, MODE, TYPE, NAMED)
1858:
1859: /* If defined, a C expression that gives the alignment boundary, in
1860: bits, of an argument with the specified mode and type. If it is
1861: not defined, `PARM_BOUNDARY' is used for all arguments. */
1862:
1863: #define FUNCTION_ARG_BOUNDARY(MODE, TYPE) \
1864: (((TYPE) != 0) \
1865: ? ((TYPE_ALIGN(TYPE) <= PARM_BOUNDARY) \
1866: ? PARM_BOUNDARY \
1867: : TYPE_ALIGN(TYPE)) \
1868: : ((GET_MODE_ALIGNMENT(MODE) <= PARM_BOUNDARY) \
1869: ? PARM_BOUNDARY \
1870: : GET_MODE_ALIGNMENT(MODE)))
1871:
1872:
1873: /* This macro generates the assembly code for function entry.
1874: FILE is a stdio stream to output the code to.
1875: SIZE is an int: how many units of temporary storage to allocate.
1876: Refer to the array `regs_ever_live' to determine which registers
1877: to save; `regs_ever_live[I]' is nonzero if register number I
1878: is ever used in the function. This macro is responsible for
1879: knowing which registers should not be saved even if used. */
1880:
1881: #define FUNCTION_PROLOGUE(FILE, SIZE) function_prologue(FILE, SIZE)
1882:
1883: /* This macro generates the assembly code for function exit,
1884: on machines that need it. If FUNCTION_EPILOGUE is not defined
1885: then individual return instructions are generated for each
1886: return statement. Args are same as for FUNCTION_PROLOGUE. */
1887:
1888: #define FUNCTION_EPILOGUE(FILE, SIZE) function_epilogue(FILE, SIZE)
1889:
1890: /* Define the number of delay slots needed for the function epilogue.
1891:
1892: On the mips, we need a slot if either no stack has been allocated,
1893: or the only register saved is the return register. */
1894:
1895: #define DELAY_SLOTS_FOR_EPILOGUE mips_epilogue_delay_slots ()
1896:
1897: /* Define whether INSN can be placed in delay slot N for the epilogue.
1898: No references to the stack must be made, since on the MIPS, the
1899: delay slot is done after the stack has been cleaned up. */
1900:
1901: #define ELIGIBLE_FOR_EPILOGUE_DELAY(INSN,N) \
1902: (get_attr_dslot (INSN) == DSLOT_NO \
1903: && get_attr_length (INSN) == 1 \
1.1.1.4 ! root 1904: && ! epilogue_reg_mentioned_p (PATTERN (INSN)))
1.1 root 1905:
1906: /* Tell prologue and epilogue if register REGNO should be saved / restored. */
1907:
1908: #define MUST_SAVE_REGISTER(regno) \
1909: ((regs_ever_live[regno] && !call_used_regs[regno]) \
1910: || (regno == FRAME_POINTER_REGNUM && frame_pointer_needed) \
1.1.1.4 ! root 1911: || (regno == (GP_REG_FIRST + 31) && regs_ever_live[GP_REG_FIRST + 31]))
1.1 root 1912:
1913: /* ALIGN FRAMES on double word boundaries */
1914:
1.1.1.4 ! root 1915: #define MIPS_STACK_ALIGN(LOC) (((LOC)+7) & ~7)
1.1 root 1916:
1917:
1918: /* Output assembler code to FILE to increment profiler label # LABELNO
1919: for profiling a function entry. */
1920:
1921: #define FUNCTION_PROFILER(FILE, LABELNO) \
1922: { \
1923: fprintf (FILE, "\t.set\tnoreorder\n"); \
1924: fprintf (FILE, "\t.set\tnoat\n"); \
1925: fprintf (FILE, "\tmove\t%s,%s\t\t# save current return address\n", \
1926: reg_names[GP_REG_FIRST + 1], reg_names[GP_REG_FIRST + 31]); \
1927: fprintf (FILE, "\tjal\t_mcount\n"); \
1928: fprintf (FILE, "\tsubu\t%s,%s,8\t\t# _mcount pops 2 words from stack\n", \
1929: reg_names[STACK_POINTER_REGNUM], \
1930: reg_names[STACK_POINTER_REGNUM]); \
1931: fprintf (FILE, "\t.set\treorder\n"); \
1932: fprintf (FILE, "\t.set\tat\n"); \
1933: }
1934:
1.1.1.4 ! root 1935: /* Define this macro if the code for function profiling should come
! 1936: before the function prologue. Normally, the profiling code comes
! 1937: after. */
! 1938:
! 1939: /* #define PROFILE_BEFORE_PROLOGUE */
! 1940:
1.1 root 1941: /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
1942: the stack pointer does not matter. The value is tested only in
1943: functions that have frame pointers.
1944: No definition is equivalent to always zero. */
1945:
1946: #define EXIT_IGNORE_STACK 1
1947:
1948:
1949: /* A C statement to output, on the stream FILE, assembler code for a
1950: block of data that contains the constant parts of a trampoline.
1951: This code should not include a label--the label is taken care of
1952: automatically. */
1953:
1954: #define TRAMPOLINE_TEMPLATE(STREAM) \
1955: { \
1956: fprintf (STREAM, "\t.word\t0x03e00821\t\t# move $1,$31\n"); \
1957: fprintf (STREAM, "\t.word\t0x04110001\t\t# bgezal $0,.+8\n"); \
1958: fprintf (STREAM, "\t.word\t0x00000000\t\t# nop\n"); \
1959: fprintf (STREAM, "\t.word\t0x8fe30010\t\t# lw $3,16($31)\n"); \
1960: fprintf (STREAM, "\t.word\t0x8fe20014\t\t# lw $2,20($31)\n"); \
1961: fprintf (STREAM, "\t.word\t0x00600008\t\t# jr $3\n"); \
1962: fprintf (STREAM, "\t.word\t0x0020f821\t\t# move $31,$1\n"); \
1963: fprintf (STREAM, "\t.word\t0x00000000\t\t# <function address>\n"); \
1964: fprintf (STREAM, "\t.word\t0x00000000\t\t# <static chain value>\n"); \
1965: }
1966:
1967: /* A C expression for the size in bytes of the trampoline, as an
1968: integer. */
1969:
1970: #define TRAMPOLINE_SIZE (9*4)
1971:
1972: /* Alignment required for trampolines, in bits.
1973:
1974: If you don't define this macro, the value of `BIGGEST_ALIGNMENT'
1975: is used for aligning trampolines. */
1976:
1977: /* #define TRAMPOLINE_ALIGNMENT 32 */
1978:
1979: /* A C statement to initialize the variable parts of a trampoline.
1980: ADDR is an RTX for the address of the trampoline; FNADDR is an
1981: RTX for the address of the nested function; STATIC_CHAIN is an
1982: RTX for the static chain value that should be passed to the
1983: function when it is called. */
1984:
1985: #define INITIALIZE_TRAMPOLINE(ADDR, FUNC, CHAIN) \
1986: { \
1987: rtx addr = ADDR; \
1988: emit_move_insn (gen_rtx (MEM, SImode, plus_constant (addr, 28)), FUNC); \
1989: emit_move_insn (gen_rtx (MEM, SImode, plus_constant (addr, 32)), CHAIN); \
1990: \
1991: /* Attempt to make stack executable */ \
1992: emit_library_call (gen_rtx (SYMBOL_REF, Pmode, "__enable_execute_stack"), \
1993: 0, VOIDmode, 1, addr, Pmode); \
1994: }
1995:
1996:
1997: /* Attempt to turn on access permissions for the stack. */
1998:
1999: #define TRANSFER_FROM_TRAMPOLINE \
2000: \
2001: void \
2002: __enable_execute_stack (addr) \
2003: char *addr; \
2004: { \
2005: int size = getpagesize (); \
2006: int mask = ~(size-1); \
2007: char *page = (char *) (((int) addr) & mask); \
2008: char *end = (char *) ((((int) (addr + TRAMPOLINE_SIZE)) & mask) + size); \
2009: \
2010: /* 7 is PROT_READ | PROT_WRITE | PROT_EXEC */ \
2011: if (mprotect (page, end - page, 7) < 0) \
2012: perror ("mprotect of trampoline code"); \
2013: \
2014: /* \
2015: if (cacheflush (addr, TRAMPOLINE_SIZE, 1) < 0) \
2016: perror ("cacheflush of trampoline code"); \
2017: */ \
2018: }
2019:
2020:
2021: /* Addressing modes, and classification of registers for them. */
2022:
2023: /* #define HAVE_POST_INCREMENT */
2024: /* #define HAVE_POST_DECREMENT */
2025:
2026: /* #define HAVE_PRE_DECREMENT */
2027: /* #define HAVE_PRE_INCREMENT */
2028:
2029: /* These assume that REGNO is a hard or pseudo reg number.
2030: They give nonzero only if REGNO is a hard reg of the suitable class
2031: or a pseudo reg currently allocated to a suitable hard reg.
2032: These definitions are NOT overridden anywhere. */
2033:
2034: #define GP_REG_OR_PSEUDO_STRICT_P(regno) \
2035: GP_REG_P((regno < FIRST_PSEUDO_REGISTER) ? regno : reg_renumber[regno])
2036:
2037: #define GP_REG_OR_PSEUDO_NONSTRICT_P(regno) \
2038: (((regno) >= FIRST_PSEUDO_REGISTER) || (GP_REG_P (regno)))
2039:
2040: #define REGNO_OK_FOR_INDEX_P(regno) GP_REG_OR_PSEUDO_STRICT_P (regno)
2041: #define REGNO_OK_FOR_BASE_P(regno) GP_REG_OR_PSEUDO_STRICT_P (regno)
2042:
2043: /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
2044: and check its validity for a certain class.
2045: We have two alternate definitions for each of them.
2046: The usual definition accepts all pseudo regs; the other rejects them all.
2047: The symbol REG_OK_STRICT causes the latter definition to be used.
2048:
2049: Most source files want to accept pseudo regs in the hope that
2050: they will get allocated to the class that the insn wants them to be in.
2051: Some source files that are used after register allocation
2052: need to be strict. */
2053:
2054: #ifndef REG_OK_STRICT
2055:
2056: #define REG_OK_STRICT_P 0
2057: #define REG_OK_FOR_INDEX_P(X) GP_REG_OR_PSEUDO_NONSTRICT_P (REGNO (X))
2058: #define REG_OK_FOR_BASE_P(X) GP_REG_OR_PSEUDO_NONSTRICT_P (REGNO (X))
2059:
2060: #else
2061:
2062: #define REG_OK_STRICT_P 1
2063: #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
2064: #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
2065:
2066: #endif
2067:
2068:
2069: /* Maximum number of registers that can appear in a valid memory address. */
2070:
2071: #define MAX_REGS_PER_ADDRESS 1
2072:
2073: /* A C compound statement with a conditional `goto LABEL;' executed
2074: if X (an RTX) is a legitimate memory address on the target
2075: machine for a memory operand of mode MODE.
2076:
2077: It usually pays to define several simpler macros to serve as
2078: subroutines for this one. Otherwise it may be too complicated
2079: to understand.
2080:
2081: This macro must exist in two variants: a strict variant and a
2082: non-strict one. The strict variant is used in the reload pass.
2083: It must be defined so that any pseudo-register that has not been
2084: allocated a hard register is considered a memory reference. In
2085: contexts where some kind of register is required, a
2086: pseudo-register with no hard register must be rejected.
2087:
2088: The non-strict variant is used in other passes. It must be
2089: defined to accept all pseudo-registers in every context where
2090: some kind of register is required.
2091:
2092: Compiler source files that want to use the strict variant of
2093: this macro define the macro `REG_OK_STRICT'. You should use an
2094: `#ifdef REG_OK_STRICT' conditional to define the strict variant
2095: in that case and the non-strict variant otherwise.
2096:
2097: Typically among the subroutines used to define
2098: `GO_IF_LEGITIMATE_ADDRESS' are subroutines to check for
2099: acceptable registers for various purposes (one for base
2100: registers, one for index registers, and so on). Then only these
2101: subroutine macros need have two variants; the higher levels of
2102: macros may be the same whether strict or not.
2103:
2104: Normally, constant addresses which are the sum of a `symbol_ref'
2105: and an integer are stored inside a `const' RTX to mark them as
2106: constant. Therefore, there is no need to recognize such sums
2107: specifically as legitimate addresses. Normally you would simply
2108: recognize any `const' as legitimate.
2109:
2110: Usually `PRINT_OPERAND_ADDRESS' is not prepared to handle
2111: constant sums that are not marked with `const'. It assumes
2112: that a naked `plus' indicates indexing. If so, then you *must*
2113: reject such naked constant sums as illegitimate addresses, so
2114: that none of them will be given to `PRINT_OPERAND_ADDRESS'.
2115:
2116: On some machines, whether a symbolic address is legitimate
2117: depends on the section that the address refers to. On these
2118: machines, define the macro `ENCODE_SECTION_INFO' to store the
2119: information into the `symbol_ref', and then check for it here.
2120: When you see a `const', you will have to look inside it to find
2121: the `symbol_ref' in order to determine the section. */
2122:
2123: #if 1
2124: #define GO_PRINTF(x) trace(x)
2125: #define GO_PRINTF2(x,y) trace(x,y)
2126: #define GO_DEBUG_RTX(x) debug_rtx(x)
2127:
2128: #else
2129: #define GO_PRINTF(x)
2130: #define GO_PRINTF2(x,y)
2131: #define GO_DEBUG_RTX(x)
2132: #endif
2133:
2134: #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
2135: { \
2136: register rtx xinsn = (X); \
2137: \
2138: if (TARGET_DEBUG_B_MODE) \
2139: { \
2140: GO_PRINTF2 ("\n========== GO_IF_LEGITIMATE_ADDRESS, %sstrict\n", \
2141: (REG_OK_STRICT_P) ? "" : "not "); \
2142: GO_DEBUG_RTX (xinsn); \
2143: } \
2144: \
2145: if (GET_CODE (xinsn) == REG && REG_OK_FOR_BASE_P (xinsn)) \
2146: goto ADDR; \
2147: \
2148: if (CONSTANT_ADDRESS_P (xinsn)) \
2149: goto ADDR; \
2150: \
2151: if (GET_CODE (xinsn) == PLUS) \
2152: { \
2153: register rtx xplus0 = XEXP (xinsn, 0); \
2154: register rtx xplus1 = XEXP (xinsn, 1); \
2155: register enum rtx_code code0 = GET_CODE (xplus0); \
2156: register enum rtx_code code1 = GET_CODE (xplus1); \
2157: \
2158: if (code0 != REG && code1 == REG) \
2159: { \
2160: xplus0 = XEXP (xinsn, 1); \
2161: xplus1 = XEXP (xinsn, 0); \
2162: code0 = GET_CODE (xplus0); \
2163: code1 = GET_CODE (xplus1); \
2164: } \
2165: \
2166: if (code0 == REG && REG_OK_FOR_BASE_P (xplus0)) \
2167: { \
2168: if (code1 == CONST_INT) \
2169: { \
2170: register unsigned adj_offset = INTVAL (xplus1) + 0x8000; \
2171: \
2172: if ((adj_offset <= 0xffff) \
2173: && (adj_offset + GET_MODE_SIZE (MODE) - 1 <= 0xffff)) \
2174: goto ADDR; \
2175: } \
2176: \
2177: /* For some code sequences, you actually get better code by \
2178: pretending that the MIPS supports an address mode of a \
2179: constant address + a register, even though the real \
2180: machine doesn't support it. This is because the \
2181: assembler can use $r1 to load just the high 16 bits, add \
2182: in the register, and fold the low 16 bits into the memory \
1.1.1.2 root 2183: reference, whereas the compiler generates a 4 instruction \
1.1 root 2184: sequence. On the other hand, CSE is not as effective. \
2185: It would be a win to generate the lui directly, but the \
2186: MIPS assembler does not have syntax to generate the \
2187: appropriate relocation. */ \
2188: \
2189: else if (!TARGET_DEBUG_A_MODE \
2190: && code0 == REG \
2191: && CONSTANT_ADDRESS_P (xplus1)) \
2192: goto ADDR; \
2193: } \
2194: } \
2195: \
2196: if (TARGET_DEBUG_B_MODE) \
2197: GO_PRINTF ("Not a legitimate address\n"); \
2198: }
2199:
2200:
2201: /* A C expression that is 1 if the RTX X is a constant which is a
2202: valid address. On most machines, this can be defined as
2203: `CONSTANT_P (X)', but a few machines are more restrictive in
2204: which constant addresses are supported.
2205:
2206: `CONSTANT_P' accepts integer-values expressions whose values are
2207: not explicitly known, such as `symbol_ref', `label_ref', and
2208: `high' expressions and `const' arithmetic expressions, in
2209: addition to `const_int' and `const_double' expressions. */
2210:
2211: #define CONSTANT_ADDRESS_P(X) \
1.1.1.3 root 2212: (CONSTANT_P (X) && (!HALF_PIC_P () || !HALF_PIC_ADDRESS_P (X)))
1.1 root 2213:
2214:
2215: /* Nonzero if the constant value X is a legitimate general operand.
2216: It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE.
2217:
2218: At present, GAS doesn't understand li.[sd], so don't allow it
2219: to be generated at present. Also, the MIPS assembler does not
2220: grok li.d Infinity. */
2221:
2222: #define LEGITIMATE_CONSTANT_P(X) \
2223: (GET_CODE (X) != CONST_DOUBLE || mips_const_double_ok (X, GET_MODE (X)))
2224:
2225:
2226: /* A C compound statement that attempts to replace X with a valid
2227: memory address for an operand of mode MODE. WIN will be a C
2228: statement label elsewhere in the code; the macro definition may
2229: use
2230:
2231: GO_IF_LEGITIMATE_ADDRESS (MODE, X, WIN);
2232:
2233: to avoid further processing if the address has become legitimate.
2234:
2235: X will always be the result of a call to `break_out_memory_refs',
2236: and OLDX will be the operand that was given to that function to
2237: produce X.
2238:
2239: The code generated by this macro should not alter the
2240: substructure of X. If it transforms X into a more legitimate
2241: form, it should assign X (which will always be a C variable) a
2242: new value.
2243:
2244: It is not necessary for this macro to come up with a legitimate
2245: address. The compiler has standard ways of doing so in all
2246: cases. In fact, it is safe for this macro to do nothing. But
1.1.1.4 ! root 2247: often a machine-dependent strategy can generate better code.
! 2248:
! 2249: For the MIPS, transform:
! 2250:
! 2251: memory(X + <large int>)
! 2252:
! 2253: into:
! 2254:
! 2255: Y = <large int> & ~0x7fff;
! 2256: Z = X + Y
! 2257: memory (Z + (<large int> & 0x7fff));
1.1 root 2258:
1.1.1.4 ! root 2259: This is for CSE to find several similar references, and only use one Z. */
! 2260:
! 2261: #define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) \
! 2262: { \
! 2263: register rtx xinsn = (X); \
! 2264: \
! 2265: if (TARGET_DEBUG_B_MODE) \
! 2266: { \
! 2267: GO_PRINTF ("\n========== LEGITIMIZE_ADDRESS\n"); \
! 2268: GO_DEBUG_RTX (xinsn); \
! 2269: } \
! 2270: \
! 2271: if (GET_CODE (xinsn) == PLUS) \
! 2272: { \
! 2273: register rtx xplus0 = XEXP (xinsn, 0); \
! 2274: register rtx xplus1 = XEXP (xinsn, 1); \
! 2275: register enum rtx_code code0 = GET_CODE (xplus0); \
! 2276: register enum rtx_code code1 = GET_CODE (xplus1); \
! 2277: \
! 2278: if (code0 != REG && code1 == REG) \
! 2279: { \
! 2280: xplus0 = XEXP (xinsn, 1); \
! 2281: xplus1 = XEXP (xinsn, 0); \
! 2282: code0 = GET_CODE (xplus0); \
! 2283: code1 = GET_CODE (xplus1); \
! 2284: } \
! 2285: \
! 2286: if (code0 == REG && REG_OK_FOR_BASE_P (xplus0) \
! 2287: && code1 == CONST_INT && !SMALL_INT (xplus1)) \
! 2288: { \
! 2289: rtx int_reg = gen_reg_rtx (Pmode); \
! 2290: rtx ptr_reg = gen_reg_rtx (Pmode); \
! 2291: \
! 2292: emit_move_insn (int_reg, \
! 2293: GEN_INT (INTVAL (xplus1) & ~ 0x7fff)); \
! 2294: \
! 2295: emit_insn (gen_rtx (SET, VOIDmode, \
! 2296: ptr_reg, \
! 2297: gen_rtx (PLUS, Pmode, xplus0, int_reg))); \
! 2298: \
! 2299: X = gen_rtx (PLUS, Pmode, ptr_reg, \
! 2300: GEN_INT (INTVAL (xplus1) & 0x7fff)); \
! 2301: goto WIN; \
! 2302: } \
! 2303: } \
! 2304: \
! 2305: if (TARGET_DEBUG_B_MODE) \
! 2306: GO_PRINTF ("LEGITIMIZE_ADDRESS could not fix.\n"); \
! 2307: }
1.1 root 2308:
2309:
2310: /* A C statement or compound statement with a conditional `goto
2311: LABEL;' executed if memory address X (an RTX) can have different
2312: meanings depending on the machine mode of the memory reference it
2313: is used for.
2314:
2315: Autoincrement and autodecrement addresses typically have
2316: mode-dependent effects because the amount of the increment or
2317: decrement is the size of the operand being addressed. Some
2318: machines have other mode-dependent addresses. Many RISC machines
2319: have no mode-dependent addresses.
2320:
2321: You may assume that ADDR is a valid address for the machine. */
2322:
2323: #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) {}
2324:
2325:
2326: /* Define this macro if references to a symbol must be treated
2327: differently depending on something about the variable or
2328: function named by the symbol (such as what section it is in).
2329:
2330: The macro definition, if any, is executed immediately after the
2331: rtl for DECL has been created and stored in `DECL_RTL (DECL)'.
2332: The value of the rtl will be a `mem' whose address is a
2333: `symbol_ref'.
2334:
2335: The usual thing for this macro to do is to a flag in the
2336: `symbol_ref' (such as `SYMBOL_REF_FLAG') or to store a modified
2337: name string in the `symbol_ref' (if one bit is not enough
2338: information).
2339:
2340: The best way to modify the name string is by adding text to the
2341: beginning, with suitable punctuation to prevent any ambiguity.
2342: Allocate the new name in `saveable_obstack'. You will have to
2343: modify `ASM_OUTPUT_LABELREF' to remove and decode the added text
2344: and output the name accordingly.
2345:
2346: You can also check the information stored in the `symbol_ref' in
2347: the definition of `GO_IF_LEGITIMATE_ADDRESS' or
2348: `PRINT_OPERAND_ADDRESS'. */
2349:
2350: #define ENCODE_SECTION_INFO(DECL) \
2351: do \
2352: { \
2353: if (optimize && mips_section_threshold > 0 && TARGET_GP_OPT \
2354: && TREE_CODE (DECL) == VAR_DECL) \
2355: { \
2356: int size = int_size_in_bytes (TREE_TYPE (DECL)); \
2357: \
2358: if (size > 0 && size <= mips_section_threshold) \
2359: SYMBOL_REF_FLAG (XEXP (DECL_RTL (DECL), 0)) = 1; \
2360: } \
2361: \
2362: else if (HALF_PIC_P ()) \
2363: HALF_PIC_ENCODE (DECL); \
2364: } \
2365: while (0)
2366:
2367:
2368: /* Specify the machine mode that this machine uses
2369: for the index in the tablejump instruction. */
2370: #define CASE_VECTOR_MODE SImode
2371:
2372: /* Define this if the tablejump instruction expects the table
2373: to contain offsets from the address of the table.
2374: Do not define this if the table should contain absolute addresses. */
2375: /* #define CASE_VECTOR_PC_RELATIVE */
2376:
2377: /* Specify the tree operation to be used to convert reals to integers. */
2378: #define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR
2379:
2380: /* This is the kind of divide that is easiest to do in the general case. */
2381: #define EASY_DIV_EXPR TRUNC_DIV_EXPR
2382:
2383: /* Define this as 1 if `char' should by default be signed; else as 0. */
1.1.1.3 root 2384: #ifndef DEFAULT_SIGNED_CHAR
1.1 root 2385: #define DEFAULT_SIGNED_CHAR 1
1.1.1.3 root 2386: #endif
1.1 root 2387:
2388: /* Max number of bytes we can move from memory to memory
2389: in one reasonably fast instruction. */
2390: #define MOVE_MAX 4
2391:
2392: /* Define this macro as a C expression which is nonzero if
2393: accessing less than a word of memory (i.e. a `char' or a
2394: `short') is no faster than accessing a word of memory, i.e., if
2395: such access require more than one instruction or if there is no
2396: difference in cost between byte and (aligned) word loads.
2397:
2398: On RISC machines, it tends to generate better code to define
2399: this as 1, since it avoids making a QI or HI mode register. */
2400: #define SLOW_BYTE_ACCESS 1
2401:
2402: /* We assume that the store-condition-codes instructions store 0 for false
2403: and some other value for true. This is the value stored for true. */
2404:
2405: #define STORE_FLAG_VALUE 1
2406:
2407: /* Define this if zero-extension is slow (more than one real instruction). */
2408: #define SLOW_ZERO_EXTEND
2409:
2410: /* Define if shifts truncate the shift count
2411: which implies one can omit a sign-extension or zero-extension
2412: of a shift count.
2413:
2414: Only 5 bits are used in SLLV and SRLV */
2415:
2416: #define SHIFT_COUNT_TRUNCATED
2417:
2418: /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
2419: is done just by pretending it is already truncated. */
2420: #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
2421:
1.1.1.2 root 2422: /* Define this macro to control use of the character `$' in
2423: identifier names. The value should be 0, 1, or 2. 0 means `$'
2424: is not allowed by default; 1 means it is allowed by default if
2425: `-traditional' is used; 2 means it is allowed by default provided
2426: `-ansi' is not used. 1 is the default; there is no need to
2427: define this macro in that case. */
2428:
2429: #ifndef DOLLARS_IN_IDENTIFIERS
1.1 root 2430: #define DOLLARS_IN_IDENTIFIERS 1
1.1.1.2 root 2431: #endif
1.1 root 2432:
2433: /* Specify the machine mode that pointers have.
2434: After generation of rtl, the compiler makes no further distinction
2435: between pointers and any other objects of this machine mode. */
2436: #define Pmode SImode
2437:
2438: /* A function address in a call instruction
2439: is a word address (for indexing purposes)
2440: so give the MEM rtx a words's mode. */
2441:
2442: #define FUNCTION_MODE SImode
2443:
2444: /* Define TARGET_MEM_FUNCTIONS if we want to use calls to memcpy and
2445: memset, instead of the BSD functions bcopy and bzero. */
2446:
2447: #if defined(MIPS_SYSV) || defined(OSF_OS)
2448: #define TARGET_MEM_FUNCTIONS
2449: #endif
2450:
2451:
2452: /* A part of a C `switch' statement that describes the relative
2453: costs of constant RTL expressions. It must contain `case'
2454: labels for expression codes `const_int', `const', `symbol_ref',
2455: `label_ref' and `const_double'. Each case must ultimately reach
2456: a `return' statement to return the relative cost of the use of
2457: that kind of constant value in an expression. The cost may
2458: depend on the precise value of the constant, which is available
2459: for examination in X.
2460:
2461: CODE is the expression code--redundant, since it can be obtained
2462: with `GET_CODE (X)'. */
2463:
1.1.1.3 root 2464: #define CONST_COSTS(X,CODE,OUTER_CODE) \
1.1 root 2465: case CONST_INT: \
2466: /* Always return 0, since we don't have different sized \
2467: instructions, hence different costs according to Richard \
2468: Kenner */ \
2469: return COSTS_N_INSNS (0); \
2470: \
2471: case LABEL_REF: \
2472: return COSTS_N_INSNS (2); \
2473: \
2474: case CONST: \
2475: { \
1.1.1.2 root 2476: rtx offset = const0_rtx; \
1.1 root 2477: rtx symref = eliminate_constant_term (X, &offset); \
2478: \
2479: if (GET_CODE (symref) == LABEL_REF) \
2480: return COSTS_N_INSNS (2); \
2481: \
2482: if (GET_CODE (symref) != SYMBOL_REF) \
2483: return COSTS_N_INSNS (4); \
2484: \
2485: /* let's be paranoid.... */ \
1.1.1.2 root 2486: if (INTVAL (offset) < -32768 || INTVAL (offset) > 32767) \
1.1 root 2487: return COSTS_N_INSNS (2); \
2488: \
2489: return COSTS_N_INSNS (SYMBOL_REF_FLAG (symref) ? 1 : 2); \
2490: } \
2491: \
2492: case SYMBOL_REF: \
2493: return COSTS_N_INSNS (SYMBOL_REF_FLAG (X) ? 1 : 2); \
2494: \
2495: case CONST_DOUBLE: \
2496: return COSTS_N_INSNS ((CONST_DOUBLE_HIGH (X) == 0 \
2497: && CONST_DOUBLE_LOW (X)) ? 2 : 4);
2498:
2499:
2500: /* Like `CONST_COSTS' but applies to nonconstant RTL expressions.
2501: This can be used, for example, to indicate how costly a multiply
2502: instruction is. In writing this macro, you can use the construct
2503: `COSTS_N_INSNS (N)' to specify a cost equal to N fast instructions.
2504:
2505: This macro is optional; do not define it if the default cost
2506: assumptions are adequate for the target machine.
2507:
2508: If -mdebugd is used, change the multiply cost to 2, so multiply by
2509: a constant isn't converted to a series of shifts. This helps
2510: strength reduction, and also makes it easier to identify what the
2511: compiler is doing. */
2512:
1.1.1.3 root 2513: #define RTX_COSTS(X,CODE,OUTER_CODE) \
1.1 root 2514: case MEM: \
2515: { \
2516: int num_words = (GET_MODE_SIZE (GET_MODE (X)) > UNITS_PER_WORD) ? 2 : 1; \
2517: if (simple_memory_operand (X, GET_MODE (X))) \
2518: return COSTS_N_INSNS (num_words); \
2519: \
2520: return COSTS_N_INSNS (2*num_words); \
2521: } \
2522: \
2523: case FFS: \
2524: return COSTS_N_INSNS (6); \
2525: \
2526: case NOT: \
2527: return COSTS_N_INSNS ((GET_MODE (X) == DImode) ? 2 : 1); \
2528: \
2529: case AND: \
2530: case IOR: \
2531: case XOR: \
2532: if (GET_MODE (X) == DImode) \
2533: return COSTS_N_INSNS (2); \
2534: \
2535: if (GET_CODE (XEXP (X, 1)) == CONST_INT) \
2536: { \
2537: rtx number = XEXP (X, 1); \
2538: if (SMALL_INT_UNSIGNED (number)) \
2539: return COSTS_N_INSNS (1); \
2540: \
2541: else if (SMALL_INT (number)) \
2542: return COSTS_N_INSNS (2); \
2543: \
2544: return COSTS_N_INSNS (3); \
2545: } \
2546: \
2547: return COSTS_N_INSNS (1); \
2548: \
2549: case ASHIFT: \
2550: case ASHIFTRT: \
2551: case LSHIFT: \
2552: case LSHIFTRT: \
2553: if (GET_MODE (X) == DImode) \
2554: return COSTS_N_INSNS ((GET_CODE (XEXP (X, 1)) == CONST_INT) ? 12 : 4); \
2555: \
2556: return COSTS_N_INSNS (1); \
2557: \
2558: case ABS: \
2559: { \
2560: enum machine_mode xmode = GET_MODE (X); \
2561: if (xmode == SFmode || xmode == DFmode) \
2562: return COSTS_N_INSNS (1); \
2563: \
2564: return COSTS_N_INSNS (4); \
2565: } \
2566: \
2567: case PLUS: \
2568: case MINUS: \
2569: { \
2570: enum machine_mode xmode = GET_MODE (X); \
2571: if (xmode == SFmode || xmode == DFmode) \
2572: return COSTS_N_INSNS (2); \
2573: \
2574: if (xmode == DImode) \
2575: return COSTS_N_INSNS (4); \
2576: \
2577: return COSTS_N_INSNS (1); \
2578: } \
2579: \
2580: case NEG: \
2581: return COSTS_N_INSNS ((GET_MODE (X) == DImode) ? 4 : 1); \
2582: \
2583: case MULT: \
2584: { \
2585: enum machine_mode xmode = GET_MODE (X); \
2586: if (xmode == SFmode) \
2587: return COSTS_N_INSNS (4); \
2588: \
2589: if (xmode == DFmode) \
2590: return COSTS_N_INSNS (5); \
2591: \
1.1.1.3 root 2592: return COSTS_N_INSNS (12); \
1.1 root 2593: } \
2594: \
2595: case DIV: \
2596: case MOD: \
2597: { \
2598: enum machine_mode xmode = GET_MODE (X); \
2599: if (xmode == SFmode) \
2600: return COSTS_N_INSNS (12); \
2601: \
2602: if (xmode == DFmode) \
2603: return COSTS_N_INSNS (19); \
2604: } \
2605: /* fall through */ \
2606: \
2607: case UDIV: \
2608: case UMOD: \
2609: return COSTS_N_INSNS (35);
2610:
2611: /* An expression giving the cost of an addressing mode that
2612: contains ADDRESS. If not defined, the cost is computed from the
2613: form of the ADDRESS expression and the `CONST_COSTS' values.
2614:
2615: For most CISC machines, the default cost is a good approximation
2616: of the true cost of the addressing mode. However, on RISC
2617: machines, all instructions normally have the same length and
2618: execution time. Hence all addresses will have equal costs.
2619:
2620: In cases where more than one form of an address is known, the
2621: form with the lowest cost will be used. If multiple forms have
2622: the same, lowest, cost, the one that is the most complex will be
2623: used.
2624:
2625: For example, suppose an address that is equal to the sum of a
2626: register and a constant is used twice in the same basic block.
2627: When this macro is not defined, the address will be computed in
2628: a register and memory references will be indirect through that
2629: register. On machines where the cost of the addressing mode
2630: containing the sum is no higher than that of a simple indirect
2631: reference, this will produce an additional instruction and
2632: possibly require an additional register. Proper specification
2633: of this macro eliminates this overhead for such machines.
2634:
2635: Similar use of this macro is made in strength reduction of loops.
2636:
2637: ADDRESS need not be valid as an address. In such a case, the
2638: cost is not relevant and can be any value; invalid addresses
2639: need not be assigned a different cost.
2640:
2641: On machines where an address involving more than one register is
2642: as cheap as an address computation involving only one register,
2643: defining `ADDRESS_COST' to reflect this can cause two registers
2644: to be live over a region of code where only one would have been
2645: if `ADDRESS_COST' were not defined in that manner. This effect
2646: should be considered in the definition of this macro.
2647: Equivalent costs should probably only be given to addresses with
2648: different numbers of registers on machines with lots of registers.
2649:
2650: This macro will normally either not be defined or be defined as
2651: a constant. */
2652:
2653: #define ADDRESS_COST(ADDR) (REG_P (ADDR) ? 1 : mips_address_cost (ADDR))
2654:
2655: /* A C expression for the cost of moving data from a register in
2656: class FROM to one in class TO. The classes are expressed using
2657: the enumeration values such as `GENERAL_REGS'. A value of 2 is
2658: the default; other values are interpreted relative to that.
2659:
2660: It is not required that the cost always equal 2 when FROM is the
2661: same as TO; on some machines it is expensive to move between
2662: registers if they are not general registers.
2663:
2664: If reload sees an insn consisting of a single `set' between two
2665: hard registers, and if `REGISTER_MOVE_COST' applied to their
2666: classes returns a value of 2, reload does not check to ensure
2667: that the constraints of the insn are met. Setting a cost of
2668: other than 2 will allow reload to verify that the constraints are
2669: met. You should do this if the `movM' pattern's constraints do
2670: not allow such copying. */
2671:
2672: #define REGISTER_MOVE_COST(FROM, TO) 4 /* force reload to use constraints */
2673:
2674: /* A C expression for the cost of a branch instruction. A value of
2675: 1 is the default; other values are interpreted relative to that. */
2676:
2677: #define BRANCH_COST \
2678: ((mips_cpu == PROCESSOR_R4000 || mips_cpu == PROCESSOR_R6000) ? 2 : 1)
2679:
2680:
2681: /* Used in by the peephole code. */
2682: #define classify_op(op,mode) (mips_rtx_classify[ (int)GET_CODE (op) ])
2683: #define additive_op(op,mode) ((classify_op (op,mode) & CLASS_ADD_OP) != 0)
2684: #define divmod_op(op,mode) ((classify_op (op,mode) & CLASS_DIVMOD_OP) != 0)
2685: #define unsigned_op(op,mode) ((classify_op (op,mode) & CLASS_UNSIGNED_OP) != 0)
2686:
2687: #define CLASS_ADD_OP 0x01 /* operator is PLUS/MINUS */
2688: #define CLASS_DIVMOD_OP 0x02 /* operator is {,U}{DIV,MOD} */
2689: #define CLASS_UNSIGNED_OP 0x04 /* operator is U{DIV,MOD} */
2690: #define CLASS_CMP_OP 0x08 /* operator is comparison */
2691: #define CLASS_EQUALITY_OP 0x10 /* operator is == or != */
2692: #define CLASS_FCMP_OP 0x08 /* operator is fp. compare */
2693:
2694: #define CLASS_UNS_CMP_OP (CLASS_UNSIGNED_OP | CLASS_CMP_OP)
2695:
2696:
2697: /* Optionally define this if you have added predicates to
2698: `MACHINE.c'. This macro is called within an initializer of an
2699: array of structures. The first field in the structure is the
1.1.1.2 root 2700: name of a predicate and the second field is an array of rtl
1.1 root 2701: codes. For each predicate, list all rtl codes that can be in
2702: expressions matched by the predicate. The list should have a
2703: trailing comma. Here is an example of two entries in the list
2704: for a typical RISC machine:
2705:
2706: #define PREDICATE_CODES \
2707: {"gen_reg_rtx_operand", {SUBREG, REG}}, \
2708: {"reg_or_short_cint_operand", {SUBREG, REG, CONST_INT}},
2709:
2710: Defining this macro does not affect the generated code (however,
2711: incorrect definitions that omit an rtl code that may be matched
2712: by the predicate can cause the compiler to malfunction).
2713: Instead, it allows the table built by `genrecog' to be more
2714: compact and efficient, thus speeding up the compiler. The most
2715: important predicates to include in the list specified by this
2716: macro are thoses used in the most insn patterns. */
2717:
2718: #define PREDICATE_CODES \
2719: {"uns_arith_operand", { REG, CONST_INT, SUBREG }}, \
2720: {"arith_operand", { REG, CONST_INT, SUBREG }}, \
2721: {"arith32_operand", { REG, CONST_INT, SUBREG }}, \
2722: {"reg_or_0_operand", { REG, CONST_INT, SUBREG }}, \
2723: {"small_int", { CONST_INT }}, \
2724: {"large_int", { CONST_INT }}, \
2725: {"md_register_operand", { REG }}, \
2726: {"mips_const_double_ok", { CONST_DOUBLE }}, \
2727: {"simple_memory_operand", { MEM, SUBREG }}, \
2728: {"equality_op", { EQ, NE }}, \
2729: {"cmp_op", { EQ, NE, GT, GE, GTU, GEU, LT, LE, \
2730: LTU, LEU }}, \
2731: {"cmp2_op", { EQ, NE, GT, GE, GTU, GEU, LT, LE, \
2732: LTU, LEU }}, \
2733: {"fcmp_op", { EQ, NE, GT, GE, LT, LE }}, \
2734: {"uns_cmp_op", { GTU, GEU, LTU, LEU }},
2735:
2736:
2737: /* If defined, a C statement to be executed just prior to the
2738: output of assembler code for INSN, to modify the extracted
2739: operands so they will be output differently.
2740:
2741: Here the argument OPVEC is the vector containing the operands
2742: extracted from INSN, and NOPERANDS is the number of elements of
2743: the vector which contain meaningful data for this insn. The
2744: contents of this vector are what will be used to convert the
2745: insn template into assembler code, so you can change the
2746: assembler output by changing the contents of the vector.
2747:
2748: We use it to check if the current insn needs a nop in front of it
2749: because of load delays, and also to update the delay slot
2750: statistics. */
2751:
2752: #define FINAL_PRESCAN_INSN(INSN, OPVEC, NOPERANDS) \
1.1.1.4 ! root 2753: final_prescan_insn (INSN, OPVEC, NOPERANDS)
1.1 root 2754:
2755:
2756: /* Tell final.c how to eliminate redundant test instructions.
2757: Here we define machine-dependent flags and fields in cc_status
2758: (see `conditions.h'). */
2759:
2760: /* A C compound statement to set the components of `cc_status'
2761: appropriately for an insn INSN whose body is EXP. It is this
2762: macro's responsibility to recognize insns that set the condition
2763: code as a byproduct of other activity as well as those that
2764: explicitly set `(cc0)'.
2765:
2766: This macro is not used on machines that do not use `cc0'. */
2767:
2768: #define NOTICE_UPDATE_CC(EXP, INSN) \
2769: do \
2770: { \
2771: enum attr_type type = get_attr_type (INSN); \
2772: if (type == TYPE_ICMP || type == TYPE_FCMP) \
2773: CC_STATUS_INIT; \
2774: } \
2775: while (0)
2776:
1.1.1.3 root 2777: /* A list of names to be used for additional modes for condition code
2778: values in registers. These names are added to `enum machine_mode'
2779: and all have class `MODE_CC'. By convention, they should start
2780: with `CC' and end with `mode'.
1.1 root 2781:
2782: You should only define this macro if your machine does not use
2783: `cc0' and only if additional modes are required.
2784:
1.1.1.3 root 2785: On the MIPS, we use CC_FPmode for all floating point except for not
2786: equal, CC_REV_FPmode for not equal (to reverse the sense of the
2787: jump), CC_EQmode for integer equality/inequality comparisons,
2788: CC_0mode for comparisons against 0, and CCmode for other integer
2789: comparisons. */
1.1 root 2790:
1.1.1.3 root 2791: #define EXTRA_CC_MODES CC_EQmode, CC_FPmode, CC_0mode, CC_REV_FPmode
1.1 root 2792:
2793: /* A list of C strings giving the names for the modes listed in
1.1.1.3 root 2794: `EXTRA_CC_MODES'. */
1.1 root 2795:
1.1.1.3 root 2796: #define EXTRA_CC_NAMES "CC_EQ", "CC_FP", "CC_0", "CC_REV_FP"
1.1 root 2797:
2798: /* Returns a mode from class `MODE_CC' to be used when comparison
1.1.1.3 root 2799: operation code OP is applied to rtx X. */
2800:
1.1.1.4 ! root 2801: #define SELECT_CC_MODE(OP, X, Y) \
1.1.1.3 root 2802: (GET_MODE_CLASS (GET_MODE (X)) != MODE_FLOAT \
2803: ? SImode \
2804: : ((OP == NE) ? CC_REV_FPmode : CC_FPmode))
1.1 root 2805:
2806:
2807: /* Control the assembler format that we output. */
2808:
2809: /* Output at beginning of assembler file.
2810: If we are optimizing to use the global pointer, create a temporary
2811: file to hold all of the text stuff, and write it out to the end.
2812: This is needed because the MIPS assembler is evidently one pass,
2813: and if it hasn't seen the relevant .comm/.lcomm/.extern/.sdata
2814: declaration when the code is processed, it generates a two
2815: instruction sequence. */
2816:
2817: #define ASM_FILE_START(STREAM) mips_asm_file_start (STREAM)
2818:
2819: /* Output to assembler file text saying following lines
2820: may contain character constants, extra white space, comments, etc. */
2821:
2822: #define ASM_APP_ON " #APP\n"
2823:
2824: /* Output to assembler file text saying following lines
2825: no longer contain unusual constructs. */
2826:
2827: #define ASM_APP_OFF " #NO_APP\n"
2828:
2829: /* How to refer to registers in assembler output.
2830: This sequence is indexed by compiler's hard-register-number (see above).
2831:
2832: In order to support the two different conventions for register names,
2833: we use the name of a table set up in mips.c, which is overwritten
2834: if -mrnames is used. */
2835:
2836: #define REGISTER_NAMES \
2837: { \
2838: &mips_reg_names[ 0][0], \
2839: &mips_reg_names[ 1][0], \
2840: &mips_reg_names[ 2][0], \
2841: &mips_reg_names[ 3][0], \
2842: &mips_reg_names[ 4][0], \
2843: &mips_reg_names[ 5][0], \
2844: &mips_reg_names[ 6][0], \
2845: &mips_reg_names[ 7][0], \
2846: &mips_reg_names[ 8][0], \
2847: &mips_reg_names[ 9][0], \
2848: &mips_reg_names[10][0], \
2849: &mips_reg_names[11][0], \
2850: &mips_reg_names[12][0], \
2851: &mips_reg_names[13][0], \
2852: &mips_reg_names[14][0], \
2853: &mips_reg_names[15][0], \
2854: &mips_reg_names[16][0], \
2855: &mips_reg_names[17][0], \
2856: &mips_reg_names[18][0], \
2857: &mips_reg_names[19][0], \
2858: &mips_reg_names[20][0], \
2859: &mips_reg_names[21][0], \
2860: &mips_reg_names[22][0], \
2861: &mips_reg_names[23][0], \
2862: &mips_reg_names[24][0], \
2863: &mips_reg_names[25][0], \
2864: &mips_reg_names[26][0], \
2865: &mips_reg_names[27][0], \
2866: &mips_reg_names[28][0], \
2867: &mips_reg_names[29][0], \
2868: &mips_reg_names[30][0], \
2869: &mips_reg_names[31][0], \
2870: &mips_reg_names[32][0], \
2871: &mips_reg_names[33][0], \
2872: &mips_reg_names[34][0], \
2873: &mips_reg_names[35][0], \
2874: &mips_reg_names[36][0], \
2875: &mips_reg_names[37][0], \
2876: &mips_reg_names[38][0], \
2877: &mips_reg_names[39][0], \
2878: &mips_reg_names[40][0], \
2879: &mips_reg_names[41][0], \
2880: &mips_reg_names[42][0], \
2881: &mips_reg_names[43][0], \
2882: &mips_reg_names[44][0], \
2883: &mips_reg_names[45][0], \
2884: &mips_reg_names[46][0], \
2885: &mips_reg_names[47][0], \
2886: &mips_reg_names[48][0], \
2887: &mips_reg_names[49][0], \
2888: &mips_reg_names[50][0], \
2889: &mips_reg_names[51][0], \
2890: &mips_reg_names[52][0], \
2891: &mips_reg_names[53][0], \
2892: &mips_reg_names[54][0], \
2893: &mips_reg_names[55][0], \
2894: &mips_reg_names[56][0], \
2895: &mips_reg_names[57][0], \
2896: &mips_reg_names[58][0], \
2897: &mips_reg_names[59][0], \
2898: &mips_reg_names[60][0], \
2899: &mips_reg_names[61][0], \
2900: &mips_reg_names[62][0], \
2901: &mips_reg_names[63][0], \
2902: &mips_reg_names[64][0], \
2903: &mips_reg_names[65][0], \
2904: &mips_reg_names[66][0], \
2905: }
2906:
1.1.1.4 ! root 2907: /* print-rtl.c can't use REGISTER_NAMES, since it depends on mips.c.
! 2908: So define this for it. */
! 2909: #define DEBUG_REGISTER_NAMES \
! 2910: { \
! 2911: "$0", "at", "v0", "v1", "a0", "a1", "a2", "a3", \
! 2912: "t0", "t1", "t2", "t3", "t4", "t5", "t6", "t7", \
! 2913: "s0", "s1", "s2", "s3", "s4", "s5", "s6", "s7", \
! 2914: "t8", "t9", "k0", "k1", "gp", "sp", "$fp", "ra", \
! 2915: "$f0", "$f1", "$f2", "$f3", "$f4", "$f5", "$f6", "$f7", \
! 2916: "$f8", "$f9", "$f10", "$f11", "$f12", "$f13", "$f14", "$f15", \
! 2917: "$f16", "$f17", "$f18", "$f19", "$f20", "$f21", "$f22", "$f23", \
! 2918: "$f24", "$f25", "$f26", "$f27", "$f28", "$f29", "$f30", "$f31", \
! 2919: "hi", "lo", "$fcr31" \
! 2920: }
! 2921:
1.1 root 2922: /* If defined, a C initializer for an array of structures
2923: containing a name and a register number. This macro defines
2924: additional names for hard registers, thus allowing the `asm'
2925: option in declarations to refer to registers using alternate
2926: names.
2927:
2928: We define both names for the integer registers here. */
2929:
2930: #define ADDITIONAL_REGISTER_NAMES \
2931: { \
2932: { "$0", 0 + GP_REG_FIRST }, \
2933: { "$1", 1 + GP_REG_FIRST }, \
2934: { "$2", 2 + GP_REG_FIRST }, \
2935: { "$3", 3 + GP_REG_FIRST }, \
2936: { "$4", 4 + GP_REG_FIRST }, \
2937: { "$5", 5 + GP_REG_FIRST }, \
2938: { "$6", 6 + GP_REG_FIRST }, \
2939: { "$7", 7 + GP_REG_FIRST }, \
2940: { "$8", 8 + GP_REG_FIRST }, \
2941: { "$9", 9 + GP_REG_FIRST }, \
2942: { "$10", 10 + GP_REG_FIRST }, \
2943: { "$11", 11 + GP_REG_FIRST }, \
2944: { "$12", 12 + GP_REG_FIRST }, \
2945: { "$13", 13 + GP_REG_FIRST }, \
2946: { "$14", 14 + GP_REG_FIRST }, \
2947: { "$15", 15 + GP_REG_FIRST }, \
2948: { "$16", 16 + GP_REG_FIRST }, \
2949: { "$17", 17 + GP_REG_FIRST }, \
2950: { "$18", 18 + GP_REG_FIRST }, \
2951: { "$19", 19 + GP_REG_FIRST }, \
2952: { "$20", 20 + GP_REG_FIRST }, \
2953: { "$21", 21 + GP_REG_FIRST }, \
2954: { "$22", 22 + GP_REG_FIRST }, \
2955: { "$23", 23 + GP_REG_FIRST }, \
2956: { "$24", 24 + GP_REG_FIRST }, \
2957: { "$25", 25 + GP_REG_FIRST }, \
2958: { "$26", 26 + GP_REG_FIRST }, \
2959: { "$27", 27 + GP_REG_FIRST }, \
2960: { "$28", 28 + GP_REG_FIRST }, \
2961: { "$29", 29 + GP_REG_FIRST }, \
2962: { "$30", 30 + GP_REG_FIRST }, \
2963: { "$31", 31 + GP_REG_FIRST }, \
2964: { "$sp", 29 + GP_REG_FIRST }, \
2965: { "$fp", 30 + GP_REG_FIRST }, \
2966: { "at", 1 + GP_REG_FIRST }, \
2967: { "v0", 2 + GP_REG_FIRST }, \
2968: { "v1", 3 + GP_REG_FIRST }, \
2969: { "a0", 4 + GP_REG_FIRST }, \
2970: { "a1", 5 + GP_REG_FIRST }, \
2971: { "a2", 6 + GP_REG_FIRST }, \
2972: { "a3", 7 + GP_REG_FIRST }, \
2973: { "t0", 8 + GP_REG_FIRST }, \
2974: { "t1", 9 + GP_REG_FIRST }, \
2975: { "t2", 10 + GP_REG_FIRST }, \
2976: { "t3", 11 + GP_REG_FIRST }, \
2977: { "t4", 12 + GP_REG_FIRST }, \
2978: { "t5", 13 + GP_REG_FIRST }, \
2979: { "t6", 14 + GP_REG_FIRST }, \
2980: { "t7", 15 + GP_REG_FIRST }, \
2981: { "s0", 16 + GP_REG_FIRST }, \
2982: { "s1", 17 + GP_REG_FIRST }, \
2983: { "s2", 18 + GP_REG_FIRST }, \
2984: { "s3", 19 + GP_REG_FIRST }, \
2985: { "s4", 20 + GP_REG_FIRST }, \
2986: { "s5", 21 + GP_REG_FIRST }, \
2987: { "s6", 22 + GP_REG_FIRST }, \
2988: { "s7", 23 + GP_REG_FIRST }, \
2989: { "t8", 24 + GP_REG_FIRST }, \
2990: { "t9", 25 + GP_REG_FIRST }, \
2991: { "k0", 26 + GP_REG_FIRST }, \
2992: { "k1", 27 + GP_REG_FIRST }, \
2993: { "gp", 28 + GP_REG_FIRST }, \
2994: { "sp", 29 + GP_REG_FIRST }, \
2995: { "fp", 30 + GP_REG_FIRST }, \
2996: { "ra", 31 + GP_REG_FIRST }, \
1.1.1.3 root 2997: { "$sp", 29 + GP_REG_FIRST }, \
2998: { "$fp", 30 + GP_REG_FIRST }, \
2999: { "cc", FPSW_REGNUM }, \
1.1 root 3000: }
3001:
3002: /* Define results of standard character escape sequences. */
3003: #define TARGET_BELL 007
3004: #define TARGET_BS 010
3005: #define TARGET_TAB 011
3006: #define TARGET_NEWLINE 012
3007: #define TARGET_VT 013
3008: #define TARGET_FF 014
3009: #define TARGET_CR 015
3010:
3011: /* A C compound statement to output to stdio stream STREAM the
3012: assembler syntax for an instruction operand X. X is an RTL
3013: expression.
3014:
3015: CODE is a value that can be used to specify one of several ways
3016: of printing the operand. It is used when identical operands
3017: must be printed differently depending on the context. CODE
3018: comes from the `%' specification that was used to request
3019: printing of the operand. If the specification was just `%DIGIT'
3020: then CODE is 0; if the specification was `%LTR DIGIT' then CODE
3021: is the ASCII code for LTR.
3022:
3023: If X is a register, this macro should print the register's name.
3024: The names can be found in an array `reg_names' whose type is
3025: `char *[]'. `reg_names' is initialized from `REGISTER_NAMES'.
3026:
3027: When the machine description has a specification `%PUNCT' (a `%'
3028: followed by a punctuation character), this macro is called with
3029: a null pointer for X and the punctuation character for CODE.
3030:
3031: See mips.c for the MIPS specific codes. */
3032:
3033: #define PRINT_OPERAND(FILE, X, CODE) print_operand (FILE, X, CODE)
3034:
3035: /* A C expression which evaluates to true if CODE is a valid
3036: punctuation character for use in the `PRINT_OPERAND' macro. If
3037: `PRINT_OPERAND_PUNCT_VALID_P' is not defined, it means that no
3038: punctuation characters (except for the standard one, `%') are
3039: used in this way. */
3040:
3041: #define PRINT_OPERAND_PUNCT_VALID_P(CODE) mips_print_operand_punct[CODE]
3042:
3043: /* A C compound statement to output to stdio stream STREAM the
3044: assembler syntax for an instruction operand that is a memory
3045: reference whose address is ADDR. ADDR is an RTL expression.
3046:
3047: On some machines, the syntax for a symbolic address depends on
3048: the section that the address refers to. On these machines,
3049: define the macro `ENCODE_SECTION_INFO' to store the information
3050: into the `symbol_ref', and then check for it here. */
3051:
3052: #define PRINT_OPERAND_ADDRESS(FILE, ADDR) print_operand_address (FILE, ADDR)
3053:
3054:
3055: /* A C statement, to be executed after all slot-filler instructions
3056: have been output. If necessary, call `dbr_sequence_length' to
3057: determine the number of slots filled in a sequence (zero if not
3058: currently outputting a sequence), to decide how many no-ops to
3059: output, or whatever.
3060:
3061: Don't define this macro if it has nothing to do, but it is
3062: helpful in reading assembly output if the extent of the delay
3063: sequence is made explicit (e.g. with white space).
3064:
3065: Note that output routines for instructions with delay slots must
3066: be prepared to deal with not being output as part of a sequence
3067: (i.e. when the scheduling pass is not run, or when no slot
3068: fillers could be found.) The variable `final_sequence' is null
3069: when not processing a sequence, otherwise it contains the
3070: `sequence' rtx being output. */
3071:
3072: #define DBR_OUTPUT_SEQEND(STREAM) \
3073: do \
3074: { \
3075: if (set_nomacro > 0 && --set_nomacro == 0) \
3076: fputs ("\t.set\tmacro\n", STREAM); \
3077: \
3078: if (set_noreorder > 0 && --set_noreorder == 0) \
3079: fputs ("\t.set\treorder\n", STREAM); \
3080: \
3081: dslots_jump_filled++; \
3082: fputs ("\n", STREAM); \
3083: } \
3084: while (0)
3085:
3086:
3087: /* How to tell the debugger about changes of source files. Note, the
3088: mips ECOFF format cannot deal with changes of files inside of
3089: functions, which means the output of parser generators like bison
3090: is generally not debuggable without using the -l switch. Lose,
3091: lose, lose. Silicon graphics seems to want all .file's hardwired
3092: to 1. */
3093:
3094: #ifndef SET_FILE_NUMBER
3095: #define SET_FILE_NUMBER() ++num_source_filenames
3096: #endif
3097:
3098: #define ASM_OUTPUT_SOURCE_FILENAME(STREAM, NAME) \
3099: mips_output_filename (STREAM, NAME)
3100:
3101: /* This is how to output a note the debugger telling it the line number
3102: to which the following sequence of instructions corresponds.
3103: Silicon graphics puts a label after each .loc. */
3104:
3105: #ifndef LABEL_AFTER_LOC
3106: #define LABEL_AFTER_LOC(STREAM)
3107: #endif
3108:
3109: #define ASM_OUTPUT_SOURCE_LINE(STREAM, LINE) \
3110: mips_output_lineno (STREAM, LINE)
3111:
3112: /* The MIPS implementation uses some labels for it's own purposed. The
3113: following lists what labels are created, and are all formed by the
3114: pattern $L[a-z].*. The machine independent portion of GCC creates
3115: labels matching: $L[A-Z][0-9]+ and $L[0-9]+.
3116:
1.1.1.3 root 3117: LM[0-9]+ Silicon Graphics/ECOFF stabs label before each stmt.
1.1 root 3118: $Lb[0-9]+ Begin blocks for MIPS debug support
3119: $Lc[0-9]+ Label for use in s<xx> operation.
3120: $Le[0-9]+ End blocks for MIPS debug support
1.1.1.4 ! root 3121: $Lp\..+ Half-pic labels. */
1.1 root 3122:
3123: /* This is how to output the definition of a user-level label named NAME,
3124: such as the label on a static function or variable NAME.
3125:
3126: If we are optimizing the gp, remember that this label has been put
3127: out, so we know not to emit an .extern for it in mips_asm_file_end.
3128: We use one of the common bits in the IDENTIFIER tree node for this,
3129: since those bits seem to be unused, and we don't have any method
3130: of getting the decl nodes from the name. */
3131:
3132: #define ASM_OUTPUT_LABEL(STREAM,NAME) \
3133: do { \
3134: assemble_name (STREAM, NAME); \
3135: fputs (":\n", STREAM); \
3136: } while (0)
3137:
1.1.1.2 root 3138:
3139: /* A C statement (sans semicolon) to output to the stdio stream
3140: STREAM any text necessary for declaring the name NAME of an
3141: initialized variable which is being defined. This macro must
3142: output the label definition (perhaps using `ASM_OUTPUT_LABEL').
3143: The argument DECL is the `VAR_DECL' tree node representing the
3144: variable.
3145:
3146: If this macro is not defined, then the variable name is defined
3147: in the usual manner as a label (by means of `ASM_OUTPUT_LABEL'). */
3148:
3149: #define ASM_DECLARE_OBJECT_NAME(STREAM, NAME, DECL) \
1.1.1.3 root 3150: do \
3151: { \
3152: mips_declare_object (STREAM, NAME, "", ":\n", 0); \
3153: HALF_PIC_DECLARE (NAME); \
3154: } \
3155: while (0)
1.1.1.2 root 3156:
1.1 root 3157:
3158: /* This is how to output a command to make the user-level label named NAME
3159: defined for reference from other files. */
3160:
3161: #define ASM_GLOBALIZE_LABEL(STREAM,NAME) \
3162: do { \
3163: fputs ("\t.globl\t", STREAM); \
3164: assemble_name (STREAM, NAME); \
3165: fputs ("\n", STREAM); \
3166: } while (0)
3167:
1.1.1.2 root 3168: /* This says how to define a global common symbol. */
1.1 root 3169:
3170: #define ASM_OUTPUT_COMMON(STREAM, NAME, SIZE, ROUNDED) \
1.1.1.2 root 3171: mips_declare_object (STREAM, NAME, "\n\t.comm\t", ",%u\n", (ROUNDED))
1.1 root 3172:
1.1.1.3 root 3173: /* This says how to define a local common symbol (ie, not visible to
1.1.1.2 root 3174: linker). */
1.1 root 3175:
3176: #define ASM_OUTPUT_LOCAL(STREAM, NAME, SIZE, ROUNDED) \
1.1.1.2 root 3177: mips_declare_object (STREAM, NAME, "\n\t.lcomm\t", ",%u\n", (ROUNDED))
1.1 root 3178:
3179:
3180: /* This says how to output an external. It would be possible not to
3181: output anything and let undefined symbol become external. However
3182: the assembler uses length information on externals to allocate in
3183: data/sdata bss/sbss, thereby saving exec time. */
3184:
3185: #define ASM_OUTPUT_EXTERNAL(STREAM,DECL,NAME) \
3186: mips_output_external(STREAM,DECL,NAME)
3187:
3188: /* This says what to print at the end of the assembly file */
3189: #define ASM_FILE_END(STREAM) mips_asm_file_end(STREAM)
3190:
3191:
3192: /* This is how to declare a function name. The actual work of
3193: emitting the label is moved to function_prologue, so that we can
3194: get the line number correctly emitted before the .ent directive,
3195: and after any .file directives.
3196:
3197: Also, switch files if we are optimizing the global pointer. */
3198:
3199: #define ASM_DECLARE_FUNCTION_NAME(STREAM,NAME,DECL) \
3200: { \
3201: extern FILE *asm_out_text_file; \
3202: if (TARGET_GP_OPT) \
3203: STREAM = asm_out_text_file; \
3204: \
3205: current_function_name = NAME; \
1.1.1.3 root 3206: HALF_PIC_DECLARE (NAME); \
1.1 root 3207: }
3208:
3209: /* This is how to output a reference to a user-level label named NAME.
3210: `assemble_name' uses this. */
3211:
3212: #define ASM_OUTPUT_LABELREF(STREAM,NAME) fprintf (STREAM, "%s", NAME)
3213:
3214: /* This is how to output an internal numbered label where
3215: PREFIX is the class of label and NUM is the number within the class. */
3216:
3217: #define ASM_OUTPUT_INTERNAL_LABEL(STREAM,PREFIX,NUM) \
3218: fprintf (STREAM, "$%s%d:\n", PREFIX, NUM)
3219:
3220: /* This is how to store into the string LABEL
3221: the symbol_ref name of an internal numbered label where
3222: PREFIX is the class of label and NUM is the number within the class.
3223: This is suitable for output with `assemble_name'. */
3224:
3225: #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \
3226: sprintf (LABEL, "*$%s%d", PREFIX, NUM)
3227:
3228: /* This is how to output an assembler line defining a `double' constant. */
3229:
3230: #define ASM_OUTPUT_DOUBLE(STREAM,VALUE) \
1.1.1.3 root 3231: mips_output_double (STREAM, VALUE)
3232:
1.1 root 3233:
3234: /* This is how to output an assembler line defining a `float' constant. */
3235:
3236: #define ASM_OUTPUT_FLOAT(STREAM,VALUE) \
1.1.1.3 root 3237: mips_output_float (STREAM, VALUE)
3238:
1.1 root 3239:
3240: /* This is how to output an assembler line defining an `int' constant. */
3241:
3242: #define ASM_OUTPUT_INT(STREAM,VALUE) \
3243: do { \
3244: fprintf (STREAM, "\t.word\t"); \
3245: output_addr_const (STREAM, (VALUE)); \
3246: fprintf (STREAM, "\n"); \
3247: } while (0)
3248:
3249: /* Likewise for `char' and `short' constants. */
3250:
3251: #define ASM_OUTPUT_SHORT(STREAM,VALUE) \
3252: { \
3253: fprintf (STREAM, "\t.half\t"); \
3254: output_addr_const (STREAM, (VALUE)); \
3255: fprintf (STREAM, "\n"); \
3256: }
3257:
3258: #define ASM_OUTPUT_CHAR(STREAM,VALUE) \
3259: { \
3260: fprintf (STREAM, "\t.byte\t"); \
3261: output_addr_const (STREAM, (VALUE)); \
3262: fprintf (STREAM, "\n"); \
3263: }
3264:
3265: /* This is how to output an assembler line for a numeric constant byte. */
3266:
3267: #define ASM_OUTPUT_BYTE(STREAM,VALUE) \
3268: fprintf (STREAM, "\t.byte\t0x%x\n", (VALUE))
3269:
3270: /* This is how to output an element of a case-vector that is absolute. */
3271:
3272: #define ASM_OUTPUT_ADDR_VEC_ELT(STREAM, VALUE) \
3273: fprintf (STREAM, "\t.word\t$L%d\n", VALUE)
3274:
3275: /* This is how to output an element of a case-vector that is relative.
3276: (We do not use such vectors,
3277: but we must define this macro anyway.) */
3278:
3279: #define ASM_OUTPUT_ADDR_DIFF_ELT(STREAM, VALUE, REL) \
3280: fprintf (STREAM, "\t.word\t$L%d-$L%d\n", VALUE, REL)
3281:
3282: /* This is how to emit the initial label for switch statements. We
3283: need to put the switch labels somewhere else from the text section,
3284: because the MIPS assembler gets real confused about line numbers if
3285: .word's appear in the text section. */
3286:
3287: #define ASM_OUTPUT_CASE_LABEL(STREAM, PREFIX, NUM, JUMPTABLE) \
3288: { \
3289: rdata_section (); \
3290: ASM_OUTPUT_ALIGN (STREAM, 2); \
3291: ASM_OUTPUT_INTERNAL_LABEL (STREAM, PREFIX, NUM); \
3292: }
3293:
3294: /* This is how to output an assembler line
3295: that says to advance the location counter
3296: to a multiple of 2**LOG bytes. */
3297:
3298: #define ASM_OUTPUT_ALIGN(STREAM,LOG) \
3299: { \
3300: int mask = (1 << (LOG)) - 1; \
3301: fprintf (STREAM, "\t.align\t%d\n", (LOG)); \
3302: }
3303:
3304: /* This is how to output an assembler line to to advance the location
3305: counter by SIZE bytes. */
3306:
3307: #define ASM_OUTPUT_SKIP(STREAM,SIZE) \
3308: fprintf (STREAM, "\t.space\t%u\n", (SIZE))
3309:
3310:
3311: /* This is how to output a string. */
3312: #define ASM_OUTPUT_ASCII(STREAM, STRING, LEN) \
3313: do { \
3314: register int i, c, len = (LEN), cur_pos = 17; \
3315: register unsigned char *string = (unsigned char *)(STRING); \
3316: fprintf ((STREAM), "\t.ascii\t\""); \
3317: for (i = 0; i < len; i++) \
3318: { \
3319: register int c = string[i]; \
3320: \
3321: switch (c) \
3322: { \
3323: case '\"': \
3324: case '\\': \
3325: putc ('\\', (STREAM)); \
3326: putc (c, (STREAM)); \
3327: cur_pos += 2; \
3328: break; \
3329: \
3330: case TARGET_NEWLINE: \
3331: fputs ("\\n", (STREAM)); \
3332: if (i+1 < len \
3333: && (((c = string[i+1]) >= '\040' && c <= '~') \
3334: || c == TARGET_TAB)) \
3335: cur_pos = 32767; /* break right here */ \
3336: else \
3337: cur_pos += 2; \
3338: break; \
3339: \
3340: case TARGET_TAB: \
3341: fputs ("\\t", (STREAM)); \
3342: cur_pos += 2; \
3343: break; \
3344: \
3345: case TARGET_FF: \
3346: fputs ("\\f", (STREAM)); \
3347: cur_pos += 2; \
3348: break; \
3349: \
3350: case TARGET_BS: \
3351: fputs ("\\b", (STREAM)); \
3352: cur_pos += 2; \
3353: break; \
3354: \
3355: case TARGET_CR: \
3356: fputs ("\\r", (STREAM)); \
3357: cur_pos += 2; \
3358: break; \
3359: \
3360: default: \
3361: if (c >= ' ' && c < 0177) \
3362: { \
3363: putc (c, (STREAM)); \
3364: cur_pos++; \
3365: } \
3366: else \
3367: { \
3368: fprintf ((STREAM), "\\%03o", c); \
3369: cur_pos += 4; \
3370: } \
3371: } \
3372: \
3373: if (cur_pos > 72 && i+1 < len) \
3374: { \
3375: cur_pos = 17; \
3376: fprintf ((STREAM), "\"\n\t.ascii\t\""); \
3377: } \
3378: } \
3379: fprintf ((STREAM), "\"\n"); \
3380: } while (0)
3381:
3382: /* Handle certain cpp directives used in header files on sysV. */
3383: #define SCCS_DIRECTIVE
3384:
3385: /* Output #ident as a in the read-only data section. */
3386: #define ASM_OUTPUT_IDENT(FILE, STRING) \
3387: { \
3388: char *p = STRING; \
3389: int size = strlen (p) + 1; \
3390: rdata_section (); \
3391: assemble_string (p, size); \
3392: }
3393:
3394:
1.1.1.3 root 3395: /* Define the strings to put out for each section in the object file. */
3396: #define TEXT_SECTION_ASM_OP "\t.text" /* instructions */
3397: #define DATA_SECTION_ASM_OP "\t.data" /* large data */
3398: #define SDATA_SECTION_ASM_OP "\t.sdata" /* small data */
3399: #define RDATA_SECTION_ASM_OP "\t.rdata" /* read-only data */
3400: #define READONLY_DATA_SECTION rdata_section
1.1 root 3401:
3402: /* What other sections we support other than the normal .data/.text. */
3403:
3404: #define EXTRA_SECTIONS in_sdata, in_rdata, in_last_p1
3405:
3406: /* Define the additional functions to select our additional sections. */
3407:
3408: /* on the MIPS it is not a good idea to put constants in the text
3409: section, since this defeats the sdata/data mechanism. This is
3410: especially true when -O is used. In this case an effort is made to
3411: address with faster (gp) register relative addressing, which can
3412: only get at sdata and sbss items (there is no stext !!) However,
3413: if the constant is too large for sdata, and it's readonly, it
3414: will go into the .rdata section. */
3415:
3416: #define EXTRA_SECTION_FUNCTIONS \
3417: void \
3418: sdata_section () \
3419: { \
3420: if (in_section != in_sdata) \
3421: { \
3422: fprintf (asm_out_file, "%s\n", SDATA_SECTION_ASM_OP); \
3423: in_section = in_sdata; \
3424: } \
3425: } \
3426: \
3427: void \
3428: rdata_section () \
3429: { \
3430: if (in_section != in_rdata) \
3431: { \
3432: fprintf (asm_out_file, "%s\n", RDATA_SECTION_ASM_OP); \
3433: in_section = in_rdata; \
3434: } \
3435: }
3436:
3437: /* Given a decl node or constant node, choose the section to output it in
3438: and select that section. */
3439:
1.1.1.4 ! root 3440: #define SELECT_RTX_SECTION(MODE,RTX) \
1.1 root 3441: { \
3442: if ((GET_MODE_SIZE(MODE) / BITS_PER_UNIT) <= mips_section_threshold \
3443: && mips_section_threshold > 0) \
3444: sdata_section (); \
3445: else \
3446: rdata_section (); \
3447: } \
3448:
3449: #define SELECT_SECTION(DECL,RELOC) \
3450: { \
3451: if (int_size_in_bytes (TREE_TYPE (DECL)) <= mips_section_threshold \
3452: && mips_section_threshold > 0) \
3453: sdata_section (); \
3454: else if (TREE_CODE (DECL) == STRING_CST) \
3455: { \
3456: if (flag_writable_strings) \
3457: data_section (); \
3458: else \
3459: rdata_section (); \
3460: } \
3461: else if (TREE_CODE (DECL) != VAR_DECL) \
3462: rdata_section (); \
3463: else if (!TREE_READONLY (DECL)) \
3464: data_section (); \
3465: else \
3466: rdata_section (); \
3467: }
3468:
3469:
3470: /* Store in OUTPUT a string (made with alloca) containing
3471: an assembler-name for a local static variable named NAME.
3472: LABELNO is an integer which is different for each call. */
3473:
3474: #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \
3475: ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \
3476: sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO)))
3477:
3478: #define ASM_OUTPUT_REG_PUSH(STREAM,REGNO) \
3479: do \
3480: { \
3481: fprintf (STREAM, "\tsubu\t%s,%s,8\n\tsw\t%s,0(%s)\n", \
3482: reg_names[STACK_POINTER_REGNUM], \
3483: reg_names[STACK_POINTER_REGNUM], \
3484: reg_names[REGNO], \
3485: reg_names[STACK_POINTER_REGNUM]); \
3486: } \
3487: while (0)
3488:
3489: #define ASM_OUTPUT_REG_POP(STREAM,REGNO) \
3490: do \
3491: { \
3492: if (! set_noreorder) \
3493: fprintf (STREAM, "\t.set\tnoreorder\n"); \
3494: \
3495: dslots_load_total++; \
3496: dslots_load_filled++; \
3497: fprintf (STREAM, "\tlw\t%s,0(%s)\n\taddu\t%s,%s,8\n", \
3498: reg_names[REGNO], \
3499: reg_names[STACK_POINTER_REGNUM], \
3500: reg_names[STACK_POINTER_REGNUM], \
3501: reg_names[STACK_POINTER_REGNUM]); \
3502: \
3503: if (! set_noreorder) \
3504: fprintf (STREAM, "\t.set\treorder\n"); \
3505: } \
3506: while (0)
3507:
3508: /* Define the parentheses used to group arithmetic operations
3509: in assembler code. */
3510:
3511: #define ASM_OPEN_PAREN "("
3512: #define ASM_CLOSE_PAREN ")"
3513:
3514: /* How to start an assembler comment. */
3515: #ifndef ASM_COMMENT_START
3516: #define ASM_COMMENT_START "\t\t# "
3517: #endif
3518:
3519:
3520:
3521: /* Macros for mips-tfile.c to encapsulate stabs in ECOFF, and for
3522: and mips-tdump.c to print them out.
3523:
3524: These must match the corresponding definitions in gdb/mipsread.c.
3525: Unfortunately, gcc and gdb do not currently share any directories. */
3526:
3527: #define CODE_MASK 0x8F300
3528: #define MIPS_IS_STAB(sym) (((sym)->index & 0xFFF00) == CODE_MASK)
3529: #define MIPS_MARK_STAB(code) ((code)+CODE_MASK)
3530: #define MIPS_UNMARK_STAB(code) ((code)-CODE_MASK)
1.1.1.3 root 3531:
1.1.1.4 ! root 3532:
! 3533: /* Default definitions for size_t and ptrdiff_t. */
! 3534:
! 3535: #ifndef SIZE_TYPE
! 3536: #define SIZE_TYPE "unsigned int"
! 3537: #endif
! 3538:
! 3539: #ifndef PTRDIFF_TYPE
! 3540: #define PTRDIFF_TYPE "int"
! 3541: #endif
! 3542:
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